realtek-smi.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Realtek Simple Management Interface (SMI) driver
  3. * It can be discussed how "simple" this interface is.
  4. *
  5. * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
  6. * but the protocol is not MDIO at all. Instead it is a Realtek
  7. * pecularity that need to bit-bang the lines in a special way to
  8. * communicate with the switch.
  9. *
  10. * ASICs we intend to support with this driver:
  11. *
  12. * RTL8366 - The original version, apparently
  13. * RTL8369 - Similar enough to have the same datsheet as RTL8366
  14. * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
  15. * different register layout from the other two
  16. * RTL8366S - Is this "RTL8366 super"?
  17. * RTL8367 - Has an OpenWRT driver as well
  18. * RTL8368S - Seems to be an alternative name for RTL8366RB
  19. * RTL8370 - Also uses SMI
  20. *
  21. * Copyright (C) 2017 Linus Walleij <[email protected]>
  22. * Copyright (C) 2010 Antti Seppälä <[email protected]>
  23. * Copyright (C) 2010 Roman Yeryomin <[email protected]>
  24. * Copyright (C) 2011 Colin Leitner <[email protected]>
  25. * Copyright (C) 2009-2010 Gabor Juhos <[email protected]>
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/device.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of.h>
  33. #include <linux/of_device.h>
  34. #include <linux/of_mdio.h>
  35. #include <linux/delay.h>
  36. #include <linux/gpio/consumer.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/regmap.h>
  39. #include <linux/bitops.h>
  40. #include <linux/if_bridge.h>
  41. #include "realtek.h"
  42. #define REALTEK_SMI_ACK_RETRY_COUNT 5
  43. static inline void realtek_smi_clk_delay(struct realtek_priv *priv)
  44. {
  45. ndelay(priv->clk_delay);
  46. }
  47. static void realtek_smi_start(struct realtek_priv *priv)
  48. {
  49. /* Set GPIO pins to output mode, with initial state:
  50. * SCK = 0, SDA = 1
  51. */
  52. gpiod_direction_output(priv->mdc, 0);
  53. gpiod_direction_output(priv->mdio, 1);
  54. realtek_smi_clk_delay(priv);
  55. /* CLK 1: 0 -> 1, 1 -> 0 */
  56. gpiod_set_value(priv->mdc, 1);
  57. realtek_smi_clk_delay(priv);
  58. gpiod_set_value(priv->mdc, 0);
  59. realtek_smi_clk_delay(priv);
  60. /* CLK 2: */
  61. gpiod_set_value(priv->mdc, 1);
  62. realtek_smi_clk_delay(priv);
  63. gpiod_set_value(priv->mdio, 0);
  64. realtek_smi_clk_delay(priv);
  65. gpiod_set_value(priv->mdc, 0);
  66. realtek_smi_clk_delay(priv);
  67. gpiod_set_value(priv->mdio, 1);
  68. }
  69. static void realtek_smi_stop(struct realtek_priv *priv)
  70. {
  71. realtek_smi_clk_delay(priv);
  72. gpiod_set_value(priv->mdio, 0);
  73. gpiod_set_value(priv->mdc, 1);
  74. realtek_smi_clk_delay(priv);
  75. gpiod_set_value(priv->mdio, 1);
  76. realtek_smi_clk_delay(priv);
  77. gpiod_set_value(priv->mdc, 1);
  78. realtek_smi_clk_delay(priv);
  79. gpiod_set_value(priv->mdc, 0);
  80. realtek_smi_clk_delay(priv);
  81. gpiod_set_value(priv->mdc, 1);
  82. /* Add a click */
  83. realtek_smi_clk_delay(priv);
  84. gpiod_set_value(priv->mdc, 0);
  85. realtek_smi_clk_delay(priv);
  86. gpiod_set_value(priv->mdc, 1);
  87. /* Set GPIO pins to input mode */
  88. gpiod_direction_input(priv->mdio);
  89. gpiod_direction_input(priv->mdc);
  90. }
  91. static void realtek_smi_write_bits(struct realtek_priv *priv, u32 data, u32 len)
  92. {
  93. for (; len > 0; len--) {
  94. realtek_smi_clk_delay(priv);
  95. /* Prepare data */
  96. gpiod_set_value(priv->mdio, !!(data & (1 << (len - 1))));
  97. realtek_smi_clk_delay(priv);
  98. /* Clocking */
  99. gpiod_set_value(priv->mdc, 1);
  100. realtek_smi_clk_delay(priv);
  101. gpiod_set_value(priv->mdc, 0);
  102. }
  103. }
  104. static void realtek_smi_read_bits(struct realtek_priv *priv, u32 len, u32 *data)
  105. {
  106. gpiod_direction_input(priv->mdio);
  107. for (*data = 0; len > 0; len--) {
  108. u32 u;
  109. realtek_smi_clk_delay(priv);
  110. /* Clocking */
  111. gpiod_set_value(priv->mdc, 1);
  112. realtek_smi_clk_delay(priv);
  113. u = !!gpiod_get_value(priv->mdio);
  114. gpiod_set_value(priv->mdc, 0);
  115. *data |= (u << (len - 1));
  116. }
  117. gpiod_direction_output(priv->mdio, 0);
  118. }
  119. static int realtek_smi_wait_for_ack(struct realtek_priv *priv)
  120. {
  121. int retry_cnt;
  122. retry_cnt = 0;
  123. do {
  124. u32 ack;
  125. realtek_smi_read_bits(priv, 1, &ack);
  126. if (ack == 0)
  127. break;
  128. if (++retry_cnt > REALTEK_SMI_ACK_RETRY_COUNT) {
  129. dev_err(priv->dev, "ACK timeout\n");
  130. return -ETIMEDOUT;
  131. }
  132. } while (1);
  133. return 0;
  134. }
  135. static int realtek_smi_write_byte(struct realtek_priv *priv, u8 data)
  136. {
  137. realtek_smi_write_bits(priv, data, 8);
  138. return realtek_smi_wait_for_ack(priv);
  139. }
  140. static int realtek_smi_write_byte_noack(struct realtek_priv *priv, u8 data)
  141. {
  142. realtek_smi_write_bits(priv, data, 8);
  143. return 0;
  144. }
  145. static int realtek_smi_read_byte0(struct realtek_priv *priv, u8 *data)
  146. {
  147. u32 t;
  148. /* Read data */
  149. realtek_smi_read_bits(priv, 8, &t);
  150. *data = (t & 0xff);
  151. /* Send an ACK */
  152. realtek_smi_write_bits(priv, 0x00, 1);
  153. return 0;
  154. }
  155. static int realtek_smi_read_byte1(struct realtek_priv *priv, u8 *data)
  156. {
  157. u32 t;
  158. /* Read data */
  159. realtek_smi_read_bits(priv, 8, &t);
  160. *data = (t & 0xff);
  161. /* Send an ACK */
  162. realtek_smi_write_bits(priv, 0x01, 1);
  163. return 0;
  164. }
  165. static int realtek_smi_read_reg(struct realtek_priv *priv, u32 addr, u32 *data)
  166. {
  167. unsigned long flags;
  168. u8 lo = 0;
  169. u8 hi = 0;
  170. int ret;
  171. spin_lock_irqsave(&priv->lock, flags);
  172. realtek_smi_start(priv);
  173. /* Send READ command */
  174. ret = realtek_smi_write_byte(priv, priv->cmd_read);
  175. if (ret)
  176. goto out;
  177. /* Set ADDR[7:0] */
  178. ret = realtek_smi_write_byte(priv, addr & 0xff);
  179. if (ret)
  180. goto out;
  181. /* Set ADDR[15:8] */
  182. ret = realtek_smi_write_byte(priv, addr >> 8);
  183. if (ret)
  184. goto out;
  185. /* Read DATA[7:0] */
  186. realtek_smi_read_byte0(priv, &lo);
  187. /* Read DATA[15:8] */
  188. realtek_smi_read_byte1(priv, &hi);
  189. *data = ((u32)lo) | (((u32)hi) << 8);
  190. ret = 0;
  191. out:
  192. realtek_smi_stop(priv);
  193. spin_unlock_irqrestore(&priv->lock, flags);
  194. return ret;
  195. }
  196. static int realtek_smi_write_reg(struct realtek_priv *priv,
  197. u32 addr, u32 data, bool ack)
  198. {
  199. unsigned long flags;
  200. int ret;
  201. spin_lock_irqsave(&priv->lock, flags);
  202. realtek_smi_start(priv);
  203. /* Send WRITE command */
  204. ret = realtek_smi_write_byte(priv, priv->cmd_write);
  205. if (ret)
  206. goto out;
  207. /* Set ADDR[7:0] */
  208. ret = realtek_smi_write_byte(priv, addr & 0xff);
  209. if (ret)
  210. goto out;
  211. /* Set ADDR[15:8] */
  212. ret = realtek_smi_write_byte(priv, addr >> 8);
  213. if (ret)
  214. goto out;
  215. /* Write DATA[7:0] */
  216. ret = realtek_smi_write_byte(priv, data & 0xff);
  217. if (ret)
  218. goto out;
  219. /* Write DATA[15:8] */
  220. if (ack)
  221. ret = realtek_smi_write_byte(priv, data >> 8);
  222. else
  223. ret = realtek_smi_write_byte_noack(priv, data >> 8);
  224. if (ret)
  225. goto out;
  226. ret = 0;
  227. out:
  228. realtek_smi_stop(priv);
  229. spin_unlock_irqrestore(&priv->lock, flags);
  230. return ret;
  231. }
  232. /* There is one single case when we need to use this accessor and that
  233. * is when issueing soft reset. Since the device reset as soon as we write
  234. * that bit, no ACK will come back for natural reasons.
  235. */
  236. static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val)
  237. {
  238. return realtek_smi_write_reg(ctx, reg, val, false);
  239. }
  240. /* Regmap accessors */
  241. static int realtek_smi_write(void *ctx, u32 reg, u32 val)
  242. {
  243. struct realtek_priv *priv = ctx;
  244. return realtek_smi_write_reg(priv, reg, val, true);
  245. }
  246. static int realtek_smi_read(void *ctx, u32 reg, u32 *val)
  247. {
  248. struct realtek_priv *priv = ctx;
  249. return realtek_smi_read_reg(priv, reg, val);
  250. }
  251. static void realtek_smi_lock(void *ctx)
  252. {
  253. struct realtek_priv *priv = ctx;
  254. mutex_lock(&priv->map_lock);
  255. }
  256. static void realtek_smi_unlock(void *ctx)
  257. {
  258. struct realtek_priv *priv = ctx;
  259. mutex_unlock(&priv->map_lock);
  260. }
  261. static const struct regmap_config realtek_smi_regmap_config = {
  262. .reg_bits = 10, /* A4..A0 R4..R0 */
  263. .val_bits = 16,
  264. .reg_stride = 1,
  265. /* PHY regs are at 0x8000 */
  266. .max_register = 0xffff,
  267. .reg_format_endian = REGMAP_ENDIAN_BIG,
  268. .reg_read = realtek_smi_read,
  269. .reg_write = realtek_smi_write,
  270. .cache_type = REGCACHE_NONE,
  271. .lock = realtek_smi_lock,
  272. .unlock = realtek_smi_unlock,
  273. };
  274. static const struct regmap_config realtek_smi_nolock_regmap_config = {
  275. .reg_bits = 10, /* A4..A0 R4..R0 */
  276. .val_bits = 16,
  277. .reg_stride = 1,
  278. /* PHY regs are at 0x8000 */
  279. .max_register = 0xffff,
  280. .reg_format_endian = REGMAP_ENDIAN_BIG,
  281. .reg_read = realtek_smi_read,
  282. .reg_write = realtek_smi_write,
  283. .cache_type = REGCACHE_NONE,
  284. .disable_locking = true,
  285. };
  286. static int realtek_smi_mdio_read(struct mii_bus *bus, int addr, int regnum)
  287. {
  288. struct realtek_priv *priv = bus->priv;
  289. return priv->ops->phy_read(priv, addr, regnum);
  290. }
  291. static int realtek_smi_mdio_write(struct mii_bus *bus, int addr, int regnum,
  292. u16 val)
  293. {
  294. struct realtek_priv *priv = bus->priv;
  295. return priv->ops->phy_write(priv, addr, regnum, val);
  296. }
  297. static int realtek_smi_setup_mdio(struct dsa_switch *ds)
  298. {
  299. struct realtek_priv *priv = ds->priv;
  300. struct device_node *mdio_np;
  301. int ret;
  302. mdio_np = of_get_compatible_child(priv->dev->of_node, "realtek,smi-mdio");
  303. if (!mdio_np) {
  304. dev_err(priv->dev, "no MDIO bus node\n");
  305. return -ENODEV;
  306. }
  307. priv->slave_mii_bus = devm_mdiobus_alloc(priv->dev);
  308. if (!priv->slave_mii_bus) {
  309. ret = -ENOMEM;
  310. goto err_put_node;
  311. }
  312. priv->slave_mii_bus->priv = priv;
  313. priv->slave_mii_bus->name = "SMI slave MII";
  314. priv->slave_mii_bus->read = realtek_smi_mdio_read;
  315. priv->slave_mii_bus->write = realtek_smi_mdio_write;
  316. snprintf(priv->slave_mii_bus->id, MII_BUS_ID_SIZE, "SMI-%d",
  317. ds->index);
  318. priv->slave_mii_bus->dev.of_node = mdio_np;
  319. priv->slave_mii_bus->parent = priv->dev;
  320. ds->slave_mii_bus = priv->slave_mii_bus;
  321. ret = devm_of_mdiobus_register(priv->dev, priv->slave_mii_bus, mdio_np);
  322. if (ret) {
  323. dev_err(priv->dev, "unable to register MDIO bus %s\n",
  324. priv->slave_mii_bus->id);
  325. goto err_put_node;
  326. }
  327. return 0;
  328. err_put_node:
  329. of_node_put(mdio_np);
  330. return ret;
  331. }
  332. static int realtek_smi_probe(struct platform_device *pdev)
  333. {
  334. const struct realtek_variant *var;
  335. struct device *dev = &pdev->dev;
  336. struct realtek_priv *priv;
  337. struct regmap_config rc;
  338. struct device_node *np;
  339. int ret;
  340. var = of_device_get_match_data(dev);
  341. np = dev->of_node;
  342. priv = devm_kzalloc(dev, sizeof(*priv) + var->chip_data_sz, GFP_KERNEL);
  343. if (!priv)
  344. return -ENOMEM;
  345. priv->chip_data = (void *)priv + sizeof(*priv);
  346. mutex_init(&priv->map_lock);
  347. rc = realtek_smi_regmap_config;
  348. rc.lock_arg = priv;
  349. priv->map = devm_regmap_init(dev, NULL, priv, &rc);
  350. if (IS_ERR(priv->map)) {
  351. ret = PTR_ERR(priv->map);
  352. dev_err(dev, "regmap init failed: %d\n", ret);
  353. return ret;
  354. }
  355. rc = realtek_smi_nolock_regmap_config;
  356. priv->map_nolock = devm_regmap_init(dev, NULL, priv, &rc);
  357. if (IS_ERR(priv->map_nolock)) {
  358. ret = PTR_ERR(priv->map_nolock);
  359. dev_err(dev, "regmap init failed: %d\n", ret);
  360. return ret;
  361. }
  362. /* Link forward and backward */
  363. priv->dev = dev;
  364. priv->clk_delay = var->clk_delay;
  365. priv->cmd_read = var->cmd_read;
  366. priv->cmd_write = var->cmd_write;
  367. priv->ops = var->ops;
  368. priv->setup_interface = realtek_smi_setup_mdio;
  369. priv->write_reg_noack = realtek_smi_write_reg_noack;
  370. dev_set_drvdata(dev, priv);
  371. spin_lock_init(&priv->lock);
  372. /* TODO: if power is software controlled, set up any regulators here */
  373. priv->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
  374. if (IS_ERR(priv->reset)) {
  375. dev_err(dev, "failed to get RESET GPIO\n");
  376. return PTR_ERR(priv->reset);
  377. }
  378. if (priv->reset) {
  379. gpiod_set_value(priv->reset, 1);
  380. dev_dbg(dev, "asserted RESET\n");
  381. msleep(REALTEK_HW_STOP_DELAY);
  382. gpiod_set_value(priv->reset, 0);
  383. msleep(REALTEK_HW_START_DELAY);
  384. dev_dbg(dev, "deasserted RESET\n");
  385. }
  386. /* Fetch MDIO pins */
  387. priv->mdc = devm_gpiod_get_optional(dev, "mdc", GPIOD_OUT_LOW);
  388. if (IS_ERR(priv->mdc))
  389. return PTR_ERR(priv->mdc);
  390. priv->mdio = devm_gpiod_get_optional(dev, "mdio", GPIOD_OUT_LOW);
  391. if (IS_ERR(priv->mdio))
  392. return PTR_ERR(priv->mdio);
  393. priv->leds_disabled = of_property_read_bool(np, "realtek,disable-leds");
  394. ret = priv->ops->detect(priv);
  395. if (ret) {
  396. dev_err(dev, "unable to detect switch\n");
  397. return ret;
  398. }
  399. priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL);
  400. if (!priv->ds)
  401. return -ENOMEM;
  402. priv->ds->dev = dev;
  403. priv->ds->num_ports = priv->num_ports;
  404. priv->ds->priv = priv;
  405. priv->ds->ops = var->ds_ops_smi;
  406. ret = dsa_register_switch(priv->ds);
  407. if (ret) {
  408. dev_err_probe(dev, ret, "unable to register switch\n");
  409. return ret;
  410. }
  411. return 0;
  412. }
  413. static int realtek_smi_remove(struct platform_device *pdev)
  414. {
  415. struct realtek_priv *priv = platform_get_drvdata(pdev);
  416. if (!priv)
  417. return 0;
  418. dsa_unregister_switch(priv->ds);
  419. if (priv->slave_mii_bus)
  420. of_node_put(priv->slave_mii_bus->dev.of_node);
  421. /* leave the device reset asserted */
  422. if (priv->reset)
  423. gpiod_set_value(priv->reset, 1);
  424. return 0;
  425. }
  426. static void realtek_smi_shutdown(struct platform_device *pdev)
  427. {
  428. struct realtek_priv *priv = platform_get_drvdata(pdev);
  429. if (!priv)
  430. return;
  431. dsa_switch_shutdown(priv->ds);
  432. platform_set_drvdata(pdev, NULL);
  433. }
  434. static const struct of_device_id realtek_smi_of_match[] = {
  435. #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB)
  436. {
  437. .compatible = "realtek,rtl8366rb",
  438. .data = &rtl8366rb_variant,
  439. },
  440. #endif
  441. #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB)
  442. {
  443. .compatible = "realtek,rtl8365mb",
  444. .data = &rtl8365mb_variant,
  445. },
  446. #endif
  447. { /* sentinel */ },
  448. };
  449. MODULE_DEVICE_TABLE(of, realtek_smi_of_match);
  450. static struct platform_driver realtek_smi_driver = {
  451. .driver = {
  452. .name = "realtek-smi",
  453. .of_match_table = of_match_ptr(realtek_smi_of_match),
  454. },
  455. .probe = realtek_smi_probe,
  456. .remove = realtek_smi_remove,
  457. .shutdown = realtek_smi_shutdown,
  458. };
  459. module_platform_driver(realtek_smi_driver);
  460. MODULE_AUTHOR("Linus Walleij <[email protected]>");
  461. MODULE_DESCRIPTION("Driver for Realtek ethernet switch connected via SMI interface");
  462. MODULE_LICENSE("GPL");