felix.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright 2019-2021 NXP
  3. *
  4. * This is an umbrella module for all network switches that are
  5. * register-compatible with Ocelot and that perform I/O to their host CPU
  6. * through an NPI (Node Processor Interface) Ethernet port.
  7. */
  8. #include <uapi/linux/if_bridge.h>
  9. #include <soc/mscc/ocelot_vcap.h>
  10. #include <soc/mscc/ocelot_qsys.h>
  11. #include <soc/mscc/ocelot_sys.h>
  12. #include <soc/mscc/ocelot_dev.h>
  13. #include <soc/mscc/ocelot_ana.h>
  14. #include <soc/mscc/ocelot_ptp.h>
  15. #include <soc/mscc/ocelot.h>
  16. #include <linux/dsa/8021q.h>
  17. #include <linux/dsa/ocelot.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/ptp_classify.h>
  20. #include <linux/module.h>
  21. #include <linux/of_net.h>
  22. #include <linux/pci.h>
  23. #include <linux/of.h>
  24. #include <net/pkt_sched.h>
  25. #include <net/dsa.h>
  26. #include "felix.h"
  27. /* Translate the DSA database API into the ocelot switch library API,
  28. * which uses VID 0 for all ports that aren't part of a bridge,
  29. * and expects the bridge_dev to be NULL in that case.
  30. */
  31. static struct net_device *felix_classify_db(struct dsa_db db)
  32. {
  33. switch (db.type) {
  34. case DSA_DB_PORT:
  35. case DSA_DB_LAG:
  36. return NULL;
  37. case DSA_DB_BRIDGE:
  38. return db.bridge.dev;
  39. default:
  40. return ERR_PTR(-EOPNOTSUPP);
  41. }
  42. }
  43. static int felix_cpu_port_for_master(struct dsa_switch *ds,
  44. struct net_device *master)
  45. {
  46. struct ocelot *ocelot = ds->priv;
  47. struct dsa_port *cpu_dp;
  48. int lag;
  49. if (netif_is_lag_master(master)) {
  50. mutex_lock(&ocelot->fwd_domain_lock);
  51. lag = ocelot_bond_get_id(ocelot, master);
  52. mutex_unlock(&ocelot->fwd_domain_lock);
  53. return lag;
  54. }
  55. cpu_dp = master->dsa_ptr;
  56. return cpu_dp->index;
  57. }
  58. /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
  59. * the tagger can perform RX source port identification.
  60. */
  61. static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
  62. int upstream, u16 vid)
  63. {
  64. struct ocelot_vcap_filter *outer_tagging_rule;
  65. struct ocelot *ocelot = ds->priv;
  66. unsigned long cookie;
  67. int key_length, err;
  68. key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
  69. outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
  70. GFP_KERNEL);
  71. if (!outer_tagging_rule)
  72. return -ENOMEM;
  73. cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
  74. outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
  75. outer_tagging_rule->prio = 1;
  76. outer_tagging_rule->id.cookie = cookie;
  77. outer_tagging_rule->id.tc_offload = false;
  78. outer_tagging_rule->block_id = VCAP_ES0;
  79. outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  80. outer_tagging_rule->lookup = 0;
  81. outer_tagging_rule->ingress_port.value = port;
  82. outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
  83. outer_tagging_rule->egress_port.value = upstream;
  84. outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
  85. outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
  86. outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
  87. outer_tagging_rule->action.tag_a_vid_sel = 1;
  88. outer_tagging_rule->action.vid_a_val = vid;
  89. err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
  90. if (err)
  91. kfree(outer_tagging_rule);
  92. return err;
  93. }
  94. static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,
  95. int upstream, u16 vid)
  96. {
  97. struct ocelot_vcap_filter *outer_tagging_rule;
  98. struct ocelot_vcap_block *block_vcap_es0;
  99. struct ocelot *ocelot = ds->priv;
  100. unsigned long cookie;
  101. block_vcap_es0 = &ocelot->block[VCAP_ES0];
  102. cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
  103. outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
  104. cookie, false);
  105. if (!outer_tagging_rule)
  106. return -ENOENT;
  107. return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
  108. }
  109. /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
  110. * rules for steering those tagged packets towards the correct destination port
  111. */
  112. static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,
  113. u16 vid)
  114. {
  115. struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
  116. unsigned long cpu_ports = dsa_cpu_ports(ds);
  117. struct ocelot *ocelot = ds->priv;
  118. unsigned long cookie;
  119. int err;
  120. untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
  121. if (!untagging_rule)
  122. return -ENOMEM;
  123. redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
  124. if (!redirect_rule) {
  125. kfree(untagging_rule);
  126. return -ENOMEM;
  127. }
  128. cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
  129. untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
  130. untagging_rule->ingress_port_mask = cpu_ports;
  131. untagging_rule->vlan.vid.value = vid;
  132. untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
  133. untagging_rule->prio = 1;
  134. untagging_rule->id.cookie = cookie;
  135. untagging_rule->id.tc_offload = false;
  136. untagging_rule->block_id = VCAP_IS1;
  137. untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  138. untagging_rule->lookup = 0;
  139. untagging_rule->action.vlan_pop_cnt_ena = true;
  140. untagging_rule->action.vlan_pop_cnt = 1;
  141. untagging_rule->action.pag_override_mask = 0xff;
  142. untagging_rule->action.pag_val = port;
  143. err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
  144. if (err) {
  145. kfree(untagging_rule);
  146. kfree(redirect_rule);
  147. return err;
  148. }
  149. cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
  150. redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
  151. redirect_rule->ingress_port_mask = cpu_ports;
  152. redirect_rule->pag = port;
  153. redirect_rule->prio = 1;
  154. redirect_rule->id.cookie = cookie;
  155. redirect_rule->id.tc_offload = false;
  156. redirect_rule->block_id = VCAP_IS2;
  157. redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  158. redirect_rule->lookup = 0;
  159. redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
  160. redirect_rule->action.port_mask = BIT(port);
  161. err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
  162. if (err) {
  163. ocelot_vcap_filter_del(ocelot, untagging_rule);
  164. kfree(redirect_rule);
  165. return err;
  166. }
  167. return 0;
  168. }
  169. static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)
  170. {
  171. struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
  172. struct ocelot_vcap_block *block_vcap_is1;
  173. struct ocelot_vcap_block *block_vcap_is2;
  174. struct ocelot *ocelot = ds->priv;
  175. unsigned long cookie;
  176. int err;
  177. block_vcap_is1 = &ocelot->block[VCAP_IS1];
  178. block_vcap_is2 = &ocelot->block[VCAP_IS2];
  179. cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
  180. untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
  181. cookie, false);
  182. if (!untagging_rule)
  183. return -ENOENT;
  184. err = ocelot_vcap_filter_del(ocelot, untagging_rule);
  185. if (err)
  186. return err;
  187. cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
  188. redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
  189. cookie, false);
  190. if (!redirect_rule)
  191. return -ENOENT;
  192. return ocelot_vcap_filter_del(ocelot, redirect_rule);
  193. }
  194. static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
  195. u16 flags)
  196. {
  197. struct dsa_port *cpu_dp;
  198. int err;
  199. /* tag_8021q.c assumes we are implementing this via port VLAN
  200. * membership, which we aren't. So we don't need to add any VCAP filter
  201. * for the CPU port.
  202. */
  203. if (!dsa_is_user_port(ds, port))
  204. return 0;
  205. dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  206. err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
  207. if (err)
  208. return err;
  209. }
  210. err = felix_tag_8021q_vlan_add_tx(ds, port, vid);
  211. if (err)
  212. goto add_tx_failed;
  213. return 0;
  214. add_tx_failed:
  215. dsa_switch_for_each_cpu_port(cpu_dp, ds)
  216. felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
  217. return err;
  218. }
  219. static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
  220. {
  221. struct dsa_port *cpu_dp;
  222. int err;
  223. if (!dsa_is_user_port(ds, port))
  224. return 0;
  225. dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  226. err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
  227. if (err)
  228. return err;
  229. }
  230. err = felix_tag_8021q_vlan_del_tx(ds, port, vid);
  231. if (err)
  232. goto del_tx_failed;
  233. return 0;
  234. del_tx_failed:
  235. dsa_switch_for_each_cpu_port(cpu_dp, ds)
  236. felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
  237. return err;
  238. }
  239. static int felix_trap_get_cpu_port(struct dsa_switch *ds,
  240. const struct ocelot_vcap_filter *trap)
  241. {
  242. struct dsa_port *dp;
  243. int first_port;
  244. if (WARN_ON(!trap->ingress_port_mask))
  245. return -1;
  246. first_port = __ffs(trap->ingress_port_mask);
  247. dp = dsa_to_port(ds, first_port);
  248. return dp->cpu_dp->index;
  249. }
  250. /* On switches with no extraction IRQ wired, trapped packets need to be
  251. * replicated over Ethernet as well, otherwise we'd get no notification of
  252. * their arrival when using the ocelot-8021q tagging protocol.
  253. */
  254. static int felix_update_trapping_destinations(struct dsa_switch *ds,
  255. bool using_tag_8021q)
  256. {
  257. struct ocelot *ocelot = ds->priv;
  258. struct felix *felix = ocelot_to_felix(ocelot);
  259. struct ocelot_vcap_block *block_vcap_is2;
  260. struct ocelot_vcap_filter *trap;
  261. enum ocelot_mask_mode mask_mode;
  262. unsigned long port_mask;
  263. bool cpu_copy_ena;
  264. int err;
  265. if (!felix->info->quirk_no_xtr_irq)
  266. return 0;
  267. /* We are sure that "cpu" was found, otherwise
  268. * dsa_tree_setup_default_cpu() would have failed earlier.
  269. */
  270. block_vcap_is2 = &ocelot->block[VCAP_IS2];
  271. /* Make sure all traps are set up for that destination */
  272. list_for_each_entry(trap, &block_vcap_is2->rules, list) {
  273. if (!trap->is_trap)
  274. continue;
  275. /* Figure out the current trapping destination */
  276. if (using_tag_8021q) {
  277. /* Redirect to the tag_8021q CPU port. If timestamps
  278. * are necessary, also copy trapped packets to the CPU
  279. * port module.
  280. */
  281. mask_mode = OCELOT_MASK_MODE_REDIRECT;
  282. port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
  283. cpu_copy_ena = !!trap->take_ts;
  284. } else {
  285. /* Trap packets only to the CPU port module, which is
  286. * redirected to the NPI port (the DSA CPU port)
  287. */
  288. mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
  289. port_mask = 0;
  290. cpu_copy_ena = true;
  291. }
  292. if (trap->action.mask_mode == mask_mode &&
  293. trap->action.port_mask == port_mask &&
  294. trap->action.cpu_copy_ena == cpu_copy_ena)
  295. continue;
  296. trap->action.mask_mode = mask_mode;
  297. trap->action.port_mask = port_mask;
  298. trap->action.cpu_copy_ena = cpu_copy_ena;
  299. err = ocelot_vcap_filter_replace(ocelot, trap);
  300. if (err)
  301. return err;
  302. }
  303. return 0;
  304. }
  305. /* The CPU port module is connected to the Node Processor Interface (NPI). This
  306. * is the mode through which frames can be injected from and extracted to an
  307. * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
  308. * running Linux, and this forms a DSA setup together with the enetc or fman
  309. * DSA master.
  310. */
  311. static void felix_npi_port_init(struct ocelot *ocelot, int port)
  312. {
  313. ocelot->npi = port;
  314. ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
  315. QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
  316. QSYS_EXT_CPU_CFG);
  317. /* NPI port Injection/Extraction configuration */
  318. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
  319. ocelot->npi_xtr_prefix);
  320. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
  321. ocelot->npi_inj_prefix);
  322. /* Disable transmission of pause frames */
  323. ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
  324. }
  325. static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
  326. {
  327. /* Restore hardware defaults */
  328. int unused_port = ocelot->num_phys_ports + 2;
  329. ocelot->npi = -1;
  330. ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
  331. QSYS_EXT_CPU_CFG);
  332. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
  333. OCELOT_TAG_PREFIX_DISABLED);
  334. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
  335. OCELOT_TAG_PREFIX_DISABLED);
  336. /* Enable transmission of pause frames */
  337. ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
  338. }
  339. static int felix_tag_npi_setup(struct dsa_switch *ds)
  340. {
  341. struct dsa_port *dp, *first_cpu_dp = NULL;
  342. struct ocelot *ocelot = ds->priv;
  343. dsa_switch_for_each_user_port(dp, ds) {
  344. if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
  345. dev_err(ds->dev, "Multiple NPI ports not supported\n");
  346. return -EINVAL;
  347. }
  348. first_cpu_dp = dp->cpu_dp;
  349. }
  350. if (!first_cpu_dp)
  351. return -EINVAL;
  352. felix_npi_port_init(ocelot, first_cpu_dp->index);
  353. return 0;
  354. }
  355. static void felix_tag_npi_teardown(struct dsa_switch *ds)
  356. {
  357. struct ocelot *ocelot = ds->priv;
  358. felix_npi_port_deinit(ocelot, ocelot->npi);
  359. }
  360. static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)
  361. {
  362. struct ocelot *ocelot = ds->priv;
  363. return BIT(ocelot->num_phys_ports);
  364. }
  365. static int felix_tag_npi_change_master(struct dsa_switch *ds, int port,
  366. struct net_device *master,
  367. struct netlink_ext_ack *extack)
  368. {
  369. struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
  370. struct ocelot *ocelot = ds->priv;
  371. if (netif_is_lag_master(master)) {
  372. NL_SET_ERR_MSG_MOD(extack,
  373. "LAG DSA master only supported using ocelot-8021q");
  374. return -EOPNOTSUPP;
  375. }
  376. /* Changing the NPI port breaks user ports still assigned to the old
  377. * one, so only allow it while they're down, and don't allow them to
  378. * come back up until they're all changed to the new one.
  379. */
  380. dsa_switch_for_each_user_port(other_dp, ds) {
  381. struct net_device *slave = other_dp->slave;
  382. if (other_dp != dp && (slave->flags & IFF_UP) &&
  383. dsa_port_to_master(other_dp) != master) {
  384. NL_SET_ERR_MSG_MOD(extack,
  385. "Cannot change while old master still has users");
  386. return -EOPNOTSUPP;
  387. }
  388. }
  389. felix_npi_port_deinit(ocelot, ocelot->npi);
  390. felix_npi_port_init(ocelot, felix_cpu_port_for_master(ds, master));
  391. return 0;
  392. }
  393. /* Alternatively to using the NPI functionality, that same hardware MAC
  394. * connected internally to the enetc or fman DSA master can be configured to
  395. * use the software-defined tag_8021q frame format. As far as the hardware is
  396. * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
  397. * module are now disconnected from it, but can still be accessed through
  398. * register-based MMIO.
  399. */
  400. static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {
  401. .setup = felix_tag_npi_setup,
  402. .teardown = felix_tag_npi_teardown,
  403. .get_host_fwd_mask = felix_tag_npi_get_host_fwd_mask,
  404. .change_master = felix_tag_npi_change_master,
  405. };
  406. static int felix_tag_8021q_setup(struct dsa_switch *ds)
  407. {
  408. struct ocelot *ocelot = ds->priv;
  409. struct dsa_port *dp;
  410. int err;
  411. err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
  412. if (err)
  413. return err;
  414. dsa_switch_for_each_cpu_port(dp, ds)
  415. ocelot_port_setup_dsa_8021q_cpu(ocelot, dp->index);
  416. dsa_switch_for_each_user_port(dp, ds)
  417. ocelot_port_assign_dsa_8021q_cpu(ocelot, dp->index,
  418. dp->cpu_dp->index);
  419. dsa_switch_for_each_available_port(dp, ds)
  420. /* This overwrites ocelot_init():
  421. * Do not forward BPDU frames to the CPU port module,
  422. * for 2 reasons:
  423. * - When these packets are injected from the tag_8021q
  424. * CPU port, we want them to go out, not loop back
  425. * into the system.
  426. * - STP traffic ingressing on a user port should go to
  427. * the tag_8021q CPU port, not to the hardware CPU
  428. * port module.
  429. */
  430. ocelot_write_gix(ocelot,
  431. ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
  432. ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
  433. /* The ownership of the CPU port module's queues might have just been
  434. * transferred to the tag_8021q tagger from the NPI-based tagger.
  435. * So there might still be all sorts of crap in the queues. On the
  436. * other hand, the MMIO-based matching of PTP frames is very brittle,
  437. * so we need to be careful that there are no extra frames to be
  438. * dequeued over MMIO, since we would never know to discard them.
  439. */
  440. ocelot_drain_cpu_queue(ocelot, 0);
  441. return 0;
  442. }
  443. static void felix_tag_8021q_teardown(struct dsa_switch *ds)
  444. {
  445. struct ocelot *ocelot = ds->priv;
  446. struct dsa_port *dp;
  447. dsa_switch_for_each_available_port(dp, ds)
  448. /* Restore the logic from ocelot_init:
  449. * do not forward BPDU frames to the front ports.
  450. */
  451. ocelot_write_gix(ocelot,
  452. ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
  453. ANA_PORT_CPU_FWD_BPDU_CFG,
  454. dp->index);
  455. dsa_switch_for_each_user_port(dp, ds)
  456. ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp->index);
  457. dsa_switch_for_each_cpu_port(dp, ds)
  458. ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp->index);
  459. dsa_tag_8021q_unregister(ds);
  460. }
  461. static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
  462. {
  463. return dsa_cpu_ports(ds);
  464. }
  465. static int felix_tag_8021q_change_master(struct dsa_switch *ds, int port,
  466. struct net_device *master,
  467. struct netlink_ext_ack *extack)
  468. {
  469. int cpu = felix_cpu_port_for_master(ds, master);
  470. struct ocelot *ocelot = ds->priv;
  471. ocelot_port_unassign_dsa_8021q_cpu(ocelot, port);
  472. ocelot_port_assign_dsa_8021q_cpu(ocelot, port, cpu);
  473. return felix_update_trapping_destinations(ds, true);
  474. }
  475. static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {
  476. .setup = felix_tag_8021q_setup,
  477. .teardown = felix_tag_8021q_teardown,
  478. .get_host_fwd_mask = felix_tag_8021q_get_host_fwd_mask,
  479. .change_master = felix_tag_8021q_change_master,
  480. };
  481. static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,
  482. bool uc, bool mc, bool bc)
  483. {
  484. struct ocelot *ocelot = ds->priv;
  485. unsigned long val;
  486. val = uc ? mask : 0;
  487. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);
  488. val = mc ? mask : 0;
  489. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);
  490. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);
  491. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);
  492. val = bc ? mask : 0;
  493. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);
  494. }
  495. static void
  496. felix_migrate_host_flood(struct dsa_switch *ds,
  497. const struct felix_tag_proto_ops *proto_ops,
  498. const struct felix_tag_proto_ops *old_proto_ops)
  499. {
  500. struct ocelot *ocelot = ds->priv;
  501. struct felix *felix = ocelot_to_felix(ocelot);
  502. unsigned long mask;
  503. if (old_proto_ops) {
  504. mask = old_proto_ops->get_host_fwd_mask(ds);
  505. felix_set_host_flood(ds, mask, false, false, false);
  506. }
  507. mask = proto_ops->get_host_fwd_mask(ds);
  508. felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
  509. !!felix->host_flood_mc_mask, true);
  510. }
  511. static int felix_migrate_mdbs(struct dsa_switch *ds,
  512. const struct felix_tag_proto_ops *proto_ops,
  513. const struct felix_tag_proto_ops *old_proto_ops)
  514. {
  515. struct ocelot *ocelot = ds->priv;
  516. unsigned long from, to;
  517. if (!old_proto_ops)
  518. return 0;
  519. from = old_proto_ops->get_host_fwd_mask(ds);
  520. to = proto_ops->get_host_fwd_mask(ds);
  521. return ocelot_migrate_mdbs(ocelot, from, to);
  522. }
  523. /* Configure the shared hardware resources for a transition between
  524. * @old_proto_ops and @proto_ops.
  525. * Manual migration is needed because as far as DSA is concerned, no change of
  526. * the CPU port is taking place here, just of the tagging protocol.
  527. */
  528. static int
  529. felix_tag_proto_setup_shared(struct dsa_switch *ds,
  530. const struct felix_tag_proto_ops *proto_ops,
  531. const struct felix_tag_proto_ops *old_proto_ops)
  532. {
  533. bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops);
  534. int err;
  535. err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);
  536. if (err)
  537. return err;
  538. felix_update_trapping_destinations(ds, using_tag_8021q);
  539. felix_migrate_host_flood(ds, proto_ops, old_proto_ops);
  540. return 0;
  541. }
  542. /* This always leaves the switch in a consistent state, because although the
  543. * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
  544. * or the restoration is guaranteed to work.
  545. */
  546. static int felix_change_tag_protocol(struct dsa_switch *ds,
  547. enum dsa_tag_protocol proto)
  548. {
  549. const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;
  550. struct ocelot *ocelot = ds->priv;
  551. struct felix *felix = ocelot_to_felix(ocelot);
  552. int err;
  553. switch (proto) {
  554. case DSA_TAG_PROTO_SEVILLE:
  555. case DSA_TAG_PROTO_OCELOT:
  556. proto_ops = &felix_tag_npi_proto_ops;
  557. break;
  558. case DSA_TAG_PROTO_OCELOT_8021Q:
  559. proto_ops = &felix_tag_8021q_proto_ops;
  560. break;
  561. default:
  562. return -EPROTONOSUPPORT;
  563. }
  564. old_proto_ops = felix->tag_proto_ops;
  565. if (proto_ops == old_proto_ops)
  566. return 0;
  567. err = proto_ops->setup(ds);
  568. if (err)
  569. goto setup_failed;
  570. err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);
  571. if (err)
  572. goto setup_shared_failed;
  573. if (old_proto_ops)
  574. old_proto_ops->teardown(ds);
  575. felix->tag_proto_ops = proto_ops;
  576. felix->tag_proto = proto;
  577. return 0;
  578. setup_shared_failed:
  579. proto_ops->teardown(ds);
  580. setup_failed:
  581. return err;
  582. }
  583. static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
  584. int port,
  585. enum dsa_tag_protocol mp)
  586. {
  587. struct ocelot *ocelot = ds->priv;
  588. struct felix *felix = ocelot_to_felix(ocelot);
  589. return felix->tag_proto;
  590. }
  591. static void felix_port_set_host_flood(struct dsa_switch *ds, int port,
  592. bool uc, bool mc)
  593. {
  594. struct ocelot *ocelot = ds->priv;
  595. struct felix *felix = ocelot_to_felix(ocelot);
  596. unsigned long mask;
  597. if (uc)
  598. felix->host_flood_uc_mask |= BIT(port);
  599. else
  600. felix->host_flood_uc_mask &= ~BIT(port);
  601. if (mc)
  602. felix->host_flood_mc_mask |= BIT(port);
  603. else
  604. felix->host_flood_mc_mask &= ~BIT(port);
  605. mask = felix->tag_proto_ops->get_host_fwd_mask(ds);
  606. felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
  607. !!felix->host_flood_mc_mask, true);
  608. }
  609. static int felix_port_change_master(struct dsa_switch *ds, int port,
  610. struct net_device *master,
  611. struct netlink_ext_ack *extack)
  612. {
  613. struct ocelot *ocelot = ds->priv;
  614. struct felix *felix = ocelot_to_felix(ocelot);
  615. return felix->tag_proto_ops->change_master(ds, port, master, extack);
  616. }
  617. static int felix_set_ageing_time(struct dsa_switch *ds,
  618. unsigned int ageing_time)
  619. {
  620. struct ocelot *ocelot = ds->priv;
  621. ocelot_set_ageing_time(ocelot, ageing_time);
  622. return 0;
  623. }
  624. static void felix_port_fast_age(struct dsa_switch *ds, int port)
  625. {
  626. struct ocelot *ocelot = ds->priv;
  627. int err;
  628. err = ocelot_mact_flush(ocelot, port);
  629. if (err)
  630. dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
  631. port, ERR_PTR(err));
  632. }
  633. static int felix_fdb_dump(struct dsa_switch *ds, int port,
  634. dsa_fdb_dump_cb_t *cb, void *data)
  635. {
  636. struct ocelot *ocelot = ds->priv;
  637. return ocelot_fdb_dump(ocelot, port, cb, data);
  638. }
  639. static int felix_fdb_add(struct dsa_switch *ds, int port,
  640. const unsigned char *addr, u16 vid,
  641. struct dsa_db db)
  642. {
  643. struct net_device *bridge_dev = felix_classify_db(db);
  644. struct dsa_port *dp = dsa_to_port(ds, port);
  645. struct ocelot *ocelot = ds->priv;
  646. if (IS_ERR(bridge_dev))
  647. return PTR_ERR(bridge_dev);
  648. if (dsa_port_is_cpu(dp) && !bridge_dev &&
  649. dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
  650. return 0;
  651. if (dsa_port_is_cpu(dp))
  652. port = PGID_CPU;
  653. return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
  654. }
  655. static int felix_fdb_del(struct dsa_switch *ds, int port,
  656. const unsigned char *addr, u16 vid,
  657. struct dsa_db db)
  658. {
  659. struct net_device *bridge_dev = felix_classify_db(db);
  660. struct dsa_port *dp = dsa_to_port(ds, port);
  661. struct ocelot *ocelot = ds->priv;
  662. if (IS_ERR(bridge_dev))
  663. return PTR_ERR(bridge_dev);
  664. if (dsa_port_is_cpu(dp) && !bridge_dev &&
  665. dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
  666. return 0;
  667. if (dsa_port_is_cpu(dp))
  668. port = PGID_CPU;
  669. return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
  670. }
  671. static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
  672. const unsigned char *addr, u16 vid,
  673. struct dsa_db db)
  674. {
  675. struct net_device *bridge_dev = felix_classify_db(db);
  676. struct ocelot *ocelot = ds->priv;
  677. if (IS_ERR(bridge_dev))
  678. return PTR_ERR(bridge_dev);
  679. return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
  680. }
  681. static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
  682. const unsigned char *addr, u16 vid,
  683. struct dsa_db db)
  684. {
  685. struct net_device *bridge_dev = felix_classify_db(db);
  686. struct ocelot *ocelot = ds->priv;
  687. if (IS_ERR(bridge_dev))
  688. return PTR_ERR(bridge_dev);
  689. return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
  690. }
  691. static int felix_mdb_add(struct dsa_switch *ds, int port,
  692. const struct switchdev_obj_port_mdb *mdb,
  693. struct dsa_db db)
  694. {
  695. struct net_device *bridge_dev = felix_classify_db(db);
  696. struct ocelot *ocelot = ds->priv;
  697. if (IS_ERR(bridge_dev))
  698. return PTR_ERR(bridge_dev);
  699. if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
  700. dsa_mdb_present_in_other_db(ds, port, mdb, db))
  701. return 0;
  702. if (port == ocelot->npi)
  703. port = ocelot->num_phys_ports;
  704. return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
  705. }
  706. static int felix_mdb_del(struct dsa_switch *ds, int port,
  707. const struct switchdev_obj_port_mdb *mdb,
  708. struct dsa_db db)
  709. {
  710. struct net_device *bridge_dev = felix_classify_db(db);
  711. struct ocelot *ocelot = ds->priv;
  712. if (IS_ERR(bridge_dev))
  713. return PTR_ERR(bridge_dev);
  714. if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
  715. dsa_mdb_present_in_other_db(ds, port, mdb, db))
  716. return 0;
  717. if (port == ocelot->npi)
  718. port = ocelot->num_phys_ports;
  719. return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
  720. }
  721. static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
  722. u8 state)
  723. {
  724. struct ocelot *ocelot = ds->priv;
  725. return ocelot_bridge_stp_state_set(ocelot, port, state);
  726. }
  727. static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
  728. struct switchdev_brport_flags val,
  729. struct netlink_ext_ack *extack)
  730. {
  731. struct ocelot *ocelot = ds->priv;
  732. return ocelot_port_pre_bridge_flags(ocelot, port, val);
  733. }
  734. static int felix_bridge_flags(struct dsa_switch *ds, int port,
  735. struct switchdev_brport_flags val,
  736. struct netlink_ext_ack *extack)
  737. {
  738. struct ocelot *ocelot = ds->priv;
  739. if (port == ocelot->npi)
  740. port = ocelot->num_phys_ports;
  741. ocelot_port_bridge_flags(ocelot, port, val);
  742. return 0;
  743. }
  744. static int felix_bridge_join(struct dsa_switch *ds, int port,
  745. struct dsa_bridge bridge, bool *tx_fwd_offload,
  746. struct netlink_ext_ack *extack)
  747. {
  748. struct ocelot *ocelot = ds->priv;
  749. return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
  750. extack);
  751. }
  752. static void felix_bridge_leave(struct dsa_switch *ds, int port,
  753. struct dsa_bridge bridge)
  754. {
  755. struct ocelot *ocelot = ds->priv;
  756. ocelot_port_bridge_leave(ocelot, port, bridge.dev);
  757. }
  758. static int felix_lag_join(struct dsa_switch *ds, int port,
  759. struct dsa_lag lag,
  760. struct netdev_lag_upper_info *info,
  761. struct netlink_ext_ack *extack)
  762. {
  763. struct ocelot *ocelot = ds->priv;
  764. int err;
  765. err = ocelot_port_lag_join(ocelot, port, lag.dev, info, extack);
  766. if (err)
  767. return err;
  768. /* Update the logical LAG port that serves as tag_8021q CPU port */
  769. if (!dsa_is_cpu_port(ds, port))
  770. return 0;
  771. return felix_port_change_master(ds, port, lag.dev, extack);
  772. }
  773. static int felix_lag_leave(struct dsa_switch *ds, int port,
  774. struct dsa_lag lag)
  775. {
  776. struct ocelot *ocelot = ds->priv;
  777. ocelot_port_lag_leave(ocelot, port, lag.dev);
  778. /* Update the logical LAG port that serves as tag_8021q CPU port */
  779. if (!dsa_is_cpu_port(ds, port))
  780. return 0;
  781. return felix_port_change_master(ds, port, lag.dev, NULL);
  782. }
  783. static int felix_lag_change(struct dsa_switch *ds, int port)
  784. {
  785. struct dsa_port *dp = dsa_to_port(ds, port);
  786. struct ocelot *ocelot = ds->priv;
  787. ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
  788. return 0;
  789. }
  790. static int felix_vlan_prepare(struct dsa_switch *ds, int port,
  791. const struct switchdev_obj_port_vlan *vlan,
  792. struct netlink_ext_ack *extack)
  793. {
  794. struct ocelot *ocelot = ds->priv;
  795. u16 flags = vlan->flags;
  796. /* Ocelot switches copy frames as-is to the CPU, so the flags:
  797. * egress-untagged or not, pvid or not, make no difference. This
  798. * behavior is already better than what DSA just tries to approximate
  799. * when it installs the VLAN with the same flags on the CPU port.
  800. * Just accept any configuration, and don't let ocelot deny installing
  801. * multiple native VLANs on the NPI port, because the switch doesn't
  802. * look at the port tag settings towards the NPI interface anyway.
  803. */
  804. if (port == ocelot->npi)
  805. return 0;
  806. return ocelot_vlan_prepare(ocelot, port, vlan->vid,
  807. flags & BRIDGE_VLAN_INFO_PVID,
  808. flags & BRIDGE_VLAN_INFO_UNTAGGED,
  809. extack);
  810. }
  811. static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
  812. struct netlink_ext_ack *extack)
  813. {
  814. struct ocelot *ocelot = ds->priv;
  815. return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
  816. }
  817. static int felix_vlan_add(struct dsa_switch *ds, int port,
  818. const struct switchdev_obj_port_vlan *vlan,
  819. struct netlink_ext_ack *extack)
  820. {
  821. struct ocelot *ocelot = ds->priv;
  822. u16 flags = vlan->flags;
  823. int err;
  824. err = felix_vlan_prepare(ds, port, vlan, extack);
  825. if (err)
  826. return err;
  827. return ocelot_vlan_add(ocelot, port, vlan->vid,
  828. flags & BRIDGE_VLAN_INFO_PVID,
  829. flags & BRIDGE_VLAN_INFO_UNTAGGED);
  830. }
  831. static int felix_vlan_del(struct dsa_switch *ds, int port,
  832. const struct switchdev_obj_port_vlan *vlan)
  833. {
  834. struct ocelot *ocelot = ds->priv;
  835. return ocelot_vlan_del(ocelot, port, vlan->vid);
  836. }
  837. static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
  838. struct phylink_config *config)
  839. {
  840. struct ocelot *ocelot = ds->priv;
  841. /* This driver does not make use of the speed, duplex, pause or the
  842. * advertisement in its mac_config, so it is safe to mark this driver
  843. * as non-legacy.
  844. */
  845. config->legacy_pre_march2020 = false;
  846. __set_bit(ocelot->ports[port]->phy_mode,
  847. config->supported_interfaces);
  848. }
  849. static void felix_phylink_validate(struct dsa_switch *ds, int port,
  850. unsigned long *supported,
  851. struct phylink_link_state *state)
  852. {
  853. struct ocelot *ocelot = ds->priv;
  854. struct felix *felix = ocelot_to_felix(ocelot);
  855. if (felix->info->phylink_validate)
  856. felix->info->phylink_validate(ocelot, port, supported, state);
  857. }
  858. static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
  859. int port,
  860. phy_interface_t iface)
  861. {
  862. struct ocelot *ocelot = ds->priv;
  863. struct felix *felix = ocelot_to_felix(ocelot);
  864. struct phylink_pcs *pcs = NULL;
  865. if (felix->pcs && felix->pcs[port])
  866. pcs = felix->pcs[port];
  867. return pcs;
  868. }
  869. static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
  870. unsigned int link_an_mode,
  871. phy_interface_t interface)
  872. {
  873. struct ocelot *ocelot = ds->priv;
  874. ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
  875. FELIX_MAC_QUIRKS);
  876. }
  877. static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
  878. unsigned int link_an_mode,
  879. phy_interface_t interface,
  880. struct phy_device *phydev,
  881. int speed, int duplex,
  882. bool tx_pause, bool rx_pause)
  883. {
  884. struct ocelot *ocelot = ds->priv;
  885. struct felix *felix = ocelot_to_felix(ocelot);
  886. ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
  887. interface, speed, duplex, tx_pause, rx_pause,
  888. FELIX_MAC_QUIRKS);
  889. if (felix->info->port_sched_speed_set)
  890. felix->info->port_sched_speed_set(ocelot, port, speed);
  891. }
  892. static int felix_port_enable(struct dsa_switch *ds, int port,
  893. struct phy_device *phydev)
  894. {
  895. struct dsa_port *dp = dsa_to_port(ds, port);
  896. struct ocelot *ocelot = ds->priv;
  897. if (!dsa_port_is_user(dp))
  898. return 0;
  899. if (ocelot->npi >= 0) {
  900. struct net_device *master = dsa_port_to_master(dp);
  901. if (felix_cpu_port_for_master(ds, master) != ocelot->npi) {
  902. dev_err(ds->dev, "Multiple masters are not allowed\n");
  903. return -EINVAL;
  904. }
  905. }
  906. return 0;
  907. }
  908. static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
  909. {
  910. int i;
  911. ocelot_rmw_gix(ocelot,
  912. ANA_PORT_QOS_CFG_QOS_PCP_ENA,
  913. ANA_PORT_QOS_CFG_QOS_PCP_ENA,
  914. ANA_PORT_QOS_CFG,
  915. port);
  916. for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
  917. ocelot_rmw_ix(ocelot,
  918. (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
  919. ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
  920. ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
  921. ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
  922. ANA_PORT_PCP_DEI_MAP,
  923. port, i);
  924. }
  925. }
  926. static void felix_get_stats64(struct dsa_switch *ds, int port,
  927. struct rtnl_link_stats64 *stats)
  928. {
  929. struct ocelot *ocelot = ds->priv;
  930. ocelot_port_get_stats64(ocelot, port, stats);
  931. }
  932. static void felix_get_pause_stats(struct dsa_switch *ds, int port,
  933. struct ethtool_pause_stats *pause_stats)
  934. {
  935. struct ocelot *ocelot = ds->priv;
  936. ocelot_port_get_pause_stats(ocelot, port, pause_stats);
  937. }
  938. static void felix_get_rmon_stats(struct dsa_switch *ds, int port,
  939. struct ethtool_rmon_stats *rmon_stats,
  940. const struct ethtool_rmon_hist_range **ranges)
  941. {
  942. struct ocelot *ocelot = ds->priv;
  943. ocelot_port_get_rmon_stats(ocelot, port, rmon_stats, ranges);
  944. }
  945. static void felix_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
  946. struct ethtool_eth_ctrl_stats *ctrl_stats)
  947. {
  948. struct ocelot *ocelot = ds->priv;
  949. ocelot_port_get_eth_ctrl_stats(ocelot, port, ctrl_stats);
  950. }
  951. static void felix_get_eth_mac_stats(struct dsa_switch *ds, int port,
  952. struct ethtool_eth_mac_stats *mac_stats)
  953. {
  954. struct ocelot *ocelot = ds->priv;
  955. ocelot_port_get_eth_mac_stats(ocelot, port, mac_stats);
  956. }
  957. static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,
  958. struct ethtool_eth_phy_stats *phy_stats)
  959. {
  960. struct ocelot *ocelot = ds->priv;
  961. ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);
  962. }
  963. static void felix_get_strings(struct dsa_switch *ds, int port,
  964. u32 stringset, u8 *data)
  965. {
  966. struct ocelot *ocelot = ds->priv;
  967. return ocelot_get_strings(ocelot, port, stringset, data);
  968. }
  969. static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
  970. {
  971. struct ocelot *ocelot = ds->priv;
  972. ocelot_get_ethtool_stats(ocelot, port, data);
  973. }
  974. static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
  975. {
  976. struct ocelot *ocelot = ds->priv;
  977. return ocelot_get_sset_count(ocelot, port, sset);
  978. }
  979. static int felix_get_ts_info(struct dsa_switch *ds, int port,
  980. struct ethtool_ts_info *info)
  981. {
  982. struct ocelot *ocelot = ds->priv;
  983. return ocelot_get_ts_info(ocelot, port, info);
  984. }
  985. static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
  986. [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
  987. [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
  988. [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
  989. [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
  990. [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
  991. [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
  992. };
  993. static int felix_validate_phy_mode(struct felix *felix, int port,
  994. phy_interface_t phy_mode)
  995. {
  996. u32 modes = felix->info->port_modes[port];
  997. if (felix_phy_match_table[phy_mode] & modes)
  998. return 0;
  999. return -EOPNOTSUPP;
  1000. }
  1001. static int felix_parse_ports_node(struct felix *felix,
  1002. struct device_node *ports_node,
  1003. phy_interface_t *port_phy_modes)
  1004. {
  1005. struct device *dev = felix->ocelot.dev;
  1006. struct device_node *child;
  1007. for_each_available_child_of_node(ports_node, child) {
  1008. phy_interface_t phy_mode;
  1009. u32 port;
  1010. int err;
  1011. /* Get switch port number from DT */
  1012. if (of_property_read_u32(child, "reg", &port) < 0) {
  1013. dev_err(dev, "Port number not defined in device tree "
  1014. "(property \"reg\")\n");
  1015. of_node_put(child);
  1016. return -ENODEV;
  1017. }
  1018. /* Get PHY mode from DT */
  1019. err = of_get_phy_mode(child, &phy_mode);
  1020. if (err) {
  1021. dev_err(dev, "Failed to read phy-mode or "
  1022. "phy-interface-type property for port %d\n",
  1023. port);
  1024. of_node_put(child);
  1025. return -ENODEV;
  1026. }
  1027. err = felix_validate_phy_mode(felix, port, phy_mode);
  1028. if (err < 0) {
  1029. dev_err(dev, "Unsupported PHY mode %s on port %d\n",
  1030. phy_modes(phy_mode), port);
  1031. of_node_put(child);
  1032. return err;
  1033. }
  1034. port_phy_modes[port] = phy_mode;
  1035. }
  1036. return 0;
  1037. }
  1038. static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
  1039. {
  1040. struct device *dev = felix->ocelot.dev;
  1041. struct device_node *switch_node;
  1042. struct device_node *ports_node;
  1043. int err;
  1044. switch_node = dev->of_node;
  1045. ports_node = of_get_child_by_name(switch_node, "ports");
  1046. if (!ports_node)
  1047. ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
  1048. if (!ports_node) {
  1049. dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
  1050. return -ENODEV;
  1051. }
  1052. err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
  1053. of_node_put(ports_node);
  1054. return err;
  1055. }
  1056. static struct regmap *felix_request_regmap_by_name(struct felix *felix,
  1057. const char *resource_name)
  1058. {
  1059. struct ocelot *ocelot = &felix->ocelot;
  1060. struct resource res;
  1061. int i;
  1062. for (i = 0; i < felix->info->num_resources; i++) {
  1063. if (strcmp(resource_name, felix->info->resources[i].name))
  1064. continue;
  1065. memcpy(&res, &felix->info->resources[i], sizeof(res));
  1066. res.start += felix->switch_base;
  1067. res.end += felix->switch_base;
  1068. return ocelot_regmap_init(ocelot, &res);
  1069. }
  1070. return ERR_PTR(-ENOENT);
  1071. }
  1072. static struct regmap *felix_request_regmap(struct felix *felix,
  1073. enum ocelot_target target)
  1074. {
  1075. const char *resource_name = felix->info->resource_names[target];
  1076. /* If the driver didn't provide a resource name for the target,
  1077. * the resource is optional.
  1078. */
  1079. if (!resource_name)
  1080. return NULL;
  1081. return felix_request_regmap_by_name(felix, resource_name);
  1082. }
  1083. static struct regmap *felix_request_port_regmap(struct felix *felix, int port)
  1084. {
  1085. char resource_name[32];
  1086. sprintf(resource_name, "port%d", port);
  1087. return felix_request_regmap_by_name(felix, resource_name);
  1088. }
  1089. static int felix_init_structs(struct felix *felix, int num_phys_ports)
  1090. {
  1091. struct ocelot *ocelot = &felix->ocelot;
  1092. phy_interface_t *port_phy_modes;
  1093. struct regmap *target;
  1094. int port, i, err;
  1095. ocelot->num_phys_ports = num_phys_ports;
  1096. ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
  1097. sizeof(struct ocelot_port *), GFP_KERNEL);
  1098. if (!ocelot->ports)
  1099. return -ENOMEM;
  1100. ocelot->map = felix->info->map;
  1101. ocelot->stats_layout = felix->info->stats_layout;
  1102. ocelot->num_mact_rows = felix->info->num_mact_rows;
  1103. ocelot->vcap = felix->info->vcap;
  1104. ocelot->vcap_pol.base = felix->info->vcap_pol_base;
  1105. ocelot->vcap_pol.max = felix->info->vcap_pol_max;
  1106. ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
  1107. ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
  1108. ocelot->ops = felix->info->ops;
  1109. ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
  1110. ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
  1111. ocelot->devlink = felix->ds->devlink;
  1112. port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
  1113. GFP_KERNEL);
  1114. if (!port_phy_modes)
  1115. return -ENOMEM;
  1116. err = felix_parse_dt(felix, port_phy_modes);
  1117. if (err) {
  1118. kfree(port_phy_modes);
  1119. return err;
  1120. }
  1121. for (i = 0; i < TARGET_MAX; i++) {
  1122. target = felix_request_regmap(felix, i);
  1123. if (IS_ERR(target)) {
  1124. dev_err(ocelot->dev,
  1125. "Failed to map device memory space: %pe\n",
  1126. target);
  1127. kfree(port_phy_modes);
  1128. return PTR_ERR(target);
  1129. }
  1130. ocelot->targets[i] = target;
  1131. }
  1132. err = ocelot_regfields_init(ocelot, felix->info->regfields);
  1133. if (err) {
  1134. dev_err(ocelot->dev, "failed to init reg fields map\n");
  1135. kfree(port_phy_modes);
  1136. return err;
  1137. }
  1138. for (port = 0; port < num_phys_ports; port++) {
  1139. struct ocelot_port *ocelot_port;
  1140. ocelot_port = devm_kzalloc(ocelot->dev,
  1141. sizeof(struct ocelot_port),
  1142. GFP_KERNEL);
  1143. if (!ocelot_port) {
  1144. dev_err(ocelot->dev,
  1145. "failed to allocate port memory\n");
  1146. kfree(port_phy_modes);
  1147. return -ENOMEM;
  1148. }
  1149. target = felix_request_port_regmap(felix, port);
  1150. if (IS_ERR(target)) {
  1151. dev_err(ocelot->dev,
  1152. "Failed to map memory space for port %d: %pe\n",
  1153. port, target);
  1154. kfree(port_phy_modes);
  1155. return PTR_ERR(target);
  1156. }
  1157. ocelot_port->phy_mode = port_phy_modes[port];
  1158. ocelot_port->ocelot = ocelot;
  1159. ocelot_port->target = target;
  1160. ocelot_port->index = port;
  1161. ocelot->ports[port] = ocelot_port;
  1162. }
  1163. kfree(port_phy_modes);
  1164. if (felix->info->mdio_bus_alloc) {
  1165. err = felix->info->mdio_bus_alloc(ocelot);
  1166. if (err < 0)
  1167. return err;
  1168. }
  1169. return 0;
  1170. }
  1171. static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
  1172. struct sk_buff *skb)
  1173. {
  1174. struct ocelot_port *ocelot_port = ocelot->ports[port];
  1175. struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
  1176. struct sk_buff *skb_match = NULL, *skb_tmp;
  1177. unsigned long flags;
  1178. if (!clone)
  1179. return;
  1180. spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
  1181. skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
  1182. if (skb != clone)
  1183. continue;
  1184. __skb_unlink(skb, &ocelot_port->tx_skbs);
  1185. skb_match = skb;
  1186. break;
  1187. }
  1188. spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
  1189. WARN_ONCE(!skb_match,
  1190. "Could not find skb clone in TX timestamping list\n");
  1191. }
  1192. #define work_to_xmit_work(w) \
  1193. container_of((w), struct felix_deferred_xmit_work, work)
  1194. static void felix_port_deferred_xmit(struct kthread_work *work)
  1195. {
  1196. struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
  1197. struct dsa_switch *ds = xmit_work->dp->ds;
  1198. struct sk_buff *skb = xmit_work->skb;
  1199. u32 rew_op = ocelot_ptp_rew_op(skb);
  1200. struct ocelot *ocelot = ds->priv;
  1201. int port = xmit_work->dp->index;
  1202. int retries = 10;
  1203. do {
  1204. if (ocelot_can_inject(ocelot, 0))
  1205. break;
  1206. cpu_relax();
  1207. } while (--retries);
  1208. if (!retries) {
  1209. dev_err(ocelot->dev, "port %d failed to inject skb\n",
  1210. port);
  1211. ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
  1212. kfree_skb(skb);
  1213. return;
  1214. }
  1215. ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
  1216. consume_skb(skb);
  1217. kfree(xmit_work);
  1218. }
  1219. static int felix_connect_tag_protocol(struct dsa_switch *ds,
  1220. enum dsa_tag_protocol proto)
  1221. {
  1222. struct ocelot_8021q_tagger_data *tagger_data;
  1223. switch (proto) {
  1224. case DSA_TAG_PROTO_OCELOT_8021Q:
  1225. tagger_data = ocelot_8021q_tagger_data(ds);
  1226. tagger_data->xmit_work_fn = felix_port_deferred_xmit;
  1227. return 0;
  1228. case DSA_TAG_PROTO_OCELOT:
  1229. case DSA_TAG_PROTO_SEVILLE:
  1230. return 0;
  1231. default:
  1232. return -EPROTONOSUPPORT;
  1233. }
  1234. }
  1235. /* Hardware initialization done here so that we can allocate structures with
  1236. * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
  1237. * us to allocate structures twice (leak memory) and map PCI memory twice
  1238. * (which will not work).
  1239. */
  1240. static int felix_setup(struct dsa_switch *ds)
  1241. {
  1242. struct ocelot *ocelot = ds->priv;
  1243. struct felix *felix = ocelot_to_felix(ocelot);
  1244. struct dsa_port *dp;
  1245. int err;
  1246. err = felix_init_structs(felix, ds->num_ports);
  1247. if (err)
  1248. return err;
  1249. err = ocelot_init(ocelot);
  1250. if (err)
  1251. goto out_mdiobus_free;
  1252. if (ocelot->ptp) {
  1253. err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
  1254. if (err) {
  1255. dev_err(ocelot->dev,
  1256. "Timestamp initialization failed\n");
  1257. ocelot->ptp = 0;
  1258. }
  1259. }
  1260. dsa_switch_for_each_available_port(dp, ds) {
  1261. ocelot_init_port(ocelot, dp->index);
  1262. /* Set the default QoS Classification based on PCP and DEI
  1263. * bits of vlan tag.
  1264. */
  1265. felix_port_qos_map_init(ocelot, dp->index);
  1266. }
  1267. err = ocelot_devlink_sb_register(ocelot);
  1268. if (err)
  1269. goto out_deinit_ports;
  1270. /* The initial tag protocol is NPI which won't fail during initial
  1271. * setup, there's no real point in checking for errors.
  1272. */
  1273. felix_change_tag_protocol(ds, felix->tag_proto);
  1274. ds->mtu_enforcement_ingress = true;
  1275. ds->assisted_learning_on_cpu_port = true;
  1276. ds->fdb_isolation = true;
  1277. ds->max_num_bridges = ds->num_ports;
  1278. return 0;
  1279. out_deinit_ports:
  1280. dsa_switch_for_each_available_port(dp, ds)
  1281. ocelot_deinit_port(ocelot, dp->index);
  1282. ocelot_deinit_timestamp(ocelot);
  1283. ocelot_deinit(ocelot);
  1284. out_mdiobus_free:
  1285. if (felix->info->mdio_bus_free)
  1286. felix->info->mdio_bus_free(ocelot);
  1287. return err;
  1288. }
  1289. static void felix_teardown(struct dsa_switch *ds)
  1290. {
  1291. struct ocelot *ocelot = ds->priv;
  1292. struct felix *felix = ocelot_to_felix(ocelot);
  1293. struct dsa_port *dp;
  1294. rtnl_lock();
  1295. if (felix->tag_proto_ops)
  1296. felix->tag_proto_ops->teardown(ds);
  1297. rtnl_unlock();
  1298. dsa_switch_for_each_available_port(dp, ds)
  1299. ocelot_deinit_port(ocelot, dp->index);
  1300. ocelot_devlink_sb_unregister(ocelot);
  1301. ocelot_deinit_timestamp(ocelot);
  1302. ocelot_deinit(ocelot);
  1303. if (felix->info->mdio_bus_free)
  1304. felix->info->mdio_bus_free(ocelot);
  1305. }
  1306. static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
  1307. struct ifreq *ifr)
  1308. {
  1309. struct ocelot *ocelot = ds->priv;
  1310. return ocelot_hwstamp_get(ocelot, port, ifr);
  1311. }
  1312. static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
  1313. struct ifreq *ifr)
  1314. {
  1315. struct ocelot *ocelot = ds->priv;
  1316. struct felix *felix = ocelot_to_felix(ocelot);
  1317. bool using_tag_8021q;
  1318. int err;
  1319. err = ocelot_hwstamp_set(ocelot, port, ifr);
  1320. if (err)
  1321. return err;
  1322. using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
  1323. return felix_update_trapping_destinations(ds, using_tag_8021q);
  1324. }
  1325. static bool felix_check_xtr_pkt(struct ocelot *ocelot)
  1326. {
  1327. struct felix *felix = ocelot_to_felix(ocelot);
  1328. int err = 0, grp = 0;
  1329. if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
  1330. return false;
  1331. if (!felix->info->quirk_no_xtr_irq)
  1332. return false;
  1333. while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
  1334. struct sk_buff *skb;
  1335. unsigned int type;
  1336. err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
  1337. if (err)
  1338. goto out;
  1339. /* We trap to the CPU port module all PTP frames, but
  1340. * felix_rxtstamp() only gets called for event frames.
  1341. * So we need to avoid sending duplicate general
  1342. * message frames by running a second BPF classifier
  1343. * here and dropping those.
  1344. */
  1345. __skb_push(skb, ETH_HLEN);
  1346. type = ptp_classify_raw(skb);
  1347. __skb_pull(skb, ETH_HLEN);
  1348. if (type == PTP_CLASS_NONE) {
  1349. kfree_skb(skb);
  1350. continue;
  1351. }
  1352. netif_rx(skb);
  1353. }
  1354. out:
  1355. if (err < 0) {
  1356. dev_err_ratelimited(ocelot->dev,
  1357. "Error during packet extraction: %pe\n",
  1358. ERR_PTR(err));
  1359. ocelot_drain_cpu_queue(ocelot, 0);
  1360. }
  1361. return true;
  1362. }
  1363. static bool felix_rxtstamp(struct dsa_switch *ds, int port,
  1364. struct sk_buff *skb, unsigned int type)
  1365. {
  1366. u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
  1367. struct skb_shared_hwtstamps *shhwtstamps;
  1368. struct ocelot *ocelot = ds->priv;
  1369. struct timespec64 ts;
  1370. u32 tstamp_hi;
  1371. u64 tstamp;
  1372. switch (type & PTP_CLASS_PMASK) {
  1373. case PTP_CLASS_L2:
  1374. if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L2))
  1375. return false;
  1376. break;
  1377. case PTP_CLASS_IPV4:
  1378. case PTP_CLASS_IPV6:
  1379. if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L4))
  1380. return false;
  1381. break;
  1382. }
  1383. /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
  1384. * for RX timestamping. Then free it, and poll for its copy through
  1385. * MMIO in the CPU port module, and inject that into the stack from
  1386. * ocelot_xtr_poll().
  1387. */
  1388. if (felix_check_xtr_pkt(ocelot)) {
  1389. kfree_skb(skb);
  1390. return true;
  1391. }
  1392. ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
  1393. tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
  1394. tstamp_hi = tstamp >> 32;
  1395. if ((tstamp & 0xffffffff) < tstamp_lo)
  1396. tstamp_hi--;
  1397. tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
  1398. shhwtstamps = skb_hwtstamps(skb);
  1399. memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
  1400. shhwtstamps->hwtstamp = tstamp;
  1401. return false;
  1402. }
  1403. static void felix_txtstamp(struct dsa_switch *ds, int port,
  1404. struct sk_buff *skb)
  1405. {
  1406. struct ocelot *ocelot = ds->priv;
  1407. struct sk_buff *clone = NULL;
  1408. if (!ocelot->ptp)
  1409. return;
  1410. if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
  1411. dev_err_ratelimited(ds->dev,
  1412. "port %d delivering skb without TX timestamp\n",
  1413. port);
  1414. return;
  1415. }
  1416. if (clone)
  1417. OCELOT_SKB_CB(skb)->clone = clone;
  1418. }
  1419. static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
  1420. {
  1421. struct ocelot *ocelot = ds->priv;
  1422. struct ocelot_port *ocelot_port = ocelot->ports[port];
  1423. struct felix *felix = ocelot_to_felix(ocelot);
  1424. ocelot_port_set_maxlen(ocelot, port, new_mtu);
  1425. mutex_lock(&ocelot->tas_lock);
  1426. if (ocelot_port->taprio && felix->info->tas_guard_bands_update)
  1427. felix->info->tas_guard_bands_update(ocelot, port);
  1428. mutex_unlock(&ocelot->tas_lock);
  1429. return 0;
  1430. }
  1431. static int felix_get_max_mtu(struct dsa_switch *ds, int port)
  1432. {
  1433. struct ocelot *ocelot = ds->priv;
  1434. return ocelot_get_max_mtu(ocelot, port);
  1435. }
  1436. static int felix_cls_flower_add(struct dsa_switch *ds, int port,
  1437. struct flow_cls_offload *cls, bool ingress)
  1438. {
  1439. struct ocelot *ocelot = ds->priv;
  1440. struct felix *felix = ocelot_to_felix(ocelot);
  1441. bool using_tag_8021q;
  1442. int err;
  1443. err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
  1444. if (err)
  1445. return err;
  1446. using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
  1447. return felix_update_trapping_destinations(ds, using_tag_8021q);
  1448. }
  1449. static int felix_cls_flower_del(struct dsa_switch *ds, int port,
  1450. struct flow_cls_offload *cls, bool ingress)
  1451. {
  1452. struct ocelot *ocelot = ds->priv;
  1453. return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
  1454. }
  1455. static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
  1456. struct flow_cls_offload *cls, bool ingress)
  1457. {
  1458. struct ocelot *ocelot = ds->priv;
  1459. return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
  1460. }
  1461. static int felix_port_policer_add(struct dsa_switch *ds, int port,
  1462. struct dsa_mall_policer_tc_entry *policer)
  1463. {
  1464. struct ocelot *ocelot = ds->priv;
  1465. struct ocelot_policer pol = {
  1466. .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
  1467. .burst = policer->burst,
  1468. };
  1469. return ocelot_port_policer_add(ocelot, port, &pol);
  1470. }
  1471. static void felix_port_policer_del(struct dsa_switch *ds, int port)
  1472. {
  1473. struct ocelot *ocelot = ds->priv;
  1474. ocelot_port_policer_del(ocelot, port);
  1475. }
  1476. static int felix_port_mirror_add(struct dsa_switch *ds, int port,
  1477. struct dsa_mall_mirror_tc_entry *mirror,
  1478. bool ingress, struct netlink_ext_ack *extack)
  1479. {
  1480. struct ocelot *ocelot = ds->priv;
  1481. return ocelot_port_mirror_add(ocelot, port, mirror->to_local_port,
  1482. ingress, extack);
  1483. }
  1484. static void felix_port_mirror_del(struct dsa_switch *ds, int port,
  1485. struct dsa_mall_mirror_tc_entry *mirror)
  1486. {
  1487. struct ocelot *ocelot = ds->priv;
  1488. ocelot_port_mirror_del(ocelot, port, mirror->ingress);
  1489. }
  1490. static int felix_port_setup_tc(struct dsa_switch *ds, int port,
  1491. enum tc_setup_type type,
  1492. void *type_data)
  1493. {
  1494. struct ocelot *ocelot = ds->priv;
  1495. struct felix *felix = ocelot_to_felix(ocelot);
  1496. if (felix->info->port_setup_tc)
  1497. return felix->info->port_setup_tc(ds, port, type, type_data);
  1498. else
  1499. return -EOPNOTSUPP;
  1500. }
  1501. static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
  1502. u16 pool_index,
  1503. struct devlink_sb_pool_info *pool_info)
  1504. {
  1505. struct ocelot *ocelot = ds->priv;
  1506. return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
  1507. }
  1508. static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
  1509. u16 pool_index, u32 size,
  1510. enum devlink_sb_threshold_type threshold_type,
  1511. struct netlink_ext_ack *extack)
  1512. {
  1513. struct ocelot *ocelot = ds->priv;
  1514. return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
  1515. threshold_type, extack);
  1516. }
  1517. static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
  1518. unsigned int sb_index, u16 pool_index,
  1519. u32 *p_threshold)
  1520. {
  1521. struct ocelot *ocelot = ds->priv;
  1522. return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
  1523. p_threshold);
  1524. }
  1525. static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
  1526. unsigned int sb_index, u16 pool_index,
  1527. u32 threshold, struct netlink_ext_ack *extack)
  1528. {
  1529. struct ocelot *ocelot = ds->priv;
  1530. return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
  1531. threshold, extack);
  1532. }
  1533. static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
  1534. unsigned int sb_index, u16 tc_index,
  1535. enum devlink_sb_pool_type pool_type,
  1536. u16 *p_pool_index, u32 *p_threshold)
  1537. {
  1538. struct ocelot *ocelot = ds->priv;
  1539. return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
  1540. pool_type, p_pool_index,
  1541. p_threshold);
  1542. }
  1543. static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
  1544. unsigned int sb_index, u16 tc_index,
  1545. enum devlink_sb_pool_type pool_type,
  1546. u16 pool_index, u32 threshold,
  1547. struct netlink_ext_ack *extack)
  1548. {
  1549. struct ocelot *ocelot = ds->priv;
  1550. return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
  1551. pool_type, pool_index, threshold,
  1552. extack);
  1553. }
  1554. static int felix_sb_occ_snapshot(struct dsa_switch *ds,
  1555. unsigned int sb_index)
  1556. {
  1557. struct ocelot *ocelot = ds->priv;
  1558. return ocelot_sb_occ_snapshot(ocelot, sb_index);
  1559. }
  1560. static int felix_sb_occ_max_clear(struct dsa_switch *ds,
  1561. unsigned int sb_index)
  1562. {
  1563. struct ocelot *ocelot = ds->priv;
  1564. return ocelot_sb_occ_max_clear(ocelot, sb_index);
  1565. }
  1566. static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
  1567. unsigned int sb_index, u16 pool_index,
  1568. u32 *p_cur, u32 *p_max)
  1569. {
  1570. struct ocelot *ocelot = ds->priv;
  1571. return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
  1572. p_cur, p_max);
  1573. }
  1574. static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
  1575. unsigned int sb_index, u16 tc_index,
  1576. enum devlink_sb_pool_type pool_type,
  1577. u32 *p_cur, u32 *p_max)
  1578. {
  1579. struct ocelot *ocelot = ds->priv;
  1580. return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
  1581. pool_type, p_cur, p_max);
  1582. }
  1583. static int felix_mrp_add(struct dsa_switch *ds, int port,
  1584. const struct switchdev_obj_mrp *mrp)
  1585. {
  1586. struct ocelot *ocelot = ds->priv;
  1587. return ocelot_mrp_add(ocelot, port, mrp);
  1588. }
  1589. static int felix_mrp_del(struct dsa_switch *ds, int port,
  1590. const struct switchdev_obj_mrp *mrp)
  1591. {
  1592. struct ocelot *ocelot = ds->priv;
  1593. return ocelot_mrp_add(ocelot, port, mrp);
  1594. }
  1595. static int
  1596. felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
  1597. const struct switchdev_obj_ring_role_mrp *mrp)
  1598. {
  1599. struct ocelot *ocelot = ds->priv;
  1600. return ocelot_mrp_add_ring_role(ocelot, port, mrp);
  1601. }
  1602. static int
  1603. felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
  1604. const struct switchdev_obj_ring_role_mrp *mrp)
  1605. {
  1606. struct ocelot *ocelot = ds->priv;
  1607. return ocelot_mrp_del_ring_role(ocelot, port, mrp);
  1608. }
  1609. static int felix_port_get_default_prio(struct dsa_switch *ds, int port)
  1610. {
  1611. struct ocelot *ocelot = ds->priv;
  1612. return ocelot_port_get_default_prio(ocelot, port);
  1613. }
  1614. static int felix_port_set_default_prio(struct dsa_switch *ds, int port,
  1615. u8 prio)
  1616. {
  1617. struct ocelot *ocelot = ds->priv;
  1618. return ocelot_port_set_default_prio(ocelot, port, prio);
  1619. }
  1620. static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)
  1621. {
  1622. struct ocelot *ocelot = ds->priv;
  1623. return ocelot_port_get_dscp_prio(ocelot, port, dscp);
  1624. }
  1625. static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
  1626. u8 prio)
  1627. {
  1628. struct ocelot *ocelot = ds->priv;
  1629. return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);
  1630. }
  1631. static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
  1632. u8 prio)
  1633. {
  1634. struct ocelot *ocelot = ds->priv;
  1635. return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);
  1636. }
  1637. const struct dsa_switch_ops felix_switch_ops = {
  1638. .get_tag_protocol = felix_get_tag_protocol,
  1639. .change_tag_protocol = felix_change_tag_protocol,
  1640. .connect_tag_protocol = felix_connect_tag_protocol,
  1641. .setup = felix_setup,
  1642. .teardown = felix_teardown,
  1643. .set_ageing_time = felix_set_ageing_time,
  1644. .get_stats64 = felix_get_stats64,
  1645. .get_pause_stats = felix_get_pause_stats,
  1646. .get_rmon_stats = felix_get_rmon_stats,
  1647. .get_eth_ctrl_stats = felix_get_eth_ctrl_stats,
  1648. .get_eth_mac_stats = felix_get_eth_mac_stats,
  1649. .get_eth_phy_stats = felix_get_eth_phy_stats,
  1650. .get_strings = felix_get_strings,
  1651. .get_ethtool_stats = felix_get_ethtool_stats,
  1652. .get_sset_count = felix_get_sset_count,
  1653. .get_ts_info = felix_get_ts_info,
  1654. .phylink_get_caps = felix_phylink_get_caps,
  1655. .phylink_validate = felix_phylink_validate,
  1656. .phylink_mac_select_pcs = felix_phylink_mac_select_pcs,
  1657. .phylink_mac_link_down = felix_phylink_mac_link_down,
  1658. .phylink_mac_link_up = felix_phylink_mac_link_up,
  1659. .port_enable = felix_port_enable,
  1660. .port_fast_age = felix_port_fast_age,
  1661. .port_fdb_dump = felix_fdb_dump,
  1662. .port_fdb_add = felix_fdb_add,
  1663. .port_fdb_del = felix_fdb_del,
  1664. .lag_fdb_add = felix_lag_fdb_add,
  1665. .lag_fdb_del = felix_lag_fdb_del,
  1666. .port_mdb_add = felix_mdb_add,
  1667. .port_mdb_del = felix_mdb_del,
  1668. .port_pre_bridge_flags = felix_pre_bridge_flags,
  1669. .port_bridge_flags = felix_bridge_flags,
  1670. .port_bridge_join = felix_bridge_join,
  1671. .port_bridge_leave = felix_bridge_leave,
  1672. .port_lag_join = felix_lag_join,
  1673. .port_lag_leave = felix_lag_leave,
  1674. .port_lag_change = felix_lag_change,
  1675. .port_stp_state_set = felix_bridge_stp_state_set,
  1676. .port_vlan_filtering = felix_vlan_filtering,
  1677. .port_vlan_add = felix_vlan_add,
  1678. .port_vlan_del = felix_vlan_del,
  1679. .port_hwtstamp_get = felix_hwtstamp_get,
  1680. .port_hwtstamp_set = felix_hwtstamp_set,
  1681. .port_rxtstamp = felix_rxtstamp,
  1682. .port_txtstamp = felix_txtstamp,
  1683. .port_change_mtu = felix_change_mtu,
  1684. .port_max_mtu = felix_get_max_mtu,
  1685. .port_policer_add = felix_port_policer_add,
  1686. .port_policer_del = felix_port_policer_del,
  1687. .port_mirror_add = felix_port_mirror_add,
  1688. .port_mirror_del = felix_port_mirror_del,
  1689. .cls_flower_add = felix_cls_flower_add,
  1690. .cls_flower_del = felix_cls_flower_del,
  1691. .cls_flower_stats = felix_cls_flower_stats,
  1692. .port_setup_tc = felix_port_setup_tc,
  1693. .devlink_sb_pool_get = felix_sb_pool_get,
  1694. .devlink_sb_pool_set = felix_sb_pool_set,
  1695. .devlink_sb_port_pool_get = felix_sb_port_pool_get,
  1696. .devlink_sb_port_pool_set = felix_sb_port_pool_set,
  1697. .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
  1698. .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
  1699. .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
  1700. .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
  1701. .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
  1702. .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
  1703. .port_mrp_add = felix_mrp_add,
  1704. .port_mrp_del = felix_mrp_del,
  1705. .port_mrp_add_ring_role = felix_mrp_add_ring_role,
  1706. .port_mrp_del_ring_role = felix_mrp_del_ring_role,
  1707. .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
  1708. .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
  1709. .port_get_default_prio = felix_port_get_default_prio,
  1710. .port_set_default_prio = felix_port_set_default_prio,
  1711. .port_get_dscp_prio = felix_port_get_dscp_prio,
  1712. .port_add_dscp_prio = felix_port_add_dscp_prio,
  1713. .port_del_dscp_prio = felix_port_del_dscp_prio,
  1714. .port_set_host_flood = felix_port_set_host_flood,
  1715. .port_change_master = felix_port_change_master,
  1716. };
  1717. struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
  1718. {
  1719. struct felix *felix = ocelot_to_felix(ocelot);
  1720. struct dsa_switch *ds = felix->ds;
  1721. if (!dsa_is_user_port(ds, port))
  1722. return NULL;
  1723. return dsa_to_port(ds, port)->slave;
  1724. }
  1725. int felix_netdev_to_port(struct net_device *dev)
  1726. {
  1727. struct dsa_port *dp;
  1728. dp = dsa_port_from_netdev(dev);
  1729. if (IS_ERR(dp))
  1730. return -EINVAL;
  1731. return dp->index;
  1732. }