sdhci-pltfm.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright 2010 MontaVista Software, LLC.
  4. *
  5. * Author: Anton Vorontsov <[email protected]>
  6. */
  7. #ifndef _DRIVERS_MMC_SDHCI_PLTFM_H
  8. #define _DRIVERS_MMC_SDHCI_PLTFM_H
  9. #include <linux/clk.h>
  10. #include <linux/platform_device.h>
  11. #include "sdhci.h"
  12. struct sdhci_pltfm_data {
  13. const struct sdhci_ops *ops;
  14. unsigned int quirks;
  15. unsigned int quirks2;
  16. };
  17. struct sdhci_pltfm_host {
  18. struct clk *clk;
  19. /* migrate from sdhci_of_host */
  20. unsigned int clock;
  21. u16 xfer_mode_shadow;
  22. unsigned long private[] ____cacheline_aligned;
  23. };
  24. #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
  25. /*
  26. * These accessors are designed for big endian hosts doing I/O to
  27. * little endian controllers incorporating a 32-bit hardware byte swapper.
  28. */
  29. static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
  30. {
  31. return in_be32(host->ioaddr + reg);
  32. }
  33. static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
  34. {
  35. return in_be16(host->ioaddr + (reg ^ 0x2));
  36. }
  37. static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
  38. {
  39. return in_8(host->ioaddr + (reg ^ 0x3));
  40. }
  41. static inline void sdhci_be32bs_writel(struct sdhci_host *host,
  42. u32 val, int reg)
  43. {
  44. out_be32(host->ioaddr + reg, val);
  45. }
  46. static inline void sdhci_be32bs_writew(struct sdhci_host *host,
  47. u16 val, int reg)
  48. {
  49. struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
  50. int base = reg & ~0x3;
  51. int shift = (reg & 0x2) * 8;
  52. switch (reg) {
  53. case SDHCI_TRANSFER_MODE:
  54. /*
  55. * Postpone this write, we must do it together with a
  56. * command write that is down below.
  57. */
  58. pltfm_host->xfer_mode_shadow = val;
  59. return;
  60. case SDHCI_COMMAND:
  61. sdhci_be32bs_writel(host,
  62. val << 16 | pltfm_host->xfer_mode_shadow,
  63. SDHCI_TRANSFER_MODE);
  64. return;
  65. }
  66. clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
  67. }
  68. static inline void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
  69. {
  70. int base = reg & ~0x3;
  71. int shift = (reg & 0x3) * 8;
  72. clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
  73. }
  74. #endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
  75. void sdhci_get_property(struct platform_device *pdev);
  76. static inline void sdhci_get_of_property(struct platform_device *pdev)
  77. {
  78. return sdhci_get_property(pdev);
  79. }
  80. extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
  81. const struct sdhci_pltfm_data *pdata,
  82. size_t priv_size);
  83. extern void sdhci_pltfm_free(struct platform_device *pdev);
  84. extern int sdhci_pltfm_register(struct platform_device *pdev,
  85. const struct sdhci_pltfm_data *pdata,
  86. size_t priv_size);
  87. extern int sdhci_pltfm_unregister(struct platform_device *pdev);
  88. extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
  89. static inline void *sdhci_pltfm_priv(struct sdhci_pltfm_host *host)
  90. {
  91. return host->private;
  92. }
  93. extern const struct dev_pm_ops sdhci_pltfm_pmops;
  94. #ifdef CONFIG_PM_SLEEP
  95. int sdhci_pltfm_suspend(struct device *dev);
  96. int sdhci_pltfm_resume(struct device *dev);
  97. #else
  98. static inline int sdhci_pltfm_suspend(struct device *dev) { return 0; }
  99. static inline int sdhci_pltfm_resume(struct device *dev) { return 0; }
  100. #endif
  101. #endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */