sdhci-bcm-kona.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. // Copyright (C) 2013 Broadcom Corporation
  3. #include <linux/kernel.h>
  4. #include <linux/module.h>
  5. #include <linux/delay.h>
  6. #include <linux/highmem.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/mmc/host.h>
  9. #include <linux/io.h>
  10. #include <linux/clk.h>
  11. #include <linux/regulator/consumer.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/mmc/slot-gpio.h>
  15. #include "sdhci-pltfm.h"
  16. #include "sdhci.h"
  17. #define SDHCI_SOFT_RESET 0x01000000
  18. #define KONA_SDHOST_CORECTRL 0x8000
  19. #define KONA_SDHOST_CD_PINCTRL 0x00000008
  20. #define KONA_SDHOST_STOP_HCLK 0x00000004
  21. #define KONA_SDHOST_RESET 0x00000002
  22. #define KONA_SDHOST_EN 0x00000001
  23. #define KONA_SDHOST_CORESTAT 0x8004
  24. #define KONA_SDHOST_WP 0x00000002
  25. #define KONA_SDHOST_CD_SW 0x00000001
  26. #define KONA_SDHOST_COREIMR 0x8008
  27. #define KONA_SDHOST_IP 0x00000001
  28. #define KONA_SDHOST_COREISR 0x800C
  29. #define KONA_SDHOST_COREIMSR 0x8010
  30. #define KONA_SDHOST_COREDBG1 0x8014
  31. #define KONA_SDHOST_COREGPO_MASK 0x8018
  32. #define SD_DETECT_GPIO_DEBOUNCE_128MS 128
  33. #define KONA_MMC_AUTOSUSPEND_DELAY (50)
  34. struct sdhci_bcm_kona_dev {
  35. struct mutex write_lock; /* protect back to back writes */
  36. };
  37. static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
  38. {
  39. unsigned int val;
  40. unsigned long timeout;
  41. /* This timeout should be sufficent for core to reset */
  42. timeout = jiffies + msecs_to_jiffies(100);
  43. /* reset the host using the top level reset */
  44. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  45. val |= KONA_SDHOST_RESET;
  46. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  47. while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
  48. if (time_is_before_jiffies(timeout)) {
  49. pr_err("Error: sd host is stuck in reset!!!\n");
  50. return -EFAULT;
  51. }
  52. }
  53. /* bring the host out of reset */
  54. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  55. val &= ~KONA_SDHOST_RESET;
  56. /*
  57. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  58. * Back-to-Back writes to same register needs delay when SD bus clock
  59. * is very low w.r.t AHB clock, mainly during boot-time and during card
  60. * insert-removal.
  61. */
  62. usleep_range(1000, 5000);
  63. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  64. return 0;
  65. }
  66. static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
  67. {
  68. unsigned int val;
  69. /* enable the interrupt from the IP core */
  70. val = sdhci_readl(host, KONA_SDHOST_COREIMR);
  71. val |= KONA_SDHOST_IP;
  72. sdhci_writel(host, val, KONA_SDHOST_COREIMR);
  73. /* Enable the AHB clock gating module to the host */
  74. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  75. val |= KONA_SDHOST_EN;
  76. /*
  77. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  78. * Back-to-Back writes to same register needs delay when SD bus clock
  79. * is very low w.r.t AHB clock, mainly during boot-time and during card
  80. * insert-removal.
  81. */
  82. usleep_range(1000, 5000);
  83. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  84. }
  85. /*
  86. * Software emulation of the SD card insertion/removal. Set insert=1 for insert
  87. * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
  88. * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
  89. * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
  90. */
  91. static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
  92. {
  93. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  94. struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
  95. u32 val;
  96. /*
  97. * Back-to-Back register write needs a delay of min 10uS.
  98. * Back-to-Back writes to same register needs delay when SD bus clock
  99. * is very low w.r.t AHB clock, mainly during boot-time and during card
  100. * insert-removal.
  101. * We keep 20uS
  102. */
  103. mutex_lock(&kona_dev->write_lock);
  104. udelay(20);
  105. val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
  106. if (insert) {
  107. int ret;
  108. ret = mmc_gpio_get_ro(host->mmc);
  109. if (ret >= 0)
  110. val = (val & ~KONA_SDHOST_WP) |
  111. ((ret) ? KONA_SDHOST_WP : 0);
  112. val |= KONA_SDHOST_CD_SW;
  113. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  114. } else {
  115. val &= ~KONA_SDHOST_CD_SW;
  116. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  117. }
  118. mutex_unlock(&kona_dev->write_lock);
  119. return 0;
  120. }
  121. /*
  122. * SD card interrupt event callback
  123. */
  124. static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
  125. {
  126. if (mmc_gpio_get_cd(host->mmc) > 0) {
  127. dev_dbg(mmc_dev(host->mmc),
  128. "card inserted\n");
  129. sdhci_bcm_kona_sd_card_emulate(host, 1);
  130. } else {
  131. dev_dbg(mmc_dev(host->mmc),
  132. "card removed\n");
  133. sdhci_bcm_kona_sd_card_emulate(host, 0);
  134. }
  135. }
  136. static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
  137. u8 power_mode)
  138. {
  139. /*
  140. * JEDEC and SD spec specify supplying 74 continuous clocks to
  141. * device after power up. With minimum bus (100KHz) that
  142. * that translates to 740us
  143. */
  144. if (power_mode != MMC_POWER_OFF)
  145. udelay(740);
  146. }
  147. static const struct sdhci_ops sdhci_bcm_kona_ops = {
  148. .set_clock = sdhci_set_clock,
  149. .get_max_clock = sdhci_pltfm_clk_get_max_clock,
  150. .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
  151. .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
  152. .set_bus_width = sdhci_set_bus_width,
  153. .reset = sdhci_reset,
  154. .set_uhs_signaling = sdhci_set_uhs_signaling,
  155. .card_event = sdhci_bcm_kona_card_event,
  156. };
  157. static const struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
  158. .ops = &sdhci_bcm_kona_ops,
  159. .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
  160. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
  161. SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
  162. SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
  163. SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
  164. };
  165. static const struct of_device_id sdhci_bcm_kona_of_match[] = {
  166. { .compatible = "brcm,kona-sdhci"},
  167. { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
  168. {}
  169. };
  170. MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
  171. static int sdhci_bcm_kona_probe(struct platform_device *pdev)
  172. {
  173. struct sdhci_bcm_kona_dev *kona_dev = NULL;
  174. struct sdhci_pltfm_host *pltfm_priv;
  175. struct device *dev = &pdev->dev;
  176. struct sdhci_host *host;
  177. int ret;
  178. ret = 0;
  179. host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
  180. sizeof(*kona_dev));
  181. if (IS_ERR(host))
  182. return PTR_ERR(host);
  183. dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
  184. pltfm_priv = sdhci_priv(host);
  185. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  186. mutex_init(&kona_dev->write_lock);
  187. ret = mmc_of_parse(host->mmc);
  188. if (ret)
  189. goto err_pltfm_free;
  190. if (!host->mmc->f_max) {
  191. dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
  192. ret = -ENXIO;
  193. goto err_pltfm_free;
  194. }
  195. /* Get and enable the core clock */
  196. pltfm_priv->clk = devm_clk_get(dev, NULL);
  197. if (IS_ERR(pltfm_priv->clk)) {
  198. dev_err(dev, "Failed to get core clock\n");
  199. ret = PTR_ERR(pltfm_priv->clk);
  200. goto err_pltfm_free;
  201. }
  202. ret = clk_set_rate(pltfm_priv->clk, host->mmc->f_max);
  203. if (ret) {
  204. dev_err(dev, "Failed to set rate core clock\n");
  205. goto err_pltfm_free;
  206. }
  207. ret = clk_prepare_enable(pltfm_priv->clk);
  208. if (ret) {
  209. dev_err(dev, "Failed to enable core clock\n");
  210. goto err_pltfm_free;
  211. }
  212. dev_dbg(dev, "non-removable=%c\n",
  213. mmc_card_is_removable(host->mmc) ? 'N' : 'Y');
  214. dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
  215. (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
  216. (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
  217. if (!mmc_card_is_removable(host->mmc))
  218. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  219. dev_dbg(dev, "is_8bit=%c\n",
  220. (host->mmc->caps & MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
  221. ret = sdhci_bcm_kona_sd_reset(host);
  222. if (ret)
  223. goto err_clk_disable;
  224. sdhci_bcm_kona_sd_init(host);
  225. ret = sdhci_add_host(host);
  226. if (ret)
  227. goto err_reset;
  228. /* if device is eMMC, emulate card insert right here */
  229. if (!mmc_card_is_removable(host->mmc)) {
  230. ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
  231. if (ret) {
  232. dev_err(dev,
  233. "unable to emulate card insertion\n");
  234. goto err_remove_host;
  235. }
  236. }
  237. /*
  238. * Since the card detection GPIO interrupt is configured to be
  239. * edge sensitive, check the initial GPIO value here, emulate
  240. * only if the card is present
  241. */
  242. if (mmc_gpio_get_cd(host->mmc) > 0)
  243. sdhci_bcm_kona_sd_card_emulate(host, 1);
  244. dev_dbg(dev, "initialized properly\n");
  245. return 0;
  246. err_remove_host:
  247. sdhci_remove_host(host, 0);
  248. err_reset:
  249. sdhci_bcm_kona_sd_reset(host);
  250. err_clk_disable:
  251. clk_disable_unprepare(pltfm_priv->clk);
  252. err_pltfm_free:
  253. sdhci_pltfm_free(pdev);
  254. dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
  255. return ret;
  256. }
  257. static struct platform_driver sdhci_bcm_kona_driver = {
  258. .driver = {
  259. .name = "sdhci-kona",
  260. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  261. .pm = &sdhci_pltfm_pmops,
  262. .of_match_table = sdhci_bcm_kona_of_match,
  263. },
  264. .probe = sdhci_bcm_kona_probe,
  265. .remove = sdhci_pltfm_unregister,
  266. };
  267. module_platform_driver(sdhci_bcm_kona_driver);
  268. MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
  269. MODULE_AUTHOR("Broadcom");
  270. MODULE_LICENSE("GPL v2");