mvsdio.h 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved.
  4. */
  5. #ifndef __MVSDIO_H
  6. #define __MVSDIO_H
  7. /*
  8. * Clock rates
  9. */
  10. #define MVSD_CLOCKRATE_MAX 50000000
  11. #define MVSD_BASE_DIV_MAX 0x7ff
  12. /*
  13. * Register offsets
  14. */
  15. #define MVSD_SYS_ADDR_LOW 0x000
  16. #define MVSD_SYS_ADDR_HI 0x004
  17. #define MVSD_BLK_SIZE 0x008
  18. #define MVSD_BLK_COUNT 0x00c
  19. #define MVSD_ARG_LOW 0x010
  20. #define MVSD_ARG_HI 0x014
  21. #define MVSD_XFER_MODE 0x018
  22. #define MVSD_CMD 0x01c
  23. #define MVSD_RSP(i) (0x020 + ((i)<<2))
  24. #define MVSD_RSP0 0x020
  25. #define MVSD_RSP1 0x024
  26. #define MVSD_RSP2 0x028
  27. #define MVSD_RSP3 0x02c
  28. #define MVSD_RSP4 0x030
  29. #define MVSD_RSP5 0x034
  30. #define MVSD_RSP6 0x038
  31. #define MVSD_RSP7 0x03c
  32. #define MVSD_FIFO 0x040
  33. #define MVSD_RSP_CRC7 0x044
  34. #define MVSD_HW_STATE 0x048
  35. #define MVSD_HOST_CTRL 0x050
  36. #define MVSD_BLK_GAP_CTRL 0x054
  37. #define MVSD_CLK_CTRL 0x058
  38. #define MVSD_SW_RESET 0x05c
  39. #define MVSD_NOR_INTR_STATUS 0x060
  40. #define MVSD_ERR_INTR_STATUS 0x064
  41. #define MVSD_NOR_STATUS_EN 0x068
  42. #define MVSD_ERR_STATUS_EN 0x06c
  43. #define MVSD_NOR_INTR_EN 0x070
  44. #define MVSD_ERR_INTR_EN 0x074
  45. #define MVSD_AUTOCMD12_ERR_STATUS 0x078
  46. #define MVSD_CURR_BYTE_LEFT 0x07c
  47. #define MVSD_CURR_BLK_LEFT 0x080
  48. #define MVSD_AUTOCMD12_ARG_LOW 0x084
  49. #define MVSD_AUTOCMD12_ARG_HI 0x088
  50. #define MVSD_AUTOCMD12_CMD 0x08c
  51. #define MVSD_AUTO_RSP(i) (0x090 + ((i)<<2))
  52. #define MVSD_AUTO_RSP0 0x090
  53. #define MVSD_AUTO_RSP1 0x094
  54. #define MVSD_AUTO_RSP2 0x098
  55. #define MVSD_CLK_DIV 0x128
  56. #define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3))
  57. #define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3))
  58. /*
  59. * MVSD_CMD
  60. */
  61. #define MVSD_CMD_RSP_NONE (0 << 0)
  62. #define MVSD_CMD_RSP_136 (1 << 0)
  63. #define MVSD_CMD_RSP_48 (2 << 0)
  64. #define MVSD_CMD_RSP_48BUSY (3 << 0)
  65. #define MVSD_CMD_CHECK_DATACRC16 (1 << 2)
  66. #define MVSD_CMD_CHECK_CMDCRC (1 << 3)
  67. #define MVSD_CMD_INDX_CHECK (1 << 4)
  68. #define MVSD_CMD_DATA_PRESENT (1 << 5)
  69. #define MVSD_UNEXPECTED_RESP (1 << 7)
  70. #define MVSD_CMD_INDEX(x) ((x) << 8)
  71. /*
  72. * MVSD_AUTOCMD12_CMD
  73. */
  74. #define MVSD_AUTOCMD12_BUSY (1 << 0)
  75. #define MVSD_AUTOCMD12_INDX_CHECK (1 << 1)
  76. #define MVSD_AUTOCMD12_INDEX(x) ((x) << 8)
  77. /*
  78. * MVSD_XFER_MODE
  79. */
  80. #define MVSD_XFER_MODE_WR_DATA_START (1 << 0)
  81. #define MVSD_XFER_MODE_HW_WR_DATA_EN (1 << 1)
  82. #define MVSD_XFER_MODE_AUTO_CMD12 (1 << 2)
  83. #define MVSD_XFER_MODE_INT_CHK_EN (1 << 3)
  84. #define MVSD_XFER_MODE_TO_HOST (1 << 4)
  85. #define MVSD_XFER_MODE_STOP_CLK (1 << 5)
  86. #define MVSD_XFER_MODE_PIO (1 << 6)
  87. /*
  88. * MVSD_HOST_CTRL
  89. */
  90. #define MVSD_HOST_CTRL_PUSH_PULL_EN (1 << 0)
  91. #define MVSD_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1)
  92. #define MVSD_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1)
  93. #define MVSD_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1)
  94. #define MVSD_HOST_CTRL_CARD_TYPE_IO_MMC (3 << 1)
  95. #define MVSD_HOST_CTRL_CARD_TYPE_MASK (3 << 1)
  96. #define MVSD_HOST_CTRL_BIG_ENDIAN (1 << 3)
  97. #define MVSD_HOST_CTRL_LSB_FIRST (1 << 4)
  98. #define MVSD_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9)
  99. #define MVSD_HOST_CTRL_HI_SPEED_EN (1 << 10)
  100. #define MVSD_HOST_CTRL_TMOUT_MAX 0xf
  101. #define MVSD_HOST_CTRL_TMOUT_MASK (0xf << 11)
  102. #define MVSD_HOST_CTRL_TMOUT(x) ((x) << 11)
  103. #define MVSD_HOST_CTRL_TMOUT_EN (1 << 15)
  104. /*
  105. * MVSD_SW_RESET
  106. */
  107. #define MVSD_SW_RESET_NOW (1 << 8)
  108. /*
  109. * Normal interrupt status bits
  110. */
  111. #define MVSD_NOR_CMD_DONE (1 << 0)
  112. #define MVSD_NOR_XFER_DONE (1 << 1)
  113. #define MVSD_NOR_BLK_GAP_EVT (1 << 2)
  114. #define MVSD_NOR_DMA_DONE (1 << 3)
  115. #define MVSD_NOR_TX_AVAIL (1 << 4)
  116. #define MVSD_NOR_RX_READY (1 << 5)
  117. #define MVSD_NOR_CARD_INT (1 << 8)
  118. #define MVSD_NOR_READ_WAIT_ON (1 << 9)
  119. #define MVSD_NOR_RX_FIFO_8W (1 << 10)
  120. #define MVSD_NOR_TX_FIFO_8W (1 << 11)
  121. #define MVSD_NOR_SUSPEND_ON (1 << 12)
  122. #define MVSD_NOR_AUTOCMD12_DONE (1 << 13)
  123. #define MVSD_NOR_UNEXP_RSP (1 << 14)
  124. #define MVSD_NOR_ERROR (1 << 15)
  125. /*
  126. * Error status bits
  127. */
  128. #define MVSD_ERR_CMD_TIMEOUT (1 << 0)
  129. #define MVSD_ERR_CMD_CRC (1 << 1)
  130. #define MVSD_ERR_CMD_ENDBIT (1 << 2)
  131. #define MVSD_ERR_CMD_INDEX (1 << 3)
  132. #define MVSD_ERR_DATA_TIMEOUT (1 << 4)
  133. #define MVSD_ERR_DATA_CRC (1 << 5)
  134. #define MVSD_ERR_DATA_ENDBIT (1 << 6)
  135. #define MVSD_ERR_AUTOCMD12 (1 << 8)
  136. #define MVSD_ERR_CMD_STARTBIT (1 << 9)
  137. #define MVSD_ERR_XFER_SIZE (1 << 10)
  138. #define MVSD_ERR_RESP_T_BIT (1 << 11)
  139. #define MVSD_ERR_CRC_ENDBIT (1 << 12)
  140. #define MVSD_ERR_CRC_STARTBIT (1 << 13)
  141. #define MVSD_ERR_CRC_STATUS (1 << 14)
  142. /*
  143. * CMD12 error status bits
  144. */
  145. #define MVSD_AUTOCMD12_ERR_NOTEXE (1 << 0)
  146. #define MVSD_AUTOCMD12_ERR_TIMEOUT (1 << 1)
  147. #define MVSD_AUTOCMD12_ERR_CRC (1 << 2)
  148. #define MVSD_AUTOCMD12_ERR_ENDBIT (1 << 3)
  149. #define MVSD_AUTOCMD12_ERR_INDEX (1 << 4)
  150. #define MVSD_AUTOCMD12_ERR_RESP_T_BIT (1 << 5)
  151. #define MVSD_AUTOCMD12_ERR_RESP_STARTBIT (1 << 6)
  152. #endif