wm8994-irq.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
  4. *
  5. * Copyright 2010 Wolfson Microelectronics PLC.
  6. *
  7. * Author: Mark Brown <[email protected]>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/gpio.h>
  12. #include <linux/i2c.h>
  13. #include <linux/irq.h>
  14. #include <linux/mfd/core.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irqdomain.h>
  17. #include <linux/regmap.h>
  18. #include <linux/mfd/wm8994/core.h>
  19. #include <linux/mfd/wm8994/pdata.h>
  20. #include <linux/mfd/wm8994/registers.h>
  21. #include <linux/delay.h>
  22. static const struct regmap_irq wm8994_irqs[] = {
  23. [WM8994_IRQ_TEMP_SHUT] = {
  24. .reg_offset = 1,
  25. .mask = WM8994_TEMP_SHUT_EINT,
  26. },
  27. [WM8994_IRQ_MIC1_DET] = {
  28. .reg_offset = 1,
  29. .mask = WM8994_MIC1_DET_EINT,
  30. },
  31. [WM8994_IRQ_MIC1_SHRT] = {
  32. .reg_offset = 1,
  33. .mask = WM8994_MIC1_SHRT_EINT,
  34. },
  35. [WM8994_IRQ_MIC2_DET] = {
  36. .reg_offset = 1,
  37. .mask = WM8994_MIC2_DET_EINT,
  38. },
  39. [WM8994_IRQ_MIC2_SHRT] = {
  40. .reg_offset = 1,
  41. .mask = WM8994_MIC2_SHRT_EINT,
  42. },
  43. [WM8994_IRQ_FLL1_LOCK] = {
  44. .reg_offset = 1,
  45. .mask = WM8994_FLL1_LOCK_EINT,
  46. },
  47. [WM8994_IRQ_FLL2_LOCK] = {
  48. .reg_offset = 1,
  49. .mask = WM8994_FLL2_LOCK_EINT,
  50. },
  51. [WM8994_IRQ_SRC1_LOCK] = {
  52. .reg_offset = 1,
  53. .mask = WM8994_SRC1_LOCK_EINT,
  54. },
  55. [WM8994_IRQ_SRC2_LOCK] = {
  56. .reg_offset = 1,
  57. .mask = WM8994_SRC2_LOCK_EINT,
  58. },
  59. [WM8994_IRQ_AIF1DRC1_SIG_DET] = {
  60. .reg_offset = 1,
  61. .mask = WM8994_AIF1DRC1_SIG_DET,
  62. },
  63. [WM8994_IRQ_AIF1DRC2_SIG_DET] = {
  64. .reg_offset = 1,
  65. .mask = WM8994_AIF1DRC2_SIG_DET_EINT,
  66. },
  67. [WM8994_IRQ_AIF2DRC_SIG_DET] = {
  68. .reg_offset = 1,
  69. .mask = WM8994_AIF2DRC_SIG_DET_EINT,
  70. },
  71. [WM8994_IRQ_FIFOS_ERR] = {
  72. .reg_offset = 1,
  73. .mask = WM8994_FIFOS_ERR_EINT,
  74. },
  75. [WM8994_IRQ_WSEQ_DONE] = {
  76. .reg_offset = 1,
  77. .mask = WM8994_WSEQ_DONE_EINT,
  78. },
  79. [WM8994_IRQ_DCS_DONE] = {
  80. .reg_offset = 1,
  81. .mask = WM8994_DCS_DONE_EINT,
  82. },
  83. [WM8994_IRQ_TEMP_WARN] = {
  84. .reg_offset = 1,
  85. .mask = WM8994_TEMP_WARN_EINT,
  86. },
  87. [WM8994_IRQ_GPIO(1)] = {
  88. .mask = WM8994_GP1_EINT,
  89. },
  90. [WM8994_IRQ_GPIO(2)] = {
  91. .mask = WM8994_GP2_EINT,
  92. },
  93. [WM8994_IRQ_GPIO(3)] = {
  94. .mask = WM8994_GP3_EINT,
  95. },
  96. [WM8994_IRQ_GPIO(4)] = {
  97. .mask = WM8994_GP4_EINT,
  98. },
  99. [WM8994_IRQ_GPIO(5)] = {
  100. .mask = WM8994_GP5_EINT,
  101. },
  102. [WM8994_IRQ_GPIO(6)] = {
  103. .mask = WM8994_GP6_EINT,
  104. },
  105. [WM8994_IRQ_GPIO(7)] = {
  106. .mask = WM8994_GP7_EINT,
  107. },
  108. [WM8994_IRQ_GPIO(8)] = {
  109. .mask = WM8994_GP8_EINT,
  110. },
  111. [WM8994_IRQ_GPIO(9)] = {
  112. .mask = WM8994_GP8_EINT,
  113. },
  114. [WM8994_IRQ_GPIO(10)] = {
  115. .mask = WM8994_GP10_EINT,
  116. },
  117. [WM8994_IRQ_GPIO(11)] = {
  118. .mask = WM8994_GP11_EINT,
  119. },
  120. };
  121. static const struct regmap_irq_chip wm8994_irq_chip = {
  122. .name = "wm8994",
  123. .irqs = wm8994_irqs,
  124. .num_irqs = ARRAY_SIZE(wm8994_irqs),
  125. .num_regs = 2,
  126. .status_base = WM8994_INTERRUPT_STATUS_1,
  127. .mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
  128. .ack_base = WM8994_INTERRUPT_STATUS_1,
  129. .runtime_pm = true,
  130. };
  131. static void wm8994_edge_irq_enable(struct irq_data *data)
  132. {
  133. }
  134. static void wm8994_edge_irq_disable(struct irq_data *data)
  135. {
  136. }
  137. static struct irq_chip wm8994_edge_irq_chip = {
  138. .name = "wm8994_edge",
  139. .irq_disable = wm8994_edge_irq_disable,
  140. .irq_enable = wm8994_edge_irq_enable,
  141. };
  142. static irqreturn_t wm8994_edge_irq(int irq, void *data)
  143. {
  144. struct wm8994 *wm8994 = data;
  145. while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
  146. handle_nested_irq(irq_find_mapping(wm8994->edge_irq, 0));
  147. return IRQ_HANDLED;
  148. }
  149. static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
  150. irq_hw_number_t hw)
  151. {
  152. struct wm8994 *wm8994 = h->host_data;
  153. irq_set_chip_data(virq, wm8994);
  154. irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
  155. irq_set_nested_thread(virq, 1);
  156. irq_set_noprobe(virq);
  157. return 0;
  158. }
  159. static const struct irq_domain_ops wm8994_edge_irq_ops = {
  160. .map = wm8994_edge_irq_map,
  161. .xlate = irq_domain_xlate_twocell,
  162. };
  163. int wm8994_irq_init(struct wm8994 *wm8994)
  164. {
  165. int ret;
  166. unsigned long irqflags;
  167. struct wm8994_pdata *pdata = &wm8994->pdata;
  168. if (!wm8994->irq) {
  169. dev_warn(wm8994->dev,
  170. "No interrupt specified, no interrupts\n");
  171. wm8994->irq_base = 0;
  172. return 0;
  173. }
  174. /* select user or default irq flags */
  175. irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
  176. if (pdata->irq_flags)
  177. irqflags = pdata->irq_flags;
  178. /* use a GPIO for edge triggered controllers */
  179. if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
  180. if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
  181. dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
  182. wm8994->irq, pdata->irq_gpio,
  183. gpio_to_irq(pdata->irq_gpio));
  184. wm8994->irq = gpio_to_irq(pdata->irq_gpio);
  185. }
  186. ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
  187. GPIOF_IN, "WM8994 IRQ");
  188. if (ret != 0) {
  189. dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
  190. ret);
  191. return ret;
  192. }
  193. wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
  194. &wm8994_edge_irq_ops,
  195. wm8994);
  196. ret = regmap_add_irq_chip(wm8994->regmap,
  197. irq_create_mapping(wm8994->edge_irq,
  198. 0),
  199. IRQF_ONESHOT,
  200. wm8994->irq_base, &wm8994_irq_chip,
  201. &wm8994->irq_data);
  202. if (ret != 0) {
  203. dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
  204. ret);
  205. return ret;
  206. }
  207. ret = request_threaded_irq(wm8994->irq,
  208. NULL, wm8994_edge_irq,
  209. irqflags,
  210. "WM8994 edge", wm8994);
  211. } else {
  212. ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
  213. irqflags,
  214. wm8994->irq_base, &wm8994_irq_chip,
  215. &wm8994->irq_data);
  216. }
  217. if (ret != 0) {
  218. dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
  219. return ret;
  220. }
  221. /* Enable top level interrupt if it was masked */
  222. wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
  223. return 0;
  224. }
  225. EXPORT_SYMBOL(wm8994_irq_init);
  226. void wm8994_irq_exit(struct wm8994 *wm8994)
  227. {
  228. regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
  229. }
  230. EXPORT_SYMBOL(wm8994_irq_exit);