stpmic1.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) STMicroelectronics 2018
  3. // Author: Pascal Paillet <[email protected]>
  4. #include <linux/i2c.h>
  5. #include <linux/interrupt.h>
  6. #include <linux/mfd/core.h>
  7. #include <linux/mfd/stpmic1.h>
  8. #include <linux/module.h>
  9. #include <linux/of.h>
  10. #include <linux/of_irq.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/pm_wakeirq.h>
  13. #include <linux/regmap.h>
  14. #include <dt-bindings/mfd/st,stpmic1.h>
  15. #define STPMIC1_MAIN_IRQ 0
  16. static const struct regmap_range stpmic1_readable_ranges[] = {
  17. regmap_reg_range(TURN_ON_SR, VERSION_SR),
  18. regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
  19. regmap_reg_range(BST_SW_CR, BST_SW_CR),
  20. regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
  21. regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
  22. regmap_reg_range(INT_MASK_R1, INT_MASK_R4),
  23. regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
  24. regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
  25. regmap_reg_range(INT_SRC_R1, INT_SRC_R1),
  26. };
  27. static const struct regmap_range stpmic1_writeable_ranges[] = {
  28. regmap_reg_range(SWOFF_PWRCTRL_CR, LDO6_STDBY_CR),
  29. regmap_reg_range(BST_SW_CR, BST_SW_CR),
  30. regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4),
  31. regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4),
  32. regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4),
  33. };
  34. static const struct regmap_range stpmic1_volatile_ranges[] = {
  35. regmap_reg_range(TURN_ON_SR, VERSION_SR),
  36. regmap_reg_range(WCHDG_CR, WCHDG_CR),
  37. regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4),
  38. regmap_reg_range(INT_SRC_R1, INT_SRC_R4),
  39. };
  40. static const struct regmap_access_table stpmic1_readable_table = {
  41. .yes_ranges = stpmic1_readable_ranges,
  42. .n_yes_ranges = ARRAY_SIZE(stpmic1_readable_ranges),
  43. };
  44. static const struct regmap_access_table stpmic1_writeable_table = {
  45. .yes_ranges = stpmic1_writeable_ranges,
  46. .n_yes_ranges = ARRAY_SIZE(stpmic1_writeable_ranges),
  47. };
  48. static const struct regmap_access_table stpmic1_volatile_table = {
  49. .yes_ranges = stpmic1_volatile_ranges,
  50. .n_yes_ranges = ARRAY_SIZE(stpmic1_volatile_ranges),
  51. };
  52. static const struct regmap_config stpmic1_regmap_config = {
  53. .reg_bits = 8,
  54. .val_bits = 8,
  55. .cache_type = REGCACHE_RBTREE,
  56. .max_register = PMIC_MAX_REGISTER_ADDRESS,
  57. .rd_table = &stpmic1_readable_table,
  58. .wr_table = &stpmic1_writeable_table,
  59. .volatile_table = &stpmic1_volatile_table,
  60. };
  61. static const struct regmap_irq stpmic1_irqs[] = {
  62. REGMAP_IRQ_REG(IT_PONKEY_F, 0, 0x01),
  63. REGMAP_IRQ_REG(IT_PONKEY_R, 0, 0x02),
  64. REGMAP_IRQ_REG(IT_WAKEUP_F, 0, 0x04),
  65. REGMAP_IRQ_REG(IT_WAKEUP_R, 0, 0x08),
  66. REGMAP_IRQ_REG(IT_VBUS_OTG_F, 0, 0x10),
  67. REGMAP_IRQ_REG(IT_VBUS_OTG_R, 0, 0x20),
  68. REGMAP_IRQ_REG(IT_SWOUT_F, 0, 0x40),
  69. REGMAP_IRQ_REG(IT_SWOUT_R, 0, 0x80),
  70. REGMAP_IRQ_REG(IT_CURLIM_BUCK1, 1, 0x01),
  71. REGMAP_IRQ_REG(IT_CURLIM_BUCK2, 1, 0x02),
  72. REGMAP_IRQ_REG(IT_CURLIM_BUCK3, 1, 0x04),
  73. REGMAP_IRQ_REG(IT_CURLIM_BUCK4, 1, 0x08),
  74. REGMAP_IRQ_REG(IT_OCP_OTG, 1, 0x10),
  75. REGMAP_IRQ_REG(IT_OCP_SWOUT, 1, 0x20),
  76. REGMAP_IRQ_REG(IT_OCP_BOOST, 1, 0x40),
  77. REGMAP_IRQ_REG(IT_OVP_BOOST, 1, 0x80),
  78. REGMAP_IRQ_REG(IT_CURLIM_LDO1, 2, 0x01),
  79. REGMAP_IRQ_REG(IT_CURLIM_LDO2, 2, 0x02),
  80. REGMAP_IRQ_REG(IT_CURLIM_LDO3, 2, 0x04),
  81. REGMAP_IRQ_REG(IT_CURLIM_LDO4, 2, 0x08),
  82. REGMAP_IRQ_REG(IT_CURLIM_LDO5, 2, 0x10),
  83. REGMAP_IRQ_REG(IT_CURLIM_LDO6, 2, 0x20),
  84. REGMAP_IRQ_REG(IT_SHORT_SWOTG, 2, 0x40),
  85. REGMAP_IRQ_REG(IT_SHORT_SWOUT, 2, 0x80),
  86. REGMAP_IRQ_REG(IT_TWARN_F, 3, 0x01),
  87. REGMAP_IRQ_REG(IT_TWARN_R, 3, 0x02),
  88. REGMAP_IRQ_REG(IT_VINLOW_F, 3, 0x04),
  89. REGMAP_IRQ_REG(IT_VINLOW_R, 3, 0x08),
  90. REGMAP_IRQ_REG(IT_SWIN_F, 3, 0x40),
  91. REGMAP_IRQ_REG(IT_SWIN_R, 3, 0x80),
  92. };
  93. static const struct regmap_irq_chip stpmic1_regmap_irq_chip = {
  94. .name = "pmic_irq",
  95. .status_base = INT_PENDING_R1,
  96. .mask_base = INT_CLEAR_MASK_R1,
  97. .unmask_base = INT_SET_MASK_R1,
  98. .ack_base = INT_CLEAR_R1,
  99. .num_regs = STPMIC1_PMIC_NUM_IRQ_REGS,
  100. .irqs = stpmic1_irqs,
  101. .num_irqs = ARRAY_SIZE(stpmic1_irqs),
  102. };
  103. static int stpmic1_probe(struct i2c_client *i2c,
  104. const struct i2c_device_id *id)
  105. {
  106. struct stpmic1 *ddata;
  107. struct device *dev = &i2c->dev;
  108. int ret;
  109. struct device_node *np = dev->of_node;
  110. u32 reg;
  111. ddata = devm_kzalloc(dev, sizeof(struct stpmic1), GFP_KERNEL);
  112. if (!ddata)
  113. return -ENOMEM;
  114. i2c_set_clientdata(i2c, ddata);
  115. ddata->dev = dev;
  116. ddata->regmap = devm_regmap_init_i2c(i2c, &stpmic1_regmap_config);
  117. if (IS_ERR(ddata->regmap))
  118. return PTR_ERR(ddata->regmap);
  119. ddata->irq = of_irq_get(np, STPMIC1_MAIN_IRQ);
  120. if (ddata->irq < 0) {
  121. dev_err(dev, "Failed to get main IRQ: %d\n", ddata->irq);
  122. return ddata->irq;
  123. }
  124. ret = regmap_read(ddata->regmap, VERSION_SR, &reg);
  125. if (ret) {
  126. dev_err(dev, "Unable to read PMIC version\n");
  127. return ret;
  128. }
  129. dev_info(dev, "PMIC Chip Version: 0x%x\n", reg);
  130. /* Initialize PMIC IRQ Chip & associated IRQ domains */
  131. ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq,
  132. IRQF_ONESHOT | IRQF_SHARED,
  133. 0, &stpmic1_regmap_irq_chip,
  134. &ddata->irq_data);
  135. if (ret) {
  136. dev_err(dev, "IRQ Chip registration failed: %d\n", ret);
  137. return ret;
  138. }
  139. return devm_of_platform_populate(dev);
  140. }
  141. #ifdef CONFIG_PM_SLEEP
  142. static int stpmic1_suspend(struct device *dev)
  143. {
  144. struct i2c_client *i2c = to_i2c_client(dev);
  145. struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);
  146. disable_irq(pmic_dev->irq);
  147. return 0;
  148. }
  149. static int stpmic1_resume(struct device *dev)
  150. {
  151. struct i2c_client *i2c = to_i2c_client(dev);
  152. struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c);
  153. int ret;
  154. ret = regcache_sync(pmic_dev->regmap);
  155. if (ret)
  156. return ret;
  157. enable_irq(pmic_dev->irq);
  158. return 0;
  159. }
  160. #endif
  161. static SIMPLE_DEV_PM_OPS(stpmic1_pm, stpmic1_suspend, stpmic1_resume);
  162. static const struct of_device_id stpmic1_of_match[] = {
  163. { .compatible = "st,stpmic1", },
  164. {},
  165. };
  166. MODULE_DEVICE_TABLE(of, stpmic1_of_match);
  167. static struct i2c_driver stpmic1_driver = {
  168. .driver = {
  169. .name = "stpmic1",
  170. .of_match_table = of_match_ptr(stpmic1_of_match),
  171. .pm = &stpmic1_pm,
  172. },
  173. .probe = stpmic1_probe,
  174. };
  175. module_i2c_driver(stpmic1_driver);
  176. MODULE_DESCRIPTION("STPMIC1 PMIC Driver");
  177. MODULE_AUTHOR("Pascal Paillet <[email protected]>");
  178. MODULE_LICENSE("GPL v2");