88pm800.c 15 KB

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  1. /*
  2. * Base driver for Marvell 88PM800
  3. *
  4. * Copyright (C) 2012 Marvell International Ltd.
  5. * Haojian Zhuang <[email protected]>
  6. * Joseph(Yossi) Hanin <[email protected]>
  7. * Qiao Zhou <[email protected]>
  8. *
  9. * This file is subject to the terms and conditions of the GNU General
  10. * Public License. See the file "COPYING" in the main directory of this
  11. * archive for more details.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/i2c.h>
  26. #include <linux/mfd/core.h>
  27. #include <linux/mfd/88pm80x.h>
  28. #include <linux/slab.h>
  29. /* Interrupt Registers */
  30. #define PM800_INT_STATUS1 (0x05)
  31. #define PM800_ONKEY_INT_STS1 (1 << 0)
  32. #define PM800_EXTON_INT_STS1 (1 << 1)
  33. #define PM800_CHG_INT_STS1 (1 << 2)
  34. #define PM800_BAT_INT_STS1 (1 << 3)
  35. #define PM800_RTC_INT_STS1 (1 << 4)
  36. #define PM800_CLASSD_OC_INT_STS1 (1 << 5)
  37. #define PM800_INT_STATUS2 (0x06)
  38. #define PM800_VBAT_INT_STS2 (1 << 0)
  39. #define PM800_VSYS_INT_STS2 (1 << 1)
  40. #define PM800_VCHG_INT_STS2 (1 << 2)
  41. #define PM800_TINT_INT_STS2 (1 << 3)
  42. #define PM800_GPADC0_INT_STS2 (1 << 4)
  43. #define PM800_TBAT_INT_STS2 (1 << 5)
  44. #define PM800_GPADC2_INT_STS2 (1 << 6)
  45. #define PM800_GPADC3_INT_STS2 (1 << 7)
  46. #define PM800_INT_STATUS3 (0x07)
  47. #define PM800_INT_STATUS4 (0x08)
  48. #define PM800_GPIO0_INT_STS4 (1 << 0)
  49. #define PM800_GPIO1_INT_STS4 (1 << 1)
  50. #define PM800_GPIO2_INT_STS4 (1 << 2)
  51. #define PM800_GPIO3_INT_STS4 (1 << 3)
  52. #define PM800_GPIO4_INT_STS4 (1 << 4)
  53. #define PM800_INT_ENA_1 (0x09)
  54. #define PM800_ONKEY_INT_ENA1 (1 << 0)
  55. #define PM800_EXTON_INT_ENA1 (1 << 1)
  56. #define PM800_CHG_INT_ENA1 (1 << 2)
  57. #define PM800_BAT_INT_ENA1 (1 << 3)
  58. #define PM800_RTC_INT_ENA1 (1 << 4)
  59. #define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
  60. #define PM800_INT_ENA_2 (0x0A)
  61. #define PM800_VBAT_INT_ENA2 (1 << 0)
  62. #define PM800_VSYS_INT_ENA2 (1 << 1)
  63. #define PM800_VCHG_INT_ENA2 (1 << 2)
  64. #define PM800_TINT_INT_ENA2 (1 << 3)
  65. #define PM800_INT_ENA_3 (0x0B)
  66. #define PM800_GPADC0_INT_ENA3 (1 << 0)
  67. #define PM800_GPADC1_INT_ENA3 (1 << 1)
  68. #define PM800_GPADC2_INT_ENA3 (1 << 2)
  69. #define PM800_GPADC3_INT_ENA3 (1 << 3)
  70. #define PM800_GPADC4_INT_ENA3 (1 << 4)
  71. #define PM800_INT_ENA_4 (0x0C)
  72. #define PM800_GPIO0_INT_ENA4 (1 << 0)
  73. #define PM800_GPIO1_INT_ENA4 (1 << 1)
  74. #define PM800_GPIO2_INT_ENA4 (1 << 2)
  75. #define PM800_GPIO3_INT_ENA4 (1 << 3)
  76. #define PM800_GPIO4_INT_ENA4 (1 << 4)
  77. /* number of INT_ENA & INT_STATUS regs */
  78. #define PM800_INT_REG_NUM (4)
  79. /* Interrupt Number in 88PM800 */
  80. enum {
  81. PM800_IRQ_ONKEY, /*EN1b0 *//*0 */
  82. PM800_IRQ_EXTON, /*EN1b1 */
  83. PM800_IRQ_CHG, /*EN1b2 */
  84. PM800_IRQ_BAT, /*EN1b3 */
  85. PM800_IRQ_RTC, /*EN1b4 */
  86. PM800_IRQ_CLASSD, /*EN1b5 *//*5 */
  87. PM800_IRQ_VBAT, /*EN2b0 */
  88. PM800_IRQ_VSYS, /*EN2b1 */
  89. PM800_IRQ_VCHG, /*EN2b2 */
  90. PM800_IRQ_TINT, /*EN2b3 */
  91. PM800_IRQ_GPADC0, /*EN3b0 *//*10 */
  92. PM800_IRQ_GPADC1, /*EN3b1 */
  93. PM800_IRQ_GPADC2, /*EN3b2 */
  94. PM800_IRQ_GPADC3, /*EN3b3 */
  95. PM800_IRQ_GPADC4, /*EN3b4 */
  96. PM800_IRQ_GPIO0, /*EN4b0 *//*15 */
  97. PM800_IRQ_GPIO1, /*EN4b1 */
  98. PM800_IRQ_GPIO2, /*EN4b2 */
  99. PM800_IRQ_GPIO3, /*EN4b3 */
  100. PM800_IRQ_GPIO4, /*EN4b4 *//*19 */
  101. PM800_MAX_IRQ,
  102. };
  103. /* PM800: generation identification number */
  104. #define PM800_CHIP_GEN_ID_NUM 0x3
  105. static const struct i2c_device_id pm80x_id_table[] = {
  106. {"88PM800", 0},
  107. {} /* NULL terminated */
  108. };
  109. MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
  110. static const struct resource rtc_resources[] = {
  111. DEFINE_RES_IRQ_NAMED(PM800_IRQ_RTC, "88pm80x-rtc"),
  112. };
  113. static struct mfd_cell rtc_devs[] = {
  114. {
  115. .name = "88pm80x-rtc",
  116. .num_resources = ARRAY_SIZE(rtc_resources),
  117. .resources = &rtc_resources[0],
  118. .id = -1,
  119. },
  120. };
  121. static struct resource onkey_resources[] = {
  122. DEFINE_RES_IRQ_NAMED(PM800_IRQ_ONKEY, "88pm80x-onkey"),
  123. };
  124. static const struct mfd_cell onkey_devs[] = {
  125. {
  126. .name = "88pm80x-onkey",
  127. .num_resources = 1,
  128. .resources = &onkey_resources[0],
  129. .id = -1,
  130. },
  131. };
  132. static const struct mfd_cell regulator_devs[] = {
  133. {
  134. .name = "88pm80x-regulator",
  135. .id = -1,
  136. },
  137. };
  138. static const struct regmap_irq pm800_irqs[] = {
  139. /* INT0 */
  140. [PM800_IRQ_ONKEY] = {
  141. .mask = PM800_ONKEY_INT_ENA1,
  142. },
  143. [PM800_IRQ_EXTON] = {
  144. .mask = PM800_EXTON_INT_ENA1,
  145. },
  146. [PM800_IRQ_CHG] = {
  147. .mask = PM800_CHG_INT_ENA1,
  148. },
  149. [PM800_IRQ_BAT] = {
  150. .mask = PM800_BAT_INT_ENA1,
  151. },
  152. [PM800_IRQ_RTC] = {
  153. .mask = PM800_RTC_INT_ENA1,
  154. },
  155. [PM800_IRQ_CLASSD] = {
  156. .mask = PM800_CLASSD_OC_INT_ENA1,
  157. },
  158. /* INT1 */
  159. [PM800_IRQ_VBAT] = {
  160. .reg_offset = 1,
  161. .mask = PM800_VBAT_INT_ENA2,
  162. },
  163. [PM800_IRQ_VSYS] = {
  164. .reg_offset = 1,
  165. .mask = PM800_VSYS_INT_ENA2,
  166. },
  167. [PM800_IRQ_VCHG] = {
  168. .reg_offset = 1,
  169. .mask = PM800_VCHG_INT_ENA2,
  170. },
  171. [PM800_IRQ_TINT] = {
  172. .reg_offset = 1,
  173. .mask = PM800_TINT_INT_ENA2,
  174. },
  175. /* INT2 */
  176. [PM800_IRQ_GPADC0] = {
  177. .reg_offset = 2,
  178. .mask = PM800_GPADC0_INT_ENA3,
  179. },
  180. [PM800_IRQ_GPADC1] = {
  181. .reg_offset = 2,
  182. .mask = PM800_GPADC1_INT_ENA3,
  183. },
  184. [PM800_IRQ_GPADC2] = {
  185. .reg_offset = 2,
  186. .mask = PM800_GPADC2_INT_ENA3,
  187. },
  188. [PM800_IRQ_GPADC3] = {
  189. .reg_offset = 2,
  190. .mask = PM800_GPADC3_INT_ENA3,
  191. },
  192. [PM800_IRQ_GPADC4] = {
  193. .reg_offset = 2,
  194. .mask = PM800_GPADC4_INT_ENA3,
  195. },
  196. /* INT3 */
  197. [PM800_IRQ_GPIO0] = {
  198. .reg_offset = 3,
  199. .mask = PM800_GPIO0_INT_ENA4,
  200. },
  201. [PM800_IRQ_GPIO1] = {
  202. .reg_offset = 3,
  203. .mask = PM800_GPIO1_INT_ENA4,
  204. },
  205. [PM800_IRQ_GPIO2] = {
  206. .reg_offset = 3,
  207. .mask = PM800_GPIO2_INT_ENA4,
  208. },
  209. [PM800_IRQ_GPIO3] = {
  210. .reg_offset = 3,
  211. .mask = PM800_GPIO3_INT_ENA4,
  212. },
  213. [PM800_IRQ_GPIO4] = {
  214. .reg_offset = 3,
  215. .mask = PM800_GPIO4_INT_ENA4,
  216. },
  217. };
  218. static int device_gpadc_init(struct pm80x_chip *chip,
  219. struct pm80x_platform_data *pdata)
  220. {
  221. struct pm80x_subchip *subchip = chip->subchip;
  222. struct regmap *map = subchip->regmap_gpadc;
  223. int data = 0, mask = 0, ret = 0;
  224. if (!map) {
  225. dev_warn(chip->dev,
  226. "Warning: gpadc regmap is not available!\n");
  227. return -EINVAL;
  228. }
  229. /*
  230. * initialize GPADC without activating it turn on GPADC
  231. * measurments
  232. */
  233. ret = regmap_update_bits(map,
  234. PM800_GPADC_MISC_CONFIG2,
  235. PM800_GPADC_MISC_GPFSM_EN,
  236. PM800_GPADC_MISC_GPFSM_EN);
  237. if (ret < 0)
  238. goto out;
  239. /*
  240. * This function configures the ADC as requires for
  241. * CP implementation.CP does not "own" the ADC configuration
  242. * registers and relies on AP.
  243. * Reason: enable automatic ADC measurements needed
  244. * for CP to get VBAT and RF temperature readings.
  245. */
  246. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
  247. PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
  248. if (ret < 0)
  249. goto out;
  250. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
  251. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
  252. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
  253. if (ret < 0)
  254. goto out;
  255. /*
  256. * the defult of PM800 is GPADC operates at 100Ks/s rate
  257. * and Number of GPADC slots with active current bias prior
  258. * to GPADC sampling = 1 slot for all GPADCs set for
  259. * Temprature mesurmants
  260. */
  261. mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  262. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  263. if (pdata && (pdata->batt_det == 0))
  264. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  265. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  266. else
  267. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
  268. PM800_GPADC_GP_BIAS_EN3);
  269. ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
  270. if (ret < 0)
  271. goto out;
  272. dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
  273. return 0;
  274. out:
  275. dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
  276. return ret;
  277. }
  278. static int device_onkey_init(struct pm80x_chip *chip,
  279. struct pm80x_platform_data *pdata)
  280. {
  281. int ret;
  282. ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
  283. ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
  284. NULL);
  285. if (ret) {
  286. dev_err(chip->dev, "Failed to add onkey subdev\n");
  287. return ret;
  288. }
  289. return 0;
  290. }
  291. static int device_rtc_init(struct pm80x_chip *chip,
  292. struct pm80x_platform_data *pdata)
  293. {
  294. int ret;
  295. if (pdata) {
  296. rtc_devs[0].platform_data = pdata->rtc;
  297. rtc_devs[0].pdata_size =
  298. pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
  299. }
  300. ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
  301. ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
  302. if (ret) {
  303. dev_err(chip->dev, "Failed to add rtc subdev\n");
  304. return ret;
  305. }
  306. return 0;
  307. }
  308. static int device_regulator_init(struct pm80x_chip *chip,
  309. struct pm80x_platform_data *pdata)
  310. {
  311. int ret;
  312. ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
  313. ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
  314. if (ret) {
  315. dev_err(chip->dev, "Failed to add regulator subdev\n");
  316. return ret;
  317. }
  318. return 0;
  319. }
  320. static int device_irq_init_800(struct pm80x_chip *chip)
  321. {
  322. struct regmap *map = chip->regmap;
  323. unsigned long flags = IRQF_ONESHOT;
  324. int data, mask, ret = -EINVAL;
  325. if (!map || !chip->irq) {
  326. dev_err(chip->dev, "incorrect parameters\n");
  327. return -EINVAL;
  328. }
  329. /*
  330. * irq_mode defines the way of clearing interrupt. it's read-clear by
  331. * default.
  332. */
  333. mask =
  334. PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
  335. PM800_WAKEUP2_INT_MASK;
  336. data = PM800_WAKEUP2_INT_CLEAR;
  337. ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
  338. if (ret < 0)
  339. goto out;
  340. ret =
  341. regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
  342. chip->regmap_irq_chip, &chip->irq_data);
  343. out:
  344. return ret;
  345. }
  346. static void device_irq_exit_800(struct pm80x_chip *chip)
  347. {
  348. regmap_del_irq_chip(chip->irq, chip->irq_data);
  349. }
  350. static struct regmap_irq_chip pm800_irq_chip = {
  351. .name = "88pm800",
  352. .irqs = pm800_irqs,
  353. .num_irqs = ARRAY_SIZE(pm800_irqs),
  354. .num_regs = 4,
  355. .status_base = PM800_INT_STATUS1,
  356. .mask_base = PM800_INT_ENA_1,
  357. .ack_base = PM800_INT_STATUS1,
  358. .mask_invert = 1,
  359. };
  360. static int pm800_pages_init(struct pm80x_chip *chip)
  361. {
  362. struct pm80x_subchip *subchip;
  363. struct i2c_client *client = chip->client;
  364. int ret = 0;
  365. subchip = chip->subchip;
  366. if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
  367. return -ENODEV;
  368. /* PM800 block power page */
  369. subchip->power_page = i2c_new_dummy_device(client->adapter,
  370. subchip->power_page_addr);
  371. if (IS_ERR(subchip->power_page)) {
  372. ret = PTR_ERR(subchip->power_page);
  373. goto out;
  374. }
  375. subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
  376. &pm80x_regmap_config);
  377. if (IS_ERR(subchip->regmap_power)) {
  378. ret = PTR_ERR(subchip->regmap_power);
  379. dev_err(chip->dev,
  380. "Failed to allocate regmap_power: %d\n", ret);
  381. goto out;
  382. }
  383. i2c_set_clientdata(subchip->power_page, chip);
  384. /* PM800 block GPADC */
  385. subchip->gpadc_page = i2c_new_dummy_device(client->adapter,
  386. subchip->gpadc_page_addr);
  387. if (IS_ERR(subchip->gpadc_page)) {
  388. ret = PTR_ERR(subchip->gpadc_page);
  389. goto out;
  390. }
  391. subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
  392. &pm80x_regmap_config);
  393. if (IS_ERR(subchip->regmap_gpadc)) {
  394. ret = PTR_ERR(subchip->regmap_gpadc);
  395. dev_err(chip->dev,
  396. "Failed to allocate regmap_gpadc: %d\n", ret);
  397. goto out;
  398. }
  399. i2c_set_clientdata(subchip->gpadc_page, chip);
  400. out:
  401. return ret;
  402. }
  403. static void pm800_pages_exit(struct pm80x_chip *chip)
  404. {
  405. struct pm80x_subchip *subchip;
  406. subchip = chip->subchip;
  407. if (subchip && subchip->power_page)
  408. i2c_unregister_device(subchip->power_page);
  409. if (subchip && subchip->gpadc_page)
  410. i2c_unregister_device(subchip->gpadc_page);
  411. }
  412. static int device_800_init(struct pm80x_chip *chip,
  413. struct pm80x_platform_data *pdata)
  414. {
  415. int ret;
  416. unsigned int val;
  417. /*
  418. * alarm wake up bit will be clear in device_irq_init(),
  419. * read before that
  420. */
  421. ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
  422. if (ret < 0) {
  423. dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
  424. goto out;
  425. }
  426. if (val & PM800_ALARM_WAKEUP) {
  427. if (pdata && pdata->rtc)
  428. pdata->rtc->rtc_wakeup = 1;
  429. }
  430. ret = device_gpadc_init(chip, pdata);
  431. if (ret < 0) {
  432. dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
  433. goto out;
  434. }
  435. chip->regmap_irq_chip = &pm800_irq_chip;
  436. ret = device_irq_init_800(chip);
  437. if (ret < 0) {
  438. dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
  439. goto out;
  440. }
  441. ret = device_onkey_init(chip, pdata);
  442. if (ret) {
  443. dev_err(chip->dev, "Failed to add onkey subdev\n");
  444. goto out_dev;
  445. }
  446. ret = device_rtc_init(chip, pdata);
  447. if (ret) {
  448. dev_err(chip->dev, "Failed to add rtc subdev\n");
  449. goto out;
  450. }
  451. ret = device_regulator_init(chip, pdata);
  452. if (ret) {
  453. dev_err(chip->dev, "Failed to add regulators subdev\n");
  454. goto out;
  455. }
  456. return 0;
  457. out_dev:
  458. mfd_remove_devices(chip->dev);
  459. device_irq_exit_800(chip);
  460. out:
  461. return ret;
  462. }
  463. static int pm800_probe(struct i2c_client *client,
  464. const struct i2c_device_id *id)
  465. {
  466. int ret = 0;
  467. struct pm80x_chip *chip;
  468. struct pm80x_platform_data *pdata = dev_get_platdata(&client->dev);
  469. struct pm80x_subchip *subchip;
  470. ret = pm80x_init(client);
  471. if (ret) {
  472. dev_err(&client->dev, "pm800_init fail\n");
  473. goto out_init;
  474. }
  475. chip = i2c_get_clientdata(client);
  476. /* init subchip for PM800 */
  477. subchip =
  478. devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
  479. GFP_KERNEL);
  480. if (!subchip) {
  481. ret = -ENOMEM;
  482. goto err_subchip_alloc;
  483. }
  484. /* pm800 has 2 addtional pages to support power and gpadc. */
  485. subchip->power_page_addr = client->addr + 1;
  486. subchip->gpadc_page_addr = client->addr + 2;
  487. chip->subchip = subchip;
  488. ret = pm800_pages_init(chip);
  489. if (ret) {
  490. dev_err(&client->dev, "pm800_pages_init failed!\n");
  491. goto err_device_init;
  492. }
  493. ret = device_800_init(chip, pdata);
  494. if (ret) {
  495. dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
  496. goto err_device_init;
  497. }
  498. if (pdata && pdata->plat_config)
  499. pdata->plat_config(chip, pdata);
  500. return 0;
  501. err_device_init:
  502. pm800_pages_exit(chip);
  503. err_subchip_alloc:
  504. pm80x_deinit();
  505. out_init:
  506. return ret;
  507. }
  508. static void pm800_remove(struct i2c_client *client)
  509. {
  510. struct pm80x_chip *chip = i2c_get_clientdata(client);
  511. mfd_remove_devices(chip->dev);
  512. device_irq_exit_800(chip);
  513. pm800_pages_exit(chip);
  514. pm80x_deinit();
  515. }
  516. static struct i2c_driver pm800_driver = {
  517. .driver = {
  518. .name = "88PM800",
  519. .pm = &pm80x_pm_ops,
  520. },
  521. .probe = pm800_probe,
  522. .remove = pm800_remove,
  523. .id_table = pm80x_id_table,
  524. };
  525. static int __init pm800_i2c_init(void)
  526. {
  527. return i2c_add_driver(&pm800_driver);
  528. }
  529. subsys_initcall(pm800_i2c_init);
  530. static void __exit pm800_i2c_exit(void)
  531. {
  532. i2c_del_driver(&pm800_driver);
  533. }
  534. module_exit(pm800_i2c_exit);
  535. MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
  536. MODULE_AUTHOR("Qiao Zhou <[email protected]>");
  537. MODULE_LICENSE("GPL");