tifm_ms.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * TI FlashMedia driver
  4. *
  5. * Copyright (C) 2007 Alex Dubov <[email protected]>
  6. *
  7. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  8. * that made this driver possible.
  9. */
  10. #include <linux/tifm.h>
  11. #include <linux/memstick.h>
  12. #include <linux/highmem.h>
  13. #include <linux/scatterlist.h>
  14. #include <linux/log2.h>
  15. #include <linux/module.h>
  16. #include <asm/io.h>
  17. #define DRIVER_NAME "tifm_ms"
  18. static bool no_dma;
  19. module_param(no_dma, bool, 0644);
  20. /*
  21. * Some control bits of TIFM appear to conform to Sony's reference design,
  22. * so I'm just assuming they all are.
  23. */
  24. #define TIFM_MS_STAT_DRQ 0x04000
  25. #define TIFM_MS_STAT_MSINT 0x02000
  26. #define TIFM_MS_STAT_RDY 0x01000
  27. #define TIFM_MS_STAT_CRC 0x00200
  28. #define TIFM_MS_STAT_TOE 0x00100
  29. #define TIFM_MS_STAT_EMP 0x00020
  30. #define TIFM_MS_STAT_FUL 0x00010
  31. #define TIFM_MS_STAT_CED 0x00008
  32. #define TIFM_MS_STAT_ERR 0x00004
  33. #define TIFM_MS_STAT_BRQ 0x00002
  34. #define TIFM_MS_STAT_CNK 0x00001
  35. #define TIFM_MS_SYS_DMA 0x10000
  36. #define TIFM_MS_SYS_RESET 0x08000
  37. #define TIFM_MS_SYS_SRAC 0x04000
  38. #define TIFM_MS_SYS_INTEN 0x02000
  39. #define TIFM_MS_SYS_NOCRC 0x01000
  40. #define TIFM_MS_SYS_INTCLR 0x00800
  41. #define TIFM_MS_SYS_MSIEN 0x00400
  42. #define TIFM_MS_SYS_FCLR 0x00200
  43. #define TIFM_MS_SYS_FDIR 0x00100
  44. #define TIFM_MS_SYS_DAM 0x00080
  45. #define TIFM_MS_SYS_DRM 0x00040
  46. #define TIFM_MS_SYS_DRQSL 0x00020
  47. #define TIFM_MS_SYS_REI 0x00010
  48. #define TIFM_MS_SYS_REO 0x00008
  49. #define TIFM_MS_SYS_BSY_MASK 0x00007
  50. #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
  51. | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
  52. /* Hardware flags */
  53. enum {
  54. CMD_READY = 0x01,
  55. FIFO_READY = 0x02,
  56. CARD_INT = 0x04
  57. };
  58. struct tifm_ms {
  59. struct tifm_dev *dev;
  60. struct timer_list timer;
  61. struct memstick_request *req;
  62. struct tasklet_struct notify;
  63. unsigned int mode_mask;
  64. unsigned int block_pos;
  65. unsigned long timeout_jiffies;
  66. unsigned char eject:1,
  67. use_dma:1;
  68. unsigned char cmd_flags;
  69. unsigned char io_pos;
  70. unsigned int io_word;
  71. };
  72. static unsigned int tifm_ms_read_data(struct tifm_ms *host,
  73. unsigned char *buf, unsigned int length)
  74. {
  75. struct tifm_dev *sock = host->dev;
  76. unsigned int off = 0;
  77. while (host->io_pos && length) {
  78. buf[off++] = host->io_word & 0xff;
  79. host->io_word >>= 8;
  80. length--;
  81. host->io_pos--;
  82. }
  83. if (!length)
  84. return off;
  85. while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  86. if (length < 4)
  87. break;
  88. *(unsigned int *)(buf + off) = __raw_readl(sock->addr
  89. + SOCK_MS_DATA);
  90. length -= 4;
  91. off += 4;
  92. }
  93. if (length
  94. && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  95. host->io_word = readl(sock->addr + SOCK_MS_DATA);
  96. for (host->io_pos = 4; host->io_pos; --host->io_pos) {
  97. buf[off++] = host->io_word & 0xff;
  98. host->io_word >>= 8;
  99. length--;
  100. if (!length)
  101. break;
  102. }
  103. }
  104. return off;
  105. }
  106. static unsigned int tifm_ms_write_data(struct tifm_ms *host,
  107. unsigned char *buf, unsigned int length)
  108. {
  109. struct tifm_dev *sock = host->dev;
  110. unsigned int off = 0;
  111. if (host->io_pos) {
  112. while (host->io_pos < 4 && length) {
  113. host->io_word |= buf[off++] << (host->io_pos * 8);
  114. host->io_pos++;
  115. length--;
  116. }
  117. }
  118. if (host->io_pos == 4
  119. && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  120. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  121. sock->addr + SOCK_MS_SYSTEM);
  122. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  123. host->io_pos = 0;
  124. host->io_word = 0;
  125. } else if (host->io_pos) {
  126. return off;
  127. }
  128. if (!length)
  129. return off;
  130. while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  131. if (length < 4)
  132. break;
  133. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  134. sock->addr + SOCK_MS_SYSTEM);
  135. __raw_writel(*(unsigned int *)(buf + off),
  136. sock->addr + SOCK_MS_DATA);
  137. length -= 4;
  138. off += 4;
  139. }
  140. switch (length) {
  141. case 3:
  142. host->io_word |= buf[off + 2] << 16;
  143. host->io_pos++;
  144. fallthrough;
  145. case 2:
  146. host->io_word |= buf[off + 1] << 8;
  147. host->io_pos++;
  148. fallthrough;
  149. case 1:
  150. host->io_word |= buf[off];
  151. host->io_pos++;
  152. }
  153. off += host->io_pos;
  154. return off;
  155. }
  156. static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
  157. {
  158. struct tifm_dev *sock = host->dev;
  159. unsigned int length;
  160. unsigned int off;
  161. unsigned int t_size, p_cnt;
  162. unsigned char *buf;
  163. struct page *pg;
  164. unsigned long flags = 0;
  165. if (host->req->long_data) {
  166. length = host->req->sg.length - host->block_pos;
  167. off = host->req->sg.offset + host->block_pos;
  168. } else {
  169. length = host->req->data_len - host->block_pos;
  170. off = 0;
  171. }
  172. dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
  173. host->block_pos);
  174. while (length) {
  175. unsigned int p_off;
  176. if (host->req->long_data) {
  177. pg = nth_page(sg_page(&host->req->sg),
  178. off >> PAGE_SHIFT);
  179. p_off = offset_in_page(off);
  180. p_cnt = PAGE_SIZE - p_off;
  181. p_cnt = min(p_cnt, length);
  182. local_irq_save(flags);
  183. buf = kmap_atomic(pg) + p_off;
  184. } else {
  185. buf = host->req->data + host->block_pos;
  186. p_cnt = host->req->data_len - host->block_pos;
  187. }
  188. t_size = host->req->data_dir == WRITE
  189. ? tifm_ms_write_data(host, buf, p_cnt)
  190. : tifm_ms_read_data(host, buf, p_cnt);
  191. if (host->req->long_data) {
  192. kunmap_atomic(buf - p_off);
  193. local_irq_restore(flags);
  194. }
  195. if (!t_size)
  196. break;
  197. host->block_pos += t_size;
  198. length -= t_size;
  199. off += t_size;
  200. }
  201. dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
  202. if (!length && (host->req->data_dir == WRITE)) {
  203. if (host->io_pos) {
  204. writel(TIFM_MS_SYS_FDIR
  205. | readl(sock->addr + SOCK_MS_SYSTEM),
  206. sock->addr + SOCK_MS_SYSTEM);
  207. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  208. }
  209. writel(TIFM_MS_SYS_FDIR
  210. | readl(sock->addr + SOCK_MS_SYSTEM),
  211. sock->addr + SOCK_MS_SYSTEM);
  212. writel(0, sock->addr + SOCK_MS_DATA);
  213. } else {
  214. readl(sock->addr + SOCK_MS_DATA);
  215. }
  216. return length;
  217. }
  218. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  219. {
  220. struct tifm_dev *sock = host->dev;
  221. unsigned int data_len, cmd, sys_param;
  222. host->cmd_flags = 0;
  223. host->block_pos = 0;
  224. host->io_pos = 0;
  225. host->io_word = 0;
  226. host->cmd_flags = 0;
  227. host->use_dma = !no_dma;
  228. if (host->req->long_data) {
  229. data_len = host->req->sg.length;
  230. if (!is_power_of_2(data_len))
  231. host->use_dma = 0;
  232. } else {
  233. data_len = host->req->data_len;
  234. host->use_dma = 0;
  235. }
  236. writel(TIFM_FIFO_INT_SETALL,
  237. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  238. writel(TIFM_FIFO_ENABLE,
  239. sock->addr + SOCK_FIFO_CONTROL);
  240. if (host->use_dma) {
  241. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  242. host->req->data_dir == READ
  243. ? DMA_FROM_DEVICE
  244. : DMA_TO_DEVICE)) {
  245. host->req->error = -ENOMEM;
  246. return host->req->error;
  247. }
  248. data_len = sg_dma_len(&host->req->sg);
  249. writel(ilog2(data_len) - 2,
  250. sock->addr + SOCK_FIFO_PAGE_SIZE);
  251. writel(TIFM_FIFO_INTMASK,
  252. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  253. sys_param = TIFM_DMA_EN | (1 << 8);
  254. if (host->req->data_dir == WRITE)
  255. sys_param |= TIFM_DMA_TX;
  256. writel(TIFM_FIFO_INTMASK,
  257. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  258. writel(sg_dma_address(&host->req->sg),
  259. sock->addr + SOCK_DMA_ADDRESS);
  260. writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
  261. } else {
  262. writel(host->mode_mask | TIFM_MS_SYS_FIFO,
  263. sock->addr + SOCK_MS_SYSTEM);
  264. writel(TIFM_FIFO_MORE,
  265. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  266. }
  267. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  268. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  269. sock->addr + SOCK_CONTROL);
  270. host->req->error = 0;
  271. sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
  272. sys_param |= TIFM_MS_SYS_INTCLR;
  273. if (host->use_dma)
  274. sys_param |= TIFM_MS_SYS_DMA;
  275. else
  276. sys_param &= ~TIFM_MS_SYS_DMA;
  277. writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
  278. cmd = (host->req->tpc & 0xf) << 12;
  279. cmd |= data_len;
  280. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  281. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
  282. return 0;
  283. }
  284. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  285. {
  286. struct tifm_dev *sock = host->dev;
  287. struct memstick_host *msh = tifm_get_drvdata(sock);
  288. int rc;
  289. del_timer(&host->timer);
  290. host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff;
  291. host->req->int_reg = (host->req->int_reg & 1)
  292. | ((host->req->int_reg << 4) & 0xe0);
  293. writel(TIFM_FIFO_INT_SETALL,
  294. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  295. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  296. if (host->use_dma) {
  297. tifm_unmap_sg(sock, &host->req->sg, 1,
  298. host->req->data_dir == READ
  299. ? DMA_FROM_DEVICE
  300. : DMA_TO_DEVICE);
  301. }
  302. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  303. sock->addr + SOCK_CONTROL);
  304. dev_dbg(&sock->dev, "TPC complete\n");
  305. do {
  306. rc = memstick_next_req(msh, &host->req);
  307. } while (!rc && tifm_ms_issue_cmd(host));
  308. }
  309. static int tifm_ms_check_status(struct tifm_ms *host)
  310. {
  311. if (!host->req->error) {
  312. if (!(host->cmd_flags & CMD_READY))
  313. return 1;
  314. if (!(host->cmd_flags & FIFO_READY))
  315. return 1;
  316. if (host->req->need_card_int
  317. && !(host->cmd_flags & CARD_INT))
  318. return 1;
  319. }
  320. return 0;
  321. }
  322. /* Called from interrupt handler */
  323. static void tifm_ms_data_event(struct tifm_dev *sock)
  324. {
  325. struct tifm_ms *host;
  326. unsigned int fifo_status = 0, host_status = 0;
  327. int rc = 1;
  328. spin_lock(&sock->lock);
  329. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  330. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  331. host_status = readl(sock->addr + SOCK_MS_STATUS);
  332. dev_dbg(&sock->dev,
  333. "data event: fifo_status %x, host_status %x, flags %x\n",
  334. fifo_status, host_status, host->cmd_flags);
  335. if (host->req) {
  336. if (host->use_dma && (fifo_status & 1)) {
  337. host->cmd_flags |= FIFO_READY;
  338. rc = tifm_ms_check_status(host);
  339. }
  340. if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
  341. if (!tifm_ms_transfer_data(host)) {
  342. host->cmd_flags |= FIFO_READY;
  343. rc = tifm_ms_check_status(host);
  344. }
  345. }
  346. }
  347. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  348. if (!rc)
  349. tifm_ms_complete_cmd(host);
  350. spin_unlock(&sock->lock);
  351. }
  352. /* Called from interrupt handler */
  353. static void tifm_ms_card_event(struct tifm_dev *sock)
  354. {
  355. struct tifm_ms *host;
  356. unsigned int host_status = 0;
  357. int rc = 1;
  358. spin_lock(&sock->lock);
  359. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  360. host_status = readl(sock->addr + SOCK_MS_STATUS);
  361. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  362. host_status, host->cmd_flags);
  363. if (host->req) {
  364. if (host_status & TIFM_MS_STAT_TOE)
  365. host->req->error = -ETIME;
  366. else if (host_status & TIFM_MS_STAT_CRC)
  367. host->req->error = -EILSEQ;
  368. if (host_status & TIFM_MS_STAT_RDY)
  369. host->cmd_flags |= CMD_READY;
  370. if (host_status & TIFM_MS_STAT_MSINT)
  371. host->cmd_flags |= CARD_INT;
  372. rc = tifm_ms_check_status(host);
  373. }
  374. writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
  375. sock->addr + SOCK_MS_SYSTEM);
  376. if (!rc)
  377. tifm_ms_complete_cmd(host);
  378. spin_unlock(&sock->lock);
  379. return;
  380. }
  381. static void tifm_ms_req_tasklet(unsigned long data)
  382. {
  383. struct memstick_host *msh = (struct memstick_host *)data;
  384. struct tifm_ms *host = memstick_priv(msh);
  385. struct tifm_dev *sock = host->dev;
  386. unsigned long flags;
  387. int rc;
  388. spin_lock_irqsave(&sock->lock, flags);
  389. if (!host->req) {
  390. if (host->eject) {
  391. do {
  392. rc = memstick_next_req(msh, &host->req);
  393. if (!rc)
  394. host->req->error = -ETIME;
  395. } while (!rc);
  396. spin_unlock_irqrestore(&sock->lock, flags);
  397. return;
  398. }
  399. do {
  400. rc = memstick_next_req(msh, &host->req);
  401. } while (!rc && tifm_ms_issue_cmd(host));
  402. }
  403. spin_unlock_irqrestore(&sock->lock, flags);
  404. }
  405. static void tifm_ms_dummy_submit(struct memstick_host *msh)
  406. {
  407. return;
  408. }
  409. static void tifm_ms_submit_req(struct memstick_host *msh)
  410. {
  411. struct tifm_ms *host = memstick_priv(msh);
  412. tasklet_schedule(&host->notify);
  413. }
  414. static int tifm_ms_set_param(struct memstick_host *msh,
  415. enum memstick_param param,
  416. int value)
  417. {
  418. struct tifm_ms *host = memstick_priv(msh);
  419. struct tifm_dev *sock = host->dev;
  420. switch (param) {
  421. case MEMSTICK_POWER:
  422. /* also affected by media detection mechanism */
  423. if (value == MEMSTICK_POWER_ON) {
  424. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  425. writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
  426. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  427. sock->addr + SOCK_MS_SYSTEM);
  428. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  429. } else if (value == MEMSTICK_POWER_OFF) {
  430. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  431. sock->addr + SOCK_MS_SYSTEM);
  432. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  433. } else
  434. return -EINVAL;
  435. break;
  436. case MEMSTICK_INTERFACE:
  437. if (value == MEMSTICK_SERIAL) {
  438. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  439. writel((~TIFM_CTRL_FAST_CLK)
  440. & readl(sock->addr + SOCK_CONTROL),
  441. sock->addr + SOCK_CONTROL);
  442. } else if (value == MEMSTICK_PAR4) {
  443. host->mode_mask = 0;
  444. writel(TIFM_CTRL_FAST_CLK
  445. | readl(sock->addr + SOCK_CONTROL),
  446. sock->addr + SOCK_CONTROL);
  447. } else
  448. return -EINVAL;
  449. break;
  450. }
  451. return 0;
  452. }
  453. static void tifm_ms_abort(struct timer_list *t)
  454. {
  455. struct tifm_ms *host = from_timer(host, t, timer);
  456. dev_dbg(&host->dev->dev, "status %x\n",
  457. readl(host->dev->addr + SOCK_MS_STATUS));
  458. printk(KERN_ERR
  459. "%s : card failed to respond for a long period of time "
  460. "(%x, %x)\n",
  461. dev_name(&host->dev->dev), host->req ? host->req->tpc : 0,
  462. host->cmd_flags);
  463. tifm_eject(host->dev);
  464. }
  465. static int tifm_ms_probe(struct tifm_dev *sock)
  466. {
  467. struct memstick_host *msh;
  468. struct tifm_ms *host;
  469. int rc = -EIO;
  470. if (!(TIFM_SOCK_STATE_OCCUPIED
  471. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  472. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  473. dev_name(&sock->dev));
  474. return rc;
  475. }
  476. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  477. if (!msh)
  478. return -ENOMEM;
  479. host = memstick_priv(msh);
  480. tifm_set_drvdata(sock, msh);
  481. host->dev = sock;
  482. host->timeout_jiffies = msecs_to_jiffies(1000);
  483. timer_setup(&host->timer, tifm_ms_abort, 0);
  484. tasklet_init(&host->notify, tifm_ms_req_tasklet, (unsigned long)msh);
  485. msh->request = tifm_ms_submit_req;
  486. msh->set_param = tifm_ms_set_param;
  487. sock->card_event = tifm_ms_card_event;
  488. sock->data_event = tifm_ms_data_event;
  489. if (tifm_has_ms_pif(sock))
  490. msh->caps |= MEMSTICK_CAP_PAR4;
  491. rc = memstick_add_host(msh);
  492. if (!rc)
  493. return 0;
  494. memstick_free_host(msh);
  495. return rc;
  496. }
  497. static void tifm_ms_remove(struct tifm_dev *sock)
  498. {
  499. struct memstick_host *msh = tifm_get_drvdata(sock);
  500. struct tifm_ms *host = memstick_priv(msh);
  501. int rc = 0;
  502. unsigned long flags;
  503. msh->request = tifm_ms_dummy_submit;
  504. tasklet_kill(&host->notify);
  505. spin_lock_irqsave(&sock->lock, flags);
  506. host->eject = 1;
  507. if (host->req) {
  508. del_timer(&host->timer);
  509. writel(TIFM_FIFO_INT_SETALL,
  510. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  511. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  512. if (host->use_dma)
  513. tifm_unmap_sg(sock, &host->req->sg, 1,
  514. host->req->data_dir == READ
  515. ? DMA_TO_DEVICE
  516. : DMA_FROM_DEVICE);
  517. host->req->error = -ETIME;
  518. do {
  519. rc = memstick_next_req(msh, &host->req);
  520. if (!rc)
  521. host->req->error = -ETIME;
  522. } while (!rc);
  523. }
  524. spin_unlock_irqrestore(&sock->lock, flags);
  525. memstick_remove_host(msh);
  526. memstick_free_host(msh);
  527. }
  528. #ifdef CONFIG_PM
  529. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  530. {
  531. struct memstick_host *msh = tifm_get_drvdata(sock);
  532. memstick_suspend_host(msh);
  533. return 0;
  534. }
  535. static int tifm_ms_resume(struct tifm_dev *sock)
  536. {
  537. struct memstick_host *msh = tifm_get_drvdata(sock);
  538. memstick_resume_host(msh);
  539. return 0;
  540. }
  541. #else
  542. #define tifm_ms_suspend NULL
  543. #define tifm_ms_resume NULL
  544. #endif /* CONFIG_PM */
  545. static struct tifm_device_id tifm_ms_id_tbl[] = {
  546. { TIFM_TYPE_MS }, { 0 }
  547. };
  548. static struct tifm_driver tifm_ms_driver = {
  549. .driver = {
  550. .name = DRIVER_NAME,
  551. .owner = THIS_MODULE
  552. },
  553. .id_table = tifm_ms_id_tbl,
  554. .probe = tifm_ms_probe,
  555. .remove = tifm_ms_remove,
  556. .suspend = tifm_ms_suspend,
  557. .resume = tifm_ms_resume
  558. };
  559. static int __init tifm_ms_init(void)
  560. {
  561. return tifm_register_driver(&tifm_ms_driver);
  562. }
  563. static void __exit tifm_ms_exit(void)
  564. {
  565. tifm_unregister_driver(&tifm_ms_driver);
  566. }
  567. MODULE_AUTHOR("Alex Dubov");
  568. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  569. MODULE_LICENSE("GPL");
  570. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  571. module_init(tifm_ms_init);
  572. module_exit(tifm_ms_exit);