mxl111sf-tuner.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * mxl111sf-tuner.c - driver for the MaxLinear MXL111SF CMOS tuner
  4. *
  5. * Copyright (C) 2010-2014 Michael Krufky <[email protected]>
  6. */
  7. #include "mxl111sf-tuner.h"
  8. #include "mxl111sf-phy.h"
  9. #include "mxl111sf-reg.h"
  10. /* debug */
  11. static int mxl111sf_tuner_debug;
  12. module_param_named(debug, mxl111sf_tuner_debug, int, 0644);
  13. MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
  14. #define mxl_dbg(fmt, arg...) \
  15. if (mxl111sf_tuner_debug) \
  16. mxl_printk(KERN_DEBUG, fmt, ##arg)
  17. /* ------------------------------------------------------------------------ */
  18. struct mxl111sf_tuner_state {
  19. struct mxl111sf_state *mxl_state;
  20. const struct mxl111sf_tuner_config *cfg;
  21. enum mxl_if_freq if_freq;
  22. u32 frequency;
  23. u32 bandwidth;
  24. };
  25. static int mxl111sf_tuner_read_reg(struct mxl111sf_tuner_state *state,
  26. u8 addr, u8 *data)
  27. {
  28. return (state->cfg->read_reg) ?
  29. state->cfg->read_reg(state->mxl_state, addr, data) :
  30. -EINVAL;
  31. }
  32. static int mxl111sf_tuner_write_reg(struct mxl111sf_tuner_state *state,
  33. u8 addr, u8 data)
  34. {
  35. return (state->cfg->write_reg) ?
  36. state->cfg->write_reg(state->mxl_state, addr, data) :
  37. -EINVAL;
  38. }
  39. static int mxl111sf_tuner_program_regs(struct mxl111sf_tuner_state *state,
  40. struct mxl111sf_reg_ctrl_info *ctrl_reg_info)
  41. {
  42. return (state->cfg->program_regs) ?
  43. state->cfg->program_regs(state->mxl_state, ctrl_reg_info) :
  44. -EINVAL;
  45. }
  46. static int mxl1x1sf_tuner_top_master_ctrl(struct mxl111sf_tuner_state *state,
  47. int onoff)
  48. {
  49. return (state->cfg->top_master_ctrl) ?
  50. state->cfg->top_master_ctrl(state->mxl_state, onoff) :
  51. -EINVAL;
  52. }
  53. /* ------------------------------------------------------------------------ */
  54. static struct mxl111sf_reg_ctrl_info mxl_phy_tune_rf[] = {
  55. {0x1d, 0x7f, 0x00}, /* channel bandwidth section 1/2/3,
  56. DIG_MODEINDEX, _A, _CSF, */
  57. {0x1e, 0xff, 0x00}, /* channel frequency (lo and fractional) */
  58. {0x1f, 0xff, 0x00}, /* channel frequency (hi for integer portion) */
  59. {0, 0, 0}
  60. };
  61. /* ------------------------------------------------------------------------ */
  62. static struct mxl111sf_reg_ctrl_info *mxl111sf_calc_phy_tune_regs(u32 freq,
  63. u8 bw)
  64. {
  65. u8 filt_bw;
  66. /* set channel bandwidth */
  67. switch (bw) {
  68. case 0: /* ATSC */
  69. filt_bw = 25;
  70. break;
  71. case 1: /* QAM */
  72. filt_bw = 69;
  73. break;
  74. case 6:
  75. filt_bw = 21;
  76. break;
  77. case 7:
  78. filt_bw = 42;
  79. break;
  80. case 8:
  81. filt_bw = 63;
  82. break;
  83. default:
  84. pr_err("%s: invalid bandwidth setting!", __func__);
  85. return NULL;
  86. }
  87. /* calculate RF channel */
  88. freq /= 1000000;
  89. freq *= 64;
  90. #if 0
  91. /* do round */
  92. freq += 0.5;
  93. #endif
  94. /* set bandwidth */
  95. mxl_phy_tune_rf[0].data = filt_bw;
  96. /* set RF */
  97. mxl_phy_tune_rf[1].data = (freq & 0xff);
  98. mxl_phy_tune_rf[2].data = (freq >> 8) & 0xff;
  99. /* start tune */
  100. return mxl_phy_tune_rf;
  101. }
  102. static int mxl1x1sf_tuner_set_if_output_freq(struct mxl111sf_tuner_state *state)
  103. {
  104. int ret;
  105. u8 ctrl;
  106. #if 0
  107. u16 iffcw;
  108. u32 if_freq;
  109. #endif
  110. mxl_dbg("(IF polarity = %d, IF freq = 0x%02x)",
  111. state->cfg->invert_spectrum, state->cfg->if_freq);
  112. /* set IF polarity */
  113. ctrl = state->cfg->invert_spectrum;
  114. ctrl |= state->cfg->if_freq;
  115. ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_SEL_REG, ctrl);
  116. if (mxl_fail(ret))
  117. goto fail;
  118. #if 0
  119. if_freq /= 1000000;
  120. /* do round */
  121. if_freq += 0.5;
  122. if (MXL_IF_LO == state->cfg->if_freq) {
  123. ctrl = 0x08;
  124. iffcw = (u16)(if_freq / (108 * 4096));
  125. } else if (MXL_IF_HI == state->cfg->if_freq) {
  126. ctrl = 0x08;
  127. iffcw = (u16)(if_freq / (216 * 4096));
  128. } else {
  129. ctrl = 0;
  130. iffcw = 0;
  131. }
  132. ctrl |= (iffcw >> 8);
  133. #endif
  134. ret = mxl111sf_tuner_read_reg(state, V6_TUNER_IF_FCW_BYP_REG, &ctrl);
  135. if (mxl_fail(ret))
  136. goto fail;
  137. ctrl &= 0xf0;
  138. ctrl |= 0x90;
  139. ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_BYP_REG, ctrl);
  140. if (mxl_fail(ret))
  141. goto fail;
  142. #if 0
  143. ctrl = iffcw & 0x00ff;
  144. #endif
  145. ret = mxl111sf_tuner_write_reg(state, V6_TUNER_IF_FCW_REG, ctrl);
  146. if (mxl_fail(ret))
  147. goto fail;
  148. state->if_freq = state->cfg->if_freq;
  149. fail:
  150. return ret;
  151. }
  152. static int mxl1x1sf_tune_rf(struct dvb_frontend *fe, u32 freq, u8 bw)
  153. {
  154. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  155. static struct mxl111sf_reg_ctrl_info *reg_ctrl_array;
  156. int ret;
  157. u8 mxl_mode;
  158. mxl_dbg("(freq = %d, bw = 0x%x)", freq, bw);
  159. /* stop tune */
  160. ret = mxl111sf_tuner_write_reg(state, START_TUNE_REG, 0);
  161. if (mxl_fail(ret))
  162. goto fail;
  163. /* check device mode */
  164. ret = mxl111sf_tuner_read_reg(state, MXL_MODE_REG, &mxl_mode);
  165. if (mxl_fail(ret))
  166. goto fail;
  167. /* Fill out registers for channel tune */
  168. reg_ctrl_array = mxl111sf_calc_phy_tune_regs(freq, bw);
  169. if (!reg_ctrl_array)
  170. return -EINVAL;
  171. ret = mxl111sf_tuner_program_regs(state, reg_ctrl_array);
  172. if (mxl_fail(ret))
  173. goto fail;
  174. if ((mxl_mode & MXL_DEV_MODE_MASK) == MXL_TUNER_MODE) {
  175. /* IF tuner mode only */
  176. mxl1x1sf_tuner_top_master_ctrl(state, 0);
  177. mxl1x1sf_tuner_top_master_ctrl(state, 1);
  178. mxl1x1sf_tuner_set_if_output_freq(state);
  179. }
  180. ret = mxl111sf_tuner_write_reg(state, START_TUNE_REG, 1);
  181. if (mxl_fail(ret))
  182. goto fail;
  183. if (state->cfg->ant_hunt)
  184. state->cfg->ant_hunt(fe);
  185. fail:
  186. return ret;
  187. }
  188. static int mxl1x1sf_tuner_get_lock_status(struct mxl111sf_tuner_state *state,
  189. int *rf_synth_lock,
  190. int *ref_synth_lock)
  191. {
  192. int ret;
  193. u8 data;
  194. *rf_synth_lock = 0;
  195. *ref_synth_lock = 0;
  196. ret = mxl111sf_tuner_read_reg(state, V6_RF_LOCK_STATUS_REG, &data);
  197. if (mxl_fail(ret))
  198. goto fail;
  199. *ref_synth_lock = ((data & 0x03) == 0x03) ? 1 : 0;
  200. *rf_synth_lock = ((data & 0x0c) == 0x0c) ? 1 : 0;
  201. fail:
  202. return ret;
  203. }
  204. #if 0
  205. static int mxl1x1sf_tuner_loop_thru_ctrl(struct mxl111sf_tuner_state *state,
  206. int onoff)
  207. {
  208. return mxl111sf_tuner_write_reg(state, V6_TUNER_LOOP_THRU_CTRL_REG,
  209. onoff ? 1 : 0);
  210. }
  211. #endif
  212. /* ------------------------------------------------------------------------ */
  213. static int mxl111sf_tuner_set_params(struct dvb_frontend *fe)
  214. {
  215. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  216. u32 delsys = c->delivery_system;
  217. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  218. int ret;
  219. u8 bw;
  220. mxl_dbg("()");
  221. switch (delsys) {
  222. case SYS_ATSC:
  223. case SYS_ATSCMH:
  224. bw = 0; /* ATSC */
  225. break;
  226. case SYS_DVBC_ANNEX_B:
  227. bw = 1; /* US CABLE */
  228. break;
  229. case SYS_DVBT:
  230. switch (c->bandwidth_hz) {
  231. case 6000000:
  232. bw = 6;
  233. break;
  234. case 7000000:
  235. bw = 7;
  236. break;
  237. case 8000000:
  238. bw = 8;
  239. break;
  240. default:
  241. pr_err("%s: bandwidth not set!", __func__);
  242. return -EINVAL;
  243. }
  244. break;
  245. default:
  246. pr_err("%s: modulation type not supported!", __func__);
  247. return -EINVAL;
  248. }
  249. ret = mxl1x1sf_tune_rf(fe, c->frequency, bw);
  250. if (mxl_fail(ret))
  251. goto fail;
  252. state->frequency = c->frequency;
  253. state->bandwidth = c->bandwidth_hz;
  254. fail:
  255. return ret;
  256. }
  257. /* ------------------------------------------------------------------------ */
  258. #if 0
  259. static int mxl111sf_tuner_init(struct dvb_frontend *fe)
  260. {
  261. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  262. int ret;
  263. /* wake from standby handled by usb driver */
  264. return ret;
  265. }
  266. static int mxl111sf_tuner_sleep(struct dvb_frontend *fe)
  267. {
  268. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  269. int ret;
  270. /* enter standby mode handled by usb driver */
  271. return ret;
  272. }
  273. #endif
  274. /* ------------------------------------------------------------------------ */
  275. static int mxl111sf_tuner_get_status(struct dvb_frontend *fe, u32 *status)
  276. {
  277. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  278. int rf_locked, ref_locked, ret;
  279. *status = 0;
  280. ret = mxl1x1sf_tuner_get_lock_status(state, &rf_locked, &ref_locked);
  281. if (mxl_fail(ret))
  282. goto fail;
  283. mxl_info("%s%s", rf_locked ? "rf locked " : "",
  284. ref_locked ? "ref locked" : "");
  285. if ((rf_locked) || (ref_locked))
  286. *status |= TUNER_STATUS_LOCKED;
  287. fail:
  288. return ret;
  289. }
  290. static int mxl111sf_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
  291. {
  292. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  293. u8 val1, val2;
  294. int ret;
  295. *strength = 0;
  296. ret = mxl111sf_tuner_write_reg(state, 0x00, 0x02);
  297. if (mxl_fail(ret))
  298. goto fail;
  299. ret = mxl111sf_tuner_read_reg(state, V6_DIG_RF_PWR_LSB_REG, &val1);
  300. if (mxl_fail(ret))
  301. goto fail;
  302. ret = mxl111sf_tuner_read_reg(state, V6_DIG_RF_PWR_MSB_REG, &val2);
  303. if (mxl_fail(ret))
  304. goto fail;
  305. *strength = val1 | ((val2 & 0x07) << 8);
  306. fail:
  307. ret = mxl111sf_tuner_write_reg(state, 0x00, 0x00);
  308. mxl_fail(ret);
  309. return ret;
  310. }
  311. /* ------------------------------------------------------------------------ */
  312. static int mxl111sf_tuner_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  313. {
  314. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  315. *frequency = state->frequency;
  316. return 0;
  317. }
  318. static int mxl111sf_tuner_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  319. {
  320. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  321. *bandwidth = state->bandwidth;
  322. return 0;
  323. }
  324. static int mxl111sf_tuner_get_if_frequency(struct dvb_frontend *fe,
  325. u32 *frequency)
  326. {
  327. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  328. *frequency = 0;
  329. switch (state->if_freq) {
  330. case MXL_IF_4_0: /* 4.0 MHz */
  331. *frequency = 4000000;
  332. break;
  333. case MXL_IF_4_5: /* 4.5 MHz */
  334. *frequency = 4500000;
  335. break;
  336. case MXL_IF_4_57: /* 4.57 MHz */
  337. *frequency = 4570000;
  338. break;
  339. case MXL_IF_5_0: /* 5.0 MHz */
  340. *frequency = 5000000;
  341. break;
  342. case MXL_IF_5_38: /* 5.38 MHz */
  343. *frequency = 5380000;
  344. break;
  345. case MXL_IF_6_0: /* 6.0 MHz */
  346. *frequency = 6000000;
  347. break;
  348. case MXL_IF_6_28: /* 6.28 MHz */
  349. *frequency = 6280000;
  350. break;
  351. case MXL_IF_7_2: /* 7.2 MHz */
  352. *frequency = 7200000;
  353. break;
  354. case MXL_IF_35_25: /* 35.25 MHz */
  355. *frequency = 35250000;
  356. break;
  357. case MXL_IF_36: /* 36 MHz */
  358. *frequency = 36000000;
  359. break;
  360. case MXL_IF_36_15: /* 36.15 MHz */
  361. *frequency = 36150000;
  362. break;
  363. case MXL_IF_44: /* 44 MHz */
  364. *frequency = 44000000;
  365. break;
  366. }
  367. return 0;
  368. }
  369. static void mxl111sf_tuner_release(struct dvb_frontend *fe)
  370. {
  371. struct mxl111sf_tuner_state *state = fe->tuner_priv;
  372. mxl_dbg("()");
  373. kfree(state);
  374. fe->tuner_priv = NULL;
  375. }
  376. /* ------------------------------------------------------------------------- */
  377. static const struct dvb_tuner_ops mxl111sf_tuner_tuner_ops = {
  378. .info = {
  379. .name = "MaxLinear MxL111SF",
  380. #if 0
  381. .frequency_min_hz = ,
  382. .frequency_max_hz = ,
  383. .frequency_step_hz = ,
  384. #endif
  385. },
  386. #if 0
  387. .init = mxl111sf_tuner_init,
  388. .sleep = mxl111sf_tuner_sleep,
  389. #endif
  390. .set_params = mxl111sf_tuner_set_params,
  391. .get_status = mxl111sf_tuner_get_status,
  392. .get_rf_strength = mxl111sf_get_rf_strength,
  393. .get_frequency = mxl111sf_tuner_get_frequency,
  394. .get_bandwidth = mxl111sf_tuner_get_bandwidth,
  395. .get_if_frequency = mxl111sf_tuner_get_if_frequency,
  396. .release = mxl111sf_tuner_release,
  397. };
  398. struct dvb_frontend *mxl111sf_tuner_attach(struct dvb_frontend *fe,
  399. struct mxl111sf_state *mxl_state,
  400. const struct mxl111sf_tuner_config *cfg)
  401. {
  402. struct mxl111sf_tuner_state *state = NULL;
  403. mxl_dbg("()");
  404. state = kzalloc(sizeof(struct mxl111sf_tuner_state), GFP_KERNEL);
  405. if (state == NULL)
  406. return NULL;
  407. state->mxl_state = mxl_state;
  408. state->cfg = cfg;
  409. memcpy(&fe->ops.tuner_ops, &mxl111sf_tuner_tuner_ops,
  410. sizeof(struct dvb_tuner_ops));
  411. fe->tuner_priv = state;
  412. return fe;
  413. }
  414. EXPORT_SYMBOL_GPL(mxl111sf_tuner_attach);
  415. MODULE_DESCRIPTION("MaxLinear MxL111SF CMOS tuner driver");
  416. MODULE_AUTHOR("Michael Krufky <[email protected]>");
  417. MODULE_LICENSE("GPL");
  418. MODULE_VERSION("0.1");