mxl111sf-i2c.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
  4. *
  5. * Copyright (C) 2010-2014 Michael Krufky <[email protected]>
  6. */
  7. #include "mxl111sf-i2c.h"
  8. #include "mxl111sf.h"
  9. /* SW-I2C ----------------------------------------------------------------- */
  10. #define SW_I2C_ADDR 0x1a
  11. #define SW_I2C_EN 0x02
  12. #define SW_SCL_OUT 0x04
  13. #define SW_SDA_OUT 0x08
  14. #define SW_SDA_IN 0x04
  15. #define SW_I2C_BUSY_ADDR 0x2f
  16. #define SW_I2C_BUSY 0x02
  17. static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
  18. u8 byte)
  19. {
  20. int i, ret;
  21. u8 data = 0;
  22. mxl_i2c("(0x%02x)", byte);
  23. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  24. if (mxl_fail(ret))
  25. goto fail;
  26. for (i = 0; i < 8; i++) {
  27. data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
  28. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  29. 0x10 | SW_I2C_EN | data);
  30. if (mxl_fail(ret))
  31. goto fail;
  32. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  33. 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
  34. if (mxl_fail(ret))
  35. goto fail;
  36. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  37. 0x10 | SW_I2C_EN | data);
  38. if (mxl_fail(ret))
  39. goto fail;
  40. }
  41. /* last bit was 0 so we need to release SDA */
  42. if (!(byte & 1)) {
  43. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  44. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  45. if (mxl_fail(ret))
  46. goto fail;
  47. }
  48. /* CLK high for ACK readback */
  49. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  50. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  51. if (mxl_fail(ret))
  52. goto fail;
  53. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  54. if (mxl_fail(ret))
  55. goto fail;
  56. /* drop the CLK after getting ACK, SDA will go high right away */
  57. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  58. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  59. if (mxl_fail(ret))
  60. goto fail;
  61. if (data & SW_SDA_IN)
  62. ret = -EIO;
  63. fail:
  64. return ret;
  65. }
  66. static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
  67. u8 *pbyte)
  68. {
  69. int i, ret;
  70. u8 byte = 0;
  71. u8 data = 0;
  72. mxl_i2c("()");
  73. *pbyte = 0;
  74. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  75. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  76. if (mxl_fail(ret))
  77. goto fail;
  78. for (i = 0; i < 8; i++) {
  79. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  80. 0x10 | SW_I2C_EN |
  81. SW_SCL_OUT | SW_SDA_OUT);
  82. if (mxl_fail(ret))
  83. goto fail;
  84. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  85. if (mxl_fail(ret))
  86. goto fail;
  87. if (data & SW_SDA_IN)
  88. byte |= (0x80 >> i);
  89. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  90. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  91. if (mxl_fail(ret))
  92. goto fail;
  93. }
  94. *pbyte = byte;
  95. fail:
  96. return ret;
  97. }
  98. static int mxl111sf_i2c_start(struct mxl111sf_state *state)
  99. {
  100. int ret;
  101. mxl_i2c("()");
  102. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  103. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  104. if (mxl_fail(ret))
  105. goto fail;
  106. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  107. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  108. if (mxl_fail(ret))
  109. goto fail;
  110. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  111. 0x10 | SW_I2C_EN); /* start */
  112. mxl_fail(ret);
  113. fail:
  114. return ret;
  115. }
  116. static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
  117. {
  118. int ret;
  119. mxl_i2c("()");
  120. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  121. 0x10 | SW_I2C_EN); /* stop */
  122. if (mxl_fail(ret))
  123. goto fail;
  124. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  125. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  126. if (mxl_fail(ret))
  127. goto fail;
  128. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  129. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  130. if (mxl_fail(ret))
  131. goto fail;
  132. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  133. 0x10 | SW_SCL_OUT | SW_SDA_OUT);
  134. mxl_fail(ret);
  135. fail:
  136. return ret;
  137. }
  138. static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
  139. {
  140. int ret;
  141. u8 b = 0;
  142. mxl_i2c("()");
  143. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
  144. if (mxl_fail(ret))
  145. goto fail;
  146. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  147. 0x10 | SW_I2C_EN);
  148. if (mxl_fail(ret))
  149. goto fail;
  150. /* pull SDA low */
  151. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  152. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  153. if (mxl_fail(ret))
  154. goto fail;
  155. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  156. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  157. mxl_fail(ret);
  158. fail:
  159. return ret;
  160. }
  161. static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
  162. {
  163. int ret;
  164. mxl_i2c("()");
  165. /* SDA high to signal last byte read from slave */
  166. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  167. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  168. if (mxl_fail(ret))
  169. goto fail;
  170. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  171. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  172. mxl_fail(ret);
  173. fail:
  174. return ret;
  175. }
  176. /* ------------------------------------------------------------------------ */
  177. static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
  178. struct i2c_msg *msg)
  179. {
  180. int i, ret;
  181. mxl_i2c("()");
  182. if (msg->flags & I2C_M_RD) {
  183. ret = mxl111sf_i2c_start(state);
  184. if (mxl_fail(ret))
  185. goto fail;
  186. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  187. (msg->addr << 1) | 0x01);
  188. if (mxl_fail(ret)) {
  189. mxl111sf_i2c_stop(state);
  190. goto fail;
  191. }
  192. for (i = 0; i < msg->len; i++) {
  193. ret = mxl111sf_i2c_bitbang_recvbyte(state,
  194. &msg->buf[i]);
  195. if (mxl_fail(ret)) {
  196. mxl111sf_i2c_stop(state);
  197. goto fail;
  198. }
  199. if (i < msg->len - 1)
  200. mxl111sf_i2c_ack(state);
  201. }
  202. mxl111sf_i2c_nack(state);
  203. ret = mxl111sf_i2c_stop(state);
  204. if (mxl_fail(ret))
  205. goto fail;
  206. } else {
  207. ret = mxl111sf_i2c_start(state);
  208. if (mxl_fail(ret))
  209. goto fail;
  210. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  211. (msg->addr << 1) & 0xfe);
  212. if (mxl_fail(ret)) {
  213. mxl111sf_i2c_stop(state);
  214. goto fail;
  215. }
  216. for (i = 0; i < msg->len; i++) {
  217. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  218. msg->buf[i]);
  219. if (mxl_fail(ret)) {
  220. mxl111sf_i2c_stop(state);
  221. goto fail;
  222. }
  223. }
  224. /* FIXME: we only want to do this on the last transaction */
  225. mxl111sf_i2c_stop(state);
  226. }
  227. fail:
  228. return ret;
  229. }
  230. /* HW-I2C ----------------------------------------------------------------- */
  231. #define USB_WRITE_I2C_CMD 0x99
  232. #define USB_READ_I2C_CMD 0xdd
  233. #define USB_END_I2C_CMD 0xfe
  234. #define USB_WRITE_I2C_CMD_LEN 26
  235. #define USB_READ_I2C_CMD_LEN 24
  236. #define I2C_MUX_REG 0x30
  237. #define I2C_CONTROL_REG 0x00
  238. #define I2C_SLAVE_ADDR_REG 0x08
  239. #define I2C_DATA_REG 0x0c
  240. #define I2C_INT_STATUS_REG 0x10
  241. static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
  242. u8 index, u8 *wdata)
  243. {
  244. int ret = mxl111sf_ctrl_msg(state, wdata[0],
  245. &wdata[1], 25, NULL, 0);
  246. mxl_fail(ret);
  247. return ret;
  248. }
  249. static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
  250. u8 index, u8 *wdata, u8 *rdata)
  251. {
  252. int ret = mxl111sf_ctrl_msg(state, wdata[0],
  253. &wdata[1], 25, rdata, 24);
  254. mxl_fail(ret);
  255. return ret;
  256. }
  257. static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
  258. {
  259. u8 status = 0;
  260. u8 buf[26];
  261. mxl_i2c_adv("()");
  262. buf[0] = USB_READ_I2C_CMD;
  263. buf[1] = 0x00;
  264. buf[2] = I2C_INT_STATUS_REG;
  265. buf[3] = 0x00;
  266. buf[4] = 0x00;
  267. buf[5] = USB_END_I2C_CMD;
  268. mxl111sf_i2c_get_data(state, 0, buf, buf);
  269. if (buf[1] & 0x04)
  270. status = 1;
  271. return status;
  272. }
  273. static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
  274. {
  275. u8 status = 0;
  276. u8 buf[26];
  277. mxl_i2c("()");
  278. buf[0] = USB_READ_I2C_CMD;
  279. buf[1] = 0x00;
  280. buf[2] = I2C_MUX_REG;
  281. buf[3] = 0x00;
  282. buf[4] = 0x00;
  283. buf[5] = I2C_INT_STATUS_REG;
  284. buf[6] = 0x00;
  285. buf[7] = 0x00;
  286. buf[8] = USB_END_I2C_CMD;
  287. mxl111sf_i2c_get_data(state, 0, buf, buf);
  288. if (0x08 == (buf[1] & 0x08))
  289. status = 1;
  290. if ((buf[5] & 0x02) == 0x02)
  291. mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
  292. return status;
  293. }
  294. static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
  295. u8 count, u8 *rbuf)
  296. {
  297. u8 i2c_w_data[26];
  298. u8 i2c_r_data[24];
  299. u8 i = 0;
  300. u8 fifo_status = 0;
  301. int status = 0;
  302. mxl_i2c("read %d bytes", count);
  303. while ((fifo_status == 0) && (i++ < 5))
  304. fifo_status = mxl111sf_i2c_check_fifo(state);
  305. i2c_w_data[0] = 0xDD;
  306. i2c_w_data[1] = 0x00;
  307. for (i = 2; i < 26; i++)
  308. i2c_w_data[i] = 0xFE;
  309. for (i = 0; i < count; i++) {
  310. i2c_w_data[2+(i*3)] = 0x0C;
  311. i2c_w_data[3+(i*3)] = 0x00;
  312. i2c_w_data[4+(i*3)] = 0x00;
  313. }
  314. mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
  315. /* Check for I2C NACK status */
  316. if (mxl111sf_i2c_check_status(state) == 1) {
  317. mxl_i2c("error!");
  318. } else {
  319. for (i = 0; i < count; i++) {
  320. rbuf[i] = i2c_r_data[(i*3)+1];
  321. mxl_i2c("%02x\t %02x",
  322. i2c_r_data[(i*3)+1],
  323. i2c_r_data[(i*3)+2]);
  324. }
  325. status = 1;
  326. }
  327. return status;
  328. }
  329. #define HWI2C400 1
  330. static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
  331. struct i2c_msg *msg)
  332. {
  333. int i, k, ret = 0;
  334. u16 index = 0;
  335. u8 buf[26];
  336. u8 i2c_r_data[24];
  337. u16 block_len;
  338. u16 left_over_len;
  339. u8 rd_status[8];
  340. u8 ret_status;
  341. u8 readbuff[26];
  342. mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
  343. msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
  344. (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
  345. for (index = 0; index < 26; index++)
  346. buf[index] = USB_END_I2C_CMD;
  347. /* command to indicate data payload is destined for I2C interface */
  348. buf[0] = USB_WRITE_I2C_CMD;
  349. buf[1] = 0x00;
  350. /* enable I2C interface */
  351. buf[2] = I2C_MUX_REG;
  352. buf[3] = 0x80;
  353. buf[4] = 0x00;
  354. /* enable I2C interface */
  355. buf[5] = I2C_MUX_REG;
  356. buf[6] = 0x81;
  357. buf[7] = 0x00;
  358. /* set Timeout register on I2C interface */
  359. buf[8] = 0x14;
  360. buf[9] = 0xff;
  361. buf[10] = 0x00;
  362. #if 0
  363. /* enable Interrupts on I2C interface */
  364. buf[8] = 0x24;
  365. buf[9] = 0xF7;
  366. buf[10] = 0x00;
  367. #endif
  368. buf[11] = 0x24;
  369. buf[12] = 0xF7;
  370. buf[13] = 0x00;
  371. ret = mxl111sf_i2c_send_data(state, 0, buf);
  372. /* write data on I2C bus */
  373. if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
  374. mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
  375. /* control register on I2C interface to initialize I2C bus */
  376. buf[2] = I2C_CONTROL_REG;
  377. buf[3] = 0x5E;
  378. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  379. /* I2C Slave device Address */
  380. buf[5] = I2C_SLAVE_ADDR_REG;
  381. buf[6] = (msg->addr);
  382. buf[7] = 0x00;
  383. buf[8] = USB_END_I2C_CMD;
  384. ret = mxl111sf_i2c_send_data(state, 0, buf);
  385. /* check for slave device status */
  386. if (mxl111sf_i2c_check_status(state) == 1) {
  387. mxl_i2c("NACK writing slave address %02x",
  388. msg->addr);
  389. /* if NACK, stop I2C bus and exit */
  390. buf[2] = I2C_CONTROL_REG;
  391. buf[3] = 0x4E;
  392. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  393. ret = -EIO;
  394. goto exit;
  395. }
  396. /* I2C interface can do I2C operations in block of 8 bytes of
  397. I2C data. calculation to figure out number of blocks of i2c
  398. data required to program */
  399. block_len = (msg->len / 8);
  400. left_over_len = (msg->len % 8);
  401. mxl_i2c("block_len %d, left_over_len %d",
  402. block_len, left_over_len);
  403. for (index = 0; index < block_len; index++) {
  404. for (i = 0; i < 8; i++) {
  405. /* write data on I2C interface */
  406. buf[2+(i*3)] = I2C_DATA_REG;
  407. buf[3+(i*3)] = msg->buf[(index*8)+i];
  408. buf[4+(i*3)] = 0x00;
  409. }
  410. ret = mxl111sf_i2c_send_data(state, 0, buf);
  411. /* check for I2C NACK status */
  412. if (mxl111sf_i2c_check_status(state) == 1) {
  413. mxl_i2c("NACK writing slave address %02x",
  414. msg->addr);
  415. /* if NACK, stop I2C bus and exit */
  416. buf[2] = I2C_CONTROL_REG;
  417. buf[3] = 0x4E;
  418. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  419. ret = -EIO;
  420. goto exit;
  421. }
  422. }
  423. if (left_over_len) {
  424. for (k = 0; k < 26; k++)
  425. buf[k] = USB_END_I2C_CMD;
  426. buf[0] = 0x99;
  427. buf[1] = 0x00;
  428. for (i = 0; i < left_over_len; i++) {
  429. buf[2+(i*3)] = I2C_DATA_REG;
  430. buf[3+(i*3)] = msg->buf[(index*8)+i];
  431. mxl_i2c("index = %d %d data %d",
  432. index, i, msg->buf[(index*8)+i]);
  433. buf[4+(i*3)] = 0x00;
  434. }
  435. ret = mxl111sf_i2c_send_data(state, 0, buf);
  436. /* check for I2C NACK status */
  437. if (mxl111sf_i2c_check_status(state) == 1) {
  438. mxl_i2c("NACK writing slave address %02x",
  439. msg->addr);
  440. /* if NACK, stop I2C bus and exit */
  441. buf[2] = I2C_CONTROL_REG;
  442. buf[3] = 0x4E;
  443. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  444. ret = -EIO;
  445. goto exit;
  446. }
  447. }
  448. /* issue I2C STOP after write */
  449. buf[2] = I2C_CONTROL_REG;
  450. buf[3] = 0x4E;
  451. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  452. }
  453. /* read data from I2C bus */
  454. if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
  455. mxl_i2c("read buf len %d", msg->len);
  456. /* command to indicate data payload is
  457. destined for I2C interface */
  458. buf[2] = I2C_CONTROL_REG;
  459. buf[3] = 0xDF;
  460. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  461. /* I2C xfer length */
  462. buf[5] = 0x14;
  463. buf[6] = (msg->len & 0xFF);
  464. buf[7] = 0;
  465. /* I2C slave device Address */
  466. buf[8] = I2C_SLAVE_ADDR_REG;
  467. buf[9] = msg->addr;
  468. buf[10] = 0x00;
  469. buf[11] = USB_END_I2C_CMD;
  470. ret = mxl111sf_i2c_send_data(state, 0, buf);
  471. /* check for I2C NACK status */
  472. if (mxl111sf_i2c_check_status(state) == 1) {
  473. mxl_i2c("NACK reading slave address %02x",
  474. msg->addr);
  475. /* if NACK, stop I2C bus and exit */
  476. buf[2] = I2C_CONTROL_REG;
  477. buf[3] = 0xC7;
  478. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  479. ret = -EIO;
  480. goto exit;
  481. }
  482. /* I2C interface can do I2C operations in block of 8 bytes of
  483. I2C data. calculation to figure out number of blocks of
  484. i2c data required to program */
  485. block_len = ((msg->len) / 8);
  486. left_over_len = ((msg->len) % 8);
  487. index = 0;
  488. mxl_i2c("block_len %d, left_over_len %d",
  489. block_len, left_over_len);
  490. /* command to read data from I2C interface */
  491. buf[0] = USB_READ_I2C_CMD;
  492. buf[1] = 0x00;
  493. for (index = 0; index < block_len; index++) {
  494. /* setup I2C read request packet on I2C interface */
  495. for (i = 0; i < 8; i++) {
  496. buf[2+(i*3)] = I2C_DATA_REG;
  497. buf[3+(i*3)] = 0x00;
  498. buf[4+(i*3)] = 0x00;
  499. }
  500. ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
  501. /* check for I2C NACK status */
  502. if (mxl111sf_i2c_check_status(state) == 1) {
  503. mxl_i2c("NACK reading slave address %02x",
  504. msg->addr);
  505. /* if NACK, stop I2C bus and exit */
  506. buf[2] = I2C_CONTROL_REG;
  507. buf[3] = 0xC7;
  508. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  509. ret = -EIO;
  510. goto exit;
  511. }
  512. /* copy data from i2c data payload to read buffer */
  513. for (i = 0; i < 8; i++) {
  514. rd_status[i] = i2c_r_data[(i*3)+2];
  515. if (rd_status[i] == 0x04) {
  516. if (i < 7) {
  517. mxl_i2c("i2c fifo empty! @ %d",
  518. i);
  519. msg->buf[(index*8)+i] =
  520. i2c_r_data[(i*3)+1];
  521. /* read again */
  522. ret_status =
  523. mxl111sf_i2c_readagain(
  524. state, 8-(i+1),
  525. readbuff);
  526. if (ret_status == 1) {
  527. for (k = 0;
  528. k < 8-(i+1);
  529. k++) {
  530. msg->buf[(index*8)+(k+i+1)] =
  531. readbuff[k];
  532. mxl_i2c("read data: %02x\t %02x",
  533. msg->buf[(index*8)+(k+i)],
  534. (index*8)+(k+i));
  535. mxl_i2c("read data: %02x\t %02x",
  536. msg->buf[(index*8)+(k+i+1)],
  537. readbuff[k]);
  538. }
  539. goto stop_copy;
  540. } else {
  541. mxl_i2c("readagain ERROR!");
  542. }
  543. } else {
  544. msg->buf[(index*8)+i] =
  545. i2c_r_data[(i*3)+1];
  546. }
  547. } else {
  548. msg->buf[(index*8)+i] =
  549. i2c_r_data[(i*3)+1];
  550. }
  551. }
  552. stop_copy:
  553. ;
  554. }
  555. if (left_over_len) {
  556. for (k = 0; k < 26; k++)
  557. buf[k] = USB_END_I2C_CMD;
  558. buf[0] = 0xDD;
  559. buf[1] = 0x00;
  560. for (i = 0; i < left_over_len; i++) {
  561. buf[2+(i*3)] = I2C_DATA_REG;
  562. buf[3+(i*3)] = 0x00;
  563. buf[4+(i*3)] = 0x00;
  564. }
  565. ret = mxl111sf_i2c_get_data(state, 0, buf,
  566. i2c_r_data);
  567. /* check for I2C NACK status */
  568. if (mxl111sf_i2c_check_status(state) == 1) {
  569. mxl_i2c("NACK reading slave address %02x",
  570. msg->addr);
  571. /* if NACK, stop I2C bus and exit */
  572. buf[2] = I2C_CONTROL_REG;
  573. buf[3] = 0xC7;
  574. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  575. ret = -EIO;
  576. goto exit;
  577. }
  578. for (i = 0; i < left_over_len; i++) {
  579. msg->buf[(block_len*8)+i] =
  580. i2c_r_data[(i*3)+1];
  581. mxl_i2c("read data: %02x\t %02x",
  582. i2c_r_data[(i*3)+1],
  583. i2c_r_data[(i*3)+2]);
  584. }
  585. }
  586. /* indicate I2C interface to issue NACK
  587. after next I2C read op */
  588. buf[0] = USB_WRITE_I2C_CMD;
  589. buf[1] = 0x00;
  590. /* control register */
  591. buf[2] = I2C_CONTROL_REG;
  592. buf[3] = 0x17;
  593. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  594. buf[5] = USB_END_I2C_CMD;
  595. ret = mxl111sf_i2c_send_data(state, 0, buf);
  596. /* control register */
  597. buf[2] = I2C_CONTROL_REG;
  598. buf[3] = 0xC7;
  599. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  600. }
  601. exit:
  602. /* STOP and disable I2C MUX */
  603. buf[0] = USB_WRITE_I2C_CMD;
  604. buf[1] = 0x00;
  605. /* de-initilize I2C BUS */
  606. buf[5] = USB_END_I2C_CMD;
  607. mxl111sf_i2c_send_data(state, 0, buf);
  608. /* Control Register */
  609. buf[2] = I2C_CONTROL_REG;
  610. buf[3] = 0xDF;
  611. buf[4] = 0x03;
  612. /* disable I2C interface */
  613. buf[5] = I2C_MUX_REG;
  614. buf[6] = 0x00;
  615. buf[7] = 0x00;
  616. /* de-initilize I2C BUS */
  617. buf[8] = USB_END_I2C_CMD;
  618. mxl111sf_i2c_send_data(state, 0, buf);
  619. /* disable I2C interface */
  620. buf[2] = I2C_MUX_REG;
  621. buf[3] = 0x81;
  622. buf[4] = 0x00;
  623. /* disable I2C interface */
  624. buf[5] = I2C_MUX_REG;
  625. buf[6] = 0x00;
  626. buf[7] = 0x00;
  627. /* disable I2C interface */
  628. buf[8] = I2C_MUX_REG;
  629. buf[9] = 0x00;
  630. buf[10] = 0x00;
  631. buf[11] = USB_END_I2C_CMD;
  632. mxl111sf_i2c_send_data(state, 0, buf);
  633. return ret;
  634. }
  635. /* ------------------------------------------------------------------------ */
  636. int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
  637. struct i2c_msg msg[], int num)
  638. {
  639. struct dvb_usb_device *d = i2c_get_adapdata(adap);
  640. struct mxl111sf_state *state = d->priv;
  641. int hwi2c = (state->chip_rev > MXL111SF_V6);
  642. int i, ret;
  643. if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
  644. return -EAGAIN;
  645. for (i = 0; i < num; i++) {
  646. ret = (hwi2c) ?
  647. mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
  648. mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
  649. if (mxl_fail(ret)) {
  650. mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x",
  651. ret, i+1, num,
  652. (msg[i].flags & I2C_M_RD) ?
  653. "read" : "writ",
  654. msg[i].len, msg[i].addr);
  655. break;
  656. }
  657. }
  658. mutex_unlock(&d->i2c_mutex);
  659. return i == num ? num : -EREMOTEIO;
  660. }