imx-vdoa.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * i.MX6 Video Data Order Adapter (VDOA)
  4. *
  5. * Copyright (C) 2014 Philipp Zabel
  6. * Copyright (C) 2016 Pengutronix, Michael Tretter <[email protected]>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/device.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/module.h>
  12. #include <linux/mod_devicetable.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/videodev2.h>
  16. #include <linux/slab.h>
  17. #include "imx-vdoa.h"
  18. #define VDOA_NAME "imx-vdoa"
  19. #define VDOAC 0x00
  20. #define VDOASRR 0x04
  21. #define VDOAIE 0x08
  22. #define VDOAIST 0x0c
  23. #define VDOAFP 0x10
  24. #define VDOAIEBA00 0x14
  25. #define VDOAIEBA01 0x18
  26. #define VDOAIEBA02 0x1c
  27. #define VDOAIEBA10 0x20
  28. #define VDOAIEBA11 0x24
  29. #define VDOAIEBA12 0x28
  30. #define VDOASL 0x2c
  31. #define VDOAIUBO 0x30
  32. #define VDOAVEBA0 0x34
  33. #define VDOAVEBA1 0x38
  34. #define VDOAVEBA2 0x3c
  35. #define VDOAVUBO 0x40
  36. #define VDOASR 0x44
  37. #define VDOAC_ISEL BIT(6)
  38. #define VDOAC_PFS BIT(5)
  39. #define VDOAC_SO BIT(4)
  40. #define VDOAC_SYNC BIT(3)
  41. #define VDOAC_NF BIT(2)
  42. #define VDOAC_BNDM_MASK 0x3
  43. #define VDOAC_BAND_HEIGHT_8 0x0
  44. #define VDOAC_BAND_HEIGHT_16 0x1
  45. #define VDOAC_BAND_HEIGHT_32 0x2
  46. #define VDOASRR_START BIT(1)
  47. #define VDOASRR_SWRST BIT(0)
  48. #define VDOAIE_EITERR BIT(1)
  49. #define VDOAIE_EIEOT BIT(0)
  50. #define VDOAIST_TERR BIT(1)
  51. #define VDOAIST_EOT BIT(0)
  52. #define VDOAFP_FH_MASK (0x1fff << 16)
  53. #define VDOAFP_FW_MASK (0x3fff)
  54. #define VDOASL_VSLY_MASK (0x3fff << 16)
  55. #define VDOASL_ISLY_MASK (0x7fff)
  56. #define VDOASR_ERRW BIT(4)
  57. #define VDOASR_EOB BIT(3)
  58. #define VDOASR_CURRENT_FRAME (0x3 << 1)
  59. #define VDOASR_CURRENT_BUFFER BIT(1)
  60. enum {
  61. V4L2_M2M_SRC = 0,
  62. V4L2_M2M_DST = 1,
  63. };
  64. struct vdoa_data {
  65. struct vdoa_ctx *curr_ctx;
  66. struct device *dev;
  67. struct clk *vdoa_clk;
  68. void __iomem *regs;
  69. };
  70. struct vdoa_q_data {
  71. unsigned int width;
  72. unsigned int height;
  73. unsigned int bytesperline;
  74. unsigned int sizeimage;
  75. u32 pixelformat;
  76. };
  77. struct vdoa_ctx {
  78. struct vdoa_data *vdoa;
  79. struct completion completion;
  80. struct vdoa_q_data q_data[2];
  81. unsigned int submitted_job;
  82. unsigned int completed_job;
  83. };
  84. static irqreturn_t vdoa_irq_handler(int irq, void *data)
  85. {
  86. struct vdoa_data *vdoa = data;
  87. struct vdoa_ctx *curr_ctx;
  88. u32 val;
  89. /* Disable interrupts */
  90. writel(0, vdoa->regs + VDOAIE);
  91. curr_ctx = vdoa->curr_ctx;
  92. if (!curr_ctx) {
  93. dev_warn(vdoa->dev,
  94. "Instance released before the end of transaction\n");
  95. return IRQ_HANDLED;
  96. }
  97. val = readl(vdoa->regs + VDOAIST);
  98. writel(val, vdoa->regs + VDOAIST);
  99. if (val & VDOAIST_TERR) {
  100. val = readl(vdoa->regs + VDOASR) & VDOASR_ERRW;
  101. dev_err(vdoa->dev, "AXI %s error\n", val ? "write" : "read");
  102. } else if (!(val & VDOAIST_EOT)) {
  103. dev_warn(vdoa->dev, "Spurious interrupt\n");
  104. }
  105. curr_ctx->completed_job++;
  106. complete(&curr_ctx->completion);
  107. return IRQ_HANDLED;
  108. }
  109. int vdoa_wait_for_completion(struct vdoa_ctx *ctx)
  110. {
  111. struct vdoa_data *vdoa = ctx->vdoa;
  112. if (ctx->submitted_job == ctx->completed_job)
  113. return 0;
  114. if (!wait_for_completion_timeout(&ctx->completion,
  115. msecs_to_jiffies(300))) {
  116. dev_err(vdoa->dev,
  117. "Timeout waiting for transfer result\n");
  118. return -ETIMEDOUT;
  119. }
  120. return 0;
  121. }
  122. EXPORT_SYMBOL(vdoa_wait_for_completion);
  123. void vdoa_device_run(struct vdoa_ctx *ctx, dma_addr_t dst, dma_addr_t src)
  124. {
  125. struct vdoa_q_data *src_q_data, *dst_q_data;
  126. struct vdoa_data *vdoa = ctx->vdoa;
  127. u32 val;
  128. if (vdoa->curr_ctx)
  129. vdoa_wait_for_completion(vdoa->curr_ctx);
  130. vdoa->curr_ctx = ctx;
  131. reinit_completion(&ctx->completion);
  132. ctx->submitted_job++;
  133. src_q_data = &ctx->q_data[V4L2_M2M_SRC];
  134. dst_q_data = &ctx->q_data[V4L2_M2M_DST];
  135. /* Progressive, no sync, 1 frame per run */
  136. if (dst_q_data->pixelformat == V4L2_PIX_FMT_YUYV)
  137. val = VDOAC_PFS;
  138. else
  139. val = 0;
  140. writel(val, vdoa->regs + VDOAC);
  141. writel(dst_q_data->height << 16 | dst_q_data->width,
  142. vdoa->regs + VDOAFP);
  143. val = dst;
  144. writel(val, vdoa->regs + VDOAIEBA00);
  145. writel(src_q_data->bytesperline << 16 | dst_q_data->bytesperline,
  146. vdoa->regs + VDOASL);
  147. if (dst_q_data->pixelformat == V4L2_PIX_FMT_NV12 ||
  148. dst_q_data->pixelformat == V4L2_PIX_FMT_NV21)
  149. val = dst_q_data->bytesperline * dst_q_data->height;
  150. else
  151. val = 0;
  152. writel(val, vdoa->regs + VDOAIUBO);
  153. val = src;
  154. writel(val, vdoa->regs + VDOAVEBA0);
  155. val = round_up(src_q_data->bytesperline * src_q_data->height, 4096);
  156. writel(val, vdoa->regs + VDOAVUBO);
  157. /* Enable interrupts and start transfer */
  158. writel(VDOAIE_EITERR | VDOAIE_EIEOT, vdoa->regs + VDOAIE);
  159. writel(VDOASRR_START, vdoa->regs + VDOASRR);
  160. }
  161. EXPORT_SYMBOL(vdoa_device_run);
  162. struct vdoa_ctx *vdoa_context_create(struct vdoa_data *vdoa)
  163. {
  164. struct vdoa_ctx *ctx;
  165. int err;
  166. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  167. if (!ctx)
  168. return NULL;
  169. err = clk_prepare_enable(vdoa->vdoa_clk);
  170. if (err) {
  171. kfree(ctx);
  172. return NULL;
  173. }
  174. init_completion(&ctx->completion);
  175. ctx->vdoa = vdoa;
  176. return ctx;
  177. }
  178. EXPORT_SYMBOL(vdoa_context_create);
  179. void vdoa_context_destroy(struct vdoa_ctx *ctx)
  180. {
  181. struct vdoa_data *vdoa = ctx->vdoa;
  182. if (vdoa->curr_ctx == ctx) {
  183. vdoa_wait_for_completion(vdoa->curr_ctx);
  184. vdoa->curr_ctx = NULL;
  185. }
  186. clk_disable_unprepare(vdoa->vdoa_clk);
  187. kfree(ctx);
  188. }
  189. EXPORT_SYMBOL(vdoa_context_destroy);
  190. int vdoa_context_configure(struct vdoa_ctx *ctx,
  191. unsigned int width, unsigned int height,
  192. u32 pixelformat)
  193. {
  194. struct vdoa_q_data *src_q_data;
  195. struct vdoa_q_data *dst_q_data;
  196. if (width < 16 || width > 8192 || width % 16 != 0 ||
  197. height < 16 || height > 4096 || height % 16 != 0)
  198. return -EINVAL;
  199. if (pixelformat != V4L2_PIX_FMT_YUYV &&
  200. pixelformat != V4L2_PIX_FMT_NV12)
  201. return -EINVAL;
  202. /* If no context is passed, only check if the format is valid */
  203. if (!ctx)
  204. return 0;
  205. src_q_data = &ctx->q_data[V4L2_M2M_SRC];
  206. dst_q_data = &ctx->q_data[V4L2_M2M_DST];
  207. src_q_data->width = width;
  208. src_q_data->height = height;
  209. src_q_data->bytesperline = width;
  210. src_q_data->sizeimage =
  211. round_up(src_q_data->bytesperline * height, 4096) +
  212. src_q_data->bytesperline * height / 2;
  213. dst_q_data->width = width;
  214. dst_q_data->height = height;
  215. dst_q_data->pixelformat = pixelformat;
  216. switch (pixelformat) {
  217. case V4L2_PIX_FMT_YUYV:
  218. dst_q_data->bytesperline = width * 2;
  219. dst_q_data->sizeimage = dst_q_data->bytesperline * height;
  220. break;
  221. case V4L2_PIX_FMT_NV12:
  222. default:
  223. dst_q_data->bytesperline = width;
  224. dst_q_data->sizeimage =
  225. dst_q_data->bytesperline * height * 3 / 2;
  226. break;
  227. }
  228. return 0;
  229. }
  230. EXPORT_SYMBOL(vdoa_context_configure);
  231. static int vdoa_probe(struct platform_device *pdev)
  232. {
  233. struct vdoa_data *vdoa;
  234. int ret;
  235. ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  236. if (ret) {
  237. dev_err(&pdev->dev, "DMA enable failed\n");
  238. return ret;
  239. }
  240. vdoa = devm_kzalloc(&pdev->dev, sizeof(*vdoa), GFP_KERNEL);
  241. if (!vdoa)
  242. return -ENOMEM;
  243. vdoa->dev = &pdev->dev;
  244. vdoa->vdoa_clk = devm_clk_get(vdoa->dev, NULL);
  245. if (IS_ERR(vdoa->vdoa_clk)) {
  246. dev_err(vdoa->dev, "Failed to get clock\n");
  247. return PTR_ERR(vdoa->vdoa_clk);
  248. }
  249. vdoa->regs = devm_platform_ioremap_resource(pdev, 0);
  250. if (IS_ERR(vdoa->regs))
  251. return PTR_ERR(vdoa->regs);
  252. ret = platform_get_irq(pdev, 0);
  253. if (ret < 0)
  254. return ret;
  255. ret = devm_request_threaded_irq(&pdev->dev, ret, NULL,
  256. vdoa_irq_handler, IRQF_ONESHOT,
  257. "vdoa", vdoa);
  258. if (ret < 0) {
  259. dev_err(vdoa->dev, "Failed to get irq\n");
  260. return ret;
  261. }
  262. platform_set_drvdata(pdev, vdoa);
  263. return 0;
  264. }
  265. static int vdoa_remove(struct platform_device *pdev)
  266. {
  267. return 0;
  268. }
  269. static const struct of_device_id vdoa_dt_ids[] = {
  270. { .compatible = "fsl,imx6q-vdoa" },
  271. {}
  272. };
  273. MODULE_DEVICE_TABLE(of, vdoa_dt_ids);
  274. static struct platform_driver vdoa_driver = {
  275. .probe = vdoa_probe,
  276. .remove = vdoa_remove,
  277. .driver = {
  278. .name = VDOA_NAME,
  279. .of_match_table = vdoa_dt_ids,
  280. },
  281. };
  282. module_platform_driver(vdoa_driver);
  283. MODULE_DESCRIPTION("Video Data Order Adapter");
  284. MODULE_AUTHOR("Philipp Zabel <[email protected]>");
  285. MODULE_ALIAS("platform:imx-vdoa");
  286. MODULE_LICENSE("GPL");