mantis_uart.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Mantis PCI bridge driver
  4. Copyright (C) Manu Abraham ([email protected])
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/spinlock.h>
  8. #include <asm/io.h>
  9. #include <linux/signal.h>
  10. #include <linux/sched.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/pci.h>
  13. #include <media/dmxdev.h>
  14. #include <media/dvbdev.h>
  15. #include <media/dvb_demux.h>
  16. #include <media/dvb_frontend.h>
  17. #include <media/dvb_net.h>
  18. #include "mantis_common.h"
  19. #include "mantis_reg.h"
  20. #include "mantis_uart.h"
  21. #include "mantis_input.h"
  22. struct mantis_uart_params {
  23. enum mantis_baud baud_rate;
  24. enum mantis_parity parity;
  25. };
  26. static struct {
  27. char string[7];
  28. } rates[5] = {
  29. { "9600" },
  30. { "19200" },
  31. { "38400" },
  32. { "57600" },
  33. { "115200" }
  34. };
  35. static struct {
  36. char string[5];
  37. } parity[3] = {
  38. { "NONE" },
  39. { "ODD" },
  40. { "EVEN" }
  41. };
  42. static void mantis_uart_read(struct mantis_pci *mantis)
  43. {
  44. struct mantis_hwconfig *config = mantis->hwconfig;
  45. int i, scancode = 0, err = 0;
  46. /* get data */
  47. dprintk(MANTIS_DEBUG, 1, "UART Reading ...");
  48. for (i = 0; i < (config->bytes + 1); i++) {
  49. int data = mmread(MANTIS_UART_RXD);
  50. dprintk(MANTIS_DEBUG, 0, " <%02x>", data);
  51. scancode = (scancode << 8) | (data & 0x3f);
  52. err |= data;
  53. if (data & (1 << 7))
  54. dprintk(MANTIS_ERROR, 1, "UART framing error");
  55. if (data & (1 << 6))
  56. dprintk(MANTIS_ERROR, 1, "UART parity error");
  57. }
  58. dprintk(MANTIS_DEBUG, 0, "\n");
  59. if ((err & 0xC0) == 0)
  60. mantis_input_process(mantis, scancode);
  61. }
  62. static void mantis_uart_work(struct work_struct *work)
  63. {
  64. struct mantis_pci *mantis = container_of(work, struct mantis_pci, uart_work);
  65. u32 stat;
  66. unsigned long timeout;
  67. stat = mmread(MANTIS_UART_STAT);
  68. if (stat & MANTIS_UART_RXFIFO_FULL)
  69. dprintk(MANTIS_ERROR, 1, "RX Fifo FULL");
  70. /*
  71. * MANTIS_UART_RXFIFO_DATA is only set if at least
  72. * config->bytes + 1 bytes are in the FIFO.
  73. */
  74. /* FIXME: is 10ms good enough ? */
  75. timeout = jiffies + msecs_to_jiffies(10);
  76. while (stat & MANTIS_UART_RXFIFO_DATA) {
  77. mantis_uart_read(mantis);
  78. stat = mmread(MANTIS_UART_STAT);
  79. if (!time_is_after_jiffies(timeout))
  80. break;
  81. }
  82. /* re-enable UART (RX) interrupt */
  83. mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
  84. }
  85. static int mantis_uart_setup(struct mantis_pci *mantis,
  86. struct mantis_uart_params *params)
  87. {
  88. u32 reg;
  89. mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL);
  90. reg = mmread(MANTIS_UART_BAUD);
  91. switch (params->baud_rate) {
  92. case MANTIS_BAUD_9600:
  93. reg |= 0xd8;
  94. break;
  95. case MANTIS_BAUD_19200:
  96. reg |= 0x6c;
  97. break;
  98. case MANTIS_BAUD_38400:
  99. reg |= 0x36;
  100. break;
  101. case MANTIS_BAUD_57600:
  102. reg |= 0x23;
  103. break;
  104. case MANTIS_BAUD_115200:
  105. reg |= 0x11;
  106. break;
  107. default:
  108. return -EINVAL;
  109. }
  110. mmwrite(reg, MANTIS_UART_BAUD);
  111. return 0;
  112. }
  113. int mantis_uart_init(struct mantis_pci *mantis)
  114. {
  115. struct mantis_hwconfig *config = mantis->hwconfig;
  116. struct mantis_uart_params params;
  117. /* default parity: */
  118. params.baud_rate = config->baud_rate;
  119. params.parity = config->parity;
  120. dprintk(MANTIS_INFO, 1, "Initializing UART @ %sbps parity:%s",
  121. rates[params.baud_rate].string,
  122. parity[params.parity].string);
  123. INIT_WORK(&mantis->uart_work, mantis_uart_work);
  124. /* disable interrupt */
  125. mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
  126. mantis_uart_setup(mantis, &params);
  127. /* default 1 byte */
  128. mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD);
  129. /* flush buffer */
  130. mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL);
  131. /* enable interrupt */
  132. mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
  133. mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
  134. schedule_work(&mantis->uart_work);
  135. dprintk(MANTIS_DEBUG, 1, "UART successfully initialized");
  136. return 0;
  137. }
  138. EXPORT_SYMBOL_GPL(mantis_uart_init);
  139. void mantis_uart_exit(struct mantis_pci *mantis)
  140. {
  141. /* disable interrupt */
  142. mantis_mask_ints(mantis, MANTIS_INT_IRQ1);
  143. mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
  144. flush_work(&mantis->uart_work);
  145. }
  146. EXPORT_SYMBOL_GPL(mantis_uart_exit);