mantis_hif.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Mantis PCI bridge driver
  4. Copyright (C) Manu Abraham ([email protected])
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/signal.h>
  8. #include <linux/sched.h>
  9. #include <linux/interrupt.h>
  10. #include <asm/io.h>
  11. #include <media/dmxdev.h>
  12. #include <media/dvbdev.h>
  13. #include <media/dvb_demux.h>
  14. #include <media/dvb_frontend.h>
  15. #include <media/dvb_net.h>
  16. #include "mantis_common.h"
  17. #include "mantis_hif.h"
  18. #include "mantis_link.h" /* temporary due to physical layer stuff */
  19. #include "mantis_reg.h"
  20. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  21. {
  22. struct mantis_pci *mantis = ca->ca_priv;
  23. int rc = 0;
  24. if (wait_event_timeout(ca->hif_opdone_wq,
  25. ca->hif_event & MANTIS_SBUF_OPDONE,
  26. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  27. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  28. rc = -EREMOTEIO;
  29. }
  30. dprintk(MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
  31. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  32. return rc;
  33. }
  34. static int mantis_hif_write_wait(struct mantis_ca *ca)
  35. {
  36. struct mantis_pci *mantis = ca->ca_priv;
  37. u32 opdone = 0, timeout = 0;
  38. int rc = 0;
  39. if (wait_event_timeout(ca->hif_write_wq,
  40. mantis->gpif_status & MANTIS_GPIF_WRACK,
  41. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  42. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
  43. rc = -EREMOTEIO;
  44. }
  45. dprintk(MANTIS_DEBUG, 1, "Write Acknowledged");
  46. mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
  47. while (!opdone) {
  48. opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
  49. udelay(500);
  50. timeout++;
  51. if (timeout > 100) {
  52. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write operation timed out!", mantis->num);
  53. rc = -ETIMEDOUT;
  54. break;
  55. }
  56. }
  57. dprintk(MANTIS_DEBUG, 1, "HIF Write success");
  58. return rc;
  59. }
  60. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  61. {
  62. struct mantis_pci *mantis = ca->ca_priv;
  63. u32 hif_addr = 0, data, count = 4;
  64. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  65. mutex_lock(&ca->ca_lock);
  66. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  67. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  68. hif_addr |= MANTIS_HIF_STATUS;
  69. hif_addr |= addr;
  70. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  71. mmwrite(count, MANTIS_GPIF_BRBYTES);
  72. udelay(20);
  73. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  74. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  75. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  76. mutex_unlock(&ca->ca_lock);
  77. return -EREMOTEIO;
  78. }
  79. data = mmread(MANTIS_GPIF_DIN);
  80. mutex_unlock(&ca->ca_lock);
  81. dprintk(MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
  82. return (data >> 24) & 0xff;
  83. }
  84. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  85. {
  86. struct mantis_slot *slot = ca->slot;
  87. struct mantis_pci *mantis = ca->ca_priv;
  88. u32 hif_addr = 0;
  89. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  90. mutex_lock(&ca->ca_lock);
  91. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  92. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  93. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  94. hif_addr |= MANTIS_HIF_STATUS;
  95. hif_addr |= addr;
  96. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  97. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  98. mmwrite(data, MANTIS_GPIF_DOUT);
  99. if (mantis_hif_write_wait(ca) != 0) {
  100. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  101. mutex_unlock(&ca->ca_lock);
  102. return -EREMOTEIO;
  103. }
  104. dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
  105. mutex_unlock(&ca->ca_lock);
  106. return 0;
  107. }
  108. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  109. {
  110. struct mantis_pci *mantis = ca->ca_priv;
  111. u32 data, hif_addr = 0;
  112. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  113. mutex_lock(&ca->ca_lock);
  114. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  115. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  116. hif_addr |= MANTIS_HIF_STATUS;
  117. hif_addr |= addr;
  118. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  119. mmwrite(1, MANTIS_GPIF_BRBYTES);
  120. udelay(20);
  121. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  122. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  123. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  124. mutex_unlock(&ca->ca_lock);
  125. return -EREMOTEIO;
  126. }
  127. data = mmread(MANTIS_GPIF_DIN);
  128. dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
  129. udelay(50);
  130. mutex_unlock(&ca->ca_lock);
  131. return (u8) data;
  132. }
  133. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  134. {
  135. struct mantis_pci *mantis = ca->ca_priv;
  136. u32 hif_addr = 0;
  137. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  138. mutex_lock(&ca->ca_lock);
  139. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  140. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  141. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  142. hif_addr |= MANTIS_HIF_STATUS;
  143. hif_addr |= addr;
  144. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  145. mmwrite(data, MANTIS_GPIF_DOUT);
  146. if (mantis_hif_write_wait(ca) != 0) {
  147. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  148. mutex_unlock(&ca->ca_lock);
  149. return -EREMOTEIO;
  150. }
  151. dprintk(MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
  152. mutex_unlock(&ca->ca_lock);
  153. udelay(50);
  154. return 0;
  155. }
  156. int mantis_hif_init(struct mantis_ca *ca)
  157. {
  158. struct mantis_slot *slot = ca->slot;
  159. struct mantis_pci *mantis = ca->ca_priv;
  160. u32 irqcfg;
  161. slot[0].slave_cfg = 0x70773028;
  162. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  163. mutex_lock(&ca->ca_lock);
  164. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  165. irqcfg = MANTIS_MASK_BRRDY |
  166. MANTIS_MASK_WRACK |
  167. MANTIS_MASK_EXTIRQ |
  168. MANTIS_MASK_WSTO |
  169. MANTIS_MASK_OTHERR |
  170. MANTIS_MASK_OVFLW;
  171. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  172. mutex_unlock(&ca->ca_lock);
  173. return 0;
  174. }
  175. void mantis_hif_exit(struct mantis_ca *ca)
  176. {
  177. struct mantis_pci *mantis = ca->ca_priv;
  178. u32 irqcfg;
  179. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  180. mutex_lock(&ca->ca_lock);
  181. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  182. irqcfg &= ~MANTIS_MASK_BRRDY;
  183. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  184. mutex_unlock(&ca->ca_lock);
  185. }