ddbridge-mci.h 6.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * ddbridge-mci.h: Digital Devices micro code interface
  4. *
  5. * Copyright (C) 2017-2018 Digital Devices GmbH
  6. * Marcus Metzler <[email protected]>
  7. * Ralph Metzler <[email protected]>
  8. */
  9. #ifndef _DDBRIDGE_MCI_H_
  10. #define _DDBRIDGE_MCI_H_
  11. #define MCI_DEMOD_MAX 8
  12. #define MCI_TUNER_MAX 4
  13. #define DEMOD_UNUSED (0xFF)
  14. #define MCI_CONTROL (0x500)
  15. #define MCI_COMMAND (0x600)
  16. #define MCI_RESULT (0x680)
  17. #define MCI_COMMAND_SIZE (0x80)
  18. #define MCI_RESULT_SIZE (0x80)
  19. #define MCI_CONTROL_START_COMMAND (0x00000001)
  20. #define MCI_CONTROL_ENABLE_DONE_INTERRUPT (0x00000002)
  21. #define MCI_CONTROL_RESET (0x00008000)
  22. #define MCI_CONTROL_READY (0x00010000)
  23. #define SX8_TSCONFIG (0x280)
  24. #define SX8_TSCONFIG_MODE_MASK (0x00000003)
  25. #define SX8_TSCONFIG_MODE_OFF (0x00000000)
  26. #define SX8_TSCONFIG_MODE_NORMAL (0x00000001)
  27. #define SX8_TSCONFIG_MODE_IQ (0x00000003)
  28. /*
  29. * IQMode is only available on MaxSX8 on a single tuner
  30. *
  31. * IQ_MODE_SAMPLES
  32. * sampling rate is 1550/24 MHz (64.583 MHz)
  33. * channel agc is frozen, to allow stitching the FFT results together
  34. *
  35. * IQ_MODE_VTM
  36. * sampling rate is the supplied symbolrate
  37. * channel agc is active
  38. *
  39. * in both cases down sampling is done with a RRC Filter (currently fixed to
  40. * alpha = 0.05) which causes some (ca 5%) aliasing at the edges from
  41. * outside the spectrum
  42. */
  43. #define SX8_TSCONFIG_TSHEADER (0x00000004)
  44. #define SX8_TSCONFIG_BURST (0x00000008)
  45. #define SX8_TSCONFIG_BURSTSIZE_MASK (0x00000030)
  46. #define SX8_TSCONFIG_BURSTSIZE_2K (0x00000000)
  47. #define SX8_TSCONFIG_BURSTSIZE_4K (0x00000010)
  48. #define SX8_TSCONFIG_BURSTSIZE_8K (0x00000020)
  49. #define SX8_TSCONFIG_BURSTSIZE_16K (0x00000030)
  50. #define SX8_DEMOD_STOPPED (0)
  51. #define SX8_DEMOD_IQ_MODE (1)
  52. #define SX8_DEMOD_WAIT_SIGNAL (2)
  53. #define SX8_DEMOD_WAIT_MATYPE (3)
  54. #define SX8_DEMOD_TIMEOUT (14)
  55. #define SX8_DEMOD_LOCKED (15)
  56. #define MCI_CMD_STOP (0x01)
  57. #define MCI_CMD_GETSTATUS (0x02)
  58. #define MCI_CMD_GETSIGNALINFO (0x03)
  59. #define MCI_CMD_RFPOWER (0x04)
  60. #define MCI_CMD_SEARCH_DVBS (0x10)
  61. #define MCI_CMD_GET_IQSYMBOL (0x30)
  62. #define SX8_CMD_INPUT_ENABLE (0x40)
  63. #define SX8_CMD_INPUT_DISABLE (0x41)
  64. #define SX8_CMD_START_IQ (0x42)
  65. #define SX8_CMD_STOP_IQ (0x43)
  66. #define SX8_CMD_ENABLE_IQOUTPUT (0x44)
  67. #define SX8_CMD_DISABLE_IQOUTPUT (0x45)
  68. #define MCI_STATUS_OK (0x00)
  69. #define MCI_STATUS_UNSUPPORTED (0x80)
  70. #define MCI_STATUS_RETRY (0xFD)
  71. #define MCI_STATUS_NOT_READY (0xFE)
  72. #define MCI_STATUS_ERROR (0xFF)
  73. #define MCI_SUCCESS(status) ((status & MCI_STATUS_UNSUPPORTED) == 0)
  74. struct mci_command {
  75. union {
  76. u32 command_word;
  77. struct {
  78. u8 command;
  79. u8 tuner;
  80. u8 demod;
  81. u8 output;
  82. };
  83. };
  84. union {
  85. u32 params[31];
  86. struct {
  87. /*
  88. * Bit 0: DVB-S Enabled
  89. * Bit 1: DVB-S2 Enabled
  90. * Bit 7: InputStreamID
  91. */
  92. u8 flags;
  93. /*
  94. * Bit 0: QPSK,
  95. * Bit 1: 8PSK/8APSK
  96. * Bit 2: 16APSK
  97. * Bit 3: 32APSK
  98. * Bit 4: 64APSK
  99. * Bit 5: 128APSK
  100. * Bit 6: 256APSK
  101. */
  102. u8 s2_modulation_mask;
  103. u8 rsvd1;
  104. u8 retry;
  105. u32 frequency;
  106. u32 symbol_rate;
  107. u8 input_stream_id;
  108. u8 rsvd2[3];
  109. u32 scrambling_sequence_index;
  110. u32 frequency_range;
  111. } dvbs2_search;
  112. struct {
  113. u8 tap;
  114. u8 rsvd;
  115. u16 point;
  116. } get_iq_symbol;
  117. struct {
  118. /*
  119. * Bit 0: 0=VTM/1=SCAN
  120. * Bit 1: Set Gain
  121. */
  122. u8 flags;
  123. u8 roll_off;
  124. u8 rsvd1;
  125. u8 rsvd2;
  126. u32 frequency;
  127. u32 symbol_rate; /* Only in VTM mode */
  128. u16 gain;
  129. } sx8_start_iq;
  130. struct {
  131. /*
  132. * Bit 1:0 = STVVGLNA Gain.
  133. * 0 = AGC, 1 = 0dB, 2 = Minimum, 3 = Maximum
  134. */
  135. u8 flags;
  136. } sx8_input_enable;
  137. };
  138. };
  139. struct mci_result {
  140. union {
  141. u32 status_word;
  142. struct {
  143. u8 status;
  144. u8 mode;
  145. u16 time;
  146. };
  147. };
  148. union {
  149. u32 result[27];
  150. struct {
  151. /* 1 = DVB-S, 2 = DVB-S2X */
  152. u8 standard;
  153. /* puncture rate for DVB-S */
  154. u8 pls_code;
  155. /* 2-0: rolloff */
  156. u8 roll_off;
  157. u8 rsvd;
  158. /* actual frequency in Hz */
  159. u32 frequency;
  160. /* actual symbolrate in Hz */
  161. u32 symbol_rate;
  162. /* channel power in dBm x 100 */
  163. s16 channel_power;
  164. /* band power in dBm x 100 */
  165. s16 band_power;
  166. /*
  167. * SNR in dB x 100
  168. * Note: negative values are valid in DVB-S2
  169. */
  170. s16 signal_to_noise;
  171. s16 rsvd2;
  172. /*
  173. * Counter for packet errors
  174. * (set to 0 on start command)
  175. */
  176. u32 packet_errors;
  177. /* Bit error rate: PreRS in DVB-S, PreBCH in DVB-S2X */
  178. u32 ber_numerator;
  179. u32 ber_denominator;
  180. } dvbs2_signal_info;
  181. struct {
  182. s16 i;
  183. s16 q;
  184. } iq_symbol;
  185. };
  186. u32 version[4];
  187. };
  188. struct mci_base {
  189. struct list_head mci_list;
  190. void *key;
  191. struct ddb_link *link;
  192. struct completion completion;
  193. struct device *dev;
  194. struct mutex tuner_lock; /* concurrent tuner access lock */
  195. struct mutex mci_lock; /* concurrent MCI access lock */
  196. int count;
  197. int type;
  198. };
  199. struct mci {
  200. struct mci_base *base;
  201. struct dvb_frontend fe;
  202. int nr;
  203. int demod;
  204. int tuner;
  205. };
  206. struct mci_cfg {
  207. int type;
  208. struct dvb_frontend_ops *fe_ops;
  209. u32 base_size;
  210. u32 state_size;
  211. int (*init)(struct mci *mci);
  212. int (*base_init)(struct mci_base *mci_base);
  213. int (*set_input)(struct dvb_frontend *fe, int input);
  214. };
  215. /* defined in ddbridge-sx8.c */
  216. extern const struct mci_cfg ddb_max_sx8_cfg;
  217. int ddb_mci_cmd(struct mci *state, struct mci_command *command,
  218. struct mci_result *result);
  219. int ddb_mci_config(struct mci *state, u32 config);
  220. struct dvb_frontend
  221. *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
  222. int (**fn_set_input)(struct dvb_frontend *fe, int input));
  223. #endif /* _DDBRIDGE_MCI_H_ */