ddbridge-hw.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ddbridge-hw.c: Digital Devices bridge hardware maps
  4. *
  5. * Copyright (C) 2010-2017 Digital Devices GmbH
  6. * Ralph Metzler <[email protected]>
  7. * Marcus Metzler <[email protected]>
  8. */
  9. #include "ddbridge.h"
  10. #include "ddbridge-hw.h"
  11. /******************************************************************************/
  12. static const struct ddb_regset octopus_input = {
  13. .base = 0x200,
  14. .num = 0x08,
  15. .size = 0x10,
  16. };
  17. static const struct ddb_regset octopus_output = {
  18. .base = 0x280,
  19. .num = 0x08,
  20. .size = 0x10,
  21. };
  22. static const struct ddb_regset octopus_idma = {
  23. .base = 0x300,
  24. .num = 0x08,
  25. .size = 0x10,
  26. };
  27. static const struct ddb_regset octopus_idma_buf = {
  28. .base = 0x2000,
  29. .num = 0x08,
  30. .size = 0x100,
  31. };
  32. static const struct ddb_regset octopus_odma = {
  33. .base = 0x380,
  34. .num = 0x04,
  35. .size = 0x10,
  36. };
  37. static const struct ddb_regset octopus_odma_buf = {
  38. .base = 0x2800,
  39. .num = 0x04,
  40. .size = 0x100,
  41. };
  42. static const struct ddb_regset octopus_i2c = {
  43. .base = 0x80,
  44. .num = 0x04,
  45. .size = 0x20,
  46. };
  47. static const struct ddb_regset octopus_i2c_buf = {
  48. .base = 0x1000,
  49. .num = 0x04,
  50. .size = 0x200,
  51. };
  52. /****************************************************************************/
  53. static const struct ddb_regmap octopus_map = {
  54. .irq_base_i2c = 0,
  55. .irq_base_idma = 8,
  56. .irq_base_odma = 16,
  57. .i2c = &octopus_i2c,
  58. .i2c_buf = &octopus_i2c_buf,
  59. .idma = &octopus_idma,
  60. .idma_buf = &octopus_idma_buf,
  61. .odma = &octopus_odma,
  62. .odma_buf = &octopus_odma_buf,
  63. .input = &octopus_input,
  64. .output = &octopus_output,
  65. };
  66. /****************************************************************************/
  67. static const struct ddb_info ddb_none = {
  68. .type = DDB_NONE,
  69. .name = "unknown Digital Devices PCIe card, install newer driver",
  70. .regmap = &octopus_map,
  71. };
  72. static const struct ddb_info ddb_octopus = {
  73. .type = DDB_OCTOPUS,
  74. .name = "Digital Devices Octopus DVB adapter",
  75. .regmap = &octopus_map,
  76. .port_num = 4,
  77. .i2c_mask = 0x0f,
  78. };
  79. static const struct ddb_info ddb_octopusv3 = {
  80. .type = DDB_OCTOPUS,
  81. .name = "Digital Devices Octopus V3 DVB adapter",
  82. .regmap = &octopus_map,
  83. .port_num = 4,
  84. .i2c_mask = 0x0f,
  85. };
  86. static const struct ddb_info ddb_octopus_le = {
  87. .type = DDB_OCTOPUS,
  88. .name = "Digital Devices Octopus LE DVB adapter",
  89. .regmap = &octopus_map,
  90. .port_num = 2,
  91. .i2c_mask = 0x03,
  92. };
  93. static const struct ddb_info ddb_octopus_oem = {
  94. .type = DDB_OCTOPUS,
  95. .name = "Digital Devices Octopus OEM",
  96. .regmap = &octopus_map,
  97. .port_num = 4,
  98. .i2c_mask = 0x0f,
  99. .led_num = 1,
  100. .fan_num = 1,
  101. .temp_num = 1,
  102. .temp_bus = 0,
  103. };
  104. static const struct ddb_info ddb_octopus_mini = {
  105. .type = DDB_OCTOPUS,
  106. .name = "Digital Devices Octopus Mini",
  107. .regmap = &octopus_map,
  108. .port_num = 4,
  109. .i2c_mask = 0x0f,
  110. };
  111. static const struct ddb_info ddb_v6 = {
  112. .type = DDB_OCTOPUS,
  113. .name = "Digital Devices Cine S2 V6 DVB adapter",
  114. .regmap = &octopus_map,
  115. .port_num = 3,
  116. .i2c_mask = 0x07,
  117. };
  118. static const struct ddb_info ddb_v6_5 = {
  119. .type = DDB_OCTOPUS,
  120. .name = "Digital Devices Cine S2 V6.5 DVB adapter",
  121. .regmap = &octopus_map,
  122. .port_num = 4,
  123. .i2c_mask = 0x0f,
  124. };
  125. static const struct ddb_info ddb_v7 = {
  126. .type = DDB_OCTOPUS,
  127. .name = "Digital Devices Cine S2 V7 DVB adapter",
  128. .regmap = &octopus_map,
  129. .port_num = 4,
  130. .i2c_mask = 0x0f,
  131. .board_control = 2,
  132. .board_control_2 = 4,
  133. .ts_quirks = TS_QUIRK_REVERSED,
  134. };
  135. static const struct ddb_info ddb_v7a = {
  136. .type = DDB_OCTOPUS,
  137. .name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
  138. .regmap = &octopus_map,
  139. .port_num = 4,
  140. .i2c_mask = 0x0f,
  141. .board_control = 2,
  142. .board_control_2 = 4,
  143. .ts_quirks = TS_QUIRK_REVERSED,
  144. };
  145. static const struct ddb_info ddb_ctv7 = {
  146. .type = DDB_OCTOPUS,
  147. .name = "Digital Devices Cine CT V7 DVB adapter",
  148. .regmap = &octopus_map,
  149. .port_num = 4,
  150. .i2c_mask = 0x0f,
  151. .board_control = 3,
  152. .board_control_2 = 4,
  153. };
  154. static const struct ddb_info ddb_satixs2v3 = {
  155. .type = DDB_OCTOPUS,
  156. .name = "Mystique SaTiX-S2 V3 DVB adapter",
  157. .regmap = &octopus_map,
  158. .port_num = 3,
  159. .i2c_mask = 0x07,
  160. };
  161. static const struct ddb_info ddb_ci = {
  162. .type = DDB_OCTOPUS_CI,
  163. .name = "Digital Devices Octopus CI",
  164. .regmap = &octopus_map,
  165. .port_num = 4,
  166. .i2c_mask = 0x03,
  167. };
  168. static const struct ddb_info ddb_cis = {
  169. .type = DDB_OCTOPUS_CI,
  170. .name = "Digital Devices Octopus CI single",
  171. .regmap = &octopus_map,
  172. .port_num = 3,
  173. .i2c_mask = 0x03,
  174. };
  175. static const struct ddb_info ddb_ci_s2_pro = {
  176. .type = DDB_OCTOPUS_CI,
  177. .name = "Digital Devices Octopus CI S2 Pro",
  178. .regmap = &octopus_map,
  179. .port_num = 4,
  180. .i2c_mask = 0x01,
  181. .board_control = 2,
  182. .board_control_2 = 4,
  183. };
  184. static const struct ddb_info ddb_ci_s2_pro_a = {
  185. .type = DDB_OCTOPUS_CI,
  186. .name = "Digital Devices Octopus CI S2 Pro Advanced",
  187. .regmap = &octopus_map,
  188. .port_num = 4,
  189. .i2c_mask = 0x01,
  190. .board_control = 2,
  191. .board_control_2 = 4,
  192. };
  193. static const struct ddb_info ddb_dvbct = {
  194. .type = DDB_OCTOPUS,
  195. .name = "Digital Devices DVBCT V6.1 DVB adapter",
  196. .regmap = &octopus_map,
  197. .port_num = 3,
  198. .i2c_mask = 0x07,
  199. };
  200. /****************************************************************************/
  201. static const struct ddb_info ddb_ct2_8 = {
  202. .type = DDB_OCTOPUS_MAX_CT,
  203. .name = "Digital Devices MAX A8 CT2",
  204. .regmap = &octopus_map,
  205. .port_num = 4,
  206. .i2c_mask = 0x0f,
  207. .board_control = 0x0ff,
  208. .board_control_2 = 0xf00,
  209. .ts_quirks = TS_QUIRK_SERIAL,
  210. .tempmon_irq = 24,
  211. };
  212. static const struct ddb_info ddb_c2t2_8 = {
  213. .type = DDB_OCTOPUS_MAX_CT,
  214. .name = "Digital Devices MAX A8 C2T2",
  215. .regmap = &octopus_map,
  216. .port_num = 4,
  217. .i2c_mask = 0x0f,
  218. .board_control = 0x0ff,
  219. .board_control_2 = 0xf00,
  220. .ts_quirks = TS_QUIRK_SERIAL,
  221. .tempmon_irq = 24,
  222. };
  223. static const struct ddb_info ddb_isdbt_8 = {
  224. .type = DDB_OCTOPUS_MAX_CT,
  225. .name = "Digital Devices MAX A8 ISDBT",
  226. .regmap = &octopus_map,
  227. .port_num = 4,
  228. .i2c_mask = 0x0f,
  229. .board_control = 0x0ff,
  230. .board_control_2 = 0xf00,
  231. .ts_quirks = TS_QUIRK_SERIAL,
  232. .tempmon_irq = 24,
  233. };
  234. static const struct ddb_info ddb_c2t2i_v0_8 = {
  235. .type = DDB_OCTOPUS_MAX_CT,
  236. .name = "Digital Devices MAX A8 C2T2I V0",
  237. .regmap = &octopus_map,
  238. .port_num = 4,
  239. .i2c_mask = 0x0f,
  240. .board_control = 0x0ff,
  241. .board_control_2 = 0xf00,
  242. .ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
  243. .tempmon_irq = 24,
  244. };
  245. static const struct ddb_info ddb_c2t2i_8 = {
  246. .type = DDB_OCTOPUS_MAX_CT,
  247. .name = "Digital Devices MAX A8 C2T2I",
  248. .regmap = &octopus_map,
  249. .port_num = 4,
  250. .i2c_mask = 0x0f,
  251. .board_control = 0x0ff,
  252. .board_control_2 = 0xf00,
  253. .ts_quirks = TS_QUIRK_SERIAL,
  254. .tempmon_irq = 24,
  255. };
  256. /****************************************************************************/
  257. static const struct ddb_info ddb_s2_48 = {
  258. .type = DDB_OCTOPUS_MAX,
  259. .name = "Digital Devices MAX S8 4/8",
  260. .regmap = &octopus_map,
  261. .port_num = 4,
  262. .i2c_mask = 0x01,
  263. .board_control = 1,
  264. .tempmon_irq = 24,
  265. };
  266. static const struct ddb_info ddb_s2x_48 = {
  267. .type = DDB_OCTOPUS_MCI,
  268. .name = "Digital Devices MAX SX8",
  269. .regmap = &octopus_map,
  270. .port_num = 4,
  271. .i2c_mask = 0x00,
  272. .tempmon_irq = 24,
  273. .mci_ports = 4,
  274. .mci_type = 0,
  275. };
  276. /****************************************************************************/
  277. /****************************************************************************/
  278. /****************************************************************************/
  279. #define DDB_DEVID(_device, _subdevice, _info) { \
  280. .vendor = DDVID, \
  281. .device = _device, \
  282. .subvendor = DDVID, \
  283. .subdevice = _subdevice, \
  284. .info = &_info }
  285. static const struct ddb_device_id ddb_device_ids[] = {
  286. /* PCIe devices */
  287. DDB_DEVID(0x0002, 0x0001, ddb_octopus),
  288. DDB_DEVID(0x0003, 0x0001, ddb_octopus),
  289. DDB_DEVID(0x0005, 0x0004, ddb_octopusv3),
  290. DDB_DEVID(0x0003, 0x0002, ddb_octopus_le),
  291. DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem),
  292. DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini),
  293. DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini),
  294. DDB_DEVID(0x0003, 0x0020, ddb_v6),
  295. DDB_DEVID(0x0003, 0x0021, ddb_v6_5),
  296. DDB_DEVID(0x0006, 0x0022, ddb_v7),
  297. DDB_DEVID(0x0006, 0x0024, ddb_v7a),
  298. DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
  299. DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
  300. DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
  301. DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
  302. DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
  303. DDB_DEVID(0x0007, 0x0023, ddb_s2_48),
  304. DDB_DEVID(0x0008, 0x0034, ddb_ct2_8),
  305. DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8),
  306. DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8),
  307. DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8),
  308. DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8),
  309. DDB_DEVID(0x0009, 0x0025, ddb_s2x_48),
  310. DDB_DEVID(0x0006, 0x0039, ddb_ctv7),
  311. DDB_DEVID(0x0011, 0x0040, ddb_ci),
  312. DDB_DEVID(0x0011, 0x0041, ddb_cis),
  313. DDB_DEVID(0x0012, 0x0042, ddb_ci),
  314. DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro),
  315. DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
  316. };
  317. /****************************************************************************/
  318. const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
  319. u16 subvendor, u16 subdevice)
  320. {
  321. int i;
  322. for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
  323. const struct ddb_device_id *id = &ddb_device_ids[i];
  324. if (vendor == id->vendor &&
  325. device == id->device &&
  326. subvendor == id->subvendor &&
  327. (subdevice == id->subdevice ||
  328. id->subdevice == 0xffff))
  329. return id->info;
  330. }
  331. return &ddb_none;
  332. }