cx23885.h 20 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Driver for the Conexant CX23885 PCIe bridge
  4. *
  5. * Copyright (c) 2006 Steven Toth <[email protected]>
  6. */
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/pci.h>
  9. #include <linux/i2c.h>
  10. #include <linux/kdev_t.h>
  11. #include <linux/slab.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-fh.h>
  14. #include <media/v4l2-ctrls.h>
  15. #include <media/tuner.h>
  16. #include <media/tveeprom.h>
  17. #include <media/videobuf2-dma-sg.h>
  18. #include <media/videobuf2-dvb.h>
  19. #include <media/rc-core.h>
  20. #include "cx23885-reg.h"
  21. #include "media/drv-intf/cx2341x.h"
  22. #include <linux/mutex.h>
  23. #define CX23885_VERSION "0.0.4"
  24. #define UNSET (-1U)
  25. #define CX23885_MAXBOARDS 8
  26. /* Max number of inputs by card */
  27. #define MAX_CX23885_INPUT 8
  28. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  29. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  30. #define CX23885_BOARD_NOAUTO UNSET
  31. #define CX23885_BOARD_UNKNOWN 0
  32. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  33. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  34. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  35. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  36. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  37. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  38. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  39. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  40. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  41. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  42. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  43. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  44. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  45. #define CX23885_BOARD_TBS_6920 14
  46. #define CX23885_BOARD_TEVII_S470 15
  47. #define CX23885_BOARD_DVBWORLD_2005 16
  48. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
  50. #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
  51. #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
  52. #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
  53. #define CX23885_BOARD_MYGICA_X8506 22
  54. #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
  55. #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
  56. #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
  57. #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
  58. #define CX23885_BOARD_MYGICA_X8558PRO 27
  59. #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
  60. #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
  61. #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
  62. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
  63. #define CX23885_BOARD_MPX885 32
  64. #define CX23885_BOARD_MYGICA_X8507 33
  65. #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
  66. #define CX23885_BOARD_TEVII_S471 35
  67. #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
  68. #define CX23885_BOARD_PROF_8000 37
  69. #define CX23885_BOARD_HAUPPAUGE_HVR4400 38
  70. #define CX23885_BOARD_AVERMEDIA_HC81R 39
  71. #define CX23885_BOARD_TBS_6981 40
  72. #define CX23885_BOARD_TBS_6980 41
  73. #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
  74. #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
  75. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
  76. #define CX23885_BOARD_DVBSKY_T9580 45
  77. #define CX23885_BOARD_DVBSKY_T980C 46
  78. #define CX23885_BOARD_DVBSKY_S950C 47
  79. #define CX23885_BOARD_TT_CT2_4500_CI 48
  80. #define CX23885_BOARD_DVBSKY_S950 49
  81. #define CX23885_BOARD_DVBSKY_S952 50
  82. #define CX23885_BOARD_DVBSKY_T982 51
  83. #define CX23885_BOARD_HAUPPAUGE_HVR5525 52
  84. #define CX23885_BOARD_HAUPPAUGE_STARBURST 53
  85. #define CX23885_BOARD_VIEWCAST_260E 54
  86. #define CX23885_BOARD_VIEWCAST_460E 55
  87. #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56
  88. #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57
  89. #define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58
  90. #define CX23885_BOARD_HAUPPAUGE_STARBURST2 59
  91. #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60
  92. #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61
  93. #define CX23885_BOARD_AVERMEDIA_CE310B 62
  94. #define GPIO_0 0x00000001
  95. #define GPIO_1 0x00000002
  96. #define GPIO_2 0x00000004
  97. #define GPIO_3 0x00000008
  98. #define GPIO_4 0x00000010
  99. #define GPIO_5 0x00000020
  100. #define GPIO_6 0x00000040
  101. #define GPIO_7 0x00000080
  102. #define GPIO_8 0x00000100
  103. #define GPIO_9 0x00000200
  104. #define GPIO_10 0x00000400
  105. #define GPIO_11 0x00000800
  106. #define GPIO_12 0x00001000
  107. #define GPIO_13 0x00002000
  108. #define GPIO_14 0x00004000
  109. #define GPIO_15 0x00008000
  110. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  111. #define CX23885_NORMS (\
  112. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  113. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  114. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  115. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  116. struct cx23885_fmt {
  117. u32 fourcc; /* v4l2 format id */
  118. int depth;
  119. int flags;
  120. u32 cxformat;
  121. };
  122. struct cx23885_tvnorm {
  123. char *name;
  124. v4l2_std_id id;
  125. u32 cxiformat;
  126. u32 cxoformat;
  127. };
  128. enum cx23885_itype {
  129. CX23885_VMUX_COMPOSITE1 = 1,
  130. CX23885_VMUX_COMPOSITE2,
  131. CX23885_VMUX_COMPOSITE3,
  132. CX23885_VMUX_COMPOSITE4,
  133. CX23885_VMUX_SVIDEO,
  134. CX23885_VMUX_COMPONENT,
  135. CX23885_VMUX_TELEVISION,
  136. CX23885_VMUX_CABLE,
  137. CX23885_VMUX_DVB,
  138. CX23885_VMUX_DEBUG,
  139. CX23885_RADIO,
  140. };
  141. enum cx23885_src_sel_type {
  142. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  143. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  144. };
  145. struct cx23885_riscmem {
  146. unsigned int size;
  147. __le32 *cpu;
  148. __le32 *jmp;
  149. dma_addr_t dma;
  150. };
  151. /* buffer for one video frame */
  152. struct cx23885_buffer {
  153. /* common v4l buffer stuff -- must be first */
  154. struct vb2_v4l2_buffer vb;
  155. struct list_head queue;
  156. /* cx23885 specific */
  157. unsigned int bpl;
  158. struct cx23885_riscmem risc;
  159. struct cx23885_fmt *fmt;
  160. u32 count;
  161. };
  162. struct cx23885_input {
  163. enum cx23885_itype type;
  164. unsigned int vmux;
  165. unsigned int amux;
  166. u32 gpio0, gpio1, gpio2, gpio3;
  167. };
  168. typedef enum {
  169. CX23885_MPEG_UNDEFINED = 0,
  170. CX23885_MPEG_DVB,
  171. CX23885_ANALOG_VIDEO,
  172. CX23885_MPEG_ENCODER,
  173. } port_t;
  174. struct cx23885_board {
  175. char *name;
  176. port_t porta, portb, portc;
  177. int num_fds_portb, num_fds_portc;
  178. unsigned int tuner_type;
  179. unsigned int radio_type;
  180. unsigned char tuner_addr;
  181. unsigned char radio_addr;
  182. unsigned int tuner_bus;
  183. /* Vendors can and do run the PCIe bridge at different
  184. * clock rates, driven physically by crystals on the PCBs.
  185. * The core has to accommodate this. This allows the user
  186. * to add new boards with new frequencys. The value is
  187. * expressed in Hz.
  188. *
  189. * The core framework will default this value based on
  190. * current designs, but it can vary.
  191. */
  192. u32 clk_freq;
  193. struct cx23885_input input[MAX_CX23885_INPUT];
  194. int ci_type; /* for NetUP */
  195. /* Force bottom field first during DMA (888 workaround) */
  196. u32 force_bff;
  197. };
  198. struct cx23885_subid {
  199. u16 subvendor;
  200. u16 subdevice;
  201. u32 card;
  202. };
  203. struct cx23885_i2c {
  204. struct cx23885_dev *dev;
  205. int nr;
  206. /* i2c i/o */
  207. struct i2c_adapter i2c_adap;
  208. struct i2c_client i2c_client;
  209. u32 i2c_rc;
  210. /* 885 registers used for raw address */
  211. u32 i2c_period;
  212. u32 reg_ctrl;
  213. u32 reg_stat;
  214. u32 reg_addr;
  215. u32 reg_rdata;
  216. u32 reg_wdata;
  217. };
  218. struct cx23885_dmaqueue {
  219. struct list_head active;
  220. u32 count;
  221. };
  222. struct cx23885_tsport {
  223. struct cx23885_dev *dev;
  224. unsigned nr;
  225. int sram_chno;
  226. struct vb2_dvb_frontends frontends;
  227. /* dma queues */
  228. struct cx23885_dmaqueue mpegq;
  229. u32 ts_packet_size;
  230. u32 ts_packet_count;
  231. int width;
  232. int height;
  233. spinlock_t slock;
  234. /* registers */
  235. u32 reg_gpcnt;
  236. u32 reg_gpcnt_ctl;
  237. u32 reg_dma_ctl;
  238. u32 reg_lngth;
  239. u32 reg_hw_sop_ctrl;
  240. u32 reg_gen_ctrl;
  241. u32 reg_bd_pkt_status;
  242. u32 reg_sop_status;
  243. u32 reg_fifo_ovfl_stat;
  244. u32 reg_vld_misc;
  245. u32 reg_ts_clk_en;
  246. u32 reg_ts_int_msk;
  247. u32 reg_ts_int_stat;
  248. u32 reg_src_sel;
  249. /* Default register vals */
  250. int pci_irqmask;
  251. u32 dma_ctl_val;
  252. u32 ts_int_msk_val;
  253. u32 gen_ctrl_val;
  254. u32 ts_clk_en_val;
  255. u32 src_sel_val;
  256. u32 vld_misc_val;
  257. u32 hw_sop_ctrl_val;
  258. /* Allow a single tsport to have multiple frontends */
  259. u32 num_frontends;
  260. void (*gate_ctrl)(struct cx23885_tsport *port, int open);
  261. void *port_priv;
  262. /* Workaround for a temp dvb_frontend that the tuner can attached to */
  263. struct dvb_frontend analog_fe;
  264. struct i2c_client *i2c_client_demod;
  265. struct i2c_client *i2c_client_tuner;
  266. struct i2c_client *i2c_client_sec;
  267. struct i2c_client *i2c_client_ci;
  268. int (*set_frontend)(struct dvb_frontend *fe);
  269. int (*fe_set_voltage)(struct dvb_frontend *fe,
  270. enum fe_sec_voltage voltage);
  271. };
  272. struct cx23885_kernel_ir {
  273. struct cx23885_dev *cx;
  274. char *name;
  275. char *phys;
  276. struct rc_dev *rc;
  277. };
  278. struct cx23885_audio_buffer {
  279. unsigned int bpl;
  280. struct cx23885_riscmem risc;
  281. void *vaddr;
  282. struct scatterlist *sglist;
  283. int sglen;
  284. unsigned long nr_pages;
  285. };
  286. struct cx23885_audio_dev {
  287. struct cx23885_dev *dev;
  288. struct pci_dev *pci;
  289. struct snd_card *card;
  290. spinlock_t lock;
  291. atomic_t count;
  292. unsigned int dma_size;
  293. unsigned int period_size;
  294. unsigned int num_periods;
  295. struct cx23885_audio_buffer *buf;
  296. struct snd_pcm_substream *substream;
  297. };
  298. struct cx23885_dev {
  299. atomic_t refcount;
  300. struct v4l2_device v4l2_dev;
  301. struct v4l2_ctrl_handler ctrl_handler;
  302. /* pci stuff */
  303. struct pci_dev *pci;
  304. unsigned char pci_rev, pci_lat;
  305. int pci_bus, pci_slot;
  306. u32 __iomem *lmmio;
  307. u8 __iomem *bmmio;
  308. int pci_irqmask;
  309. spinlock_t pci_irqmask_lock; /* protects mask reg too */
  310. int hwrevision;
  311. /* This valud is board specific and is used to configure the
  312. * AV core so we see nice clean and stable video and audio. */
  313. u32 clk_freq;
  314. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  315. struct cx23885_i2c i2c_bus[3];
  316. int nr;
  317. struct mutex lock;
  318. struct mutex gpio_lock;
  319. /* board details */
  320. unsigned int board;
  321. char name[32];
  322. struct cx23885_tsport ts1, ts2;
  323. /* sram configuration */
  324. struct sram_channel *sram_channels;
  325. enum {
  326. CX23885_BRIDGE_UNDEFINED = 0,
  327. CX23885_BRIDGE_885 = 885,
  328. CX23885_BRIDGE_887 = 887,
  329. CX23885_BRIDGE_888 = 888,
  330. } bridge;
  331. /* Analog video */
  332. unsigned int input;
  333. unsigned int audinput; /* Selectable audio input */
  334. u32 tvaudio;
  335. v4l2_std_id tvnorm;
  336. unsigned int tuner_type;
  337. unsigned char tuner_addr;
  338. unsigned int tuner_bus;
  339. unsigned int radio_type;
  340. unsigned char radio_addr;
  341. struct v4l2_subdev *sd_cx25840;
  342. struct work_struct cx25840_work;
  343. /* Infrared */
  344. struct v4l2_subdev *sd_ir;
  345. struct work_struct ir_rx_work;
  346. unsigned long ir_rx_notifications;
  347. struct work_struct ir_tx_work;
  348. unsigned long ir_tx_notifications;
  349. struct cx23885_kernel_ir *kernel_ir;
  350. atomic_t ir_input_stopping;
  351. /* V4l */
  352. u32 freq;
  353. struct video_device *video_dev;
  354. struct video_device *vbi_dev;
  355. /* video capture */
  356. struct cx23885_fmt *fmt;
  357. unsigned int width, height;
  358. unsigned field;
  359. struct cx23885_dmaqueue vidq;
  360. struct vb2_queue vb2_vidq;
  361. struct cx23885_dmaqueue vbiq;
  362. struct vb2_queue vb2_vbiq;
  363. spinlock_t slock;
  364. /* MPEG Encoder ONLY settings */
  365. u32 cx23417_mailbox;
  366. struct cx2341x_handler cxhdl;
  367. struct video_device *v4l_device;
  368. struct vb2_queue vb2_mpegq;
  369. struct cx23885_tvnorm encodernorm;
  370. /* Analog raw audio */
  371. struct cx23885_audio_dev *audio_dev;
  372. /* Does the system require periodic DMA resets? */
  373. unsigned int need_dma_reset:1;
  374. };
  375. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  376. {
  377. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  378. }
  379. #define call_all(dev, o, f, args...) \
  380. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  381. #define CX23885_HW_888_IR (1 << 0)
  382. #define CX23885_HW_AV_CORE (1 << 1)
  383. #define call_hw(dev, grpid, o, f, args...) \
  384. v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
  385. extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
  386. #define SRAM_CH01 0 /* Video A */
  387. #define SRAM_CH02 1 /* VBI A */
  388. #define SRAM_CH03 2 /* Video B */
  389. #define SRAM_CH04 3 /* Transport via B */
  390. #define SRAM_CH05 4 /* VBI B */
  391. #define SRAM_CH06 5 /* Video C */
  392. #define SRAM_CH07 6 /* Transport via C */
  393. #define SRAM_CH08 7 /* Audio Internal A */
  394. #define SRAM_CH09 8 /* Audio Internal B */
  395. #define SRAM_CH10 9 /* Audio External */
  396. #define SRAM_CH11 10 /* COMB_3D_N */
  397. #define SRAM_CH12 11 /* Comb 3D N1 */
  398. #define SRAM_CH13 12 /* Comb 3D N2 */
  399. #define SRAM_CH14 13 /* MOE Vid */
  400. #define SRAM_CH15 14 /* MOE RSLT */
  401. struct sram_channel {
  402. char *name;
  403. u32 cmds_start;
  404. u32 ctrl_start;
  405. u32 cdt;
  406. u32 fifo_start;
  407. u32 fifo_size;
  408. u32 ptr1_reg;
  409. u32 ptr2_reg;
  410. u32 cnt1_reg;
  411. u32 cnt2_reg;
  412. u32 jumponly;
  413. };
  414. /* ----------------------------------------------------------- */
  415. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  416. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  417. #define cx_andor(reg, mask, value) \
  418. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  419. ((value) & (mask)), dev->lmmio+((reg)>>2))
  420. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  421. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  422. /* ----------------------------------------------------------- */
  423. /* cx23885-core.c */
  424. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  425. struct sram_channel *ch,
  426. unsigned int bpl, u32 risc);
  427. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  428. struct sram_channel *ch);
  429. extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
  430. struct scatterlist *sglist,
  431. unsigned int top_offset, unsigned int bottom_offset,
  432. unsigned int bpl, unsigned int padding, unsigned int lines);
  433. extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
  434. struct cx23885_riscmem *risc, struct scatterlist *sglist,
  435. unsigned int top_offset, unsigned int bottom_offset,
  436. unsigned int bpl, unsigned int padding, unsigned int lines);
  437. int cx23885_start_dma(struct cx23885_tsport *port,
  438. struct cx23885_dmaqueue *q,
  439. struct cx23885_buffer *buf);
  440. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  441. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  442. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  443. extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
  444. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  445. int asoutput);
  446. extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
  447. extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
  448. extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
  449. extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
  450. /* ----------------------------------------------------------- */
  451. /* cx23885-cards.c */
  452. extern struct cx23885_board cx23885_boards[];
  453. extern const unsigned int cx23885_bcount;
  454. extern struct cx23885_subid cx23885_subids[];
  455. extern const unsigned int cx23885_idcount;
  456. extern int cx23885_tuner_callback(void *priv, int component,
  457. int command, int arg);
  458. extern void cx23885_card_list(struct cx23885_dev *dev);
  459. extern int cx23885_ir_init(struct cx23885_dev *dev);
  460. extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
  461. extern void cx23885_ir_fini(struct cx23885_dev *dev);
  462. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  463. extern void cx23885_card_setup(struct cx23885_dev *dev);
  464. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  465. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  466. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  467. extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
  468. struct cx23885_tsport *port);
  469. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  470. struct cx23885_buffer *buf);
  471. extern void cx23885_free_buffer(struct cx23885_dev *dev,
  472. struct cx23885_buffer *buf);
  473. /* ----------------------------------------------------------- */
  474. /* cx23885-video.c */
  475. /* Video */
  476. extern int cx23885_video_register(struct cx23885_dev *dev);
  477. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  478. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  479. extern void cx23885_video_wakeup(struct cx23885_dev *dev,
  480. struct cx23885_dmaqueue *q, u32 count);
  481. int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
  482. int cx23885_set_input(struct file *file, void *priv, unsigned int i);
  483. int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
  484. int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
  485. int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
  486. /* ----------------------------------------------------------- */
  487. /* cx23885-vbi.c */
  488. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  489. struct v4l2_format *f);
  490. extern void cx23885_vbi_timeout(unsigned long data);
  491. extern const struct vb2_ops cx23885_vbi_qops;
  492. extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
  493. /* cx23885-i2c.c */
  494. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  495. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  496. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  497. /* ----------------------------------------------------------- */
  498. /* cx23885-417.c */
  499. extern int cx23885_417_register(struct cx23885_dev *dev);
  500. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  501. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  502. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  503. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  504. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  505. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  506. extern int mc417_register_read(struct cx23885_dev *dev,
  507. u16 address, u32 *value);
  508. extern int mc417_register_write(struct cx23885_dev *dev,
  509. u16 address, u32 value);
  510. extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
  511. extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
  512. extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
  513. /* ----------------------------------------------------------- */
  514. /* cx23885-alsa.c */
  515. extern struct cx23885_audio_dev *cx23885_audio_register(
  516. struct cx23885_dev *dev);
  517. extern void cx23885_audio_unregister(struct cx23885_dev *dev);
  518. extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
  519. extern int cx23885_risc_databuffer(struct pci_dev *pci,
  520. struct cx23885_riscmem *risc,
  521. struct scatterlist *sglist,
  522. unsigned int bpl,
  523. unsigned int lines,
  524. unsigned int lpi);
  525. /* ----------------------------------------------------------- */
  526. /* tv norms */
  527. static inline unsigned int norm_maxh(v4l2_std_id norm)
  528. {
  529. return (norm & V4L2_STD_525_60) ? 480 : 576;
  530. }