cimax2.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * cimax2.c
  4. *
  5. * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
  6. *
  7. * Copyright (C) 2009 NetUP Inc.
  8. * Copyright (C) 2009 Igor M. Liplianin <[email protected]>
  9. * Copyright (C) 2009 Abylay Ospan <[email protected]>
  10. */
  11. #include "cx23885.h"
  12. #include "cimax2.h"
  13. #include <media/dvb_ca_en50221.h>
  14. /* Max transfer size done by I2C transfer functions */
  15. #define MAX_XFER_SIZE 64
  16. /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
  17. bits 31-16
  18. +-----------+
  19. | Reserved |
  20. +-----------+
  21. bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
  22. +-------+-------+-------+-------+-------+-------+-------+-------+
  23. | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
  24. +-------+-------+-------+-------+-------+-------+-------+-------+
  25. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
  26. +-------+-------+-------+-------+-------+-------+-------+-------+
  27. | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
  28. +-------+-------+-------+-------+-------+-------+-------+-------+
  29. ***/
  30. /* MC417 */
  31. #define NETUP_DATA 0x000000ff
  32. #define NETUP_WR 0x00008000
  33. #define NETUP_RD 0x00004000
  34. #define NETUP_ACK 0x00001000
  35. #define NETUP_ADHI 0x00000800
  36. #define NETUP_ADLO 0x00000400
  37. #define NETUP_CS1 0x00000200
  38. #define NETUP_CS0 0x00000100
  39. #define NETUP_EN_ALL 0x00001000
  40. #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
  41. #define NETUP_CI_CTL 0x04
  42. #define NETUP_CI_RD 1
  43. #define NETUP_IRQ_DETAM 0x1
  44. #define NETUP_IRQ_IRQAM 0x4
  45. static unsigned int ci_dbg;
  46. module_param(ci_dbg, int, 0644);
  47. MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  48. static unsigned int ci_irq_enable;
  49. module_param(ci_irq_enable, int, 0644);
  50. MODULE_PARM_DESC(ci_irq_enable, "Enable IRQ from CAM");
  51. #define ci_dbg_print(fmt, args...) \
  52. do { \
  53. if (ci_dbg) \
  54. printk(KERN_DEBUG pr_fmt("%s: " fmt), \
  55. __func__, ##args); \
  56. } while (0)
  57. #define ci_irq_flags() (ci_irq_enable ? NETUP_IRQ_IRQAM : 0)
  58. /* stores all private variables for communication with CI */
  59. struct netup_ci_state {
  60. struct dvb_ca_en50221 ca;
  61. struct mutex ca_mutex;
  62. struct i2c_adapter *i2c_adap;
  63. u8 ci_i2c_addr;
  64. int status;
  65. struct work_struct work;
  66. void *priv;
  67. u8 current_irq_mode;
  68. int current_ci_flag;
  69. unsigned long next_status_checked_time;
  70. };
  71. static int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  72. u8 *buf, int len)
  73. {
  74. int ret;
  75. struct i2c_msg msg[] = {
  76. {
  77. .addr = addr,
  78. .flags = 0,
  79. .buf = &reg,
  80. .len = 1
  81. }, {
  82. .addr = addr,
  83. .flags = I2C_M_RD,
  84. .buf = buf,
  85. .len = len
  86. }
  87. };
  88. ret = i2c_transfer(i2c_adap, msg, 2);
  89. if (ret != 2) {
  90. ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
  91. __func__, reg, ret);
  92. return -1;
  93. }
  94. ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
  95. __func__, addr, reg, buf[0]);
  96. return 0;
  97. }
  98. static int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  99. u8 *buf, int len)
  100. {
  101. int ret;
  102. u8 buffer[MAX_XFER_SIZE];
  103. struct i2c_msg msg = {
  104. .addr = addr,
  105. .flags = 0,
  106. .buf = &buffer[0],
  107. .len = len + 1
  108. };
  109. if (1 + len > sizeof(buffer)) {
  110. pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
  111. KBUILD_MODNAME, reg, len);
  112. return -EINVAL;
  113. }
  114. buffer[0] = reg;
  115. memcpy(&buffer[1], buf, len);
  116. ret = i2c_transfer(i2c_adap, &msg, 1);
  117. if (ret != 1) {
  118. ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
  119. __func__, reg, ret);
  120. return -1;
  121. }
  122. return 0;
  123. }
  124. static int netup_ci_get_mem(struct cx23885_dev *dev)
  125. {
  126. int mem;
  127. unsigned long timeout = jiffies + msecs_to_jiffies(1);
  128. for (;;) {
  129. mem = cx_read(MC417_RWD);
  130. if ((mem & NETUP_ACK) == 0)
  131. break;
  132. if (time_after(jiffies, timeout))
  133. break;
  134. udelay(1);
  135. }
  136. cx_set(MC417_RWD, NETUP_CTRL_OFF);
  137. return mem & 0xff;
  138. }
  139. static int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
  140. u8 flag, u8 read, int addr, u8 data)
  141. {
  142. struct netup_ci_state *state = en50221->data;
  143. struct cx23885_tsport *port = state->priv;
  144. struct cx23885_dev *dev = port->dev;
  145. u8 store;
  146. int mem;
  147. int ret;
  148. if (0 != slot)
  149. return -EINVAL;
  150. if (state->current_ci_flag != flag) {
  151. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  152. 0, &store, 1);
  153. if (ret != 0)
  154. return ret;
  155. store &= ~0x0c;
  156. store |= flag;
  157. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  158. 0, &store, 1);
  159. if (ret != 0)
  160. return ret;
  161. }
  162. state->current_ci_flag = flag;
  163. mutex_lock(&dev->gpio_lock);
  164. /* write addr */
  165. cx_write(MC417_OEN, NETUP_EN_ALL);
  166. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  167. NETUP_ADLO | (0xff & addr));
  168. cx_clear(MC417_RWD, NETUP_ADLO);
  169. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  170. NETUP_ADHI | (0xff & (addr >> 8)));
  171. cx_clear(MC417_RWD, NETUP_ADHI);
  172. if (read) { /* data in */
  173. cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
  174. } else /* data out */
  175. cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
  176. /* choose chip */
  177. cx_clear(MC417_RWD,
  178. (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
  179. /* read/write */
  180. cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
  181. mem = netup_ci_get_mem(dev);
  182. mutex_unlock(&dev->gpio_lock);
  183. if (!read)
  184. if (mem < 0)
  185. return -EREMOTEIO;
  186. ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
  187. (read) ? "read" : "write", state->ci_i2c_addr, addr,
  188. (flag == NETUP_CI_CTL) ? "ctl" : "mem",
  189. (read) ? mem : data);
  190. if (read)
  191. return mem;
  192. return 0;
  193. }
  194. int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
  195. int slot, int addr)
  196. {
  197. return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
  198. }
  199. int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
  200. int slot, int addr, u8 data)
  201. {
  202. return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
  203. }
  204. int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
  205. u8 addr)
  206. {
  207. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
  208. NETUP_CI_RD, addr, 0);
  209. }
  210. int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
  211. u8 addr, u8 data)
  212. {
  213. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
  214. }
  215. int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
  216. {
  217. struct netup_ci_state *state = en50221->data;
  218. u8 buf = 0x80;
  219. int ret;
  220. if (0 != slot)
  221. return -EINVAL;
  222. udelay(500);
  223. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  224. 0, &buf, 1);
  225. if (ret != 0)
  226. return ret;
  227. udelay(500);
  228. buf = 0x00;
  229. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  230. 0, &buf, 1);
  231. msleep(1000);
  232. dvb_ca_en50221_camready_irq(&state->ca, 0);
  233. return 0;
  234. }
  235. int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
  236. {
  237. /* not implemented */
  238. return 0;
  239. }
  240. static int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
  241. {
  242. struct netup_ci_state *state = en50221->data;
  243. int ret;
  244. if (irq_mode == state->current_irq_mode)
  245. return 0;
  246. ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
  247. __func__, state->ci_i2c_addr, irq_mode);
  248. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  249. 0x1b, &irq_mode, 1);
  250. if (ret != 0)
  251. return ret;
  252. state->current_irq_mode = irq_mode;
  253. return 0;
  254. }
  255. int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
  256. {
  257. struct netup_ci_state *state = en50221->data;
  258. u8 buf;
  259. if (0 != slot)
  260. return -EINVAL;
  261. netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  262. 0, &buf, 1);
  263. buf |= 0x60;
  264. return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  265. 0, &buf, 1);
  266. }
  267. /* work handler */
  268. static void netup_read_ci_status(struct work_struct *work)
  269. {
  270. struct netup_ci_state *state =
  271. container_of(work, struct netup_ci_state, work);
  272. u8 buf[33];
  273. int ret;
  274. /* CAM module IRQ processing. fast operation */
  275. dvb_ca_en50221_frda_irq(&state->ca, 0);
  276. /* CAM module INSERT/REMOVE processing. slow operation because of i2c
  277. * transfers */
  278. if (time_after(jiffies, state->next_status_checked_time)
  279. || !state->status) {
  280. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  281. 0, &buf[0], 33);
  282. state->next_status_checked_time = jiffies
  283. + msecs_to_jiffies(1000);
  284. if (ret != 0)
  285. return;
  286. ci_dbg_print("%s: Slot Status Addr=[0x%04x], Reg=[0x%02x], data=%02x, TS config = %02x\n",
  287. __func__, state->ci_i2c_addr, 0, buf[0], buf[0]);
  288. if (buf[0] & 1)
  289. state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
  290. DVB_CA_EN50221_POLL_CAM_READY;
  291. else
  292. state->status = 0;
  293. }
  294. }
  295. /* CI irq handler */
  296. int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
  297. {
  298. struct cx23885_tsport *port = NULL;
  299. struct netup_ci_state *state = NULL;
  300. ci_dbg_print("%s:\n", __func__);
  301. if (0 == (pci_status & (PCI_MSK_GPIO0 | PCI_MSK_GPIO1)))
  302. return 0;
  303. if (pci_status & PCI_MSK_GPIO0) {
  304. port = &dev->ts1;
  305. state = port->port_priv;
  306. schedule_work(&state->work);
  307. ci_dbg_print("%s: Wakeup CI0\n", __func__);
  308. }
  309. if (pci_status & PCI_MSK_GPIO1) {
  310. port = &dev->ts2;
  311. state = port->port_priv;
  312. schedule_work(&state->work);
  313. ci_dbg_print("%s: Wakeup CI1\n", __func__);
  314. }
  315. return 1;
  316. }
  317. int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
  318. int slot, int open)
  319. {
  320. struct netup_ci_state *state = en50221->data;
  321. if (0 != slot)
  322. return -EINVAL;
  323. netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | ci_irq_flags())
  324. : NETUP_IRQ_DETAM);
  325. return state->status;
  326. }
  327. int netup_ci_init(struct cx23885_tsport *port)
  328. {
  329. struct netup_ci_state *state;
  330. u8 cimax_init[34] = {
  331. 0x00, /* module A control*/
  332. 0x00, /* auto select mask high A */
  333. 0x00, /* auto select mask low A */
  334. 0x00, /* auto select pattern high A */
  335. 0x00, /* auto select pattern low A */
  336. 0x44, /* memory access time A */
  337. 0x00, /* invert input A */
  338. 0x00, /* RFU */
  339. 0x00, /* RFU */
  340. 0x00, /* module B control*/
  341. 0x00, /* auto select mask high B */
  342. 0x00, /* auto select mask low B */
  343. 0x00, /* auto select pattern high B */
  344. 0x00, /* auto select pattern low B */
  345. 0x44, /* memory access time B */
  346. 0x00, /* invert input B */
  347. 0x00, /* RFU */
  348. 0x00, /* RFU */
  349. 0x00, /* auto select mask high Ext */
  350. 0x00, /* auto select mask low Ext */
  351. 0x00, /* auto select pattern high Ext */
  352. 0x00, /* auto select pattern low Ext */
  353. 0x00, /* RFU */
  354. 0x02, /* destination - module A */
  355. 0x01, /* power on (use it like store place) */
  356. 0x00, /* RFU */
  357. 0x00, /* int status read only */
  358. ci_irq_flags() | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
  359. 0x05, /* EXTINT=active-high, INT=push-pull */
  360. 0x00, /* USCG1 */
  361. 0x04, /* ack active low */
  362. 0x00, /* LOCK = 0 */
  363. 0x33, /* serial mode, rising in, rising out, MSB first*/
  364. 0x31, /* synchronization */
  365. };
  366. int ret;
  367. ci_dbg_print("%s\n", __func__);
  368. state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
  369. if (!state) {
  370. ci_dbg_print("%s: Unable create CI structure!\n", __func__);
  371. ret = -ENOMEM;
  372. goto err;
  373. }
  374. port->port_priv = state;
  375. switch (port->nr) {
  376. case 1:
  377. state->ci_i2c_addr = 0x40;
  378. break;
  379. case 2:
  380. state->ci_i2c_addr = 0x41;
  381. break;
  382. }
  383. state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
  384. state->ca.owner = THIS_MODULE;
  385. state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
  386. state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
  387. state->ca.read_cam_control = netup_ci_read_cam_ctl;
  388. state->ca.write_cam_control = netup_ci_write_cam_ctl;
  389. state->ca.slot_reset = netup_ci_slot_reset;
  390. state->ca.slot_shutdown = netup_ci_slot_shutdown;
  391. state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
  392. state->ca.poll_slot_status = netup_poll_ci_slot_status;
  393. state->ca.data = state;
  394. state->priv = port;
  395. state->current_irq_mode = ci_irq_flags() | NETUP_IRQ_DETAM;
  396. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  397. 0, &cimax_init[0], 34);
  398. /* lock registers */
  399. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  400. 0x1f, &cimax_init[0x18], 1);
  401. /* power on slots */
  402. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  403. 0x18, &cimax_init[0x18], 1);
  404. if (0 != ret)
  405. goto err;
  406. ret = dvb_ca_en50221_init(&port->frontends.adapter,
  407. &state->ca,
  408. /* flags */ 0,
  409. /* n_slots */ 1);
  410. if (0 != ret)
  411. goto err;
  412. INIT_WORK(&state->work, netup_read_ci_status);
  413. schedule_work(&state->work);
  414. ci_dbg_print("%s: CI initialized!\n", __func__);
  415. return 0;
  416. err:
  417. ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
  418. kfree(state);
  419. return ret;
  420. }
  421. void netup_ci_exit(struct cx23885_tsport *port)
  422. {
  423. struct netup_ci_state *state;
  424. if (NULL == port)
  425. return;
  426. state = (struct netup_ci_state *)port->port_priv;
  427. if (NULL == state)
  428. return;
  429. if (NULL == state->ca.data)
  430. return;
  431. dvb_ca_en50221_release(&state->ca);
  432. kfree(state);
  433. }