rj54n1cb0c.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
  4. *
  5. * Copyright (C) 2018, Jacopo Mondi <[email protected]>
  6. *
  7. * Copyright (C) 2009, Guennadi Liakhovetski <[email protected]>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/delay.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/i2c.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/v4l2-mediabus.h>
  16. #include <linux/videodev2.h>
  17. #include <media/i2c/rj54n1cb0c.h>
  18. #include <media/v4l2-device.h>
  19. #include <media/v4l2-ctrls.h>
  20. #include <media/v4l2-subdev.h>
  21. #define RJ54N1_DEV_CODE 0x0400
  22. #define RJ54N1_DEV_CODE2 0x0401
  23. #define RJ54N1_OUT_SEL 0x0403
  24. #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
  25. #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
  26. #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
  27. #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
  28. #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
  29. #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
  30. #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
  31. #define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
  32. #define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
  33. #define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
  34. #define RJ54N1_RESIZE_N 0x040e
  35. #define RJ54N1_RESIZE_N_STEP 0x040f
  36. #define RJ54N1_RESIZE_STEP 0x0410
  37. #define RJ54N1_RESIZE_HOLD_H 0x0411
  38. #define RJ54N1_RESIZE_HOLD_L 0x0412
  39. #define RJ54N1_H_OBEN_OFS 0x0413
  40. #define RJ54N1_V_OBEN_OFS 0x0414
  41. #define RJ54N1_RESIZE_CONTROL 0x0415
  42. #define RJ54N1_STILL_CONTROL 0x0417
  43. #define RJ54N1_INC_USE_SEL_H 0x0425
  44. #define RJ54N1_INC_USE_SEL_L 0x0426
  45. #define RJ54N1_MIRROR_STILL_MODE 0x0427
  46. #define RJ54N1_INIT_START 0x0428
  47. #define RJ54N1_SCALE_1_2_LEV 0x0429
  48. #define RJ54N1_SCALE_4_LEV 0x042a
  49. #define RJ54N1_Y_GAIN 0x04d8
  50. #define RJ54N1_APT_GAIN_UP 0x04fa
  51. #define RJ54N1_RA_SEL_UL 0x0530
  52. #define RJ54N1_BYTE_SWAP 0x0531
  53. #define RJ54N1_OUT_SIGPO 0x053b
  54. #define RJ54N1_WB_SEL_WEIGHT_I 0x054e
  55. #define RJ54N1_BIT8_WB 0x0569
  56. #define RJ54N1_HCAPS_WB 0x056a
  57. #define RJ54N1_VCAPS_WB 0x056b
  58. #define RJ54N1_HCAPE_WB 0x056c
  59. #define RJ54N1_VCAPE_WB 0x056d
  60. #define RJ54N1_EXPOSURE_CONTROL 0x058c
  61. #define RJ54N1_FRAME_LENGTH_S_H 0x0595
  62. #define RJ54N1_FRAME_LENGTH_S_L 0x0596
  63. #define RJ54N1_FRAME_LENGTH_P_H 0x0597
  64. #define RJ54N1_FRAME_LENGTH_P_L 0x0598
  65. #define RJ54N1_PEAK_H 0x05b7
  66. #define RJ54N1_PEAK_50 0x05b8
  67. #define RJ54N1_PEAK_60 0x05b9
  68. #define RJ54N1_PEAK_DIFF 0x05ba
  69. #define RJ54N1_IOC 0x05ef
  70. #define RJ54N1_TG_BYPASS 0x0700
  71. #define RJ54N1_PLL_L 0x0701
  72. #define RJ54N1_PLL_N 0x0702
  73. #define RJ54N1_PLL_EN 0x0704
  74. #define RJ54N1_RATIO_TG 0x0706
  75. #define RJ54N1_RATIO_T 0x0707
  76. #define RJ54N1_RATIO_R 0x0708
  77. #define RJ54N1_RAMP_TGCLK_EN 0x0709
  78. #define RJ54N1_OCLK_DSP 0x0710
  79. #define RJ54N1_RATIO_OP 0x0711
  80. #define RJ54N1_RATIO_O 0x0712
  81. #define RJ54N1_OCLK_SEL_EN 0x0713
  82. #define RJ54N1_CLK_RST 0x0717
  83. #define RJ54N1_RESET_STANDBY 0x0718
  84. #define RJ54N1_FWFLG 0x07fe
  85. #define E_EXCLK (1 << 7)
  86. #define SOFT_STDBY (1 << 4)
  87. #define SEN_RSTX (1 << 2)
  88. #define TG_RSTX (1 << 1)
  89. #define DSP_RSTX (1 << 0)
  90. #define RESIZE_HOLD_SEL (1 << 2)
  91. #define RESIZE_GO (1 << 1)
  92. /*
  93. * When cropping, the camera automatically centers the cropped region, there
  94. * doesn't seem to be a way to specify an explicit location of the rectangle.
  95. */
  96. #define RJ54N1_COLUMN_SKIP 0
  97. #define RJ54N1_ROW_SKIP 0
  98. #define RJ54N1_MAX_WIDTH 1600
  99. #define RJ54N1_MAX_HEIGHT 1200
  100. #define PLL_L 2
  101. #define PLL_N 0x31
  102. /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
  103. /* RJ54N1CB0C has only one fixed colorspace per pixelcode */
  104. struct rj54n1_datafmt {
  105. u32 code;
  106. enum v4l2_colorspace colorspace;
  107. };
  108. /* Find a data format by a pixel code in an array */
  109. static const struct rj54n1_datafmt *rj54n1_find_datafmt(
  110. u32 code, const struct rj54n1_datafmt *fmt,
  111. int n)
  112. {
  113. int i;
  114. for (i = 0; i < n; i++)
  115. if (fmt[i].code == code)
  116. return fmt + i;
  117. return NULL;
  118. }
  119. static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
  120. {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  121. {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  122. {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  123. {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  124. {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  125. {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
  126. {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  127. {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
  128. {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
  129. };
  130. struct rj54n1_clock_div {
  131. u8 ratio_tg; /* can be 0 or an odd number */
  132. u8 ratio_t;
  133. u8 ratio_r;
  134. u8 ratio_op;
  135. u8 ratio_o;
  136. };
  137. struct rj54n1 {
  138. struct v4l2_subdev subdev;
  139. struct v4l2_ctrl_handler hdl;
  140. struct clk *clk;
  141. struct gpio_desc *pwup_gpio;
  142. struct gpio_desc *enable_gpio;
  143. struct rj54n1_clock_div clk_div;
  144. const struct rj54n1_datafmt *fmt;
  145. struct v4l2_rect rect; /* Sensor window */
  146. unsigned int tgclk_mhz;
  147. bool auto_wb;
  148. unsigned short width; /* Output window */
  149. unsigned short height;
  150. unsigned short resize; /* Sensor * 1024 / resize = Output */
  151. unsigned short scale;
  152. u8 bank;
  153. };
  154. struct rj54n1_reg_val {
  155. u16 reg;
  156. u8 val;
  157. };
  158. static const struct rj54n1_reg_val bank_4[] = {
  159. {0x417, 0},
  160. {0x42c, 0},
  161. {0x42d, 0xf0},
  162. {0x42e, 0},
  163. {0x42f, 0x50},
  164. {0x430, 0xf5},
  165. {0x431, 0x16},
  166. {0x432, 0x20},
  167. {0x433, 0},
  168. {0x434, 0xc8},
  169. {0x43c, 8},
  170. {0x43e, 0x90},
  171. {0x445, 0x83},
  172. {0x4ba, 0x58},
  173. {0x4bb, 4},
  174. {0x4bc, 0x20},
  175. {0x4db, 4},
  176. {0x4fe, 2},
  177. };
  178. static const struct rj54n1_reg_val bank_5[] = {
  179. {0x514, 0},
  180. {0x516, 0},
  181. {0x518, 0},
  182. {0x51a, 0},
  183. {0x51d, 0xff},
  184. {0x56f, 0x28},
  185. {0x575, 0x40},
  186. {0x5bc, 0x48},
  187. {0x5c1, 6},
  188. {0x5e5, 0x11},
  189. {0x5e6, 0x43},
  190. {0x5e7, 0x33},
  191. {0x5e8, 0x21},
  192. {0x5e9, 0x30},
  193. {0x5ea, 0x0},
  194. {0x5eb, 0xa5},
  195. {0x5ec, 0xff},
  196. {0x5fe, 2},
  197. };
  198. static const struct rj54n1_reg_val bank_7[] = {
  199. {0x70a, 0},
  200. {0x714, 0xff},
  201. {0x715, 0xff},
  202. {0x716, 0x1f},
  203. {0x7FE, 2},
  204. };
  205. static const struct rj54n1_reg_val bank_8[] = {
  206. {0x800, 0x00},
  207. {0x801, 0x01},
  208. {0x802, 0x61},
  209. {0x805, 0x00},
  210. {0x806, 0x00},
  211. {0x807, 0x00},
  212. {0x808, 0x00},
  213. {0x809, 0x01},
  214. {0x80A, 0x61},
  215. {0x80B, 0x00},
  216. {0x80C, 0x01},
  217. {0x80D, 0x00},
  218. {0x80E, 0x00},
  219. {0x80F, 0x00},
  220. {0x810, 0x00},
  221. {0x811, 0x01},
  222. {0x812, 0x61},
  223. {0x813, 0x00},
  224. {0x814, 0x11},
  225. {0x815, 0x00},
  226. {0x816, 0x41},
  227. {0x817, 0x00},
  228. {0x818, 0x51},
  229. {0x819, 0x01},
  230. {0x81A, 0x1F},
  231. {0x81B, 0x00},
  232. {0x81C, 0x01},
  233. {0x81D, 0x00},
  234. {0x81E, 0x11},
  235. {0x81F, 0x00},
  236. {0x820, 0x41},
  237. {0x821, 0x00},
  238. {0x822, 0x51},
  239. {0x823, 0x00},
  240. {0x824, 0x00},
  241. {0x825, 0x00},
  242. {0x826, 0x47},
  243. {0x827, 0x01},
  244. {0x828, 0x4F},
  245. {0x829, 0x00},
  246. {0x82A, 0x00},
  247. {0x82B, 0x00},
  248. {0x82C, 0x30},
  249. {0x82D, 0x00},
  250. {0x82E, 0x40},
  251. {0x82F, 0x00},
  252. {0x830, 0xB3},
  253. {0x831, 0x00},
  254. {0x832, 0xE3},
  255. {0x833, 0x00},
  256. {0x834, 0x00},
  257. {0x835, 0x00},
  258. {0x836, 0x00},
  259. {0x837, 0x00},
  260. {0x838, 0x00},
  261. {0x839, 0x01},
  262. {0x83A, 0x61},
  263. {0x83B, 0x00},
  264. {0x83C, 0x01},
  265. {0x83D, 0x00},
  266. {0x83E, 0x00},
  267. {0x83F, 0x00},
  268. {0x840, 0x00},
  269. {0x841, 0x01},
  270. {0x842, 0x61},
  271. {0x843, 0x00},
  272. {0x844, 0x1D},
  273. {0x845, 0x00},
  274. {0x846, 0x00},
  275. {0x847, 0x00},
  276. {0x848, 0x00},
  277. {0x849, 0x01},
  278. {0x84A, 0x1F},
  279. {0x84B, 0x00},
  280. {0x84C, 0x05},
  281. {0x84D, 0x00},
  282. {0x84E, 0x19},
  283. {0x84F, 0x01},
  284. {0x850, 0x21},
  285. {0x851, 0x01},
  286. {0x852, 0x5D},
  287. {0x853, 0x00},
  288. {0x854, 0x00},
  289. {0x855, 0x00},
  290. {0x856, 0x19},
  291. {0x857, 0x01},
  292. {0x858, 0x21},
  293. {0x859, 0x00},
  294. {0x85A, 0x00},
  295. {0x85B, 0x00},
  296. {0x85C, 0x00},
  297. {0x85D, 0x00},
  298. {0x85E, 0x00},
  299. {0x85F, 0x00},
  300. {0x860, 0xB3},
  301. {0x861, 0x00},
  302. {0x862, 0xE3},
  303. {0x863, 0x00},
  304. {0x864, 0x00},
  305. {0x865, 0x00},
  306. {0x866, 0x00},
  307. {0x867, 0x00},
  308. {0x868, 0x00},
  309. {0x869, 0xE2},
  310. {0x86A, 0x00},
  311. {0x86B, 0x01},
  312. {0x86C, 0x06},
  313. {0x86D, 0x00},
  314. {0x86E, 0x00},
  315. {0x86F, 0x00},
  316. {0x870, 0x60},
  317. {0x871, 0x8C},
  318. {0x872, 0x10},
  319. {0x873, 0x00},
  320. {0x874, 0xE0},
  321. {0x875, 0x00},
  322. {0x876, 0x27},
  323. {0x877, 0x01},
  324. {0x878, 0x00},
  325. {0x879, 0x00},
  326. {0x87A, 0x00},
  327. {0x87B, 0x03},
  328. {0x87C, 0x00},
  329. {0x87D, 0x00},
  330. {0x87E, 0x00},
  331. {0x87F, 0x00},
  332. {0x880, 0x00},
  333. {0x881, 0x00},
  334. {0x882, 0x00},
  335. {0x883, 0x00},
  336. {0x884, 0x00},
  337. {0x885, 0x00},
  338. {0x886, 0xF8},
  339. {0x887, 0x00},
  340. {0x888, 0x03},
  341. {0x889, 0x00},
  342. {0x88A, 0x64},
  343. {0x88B, 0x00},
  344. {0x88C, 0x03},
  345. {0x88D, 0x00},
  346. {0x88E, 0xB1},
  347. {0x88F, 0x00},
  348. {0x890, 0x03},
  349. {0x891, 0x01},
  350. {0x892, 0x1D},
  351. {0x893, 0x00},
  352. {0x894, 0x03},
  353. {0x895, 0x01},
  354. {0x896, 0x4B},
  355. {0x897, 0x00},
  356. {0x898, 0xE5},
  357. {0x899, 0x00},
  358. {0x89A, 0x01},
  359. {0x89B, 0x00},
  360. {0x89C, 0x01},
  361. {0x89D, 0x04},
  362. {0x89E, 0xC8},
  363. {0x89F, 0x00},
  364. {0x8A0, 0x01},
  365. {0x8A1, 0x01},
  366. {0x8A2, 0x61},
  367. {0x8A3, 0x00},
  368. {0x8A4, 0x01},
  369. {0x8A5, 0x00},
  370. {0x8A6, 0x00},
  371. {0x8A7, 0x00},
  372. {0x8A8, 0x00},
  373. {0x8A9, 0x00},
  374. {0x8AA, 0x7F},
  375. {0x8AB, 0x03},
  376. {0x8AC, 0x00},
  377. {0x8AD, 0x00},
  378. {0x8AE, 0x00},
  379. {0x8AF, 0x00},
  380. {0x8B0, 0x00},
  381. {0x8B1, 0x00},
  382. {0x8B6, 0x00},
  383. {0x8B7, 0x01},
  384. {0x8B8, 0x00},
  385. {0x8B9, 0x00},
  386. {0x8BA, 0x02},
  387. {0x8BB, 0x00},
  388. {0x8BC, 0xFF},
  389. {0x8BD, 0x00},
  390. {0x8FE, 2},
  391. };
  392. static const struct rj54n1_reg_val bank_10[] = {
  393. {0x10bf, 0x69}
  394. };
  395. /* Clock dividers - these are default register values, divider = register + 1 */
  396. static const struct rj54n1_clock_div clk_div = {
  397. .ratio_tg = 3 /* default: 5 */,
  398. .ratio_t = 4 /* default: 1 */,
  399. .ratio_r = 4 /* default: 0 */,
  400. .ratio_op = 1 /* default: 5 */,
  401. .ratio_o = 9 /* default: 0 */,
  402. };
  403. static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
  404. {
  405. return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
  406. }
  407. static int reg_read(struct i2c_client *client, const u16 reg)
  408. {
  409. struct rj54n1 *rj54n1 = to_rj54n1(client);
  410. int ret;
  411. /* set bank */
  412. if (rj54n1->bank != reg >> 8) {
  413. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
  414. ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
  415. if (ret < 0)
  416. return ret;
  417. rj54n1->bank = reg >> 8;
  418. }
  419. return i2c_smbus_read_byte_data(client, reg & 0xff);
  420. }
  421. static int reg_write(struct i2c_client *client, const u16 reg,
  422. const u8 data)
  423. {
  424. struct rj54n1 *rj54n1 = to_rj54n1(client);
  425. int ret;
  426. /* set bank */
  427. if (rj54n1->bank != reg >> 8) {
  428. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
  429. ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
  430. if (ret < 0)
  431. return ret;
  432. rj54n1->bank = reg >> 8;
  433. }
  434. dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
  435. return i2c_smbus_write_byte_data(client, reg & 0xff, data);
  436. }
  437. static int reg_set(struct i2c_client *client, const u16 reg,
  438. const u8 data, const u8 mask)
  439. {
  440. int ret;
  441. ret = reg_read(client, reg);
  442. if (ret < 0)
  443. return ret;
  444. return reg_write(client, reg, (ret & ~mask) | (data & mask));
  445. }
  446. static int reg_write_multiple(struct i2c_client *client,
  447. const struct rj54n1_reg_val *rv, const int n)
  448. {
  449. int i, ret;
  450. for (i = 0; i < n; i++) {
  451. ret = reg_write(client, rv->reg, rv->val);
  452. if (ret < 0)
  453. return ret;
  454. rv++;
  455. }
  456. return 0;
  457. }
  458. static int rj54n1_enum_mbus_code(struct v4l2_subdev *sd,
  459. struct v4l2_subdev_state *sd_state,
  460. struct v4l2_subdev_mbus_code_enum *code)
  461. {
  462. if (code->pad || code->index >= ARRAY_SIZE(rj54n1_colour_fmts))
  463. return -EINVAL;
  464. code->code = rj54n1_colour_fmts[code->index].code;
  465. return 0;
  466. }
  467. static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
  468. {
  469. struct i2c_client *client = v4l2_get_subdevdata(sd);
  470. /* Switch between preview and still shot modes */
  471. return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
  472. }
  473. static int rj54n1_set_rect(struct i2c_client *client,
  474. u16 reg_x, u16 reg_y, u16 reg_xy,
  475. u32 width, u32 height)
  476. {
  477. int ret;
  478. ret = reg_write(client, reg_xy,
  479. ((width >> 4) & 0x70) |
  480. ((height >> 8) & 7));
  481. if (!ret)
  482. ret = reg_write(client, reg_x, width & 0xff);
  483. if (!ret)
  484. ret = reg_write(client, reg_y, height & 0xff);
  485. return ret;
  486. }
  487. /*
  488. * Some commands, specifically certain initialisation sequences, require
  489. * a commit operation.
  490. */
  491. static int rj54n1_commit(struct i2c_client *client)
  492. {
  493. int ret = reg_write(client, RJ54N1_INIT_START, 1);
  494. msleep(10);
  495. if (!ret)
  496. ret = reg_write(client, RJ54N1_INIT_START, 0);
  497. return ret;
  498. }
  499. static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
  500. s32 *out_w, s32 *out_h);
  501. static int rj54n1_set_selection(struct v4l2_subdev *sd,
  502. struct v4l2_subdev_state *sd_state,
  503. struct v4l2_subdev_selection *sel)
  504. {
  505. struct i2c_client *client = v4l2_get_subdevdata(sd);
  506. struct rj54n1 *rj54n1 = to_rj54n1(client);
  507. const struct v4l2_rect *rect = &sel->r;
  508. int output_w, output_h, input_w = rect->width, input_h = rect->height;
  509. int ret;
  510. if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
  511. sel->target != V4L2_SEL_TGT_CROP)
  512. return -EINVAL;
  513. /* arbitrary minimum width and height, edges unimportant */
  514. v4l_bound_align_image(&input_w, 8, RJ54N1_MAX_WIDTH, 0,
  515. &input_h, 8, RJ54N1_MAX_HEIGHT, 0, 0);
  516. output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
  517. output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
  518. dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
  519. input_w, input_h, rj54n1->resize, output_w, output_h);
  520. ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
  521. if (ret < 0)
  522. return ret;
  523. rj54n1->width = output_w;
  524. rj54n1->height = output_h;
  525. rj54n1->resize = ret;
  526. rj54n1->rect.width = input_w;
  527. rj54n1->rect.height = input_h;
  528. return 0;
  529. }
  530. static int rj54n1_get_selection(struct v4l2_subdev *sd,
  531. struct v4l2_subdev_state *sd_state,
  532. struct v4l2_subdev_selection *sel)
  533. {
  534. struct i2c_client *client = v4l2_get_subdevdata(sd);
  535. struct rj54n1 *rj54n1 = to_rj54n1(client);
  536. if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
  537. return -EINVAL;
  538. switch (sel->target) {
  539. case V4L2_SEL_TGT_CROP_BOUNDS:
  540. sel->r.left = RJ54N1_COLUMN_SKIP;
  541. sel->r.top = RJ54N1_ROW_SKIP;
  542. sel->r.width = RJ54N1_MAX_WIDTH;
  543. sel->r.height = RJ54N1_MAX_HEIGHT;
  544. return 0;
  545. case V4L2_SEL_TGT_CROP:
  546. sel->r = rj54n1->rect;
  547. return 0;
  548. default:
  549. return -EINVAL;
  550. }
  551. }
  552. static int rj54n1_get_fmt(struct v4l2_subdev *sd,
  553. struct v4l2_subdev_state *sd_state,
  554. struct v4l2_subdev_format *format)
  555. {
  556. struct v4l2_mbus_framefmt *mf = &format->format;
  557. struct i2c_client *client = v4l2_get_subdevdata(sd);
  558. struct rj54n1 *rj54n1 = to_rj54n1(client);
  559. if (format->pad)
  560. return -EINVAL;
  561. mf->code = rj54n1->fmt->code;
  562. mf->colorspace = rj54n1->fmt->colorspace;
  563. mf->ycbcr_enc = V4L2_YCBCR_ENC_601;
  564. mf->xfer_func = V4L2_XFER_FUNC_SRGB;
  565. mf->quantization = V4L2_QUANTIZATION_DEFAULT;
  566. mf->field = V4L2_FIELD_NONE;
  567. mf->width = rj54n1->width;
  568. mf->height = rj54n1->height;
  569. return 0;
  570. }
  571. /*
  572. * The actual geometry configuration routine. It scales the input window into
  573. * the output one, updates the window sizes and returns an error or the resize
  574. * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
  575. */
  576. static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
  577. s32 *out_w, s32 *out_h)
  578. {
  579. struct i2c_client *client = v4l2_get_subdevdata(sd);
  580. struct rj54n1 *rj54n1 = to_rj54n1(client);
  581. unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
  582. output_w = *out_w, output_h = *out_h;
  583. u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
  584. unsigned int peak, peak_50, peak_60;
  585. int ret;
  586. /*
  587. * We have a problem with crops, where the window is larger than 512x384
  588. * and output window is larger than a half of the input one. In this
  589. * case we have to either reduce the input window to equal or below
  590. * 512x384 or the output window to equal or below 1/2 of the input.
  591. */
  592. if (output_w > max(512U, input_w / 2)) {
  593. if (2 * output_w > RJ54N1_MAX_WIDTH) {
  594. input_w = RJ54N1_MAX_WIDTH;
  595. output_w = RJ54N1_MAX_WIDTH / 2;
  596. } else {
  597. input_w = output_w * 2;
  598. }
  599. dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
  600. input_w, output_w);
  601. }
  602. if (output_h > max(384U, input_h / 2)) {
  603. if (2 * output_h > RJ54N1_MAX_HEIGHT) {
  604. input_h = RJ54N1_MAX_HEIGHT;
  605. output_h = RJ54N1_MAX_HEIGHT / 2;
  606. } else {
  607. input_h = output_h * 2;
  608. }
  609. dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
  610. input_h, output_h);
  611. }
  612. /* Idea: use the read mode for snapshots, handle separate geometries */
  613. ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
  614. RJ54N1_Y_OUTPUT_SIZE_S_L,
  615. RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
  616. if (!ret)
  617. ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
  618. RJ54N1_Y_OUTPUT_SIZE_P_L,
  619. RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
  620. if (ret < 0)
  621. return ret;
  622. if (output_w > input_w && output_h > input_h) {
  623. input_w = output_w;
  624. input_h = output_h;
  625. resize = 1024;
  626. } else {
  627. unsigned int resize_x, resize_y;
  628. resize_x = (input_w * 1024 + output_w / 2) / output_w;
  629. resize_y = (input_h * 1024 + output_h / 2) / output_h;
  630. /* We want max(resize_x, resize_y), check if it still fits */
  631. if (resize_x > resize_y &&
  632. (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
  633. resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
  634. output_h;
  635. else if (resize_y > resize_x &&
  636. (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
  637. resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
  638. output_w;
  639. else
  640. resize = max(resize_x, resize_y);
  641. /* Prohibited value ranges */
  642. switch (resize) {
  643. case 2040 ... 2047:
  644. resize = 2039;
  645. break;
  646. case 4080 ... 4095:
  647. resize = 4079;
  648. break;
  649. case 8160 ... 8191:
  650. resize = 8159;
  651. break;
  652. case 16320 ... 16384:
  653. resize = 16319;
  654. }
  655. }
  656. /* Set scaling */
  657. ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
  658. if (!ret)
  659. ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
  660. if (ret < 0)
  661. return ret;
  662. /*
  663. * Configure a skipping bitmask. The sensor will select a skipping value
  664. * among set bits automatically. This is very unclear in the datasheet
  665. * too. I was told, in this register one enables all skipping values,
  666. * that are required for a specific resize, and the camera selects
  667. * automatically, which ones to use. But it is unclear how to identify,
  668. * which cropping values are needed. Secondly, why don't we just set all
  669. * bits and let the camera choose? Would it increase processing time and
  670. * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
  671. * improve the image quality or stability for larger frames (see comment
  672. * above), but I didn't check the framerate.
  673. */
  674. skip = min(resize / 1024, 15U);
  675. inc_sel = 1 << skip;
  676. if (inc_sel <= 2)
  677. inc_sel = 0xc;
  678. else if (resize & 1023 && skip < 15)
  679. inc_sel |= 1 << (skip + 1);
  680. ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
  681. if (!ret)
  682. ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
  683. if (!rj54n1->auto_wb) {
  684. /* Auto white balance window */
  685. wb_left = output_w / 16;
  686. wb_right = (3 * output_w / 4 - 3) / 4;
  687. wb_top = output_h / 16;
  688. wb_bottom = (3 * output_h / 4 - 3) / 4;
  689. wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
  690. ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
  691. if (!ret)
  692. ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
  693. if (!ret)
  694. ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
  695. if (!ret)
  696. ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
  697. if (!ret)
  698. ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
  699. if (!ret)
  700. ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
  701. }
  702. /* Antiflicker */
  703. peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
  704. 10000;
  705. peak_50 = peak / 6;
  706. peak_60 = peak / 5;
  707. if (!ret)
  708. ret = reg_write(client, RJ54N1_PEAK_H,
  709. ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
  710. if (!ret)
  711. ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
  712. if (!ret)
  713. ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
  714. if (!ret)
  715. ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
  716. /* Start resizing */
  717. if (!ret)
  718. ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
  719. RESIZE_HOLD_SEL | RESIZE_GO | 1);
  720. if (ret < 0)
  721. return ret;
  722. /* Constant taken from manufacturer's example */
  723. msleep(230);
  724. ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
  725. if (ret < 0)
  726. return ret;
  727. *in_w = (output_w * resize + 512) / 1024;
  728. *in_h = (output_h * resize + 512) / 1024;
  729. *out_w = output_w;
  730. *out_h = output_h;
  731. dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
  732. *in_w, *in_h, resize, output_w, output_h, skip);
  733. return resize;
  734. }
  735. static int rj54n1_set_clock(struct i2c_client *client)
  736. {
  737. struct rj54n1 *rj54n1 = to_rj54n1(client);
  738. int ret;
  739. /* Enable external clock */
  740. ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
  741. /* Leave stand-by. Note: use this when implementing suspend / resume */
  742. if (!ret)
  743. ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
  744. if (!ret)
  745. ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
  746. if (!ret)
  747. ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
  748. /* TGCLK dividers */
  749. if (!ret)
  750. ret = reg_write(client, RJ54N1_RATIO_TG,
  751. rj54n1->clk_div.ratio_tg);
  752. if (!ret)
  753. ret = reg_write(client, RJ54N1_RATIO_T,
  754. rj54n1->clk_div.ratio_t);
  755. if (!ret)
  756. ret = reg_write(client, RJ54N1_RATIO_R,
  757. rj54n1->clk_div.ratio_r);
  758. /* Enable TGCLK & RAMP */
  759. if (!ret)
  760. ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
  761. /* Disable clock output */
  762. if (!ret)
  763. ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
  764. /* Set divisors */
  765. if (!ret)
  766. ret = reg_write(client, RJ54N1_RATIO_OP,
  767. rj54n1->clk_div.ratio_op);
  768. if (!ret)
  769. ret = reg_write(client, RJ54N1_RATIO_O,
  770. rj54n1->clk_div.ratio_o);
  771. /* Enable OCLK */
  772. if (!ret)
  773. ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
  774. /* Use PLL for Timing Generator, write 2 to reserved bits */
  775. if (!ret)
  776. ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
  777. /* Take sensor out of reset */
  778. if (!ret)
  779. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  780. E_EXCLK | SEN_RSTX);
  781. /* Enable PLL */
  782. if (!ret)
  783. ret = reg_write(client, RJ54N1_PLL_EN, 1);
  784. /* Wait for PLL to stabilise */
  785. msleep(10);
  786. /* Enable clock to frequency divider */
  787. if (!ret)
  788. ret = reg_write(client, RJ54N1_CLK_RST, 1);
  789. if (!ret)
  790. ret = reg_read(client, RJ54N1_CLK_RST);
  791. if (ret != 1) {
  792. dev_err(&client->dev,
  793. "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
  794. return -EIO;
  795. }
  796. /* Start the PLL */
  797. ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
  798. /* Enable OCLK */
  799. if (!ret)
  800. ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
  801. return ret;
  802. }
  803. static int rj54n1_reg_init(struct i2c_client *client)
  804. {
  805. struct rj54n1 *rj54n1 = to_rj54n1(client);
  806. int ret = rj54n1_set_clock(client);
  807. if (!ret)
  808. ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
  809. if (!ret)
  810. ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
  811. /* Set binning divisors */
  812. if (!ret)
  813. ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
  814. if (!ret)
  815. ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
  816. /* Switch to fixed resize mode */
  817. if (!ret)
  818. ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
  819. RESIZE_HOLD_SEL | 1);
  820. /* Set gain */
  821. if (!ret)
  822. ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
  823. /*
  824. * Mirror the image back: default is upside down and left-to-right...
  825. * Set manual preview / still shot switching
  826. */
  827. if (!ret)
  828. ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
  829. if (!ret)
  830. ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
  831. /* Auto exposure area */
  832. if (!ret)
  833. ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
  834. /* Check current auto WB config */
  835. if (!ret)
  836. ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
  837. if (ret >= 0) {
  838. rj54n1->auto_wb = ret & 0x80;
  839. ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
  840. }
  841. if (!ret)
  842. ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
  843. if (!ret)
  844. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  845. E_EXCLK | DSP_RSTX | SEN_RSTX);
  846. /* Commit init */
  847. if (!ret)
  848. ret = rj54n1_commit(client);
  849. /* Take DSP, TG, sensor out of reset */
  850. if (!ret)
  851. ret = reg_write(client, RJ54N1_RESET_STANDBY,
  852. E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
  853. /* Start register update? Same register as 0x?FE in many bank_* sets */
  854. if (!ret)
  855. ret = reg_write(client, RJ54N1_FWFLG, 2);
  856. /* Constant taken from manufacturer's example */
  857. msleep(700);
  858. return ret;
  859. }
  860. static int rj54n1_set_fmt(struct v4l2_subdev *sd,
  861. struct v4l2_subdev_state *sd_state,
  862. struct v4l2_subdev_format *format)
  863. {
  864. struct v4l2_mbus_framefmt *mf = &format->format;
  865. struct i2c_client *client = v4l2_get_subdevdata(sd);
  866. struct rj54n1 *rj54n1 = to_rj54n1(client);
  867. const struct rj54n1_datafmt *fmt;
  868. int output_w, output_h, max_w, max_h,
  869. input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
  870. int align = mf->code == MEDIA_BUS_FMT_SBGGR10_1X10 ||
  871. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE ||
  872. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE ||
  873. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE ||
  874. mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE;
  875. int ret;
  876. if (format->pad)
  877. return -EINVAL;
  878. dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
  879. __func__, mf->code, mf->width, mf->height);
  880. fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
  881. ARRAY_SIZE(rj54n1_colour_fmts));
  882. if (!fmt) {
  883. fmt = rj54n1->fmt;
  884. mf->code = fmt->code;
  885. }
  886. mf->field = V4L2_FIELD_NONE;
  887. mf->colorspace = fmt->colorspace;
  888. v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
  889. &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
  890. if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
  891. sd_state->pads->try_fmt = *mf;
  892. return 0;
  893. }
  894. /*
  895. * Verify if the sensor has just been powered on. TODO: replace this
  896. * with proper PM, when a suitable API is available.
  897. */
  898. ret = reg_read(client, RJ54N1_RESET_STANDBY);
  899. if (ret < 0)
  900. return ret;
  901. if (!(ret & E_EXCLK)) {
  902. ret = rj54n1_reg_init(client);
  903. if (ret < 0)
  904. return ret;
  905. }
  906. /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
  907. switch (mf->code) {
  908. case MEDIA_BUS_FMT_YUYV8_2X8:
  909. ret = reg_write(client, RJ54N1_OUT_SEL, 0);
  910. if (!ret)
  911. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  912. break;
  913. case MEDIA_BUS_FMT_YVYU8_2X8:
  914. ret = reg_write(client, RJ54N1_OUT_SEL, 0);
  915. if (!ret)
  916. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  917. break;
  918. case MEDIA_BUS_FMT_RGB565_2X8_LE:
  919. ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
  920. if (!ret)
  921. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  922. break;
  923. case MEDIA_BUS_FMT_RGB565_2X8_BE:
  924. ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
  925. if (!ret)
  926. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  927. break;
  928. case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE:
  929. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  930. if (!ret)
  931. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  932. if (!ret)
  933. ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
  934. break;
  935. case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
  936. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  937. if (!ret)
  938. ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
  939. if (!ret)
  940. ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
  941. break;
  942. case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE:
  943. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  944. if (!ret)
  945. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  946. if (!ret)
  947. ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
  948. break;
  949. case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
  950. ret = reg_write(client, RJ54N1_OUT_SEL, 4);
  951. if (!ret)
  952. ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
  953. if (!ret)
  954. ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
  955. break;
  956. case MEDIA_BUS_FMT_SBGGR10_1X10:
  957. ret = reg_write(client, RJ54N1_OUT_SEL, 5);
  958. break;
  959. default:
  960. ret = -EINVAL;
  961. }
  962. /* Special case: a raw mode with 10 bits of data per clock tick */
  963. if (!ret)
  964. ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
  965. (mf->code == MEDIA_BUS_FMT_SBGGR10_1X10) << 1, 2);
  966. if (ret < 0)
  967. return ret;
  968. /* Supported scales 1:1 >= scale > 1:16 */
  969. max_w = mf->width * (16 * 1024 - 1) / 1024;
  970. if (input_w > max_w)
  971. input_w = max_w;
  972. max_h = mf->height * (16 * 1024 - 1) / 1024;
  973. if (input_h > max_h)
  974. input_h = max_h;
  975. output_w = mf->width;
  976. output_h = mf->height;
  977. ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
  978. if (ret < 0)
  979. return ret;
  980. fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
  981. ARRAY_SIZE(rj54n1_colour_fmts));
  982. rj54n1->fmt = fmt;
  983. rj54n1->resize = ret;
  984. rj54n1->rect.width = input_w;
  985. rj54n1->rect.height = input_h;
  986. rj54n1->width = output_w;
  987. rj54n1->height = output_h;
  988. mf->width = output_w;
  989. mf->height = output_h;
  990. mf->field = V4L2_FIELD_NONE;
  991. mf->colorspace = fmt->colorspace;
  992. return 0;
  993. }
  994. #ifdef CONFIG_VIDEO_ADV_DEBUG
  995. static int rj54n1_g_register(struct v4l2_subdev *sd,
  996. struct v4l2_dbg_register *reg)
  997. {
  998. struct i2c_client *client = v4l2_get_subdevdata(sd);
  999. if (reg->reg < 0x400 || reg->reg > 0x1fff)
  1000. /* Registers > 0x0800 are only available from Sharp support */
  1001. return -EINVAL;
  1002. reg->size = 1;
  1003. reg->val = reg_read(client, reg->reg);
  1004. if (reg->val > 0xff)
  1005. return -EIO;
  1006. return 0;
  1007. }
  1008. static int rj54n1_s_register(struct v4l2_subdev *sd,
  1009. const struct v4l2_dbg_register *reg)
  1010. {
  1011. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1012. if (reg->reg < 0x400 || reg->reg > 0x1fff)
  1013. /* Registers >= 0x0800 are only available from Sharp support */
  1014. return -EINVAL;
  1015. if (reg_write(client, reg->reg, reg->val) < 0)
  1016. return -EIO;
  1017. return 0;
  1018. }
  1019. #endif
  1020. static int rj54n1_s_power(struct v4l2_subdev *sd, int on)
  1021. {
  1022. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1023. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1024. if (on) {
  1025. if (rj54n1->pwup_gpio)
  1026. gpiod_set_value(rj54n1->pwup_gpio, 1);
  1027. if (rj54n1->enable_gpio)
  1028. gpiod_set_value(rj54n1->enable_gpio, 1);
  1029. msleep(1);
  1030. return clk_prepare_enable(rj54n1->clk);
  1031. }
  1032. clk_disable_unprepare(rj54n1->clk);
  1033. if (rj54n1->enable_gpio)
  1034. gpiod_set_value(rj54n1->enable_gpio, 0);
  1035. if (rj54n1->pwup_gpio)
  1036. gpiod_set_value(rj54n1->pwup_gpio, 0);
  1037. return 0;
  1038. }
  1039. static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
  1040. {
  1041. struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
  1042. struct v4l2_subdev *sd = &rj54n1->subdev;
  1043. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1044. int data;
  1045. switch (ctrl->id) {
  1046. case V4L2_CID_VFLIP:
  1047. if (ctrl->val)
  1048. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
  1049. else
  1050. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
  1051. if (data < 0)
  1052. return -EIO;
  1053. return 0;
  1054. case V4L2_CID_HFLIP:
  1055. if (ctrl->val)
  1056. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
  1057. else
  1058. data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
  1059. if (data < 0)
  1060. return -EIO;
  1061. return 0;
  1062. case V4L2_CID_GAIN:
  1063. if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
  1064. return -EIO;
  1065. return 0;
  1066. case V4L2_CID_AUTO_WHITE_BALANCE:
  1067. /* Auto WB area - whole image */
  1068. if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
  1069. 0x80) < 0)
  1070. return -EIO;
  1071. rj54n1->auto_wb = ctrl->val;
  1072. return 0;
  1073. }
  1074. return -EINVAL;
  1075. }
  1076. static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
  1077. .s_ctrl = rj54n1_s_ctrl,
  1078. };
  1079. static const struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
  1080. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1081. .g_register = rj54n1_g_register,
  1082. .s_register = rj54n1_s_register,
  1083. #endif
  1084. .s_power = rj54n1_s_power,
  1085. };
  1086. static const struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
  1087. .s_stream = rj54n1_s_stream,
  1088. };
  1089. static const struct v4l2_subdev_pad_ops rj54n1_subdev_pad_ops = {
  1090. .enum_mbus_code = rj54n1_enum_mbus_code,
  1091. .get_selection = rj54n1_get_selection,
  1092. .set_selection = rj54n1_set_selection,
  1093. .get_fmt = rj54n1_get_fmt,
  1094. .set_fmt = rj54n1_set_fmt,
  1095. };
  1096. static const struct v4l2_subdev_ops rj54n1_subdev_ops = {
  1097. .core = &rj54n1_subdev_core_ops,
  1098. .video = &rj54n1_subdev_video_ops,
  1099. .pad = &rj54n1_subdev_pad_ops,
  1100. };
  1101. /*
  1102. * Interface active, can use i2c. If it fails, it can indeed mean, that
  1103. * this wasn't our capture interface, so, we wait for the right one
  1104. */
  1105. static int rj54n1_video_probe(struct i2c_client *client,
  1106. struct rj54n1_pdata *priv)
  1107. {
  1108. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1109. int data1, data2;
  1110. int ret;
  1111. ret = rj54n1_s_power(&rj54n1->subdev, 1);
  1112. if (ret < 0)
  1113. return ret;
  1114. /* Read out the chip version register */
  1115. data1 = reg_read(client, RJ54N1_DEV_CODE);
  1116. data2 = reg_read(client, RJ54N1_DEV_CODE2);
  1117. if (data1 != 0x51 || data2 != 0x10) {
  1118. ret = -ENODEV;
  1119. dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
  1120. data1, data2);
  1121. goto done;
  1122. }
  1123. /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
  1124. ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
  1125. if (ret < 0)
  1126. goto done;
  1127. dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
  1128. data1, data2);
  1129. ret = v4l2_ctrl_handler_setup(&rj54n1->hdl);
  1130. done:
  1131. rj54n1_s_power(&rj54n1->subdev, 0);
  1132. return ret;
  1133. }
  1134. static int rj54n1_probe(struct i2c_client *client,
  1135. const struct i2c_device_id *did)
  1136. {
  1137. struct rj54n1 *rj54n1;
  1138. struct i2c_adapter *adapter = client->adapter;
  1139. struct rj54n1_pdata *rj54n1_priv;
  1140. int ret;
  1141. if (!client->dev.platform_data) {
  1142. dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
  1143. return -EINVAL;
  1144. }
  1145. rj54n1_priv = client->dev.platform_data;
  1146. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  1147. dev_warn(&adapter->dev,
  1148. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
  1149. return -EIO;
  1150. }
  1151. rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL);
  1152. if (!rj54n1)
  1153. return -ENOMEM;
  1154. v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
  1155. v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
  1156. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1157. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1158. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1159. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1160. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1161. V4L2_CID_GAIN, 0, 127, 1, 66);
  1162. v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
  1163. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  1164. rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
  1165. if (rj54n1->hdl.error)
  1166. return rj54n1->hdl.error;
  1167. rj54n1->clk_div = clk_div;
  1168. rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
  1169. rj54n1->rect.top = RJ54N1_ROW_SKIP;
  1170. rj54n1->rect.width = RJ54N1_MAX_WIDTH;
  1171. rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
  1172. rj54n1->width = RJ54N1_MAX_WIDTH;
  1173. rj54n1->height = RJ54N1_MAX_HEIGHT;
  1174. rj54n1->fmt = &rj54n1_colour_fmts[0];
  1175. rj54n1->resize = 1024;
  1176. rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
  1177. (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
  1178. rj54n1->clk = clk_get(&client->dev, NULL);
  1179. if (IS_ERR(rj54n1->clk)) {
  1180. ret = PTR_ERR(rj54n1->clk);
  1181. goto err_free_ctrl;
  1182. }
  1183. rj54n1->pwup_gpio = gpiod_get_optional(&client->dev, "powerup",
  1184. GPIOD_OUT_LOW);
  1185. if (IS_ERR(rj54n1->pwup_gpio)) {
  1186. dev_info(&client->dev, "Unable to get GPIO \"powerup\": %ld\n",
  1187. PTR_ERR(rj54n1->pwup_gpio));
  1188. ret = PTR_ERR(rj54n1->pwup_gpio);
  1189. goto err_clk_put;
  1190. }
  1191. rj54n1->enable_gpio = gpiod_get_optional(&client->dev, "enable",
  1192. GPIOD_OUT_LOW);
  1193. if (IS_ERR(rj54n1->enable_gpio)) {
  1194. dev_info(&client->dev, "Unable to get GPIO \"enable\": %ld\n",
  1195. PTR_ERR(rj54n1->enable_gpio));
  1196. ret = PTR_ERR(rj54n1->enable_gpio);
  1197. goto err_gpio_put;
  1198. }
  1199. ret = rj54n1_video_probe(client, rj54n1_priv);
  1200. if (ret < 0)
  1201. goto err_gpio_put;
  1202. ret = v4l2_async_register_subdev(&rj54n1->subdev);
  1203. if (ret)
  1204. goto err_gpio_put;
  1205. return 0;
  1206. err_gpio_put:
  1207. if (rj54n1->enable_gpio)
  1208. gpiod_put(rj54n1->enable_gpio);
  1209. if (rj54n1->pwup_gpio)
  1210. gpiod_put(rj54n1->pwup_gpio);
  1211. err_clk_put:
  1212. clk_put(rj54n1->clk);
  1213. err_free_ctrl:
  1214. v4l2_ctrl_handler_free(&rj54n1->hdl);
  1215. return ret;
  1216. }
  1217. static void rj54n1_remove(struct i2c_client *client)
  1218. {
  1219. struct rj54n1 *rj54n1 = to_rj54n1(client);
  1220. if (rj54n1->enable_gpio)
  1221. gpiod_put(rj54n1->enable_gpio);
  1222. if (rj54n1->pwup_gpio)
  1223. gpiod_put(rj54n1->pwup_gpio);
  1224. clk_put(rj54n1->clk);
  1225. v4l2_ctrl_handler_free(&rj54n1->hdl);
  1226. v4l2_async_unregister_subdev(&rj54n1->subdev);
  1227. }
  1228. static const struct i2c_device_id rj54n1_id[] = {
  1229. { "rj54n1cb0c", 0 },
  1230. { }
  1231. };
  1232. MODULE_DEVICE_TABLE(i2c, rj54n1_id);
  1233. static struct i2c_driver rj54n1_i2c_driver = {
  1234. .driver = {
  1235. .name = "rj54n1cb0c",
  1236. },
  1237. .probe = rj54n1_probe,
  1238. .remove = rj54n1_remove,
  1239. .id_table = rj54n1_id,
  1240. };
  1241. module_i2c_driver(rj54n1_i2c_driver);
  1242. MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
  1243. MODULE_AUTHOR("Guennadi Liakhovetski <[email protected]>");
  1244. MODULE_LICENSE("GPL v2");