ov9734.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2020 Intel Corporation.
  3. #include <asm/unaligned.h>
  4. #include <linux/acpi.h>
  5. #include <linux/delay.h>
  6. #include <linux/i2c.h>
  7. #include <linux/module.h>
  8. #include <linux/pm_runtime.h>
  9. #include <media/v4l2-ctrls.h>
  10. #include <media/v4l2-device.h>
  11. #include <media/v4l2-fwnode.h>
  12. #define OV9734_LINK_FREQ_180MHZ 180000000ULL
  13. #define OV9734_SCLK 36000000LL
  14. #define OV9734_MCLK 19200000
  15. /* ov9734 only support 1-lane mipi output */
  16. #define OV9734_DATA_LANES 1
  17. #define OV9734_RGB_DEPTH 10
  18. #define OV9734_REG_CHIP_ID 0x300a
  19. #define OV9734_CHIP_ID 0x9734
  20. #define OV9734_REG_MODE_SELECT 0x0100
  21. #define OV9734_MODE_STANDBY 0x00
  22. #define OV9734_MODE_STREAMING 0x01
  23. /* vertical-timings from sensor */
  24. #define OV9734_REG_VTS 0x380e
  25. #define OV9734_VTS_30FPS 0x0322
  26. #define OV9734_VTS_30FPS_MIN 0x0322
  27. #define OV9734_VTS_MAX 0x7fff
  28. /* horizontal-timings from sensor */
  29. #define OV9734_REG_HTS 0x380c
  30. /* Exposure controls from sensor */
  31. #define OV9734_REG_EXPOSURE 0x3500
  32. #define OV9734_EXPOSURE_MIN 4
  33. #define OV9734_EXPOSURE_MAX_MARGIN 4
  34. #define OV9734_EXPOSURE_STEP 1
  35. /* Analog gain controls from sensor */
  36. #define OV9734_REG_ANALOG_GAIN 0x350a
  37. #define OV9734_ANAL_GAIN_MIN 16
  38. #define OV9734_ANAL_GAIN_MAX 248
  39. #define OV9734_ANAL_GAIN_STEP 1
  40. /* Digital gain controls from sensor */
  41. #define OV9734_REG_MWB_R_GAIN 0x5180
  42. #define OV9734_REG_MWB_G_GAIN 0x5182
  43. #define OV9734_REG_MWB_B_GAIN 0x5184
  44. #define OV9734_DGTL_GAIN_MIN 256
  45. #define OV9734_DGTL_GAIN_MAX 1023
  46. #define OV9734_DGTL_GAIN_STEP 1
  47. #define OV9734_DGTL_GAIN_DEFAULT 256
  48. /* Test Pattern Control */
  49. #define OV9734_REG_TEST_PATTERN 0x5080
  50. #define OV9734_TEST_PATTERN_ENABLE BIT(7)
  51. #define OV9734_TEST_PATTERN_BAR_SHIFT 2
  52. /* Group Access */
  53. #define OV9734_REG_GROUP_ACCESS 0x3208
  54. #define OV9734_GROUP_HOLD_START 0x0
  55. #define OV9734_GROUP_HOLD_END 0x10
  56. #define OV9734_GROUP_HOLD_LAUNCH 0xa0
  57. enum {
  58. OV9734_LINK_FREQ_180MHZ_INDEX,
  59. };
  60. struct ov9734_reg {
  61. u16 address;
  62. u8 val;
  63. };
  64. struct ov9734_reg_list {
  65. u32 num_of_regs;
  66. const struct ov9734_reg *regs;
  67. };
  68. struct ov9734_link_freq_config {
  69. const struct ov9734_reg_list reg_list;
  70. };
  71. struct ov9734_mode {
  72. /* Frame width in pixels */
  73. u32 width;
  74. /* Frame height in pixels */
  75. u32 height;
  76. /* Horizontal timining size */
  77. u32 hts;
  78. /* Default vertical timining size */
  79. u32 vts_def;
  80. /* Min vertical timining size */
  81. u32 vts_min;
  82. /* Link frequency needed for this resolution */
  83. u32 link_freq_index;
  84. /* Sensor register settings for this resolution */
  85. const struct ov9734_reg_list reg_list;
  86. };
  87. static const struct ov9734_reg mipi_data_rate_360mbps[] = {
  88. {0x3030, 0x19},
  89. {0x3080, 0x02},
  90. {0x3081, 0x4b},
  91. {0x3082, 0x04},
  92. {0x3083, 0x00},
  93. {0x3084, 0x02},
  94. {0x3085, 0x01},
  95. {0x3086, 0x01},
  96. {0x3089, 0x01},
  97. {0x308a, 0x00},
  98. {0x301e, 0x15},
  99. {0x3103, 0x01},
  100. };
  101. static const struct ov9734_reg mode_1296x734_regs[] = {
  102. {0x3001, 0x00},
  103. {0x3002, 0x00},
  104. {0x3007, 0x00},
  105. {0x3010, 0x00},
  106. {0x3011, 0x08},
  107. {0x3014, 0x22},
  108. {0x3600, 0x55},
  109. {0x3601, 0x02},
  110. {0x3605, 0x22},
  111. {0x3611, 0xe7},
  112. {0x3654, 0x10},
  113. {0x3655, 0x77},
  114. {0x3656, 0x77},
  115. {0x3657, 0x07},
  116. {0x3658, 0x22},
  117. {0x3659, 0x22},
  118. {0x365a, 0x02},
  119. {0x3784, 0x05},
  120. {0x3785, 0x55},
  121. {0x37c0, 0x07},
  122. {0x3800, 0x00},
  123. {0x3801, 0x04},
  124. {0x3802, 0x00},
  125. {0x3803, 0x04},
  126. {0x3804, 0x05},
  127. {0x3805, 0x0b},
  128. {0x3806, 0x02},
  129. {0x3807, 0xdb},
  130. {0x3808, 0x05},
  131. {0x3809, 0x00},
  132. {0x380a, 0x02},
  133. {0x380b, 0xd0},
  134. {0x380c, 0x05},
  135. {0x380d, 0xc6},
  136. {0x380e, 0x03},
  137. {0x380f, 0x22},
  138. {0x3810, 0x00},
  139. {0x3811, 0x04},
  140. {0x3812, 0x00},
  141. {0x3813, 0x04},
  142. {0x3816, 0x00},
  143. {0x3817, 0x00},
  144. {0x3818, 0x00},
  145. {0x3819, 0x04},
  146. {0x3820, 0x18},
  147. {0x3821, 0x00},
  148. {0x382c, 0x06},
  149. {0x3500, 0x00},
  150. {0x3501, 0x31},
  151. {0x3502, 0x00},
  152. {0x3503, 0x03},
  153. {0x3504, 0x00},
  154. {0x3505, 0x00},
  155. {0x3509, 0x10},
  156. {0x350a, 0x00},
  157. {0x350b, 0x40},
  158. {0x3d00, 0x00},
  159. {0x3d01, 0x00},
  160. {0x3d02, 0x00},
  161. {0x3d03, 0x00},
  162. {0x3d04, 0x00},
  163. {0x3d05, 0x00},
  164. {0x3d06, 0x00},
  165. {0x3d07, 0x00},
  166. {0x3d08, 0x00},
  167. {0x3d09, 0x00},
  168. {0x3d0a, 0x00},
  169. {0x3d0b, 0x00},
  170. {0x3d0c, 0x00},
  171. {0x3d0d, 0x00},
  172. {0x3d0e, 0x00},
  173. {0x3d0f, 0x00},
  174. {0x3d80, 0x00},
  175. {0x3d81, 0x00},
  176. {0x3d82, 0x38},
  177. {0x3d83, 0xa4},
  178. {0x3d84, 0x00},
  179. {0x3d85, 0x00},
  180. {0x3d86, 0x1f},
  181. {0x3d87, 0x03},
  182. {0x3d8b, 0x00},
  183. {0x3d8f, 0x00},
  184. {0x4001, 0xe0},
  185. {0x4009, 0x0b},
  186. {0x4300, 0x03},
  187. {0x4301, 0xff},
  188. {0x4304, 0x00},
  189. {0x4305, 0x00},
  190. {0x4309, 0x00},
  191. {0x4600, 0x00},
  192. {0x4601, 0x80},
  193. {0x4800, 0x00},
  194. {0x4805, 0x00},
  195. {0x4821, 0x50},
  196. {0x4823, 0x50},
  197. {0x4837, 0x2d},
  198. {0x4a00, 0x00},
  199. {0x4f00, 0x80},
  200. {0x4f01, 0x10},
  201. {0x4f02, 0x00},
  202. {0x4f03, 0x00},
  203. {0x4f04, 0x00},
  204. {0x4f05, 0x00},
  205. {0x4f06, 0x00},
  206. {0x4f07, 0x00},
  207. {0x4f08, 0x00},
  208. {0x4f09, 0x00},
  209. {0x5000, 0x2f},
  210. {0x500c, 0x00},
  211. {0x500d, 0x00},
  212. {0x500e, 0x00},
  213. {0x500f, 0x00},
  214. {0x5010, 0x00},
  215. {0x5011, 0x00},
  216. {0x5012, 0x00},
  217. {0x5013, 0x00},
  218. {0x5014, 0x00},
  219. {0x5015, 0x00},
  220. {0x5016, 0x00},
  221. {0x5017, 0x00},
  222. {0x5080, 0x00},
  223. {0x5180, 0x01},
  224. {0x5181, 0x00},
  225. {0x5182, 0x01},
  226. {0x5183, 0x00},
  227. {0x5184, 0x01},
  228. {0x5185, 0x00},
  229. {0x5708, 0x06},
  230. {0x380f, 0x2a},
  231. {0x5780, 0x3e},
  232. {0x5781, 0x0f},
  233. {0x5782, 0x44},
  234. {0x5783, 0x02},
  235. {0x5784, 0x01},
  236. {0x5785, 0x01},
  237. {0x5786, 0x00},
  238. {0x5787, 0x04},
  239. {0x5788, 0x02},
  240. {0x5789, 0x0f},
  241. {0x578a, 0xfd},
  242. {0x578b, 0xf5},
  243. {0x578c, 0xf5},
  244. {0x578d, 0x03},
  245. {0x578e, 0x08},
  246. {0x578f, 0x0c},
  247. {0x5790, 0x08},
  248. {0x5791, 0x04},
  249. {0x5792, 0x00},
  250. {0x5793, 0x52},
  251. {0x5794, 0xa3},
  252. {0x5000, 0x3f},
  253. {0x3801, 0x00},
  254. {0x3803, 0x00},
  255. {0x3805, 0x0f},
  256. {0x3807, 0xdf},
  257. {0x3809, 0x10},
  258. {0x380b, 0xde},
  259. {0x3811, 0x00},
  260. {0x3813, 0x01},
  261. };
  262. static const char * const ov9734_test_pattern_menu[] = {
  263. "Disabled",
  264. "Standard Color Bar",
  265. "Top-Bottom Darker Color Bar",
  266. "Right-Left Darker Color Bar",
  267. "Bottom-Top Darker Color Bar",
  268. };
  269. static const s64 link_freq_menu_items[] = {
  270. OV9734_LINK_FREQ_180MHZ,
  271. };
  272. static const struct ov9734_link_freq_config link_freq_configs[] = {
  273. [OV9734_LINK_FREQ_180MHZ_INDEX] = {
  274. .reg_list = {
  275. .num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps),
  276. .regs = mipi_data_rate_360mbps,
  277. }
  278. },
  279. };
  280. static const struct ov9734_mode supported_modes[] = {
  281. {
  282. .width = 1296,
  283. .height = 734,
  284. .hts = 0x5c6,
  285. .vts_def = OV9734_VTS_30FPS,
  286. .vts_min = OV9734_VTS_30FPS_MIN,
  287. .reg_list = {
  288. .num_of_regs = ARRAY_SIZE(mode_1296x734_regs),
  289. .regs = mode_1296x734_regs,
  290. },
  291. .link_freq_index = OV9734_LINK_FREQ_180MHZ_INDEX,
  292. },
  293. };
  294. struct ov9734 {
  295. struct v4l2_subdev sd;
  296. struct media_pad pad;
  297. struct v4l2_ctrl_handler ctrl_handler;
  298. /* V4L2 Controls */
  299. struct v4l2_ctrl *link_freq;
  300. struct v4l2_ctrl *pixel_rate;
  301. struct v4l2_ctrl *vblank;
  302. struct v4l2_ctrl *hblank;
  303. struct v4l2_ctrl *exposure;
  304. /* Current mode */
  305. const struct ov9734_mode *cur_mode;
  306. /* To serialize asynchronus callbacks */
  307. struct mutex mutex;
  308. /* Streaming on/off */
  309. bool streaming;
  310. };
  311. static inline struct ov9734 *to_ov9734(struct v4l2_subdev *subdev)
  312. {
  313. return container_of(subdev, struct ov9734, sd);
  314. }
  315. static u64 to_pixel_rate(u32 f_index)
  316. {
  317. u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES;
  318. do_div(pixel_rate, OV9734_RGB_DEPTH);
  319. return pixel_rate;
  320. }
  321. static u64 to_pixels_per_line(u32 hts, u32 f_index)
  322. {
  323. u64 ppl = hts * to_pixel_rate(f_index);
  324. do_div(ppl, OV9734_SCLK);
  325. return ppl;
  326. }
  327. static int ov9734_read_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 *val)
  328. {
  329. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  330. struct i2c_msg msgs[2];
  331. u8 addr_buf[2];
  332. u8 data_buf[4] = {0};
  333. int ret;
  334. if (len > sizeof(data_buf))
  335. return -EINVAL;
  336. put_unaligned_be16(reg, addr_buf);
  337. msgs[0].addr = client->addr;
  338. msgs[0].flags = 0;
  339. msgs[0].len = sizeof(addr_buf);
  340. msgs[0].buf = addr_buf;
  341. msgs[1].addr = client->addr;
  342. msgs[1].flags = I2C_M_RD;
  343. msgs[1].len = len;
  344. msgs[1].buf = &data_buf[sizeof(data_buf) - len];
  345. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  346. if (ret != ARRAY_SIZE(msgs))
  347. return ret < 0 ? ret : -EIO;
  348. *val = get_unaligned_be32(data_buf);
  349. return 0;
  350. }
  351. static int ov9734_write_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 val)
  352. {
  353. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  354. u8 buf[6];
  355. int ret = 0;
  356. if (len > 4)
  357. return -EINVAL;
  358. put_unaligned_be16(reg, buf);
  359. put_unaligned_be32(val << 8 * (4 - len), buf + 2);
  360. ret = i2c_master_send(client, buf, len + 2);
  361. if (ret != len + 2)
  362. return ret < 0 ? ret : -EIO;
  363. return 0;
  364. }
  365. static int ov9734_write_reg_list(struct ov9734 *ov9734,
  366. const struct ov9734_reg_list *r_list)
  367. {
  368. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  369. unsigned int i;
  370. int ret;
  371. for (i = 0; i < r_list->num_of_regs; i++) {
  372. ret = ov9734_write_reg(ov9734, r_list->regs[i].address, 1,
  373. r_list->regs[i].val);
  374. if (ret) {
  375. dev_err_ratelimited(&client->dev,
  376. "write reg 0x%4.4x return err = %d",
  377. r_list->regs[i].address, ret);
  378. return ret;
  379. }
  380. }
  381. return 0;
  382. }
  383. static int ov9734_update_digital_gain(struct ov9734 *ov9734, u32 d_gain)
  384. {
  385. int ret;
  386. ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
  387. OV9734_GROUP_HOLD_START);
  388. if (ret)
  389. return ret;
  390. ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_R_GAIN, 2, d_gain);
  391. if (ret)
  392. return ret;
  393. ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_G_GAIN, 2, d_gain);
  394. if (ret)
  395. return ret;
  396. ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_B_GAIN, 2, d_gain);
  397. if (ret)
  398. return ret;
  399. ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
  400. OV9734_GROUP_HOLD_END);
  401. if (ret)
  402. return ret;
  403. ret = ov9734_write_reg(ov9734, OV9734_REG_GROUP_ACCESS, 1,
  404. OV9734_GROUP_HOLD_LAUNCH);
  405. return ret;
  406. }
  407. static int ov9734_test_pattern(struct ov9734 *ov9734, u32 pattern)
  408. {
  409. if (pattern)
  410. pattern = (pattern - 1) << OV9734_TEST_PATTERN_BAR_SHIFT |
  411. OV9734_TEST_PATTERN_ENABLE;
  412. return ov9734_write_reg(ov9734, OV9734_REG_TEST_PATTERN, 1, pattern);
  413. }
  414. static int ov9734_set_ctrl(struct v4l2_ctrl *ctrl)
  415. {
  416. struct ov9734 *ov9734 = container_of(ctrl->handler,
  417. struct ov9734, ctrl_handler);
  418. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  419. s64 exposure_max;
  420. int ret = 0;
  421. /* Propagate change of current control to all related controls */
  422. if (ctrl->id == V4L2_CID_VBLANK) {
  423. /* Update max exposure while meeting expected vblanking */
  424. exposure_max = ov9734->cur_mode->height + ctrl->val -
  425. OV9734_EXPOSURE_MAX_MARGIN;
  426. __v4l2_ctrl_modify_range(ov9734->exposure,
  427. ov9734->exposure->minimum,
  428. exposure_max, ov9734->exposure->step,
  429. exposure_max);
  430. }
  431. /* V4L2 controls values will be applied only when power is already up */
  432. if (!pm_runtime_get_if_in_use(&client->dev))
  433. return 0;
  434. switch (ctrl->id) {
  435. case V4L2_CID_ANALOGUE_GAIN:
  436. ret = ov9734_write_reg(ov9734, OV9734_REG_ANALOG_GAIN,
  437. 2, ctrl->val);
  438. break;
  439. case V4L2_CID_DIGITAL_GAIN:
  440. ret = ov9734_update_digital_gain(ov9734, ctrl->val);
  441. break;
  442. case V4L2_CID_EXPOSURE:
  443. /* 4 least significant bits of expsoure are fractional part */
  444. ret = ov9734_write_reg(ov9734, OV9734_REG_EXPOSURE,
  445. 3, ctrl->val << 4);
  446. break;
  447. case V4L2_CID_VBLANK:
  448. ret = ov9734_write_reg(ov9734, OV9734_REG_VTS, 2,
  449. ov9734->cur_mode->height + ctrl->val);
  450. break;
  451. case V4L2_CID_TEST_PATTERN:
  452. ret = ov9734_test_pattern(ov9734, ctrl->val);
  453. break;
  454. default:
  455. ret = -EINVAL;
  456. break;
  457. }
  458. pm_runtime_put(&client->dev);
  459. return ret;
  460. }
  461. static const struct v4l2_ctrl_ops ov9734_ctrl_ops = {
  462. .s_ctrl = ov9734_set_ctrl,
  463. };
  464. static int ov9734_init_controls(struct ov9734 *ov9734)
  465. {
  466. struct v4l2_ctrl_handler *ctrl_hdlr;
  467. const struct ov9734_mode *cur_mode;
  468. s64 exposure_max, h_blank, pixel_rate;
  469. u32 vblank_min, vblank_max, vblank_default;
  470. int ret, size;
  471. ctrl_hdlr = &ov9734->ctrl_handler;
  472. ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
  473. if (ret)
  474. return ret;
  475. ctrl_hdlr->lock = &ov9734->mutex;
  476. cur_mode = ov9734->cur_mode;
  477. size = ARRAY_SIZE(link_freq_menu_items);
  478. ov9734->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov9734_ctrl_ops,
  479. V4L2_CID_LINK_FREQ,
  480. size - 1, 0,
  481. link_freq_menu_items);
  482. if (ov9734->link_freq)
  483. ov9734->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  484. pixel_rate = to_pixel_rate(OV9734_LINK_FREQ_180MHZ_INDEX);
  485. ov9734->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
  486. V4L2_CID_PIXEL_RATE, 0,
  487. pixel_rate, 1, pixel_rate);
  488. vblank_min = cur_mode->vts_min - cur_mode->height;
  489. vblank_max = OV9734_VTS_MAX - cur_mode->height;
  490. vblank_default = cur_mode->vts_def - cur_mode->height;
  491. ov9734->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
  492. V4L2_CID_VBLANK, vblank_min,
  493. vblank_max, 1, vblank_default);
  494. h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index);
  495. h_blank -= cur_mode->width;
  496. ov9734->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
  497. V4L2_CID_HBLANK, h_blank, h_blank, 1,
  498. h_blank);
  499. if (ov9734->hblank)
  500. ov9734->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  501. v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
  502. OV9734_ANAL_GAIN_MIN, OV9734_ANAL_GAIN_MAX,
  503. OV9734_ANAL_GAIN_STEP, OV9734_ANAL_GAIN_MIN);
  504. v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
  505. OV9734_DGTL_GAIN_MIN, OV9734_DGTL_GAIN_MAX,
  506. OV9734_DGTL_GAIN_STEP, OV9734_DGTL_GAIN_DEFAULT);
  507. exposure_max = ov9734->cur_mode->vts_def - OV9734_EXPOSURE_MAX_MARGIN;
  508. ov9734->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
  509. V4L2_CID_EXPOSURE,
  510. OV9734_EXPOSURE_MIN, exposure_max,
  511. OV9734_EXPOSURE_STEP,
  512. exposure_max);
  513. v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov9734_ctrl_ops,
  514. V4L2_CID_TEST_PATTERN,
  515. ARRAY_SIZE(ov9734_test_pattern_menu) - 1,
  516. 0, 0, ov9734_test_pattern_menu);
  517. if (ctrl_hdlr->error)
  518. return ctrl_hdlr->error;
  519. ov9734->sd.ctrl_handler = ctrl_hdlr;
  520. return 0;
  521. }
  522. static void ov9734_update_pad_format(const struct ov9734_mode *mode,
  523. struct v4l2_mbus_framefmt *fmt)
  524. {
  525. fmt->width = mode->width;
  526. fmt->height = mode->height;
  527. fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  528. fmt->field = V4L2_FIELD_NONE;
  529. }
  530. static int ov9734_start_streaming(struct ov9734 *ov9734)
  531. {
  532. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  533. const struct ov9734_reg_list *reg_list;
  534. int link_freq_index, ret;
  535. link_freq_index = ov9734->cur_mode->link_freq_index;
  536. reg_list = &link_freq_configs[link_freq_index].reg_list;
  537. ret = ov9734_write_reg_list(ov9734, reg_list);
  538. if (ret) {
  539. dev_err(&client->dev, "failed to set plls");
  540. return ret;
  541. }
  542. reg_list = &ov9734->cur_mode->reg_list;
  543. ret = ov9734_write_reg_list(ov9734, reg_list);
  544. if (ret) {
  545. dev_err(&client->dev, "failed to set mode");
  546. return ret;
  547. }
  548. ret = __v4l2_ctrl_handler_setup(ov9734->sd.ctrl_handler);
  549. if (ret)
  550. return ret;
  551. ret = ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
  552. 1, OV9734_MODE_STREAMING);
  553. if (ret)
  554. dev_err(&client->dev, "failed to start stream");
  555. return ret;
  556. }
  557. static void ov9734_stop_streaming(struct ov9734 *ov9734)
  558. {
  559. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  560. if (ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
  561. 1, OV9734_MODE_STANDBY))
  562. dev_err(&client->dev, "failed to stop stream");
  563. }
  564. static int ov9734_set_stream(struct v4l2_subdev *sd, int enable)
  565. {
  566. struct ov9734 *ov9734 = to_ov9734(sd);
  567. struct i2c_client *client = v4l2_get_subdevdata(sd);
  568. int ret = 0;
  569. mutex_lock(&ov9734->mutex);
  570. if (ov9734->streaming == enable) {
  571. mutex_unlock(&ov9734->mutex);
  572. return 0;
  573. }
  574. if (enable) {
  575. ret = pm_runtime_resume_and_get(&client->dev);
  576. if (ret < 0) {
  577. mutex_unlock(&ov9734->mutex);
  578. return ret;
  579. }
  580. ret = ov9734_start_streaming(ov9734);
  581. if (ret) {
  582. enable = 0;
  583. ov9734_stop_streaming(ov9734);
  584. pm_runtime_put(&client->dev);
  585. }
  586. } else {
  587. ov9734_stop_streaming(ov9734);
  588. pm_runtime_put(&client->dev);
  589. }
  590. ov9734->streaming = enable;
  591. mutex_unlock(&ov9734->mutex);
  592. return ret;
  593. }
  594. static int __maybe_unused ov9734_suspend(struct device *dev)
  595. {
  596. struct i2c_client *client = to_i2c_client(dev);
  597. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  598. struct ov9734 *ov9734 = to_ov9734(sd);
  599. mutex_lock(&ov9734->mutex);
  600. if (ov9734->streaming)
  601. ov9734_stop_streaming(ov9734);
  602. mutex_unlock(&ov9734->mutex);
  603. return 0;
  604. }
  605. static int __maybe_unused ov9734_resume(struct device *dev)
  606. {
  607. struct i2c_client *client = to_i2c_client(dev);
  608. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  609. struct ov9734 *ov9734 = to_ov9734(sd);
  610. int ret = 0;
  611. mutex_lock(&ov9734->mutex);
  612. if (!ov9734->streaming)
  613. goto exit;
  614. ret = ov9734_start_streaming(ov9734);
  615. if (ret) {
  616. ov9734->streaming = false;
  617. ov9734_stop_streaming(ov9734);
  618. }
  619. exit:
  620. mutex_unlock(&ov9734->mutex);
  621. return ret;
  622. }
  623. static int ov9734_set_format(struct v4l2_subdev *sd,
  624. struct v4l2_subdev_state *sd_state,
  625. struct v4l2_subdev_format *fmt)
  626. {
  627. struct ov9734 *ov9734 = to_ov9734(sd);
  628. const struct ov9734_mode *mode;
  629. s32 vblank_def, h_blank;
  630. mode = v4l2_find_nearest_size(supported_modes,
  631. ARRAY_SIZE(supported_modes), width,
  632. height, fmt->format.width,
  633. fmt->format.height);
  634. mutex_lock(&ov9734->mutex);
  635. ov9734_update_pad_format(mode, &fmt->format);
  636. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  637. *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
  638. } else {
  639. ov9734->cur_mode = mode;
  640. __v4l2_ctrl_s_ctrl(ov9734->link_freq, mode->link_freq_index);
  641. __v4l2_ctrl_s_ctrl_int64(ov9734->pixel_rate,
  642. to_pixel_rate(mode->link_freq_index));
  643. /* Update limits and set FPS to default */
  644. vblank_def = mode->vts_def - mode->height;
  645. __v4l2_ctrl_modify_range(ov9734->vblank,
  646. mode->vts_min - mode->height,
  647. OV9734_VTS_MAX - mode->height, 1,
  648. vblank_def);
  649. __v4l2_ctrl_s_ctrl(ov9734->vblank, vblank_def);
  650. h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
  651. mode->width;
  652. __v4l2_ctrl_modify_range(ov9734->hblank, h_blank, h_blank, 1,
  653. h_blank);
  654. }
  655. mutex_unlock(&ov9734->mutex);
  656. return 0;
  657. }
  658. static int ov9734_get_format(struct v4l2_subdev *sd,
  659. struct v4l2_subdev_state *sd_state,
  660. struct v4l2_subdev_format *fmt)
  661. {
  662. struct ov9734 *ov9734 = to_ov9734(sd);
  663. mutex_lock(&ov9734->mutex);
  664. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
  665. fmt->format = *v4l2_subdev_get_try_format(&ov9734->sd,
  666. sd_state,
  667. fmt->pad);
  668. else
  669. ov9734_update_pad_format(ov9734->cur_mode, &fmt->format);
  670. mutex_unlock(&ov9734->mutex);
  671. return 0;
  672. }
  673. static int ov9734_enum_mbus_code(struct v4l2_subdev *sd,
  674. struct v4l2_subdev_state *sd_state,
  675. struct v4l2_subdev_mbus_code_enum *code)
  676. {
  677. if (code->index > 0)
  678. return -EINVAL;
  679. code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  680. return 0;
  681. }
  682. static int ov9734_enum_frame_size(struct v4l2_subdev *sd,
  683. struct v4l2_subdev_state *sd_state,
  684. struct v4l2_subdev_frame_size_enum *fse)
  685. {
  686. if (fse->index >= ARRAY_SIZE(supported_modes))
  687. return -EINVAL;
  688. if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
  689. return -EINVAL;
  690. fse->min_width = supported_modes[fse->index].width;
  691. fse->max_width = fse->min_width;
  692. fse->min_height = supported_modes[fse->index].height;
  693. fse->max_height = fse->min_height;
  694. return 0;
  695. }
  696. static int ov9734_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  697. {
  698. struct ov9734 *ov9734 = to_ov9734(sd);
  699. mutex_lock(&ov9734->mutex);
  700. ov9734_update_pad_format(&supported_modes[0],
  701. v4l2_subdev_get_try_format(sd, fh->state, 0));
  702. mutex_unlock(&ov9734->mutex);
  703. return 0;
  704. }
  705. static const struct v4l2_subdev_video_ops ov9734_video_ops = {
  706. .s_stream = ov9734_set_stream,
  707. };
  708. static const struct v4l2_subdev_pad_ops ov9734_pad_ops = {
  709. .set_fmt = ov9734_set_format,
  710. .get_fmt = ov9734_get_format,
  711. .enum_mbus_code = ov9734_enum_mbus_code,
  712. .enum_frame_size = ov9734_enum_frame_size,
  713. };
  714. static const struct v4l2_subdev_ops ov9734_subdev_ops = {
  715. .video = &ov9734_video_ops,
  716. .pad = &ov9734_pad_ops,
  717. };
  718. static const struct media_entity_operations ov9734_subdev_entity_ops = {
  719. .link_validate = v4l2_subdev_link_validate,
  720. };
  721. static const struct v4l2_subdev_internal_ops ov9734_internal_ops = {
  722. .open = ov9734_open,
  723. };
  724. static int ov9734_identify_module(struct ov9734 *ov9734)
  725. {
  726. struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
  727. int ret;
  728. u32 val;
  729. ret = ov9734_read_reg(ov9734, OV9734_REG_CHIP_ID, 2, &val);
  730. if (ret)
  731. return ret;
  732. if (val != OV9734_CHIP_ID) {
  733. dev_err(&client->dev, "chip id mismatch: %x!=%x",
  734. OV9734_CHIP_ID, val);
  735. return -ENXIO;
  736. }
  737. return 0;
  738. }
  739. static int ov9734_check_hwcfg(struct device *dev)
  740. {
  741. struct fwnode_handle *ep;
  742. struct fwnode_handle *fwnode = dev_fwnode(dev);
  743. struct v4l2_fwnode_endpoint bus_cfg = {
  744. .bus_type = V4L2_MBUS_CSI2_DPHY
  745. };
  746. u32 mclk;
  747. int ret;
  748. unsigned int i, j;
  749. if (!fwnode)
  750. return -ENXIO;
  751. ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
  752. if (ret)
  753. return ret;
  754. if (mclk != OV9734_MCLK) {
  755. dev_err(dev, "external clock %d is not supported", mclk);
  756. return -EINVAL;
  757. }
  758. ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
  759. if (!ep)
  760. return -ENXIO;
  761. ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
  762. fwnode_handle_put(ep);
  763. if (ret)
  764. return ret;
  765. if (!bus_cfg.nr_of_link_frequencies) {
  766. dev_err(dev, "no link frequencies defined");
  767. ret = -EINVAL;
  768. goto check_hwcfg_error;
  769. }
  770. for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
  771. for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
  772. if (link_freq_menu_items[i] ==
  773. bus_cfg.link_frequencies[j])
  774. break;
  775. }
  776. if (j == bus_cfg.nr_of_link_frequencies) {
  777. dev_err(dev, "no link frequency %lld supported",
  778. link_freq_menu_items[i]);
  779. ret = -EINVAL;
  780. goto check_hwcfg_error;
  781. }
  782. }
  783. check_hwcfg_error:
  784. v4l2_fwnode_endpoint_free(&bus_cfg);
  785. return ret;
  786. }
  787. static void ov9734_remove(struct i2c_client *client)
  788. {
  789. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  790. struct ov9734 *ov9734 = to_ov9734(sd);
  791. v4l2_async_unregister_subdev(sd);
  792. media_entity_cleanup(&sd->entity);
  793. v4l2_ctrl_handler_free(sd->ctrl_handler);
  794. pm_runtime_disable(&client->dev);
  795. mutex_destroy(&ov9734->mutex);
  796. }
  797. static int ov9734_probe(struct i2c_client *client)
  798. {
  799. struct ov9734 *ov9734;
  800. int ret;
  801. ret = ov9734_check_hwcfg(&client->dev);
  802. if (ret) {
  803. dev_err(&client->dev, "failed to check HW configuration: %d",
  804. ret);
  805. return ret;
  806. }
  807. ov9734 = devm_kzalloc(&client->dev, sizeof(*ov9734), GFP_KERNEL);
  808. if (!ov9734)
  809. return -ENOMEM;
  810. v4l2_i2c_subdev_init(&ov9734->sd, client, &ov9734_subdev_ops);
  811. ret = ov9734_identify_module(ov9734);
  812. if (ret) {
  813. dev_err(&client->dev, "failed to find sensor: %d", ret);
  814. return ret;
  815. }
  816. mutex_init(&ov9734->mutex);
  817. ov9734->cur_mode = &supported_modes[0];
  818. ret = ov9734_init_controls(ov9734);
  819. if (ret) {
  820. dev_err(&client->dev, "failed to init controls: %d", ret);
  821. goto probe_error_v4l2_ctrl_handler_free;
  822. }
  823. ov9734->sd.internal_ops = &ov9734_internal_ops;
  824. ov9734->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  825. ov9734->sd.entity.ops = &ov9734_subdev_entity_ops;
  826. ov9734->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  827. ov9734->pad.flags = MEDIA_PAD_FL_SOURCE;
  828. ret = media_entity_pads_init(&ov9734->sd.entity, 1, &ov9734->pad);
  829. if (ret) {
  830. dev_err(&client->dev, "failed to init entity pads: %d", ret);
  831. goto probe_error_v4l2_ctrl_handler_free;
  832. }
  833. ret = v4l2_async_register_subdev_sensor(&ov9734->sd);
  834. if (ret < 0) {
  835. dev_err(&client->dev, "failed to register V4L2 subdev: %d",
  836. ret);
  837. goto probe_error_media_entity_cleanup;
  838. }
  839. /*
  840. * Device is already turned on by i2c-core with ACPI domain PM.
  841. * Enable runtime PM and turn off the device.
  842. */
  843. pm_runtime_set_active(&client->dev);
  844. pm_runtime_enable(&client->dev);
  845. pm_runtime_idle(&client->dev);
  846. return 0;
  847. probe_error_media_entity_cleanup:
  848. media_entity_cleanup(&ov9734->sd.entity);
  849. probe_error_v4l2_ctrl_handler_free:
  850. v4l2_ctrl_handler_free(ov9734->sd.ctrl_handler);
  851. mutex_destroy(&ov9734->mutex);
  852. return ret;
  853. }
  854. static const struct dev_pm_ops ov9734_pm_ops = {
  855. SET_SYSTEM_SLEEP_PM_OPS(ov9734_suspend, ov9734_resume)
  856. };
  857. static const struct acpi_device_id ov9734_acpi_ids[] = {
  858. { "OVTI9734", },
  859. {}
  860. };
  861. MODULE_DEVICE_TABLE(acpi, ov9734_acpi_ids);
  862. static struct i2c_driver ov9734_i2c_driver = {
  863. .driver = {
  864. .name = "ov9734",
  865. .pm = &ov9734_pm_ops,
  866. .acpi_match_table = ov9734_acpi_ids,
  867. },
  868. .probe_new = ov9734_probe,
  869. .remove = ov9734_remove,
  870. };
  871. module_i2c_driver(ov9734_i2c_driver);
  872. MODULE_AUTHOR("Qiu, Tianshu <[email protected]>");
  873. MODULE_AUTHOR("Bingbu Cao <[email protected]>");
  874. MODULE_DESCRIPTION("OmniVision OV9734 sensor driver");
  875. MODULE_LICENSE("GPL v2");