ov5693.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
  4. *
  5. * Adapted from the atomisp-ov5693 driver, with contributions from:
  6. *
  7. * Daniel Scally
  8. * Jean-Michel Hautbois
  9. * Fabian Wuthrich
  10. * Tsuchiya Yuto
  11. * Jordan Hand
  12. * Jake Day
  13. */
  14. #include <asm/unaligned.h>
  15. #include <linux/acpi.h>
  16. #include <linux/clk.h>
  17. #include <linux/delay.h>
  18. #include <linux/device.h>
  19. #include <linux/i2c.h>
  20. #include <linux/module.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/slab.h>
  24. #include <linux/types.h>
  25. #include <media/v4l2-ctrls.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-fwnode.h>
  28. #define OV5693_REG_8BIT(n) ((1 << 16) | (n))
  29. #define OV5693_REG_16BIT(n) ((2 << 16) | (n))
  30. #define OV5693_REG_24BIT(n) ((3 << 16) | (n))
  31. #define OV5693_REG_SIZE_SHIFT 16
  32. #define OV5693_REG_ADDR_MASK 0xffff
  33. /* System Control */
  34. #define OV5693_SW_RESET_REG OV5693_REG_8BIT(0x0103)
  35. #define OV5693_SW_STREAM_REG OV5693_REG_8BIT(0x0100)
  36. #define OV5693_START_STREAMING 0x01
  37. #define OV5693_STOP_STREAMING 0x00
  38. #define OV5693_SW_RESET 0x01
  39. #define OV5693_REG_CHIP_ID OV5693_REG_16BIT(0x300a)
  40. /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */
  41. #define OV5693_CHIP_ID 0x5690
  42. /* Exposure */
  43. #define OV5693_EXPOSURE_CTRL_REG OV5693_REG_24BIT(0x3500)
  44. #define OV5693_EXPOSURE_CTRL_MASK GENMASK(19, 4)
  45. #define OV5693_INTEGRATION_TIME_MARGIN 8
  46. #define OV5693_EXPOSURE_MIN 1
  47. #define OV5693_EXPOSURE_STEP 1
  48. /* Analogue Gain */
  49. #define OV5693_GAIN_CTRL_REG OV5693_REG_16BIT(0x350a)
  50. #define OV5693_GAIN_CTRL_MASK GENMASK(10, 4)
  51. #define OV5693_GAIN_MIN 1
  52. #define OV5693_GAIN_MAX 127
  53. #define OV5693_GAIN_DEF 8
  54. #define OV5693_GAIN_STEP 1
  55. /* Digital Gain */
  56. #define OV5693_MWB_RED_GAIN_REG OV5693_REG_16BIT(0x3400)
  57. #define OV5693_MWB_GREEN_GAIN_REG OV5693_REG_16BIT(0x3402)
  58. #define OV5693_MWB_BLUE_GAIN_REG OV5693_REG_16BIT(0x3404)
  59. #define OV5693_MWB_GAIN_MASK GENMASK(11, 0)
  60. #define OV5693_MWB_GAIN_MAX 0x0fff
  61. #define OV5693_DIGITAL_GAIN_MIN 1
  62. #define OV5693_DIGITAL_GAIN_MAX 4095
  63. #define OV5693_DIGITAL_GAIN_DEF 1024
  64. #define OV5693_DIGITAL_GAIN_STEP 1
  65. /* Timing and Format */
  66. #define OV5693_CROP_START_X_REG OV5693_REG_16BIT(0x3800)
  67. #define OV5693_CROP_START_Y_REG OV5693_REG_16BIT(0x3802)
  68. #define OV5693_CROP_END_X_REG OV5693_REG_16BIT(0x3804)
  69. #define OV5693_CROP_END_Y_REG OV5693_REG_16BIT(0x3806)
  70. #define OV5693_OUTPUT_SIZE_X_REG OV5693_REG_16BIT(0x3808)
  71. #define OV5693_OUTPUT_SIZE_Y_REG OV5693_REG_16BIT(0x380a)
  72. #define OV5693_TIMING_HTS_REG OV5693_REG_16BIT(0x380c)
  73. #define OV5693_FIXED_PPL 2688U
  74. #define OV5693_TIMING_VTS_REG OV5693_REG_16BIT(0x380e)
  75. #define OV5693_TIMING_MAX_VTS 0xffff
  76. #define OV5693_TIMING_MIN_VTS 0x04
  77. #define OV5693_OFFSET_START_X_REG OV5693_REG_16BIT(0x3810)
  78. #define OV5693_OFFSET_START_Y_REG OV5693_REG_16BIT(0x3812)
  79. #define OV5693_SUB_INC_X_REG OV5693_REG_8BIT(0x3814)
  80. #define OV5693_SUB_INC_Y_REG OV5693_REG_8BIT(0x3815)
  81. #define OV5693_FORMAT1_REG OV5693_REG_8BIT(0x3820)
  82. #define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(6)
  83. #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1)
  84. #define OV5693_FORMAT1_VBIN_EN BIT(0)
  85. #define OV5693_FORMAT2_REG OV5693_REG_8BIT(0x3821)
  86. #define OV5693_FORMAT2_HDR_EN BIT(7)
  87. #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN BIT(2)
  88. #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN BIT(1)
  89. #define OV5693_FORMAT2_HBIN_EN BIT(0)
  90. #define OV5693_ISP_CTRL2_REG OV5693_REG_8BIT(0x5002)
  91. #define OV5693_ISP_SCALE_ENABLE BIT(7)
  92. /* Pixel Array */
  93. #define OV5693_NATIVE_WIDTH 2624
  94. #define OV5693_NATIVE_HEIGHT 1956
  95. #define OV5693_NATIVE_START_LEFT 0
  96. #define OV5693_NATIVE_START_TOP 0
  97. #define OV5693_ACTIVE_WIDTH 2592
  98. #define OV5693_ACTIVE_HEIGHT 1944
  99. #define OV5693_ACTIVE_START_LEFT 16
  100. #define OV5693_ACTIVE_START_TOP 6
  101. #define OV5693_MIN_CROP_WIDTH 2
  102. #define OV5693_MIN_CROP_HEIGHT 2
  103. /* Test Pattern */
  104. #define OV5693_TEST_PATTERN_REG OV5693_REG_8BIT(0x5e00)
  105. #define OV5693_TEST_PATTERN_ENABLE BIT(7)
  106. #define OV5693_TEST_PATTERN_ROLLING BIT(6)
  107. #define OV5693_TEST_PATTERN_RANDOM 0x01
  108. #define OV5693_TEST_PATTERN_BARS 0x00
  109. /* System Frequencies */
  110. #define OV5693_XVCLK_FREQ 19200000
  111. #define OV5693_LINK_FREQ_419_2MHZ 419200000
  112. #define OV5693_PIXEL_RATE 167680000
  113. #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd)
  114. static const char * const ov5693_supply_names[] = {
  115. "avdd", /* Analog power */
  116. "dovdd", /* Digital I/O power */
  117. "dvdd", /* Digital circuit power */
  118. };
  119. #define OV5693_NUM_SUPPLIES ARRAY_SIZE(ov5693_supply_names)
  120. struct ov5693_reg {
  121. u32 reg;
  122. u8 val;
  123. };
  124. struct ov5693_reg_list {
  125. u32 num_regs;
  126. const struct ov5693_reg *regs;
  127. };
  128. struct ov5693_device {
  129. struct i2c_client *client;
  130. struct device *dev;
  131. /* Protect against concurrent changes to controls */
  132. struct mutex lock;
  133. struct gpio_desc *reset;
  134. struct gpio_desc *powerdown;
  135. struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES];
  136. struct clk *xvclk;
  137. struct ov5693_mode {
  138. struct v4l2_rect crop;
  139. struct v4l2_mbus_framefmt format;
  140. bool binning_x;
  141. bool binning_y;
  142. unsigned int inc_x_odd;
  143. unsigned int inc_y_odd;
  144. unsigned int vts;
  145. } mode;
  146. bool streaming;
  147. struct v4l2_subdev sd;
  148. struct media_pad pad;
  149. struct ov5693_v4l2_ctrls {
  150. struct v4l2_ctrl_handler handler;
  151. struct v4l2_ctrl *link_freq;
  152. struct v4l2_ctrl *pixel_rate;
  153. struct v4l2_ctrl *exposure;
  154. struct v4l2_ctrl *analogue_gain;
  155. struct v4l2_ctrl *digital_gain;
  156. struct v4l2_ctrl *hflip;
  157. struct v4l2_ctrl *vflip;
  158. struct v4l2_ctrl *hblank;
  159. struct v4l2_ctrl *vblank;
  160. struct v4l2_ctrl *test_pattern;
  161. } ctrls;
  162. };
  163. static const struct ov5693_reg ov5693_global_regs[] = {
  164. {OV5693_REG_8BIT(0x3016), 0xf0},
  165. {OV5693_REG_8BIT(0x3017), 0xf0},
  166. {OV5693_REG_8BIT(0x3018), 0xf0},
  167. {OV5693_REG_8BIT(0x3022), 0x01},
  168. {OV5693_REG_8BIT(0x3028), 0x44},
  169. {OV5693_REG_8BIT(0x3098), 0x02},
  170. {OV5693_REG_8BIT(0x3099), 0x19},
  171. {OV5693_REG_8BIT(0x309a), 0x02},
  172. {OV5693_REG_8BIT(0x309b), 0x01},
  173. {OV5693_REG_8BIT(0x309c), 0x00},
  174. {OV5693_REG_8BIT(0x30a0), 0xd2},
  175. {OV5693_REG_8BIT(0x30a2), 0x01},
  176. {OV5693_REG_8BIT(0x30b2), 0x00},
  177. {OV5693_REG_8BIT(0x30b3), 0x83},
  178. {OV5693_REG_8BIT(0x30b4), 0x03},
  179. {OV5693_REG_8BIT(0x30b5), 0x04},
  180. {OV5693_REG_8BIT(0x30b6), 0x01},
  181. {OV5693_REG_8BIT(0x3080), 0x01},
  182. {OV5693_REG_8BIT(0x3104), 0x21},
  183. {OV5693_REG_8BIT(0x3106), 0x00},
  184. {OV5693_REG_8BIT(0x3406), 0x01},
  185. {OV5693_REG_8BIT(0x3503), 0x07},
  186. {OV5693_REG_8BIT(0x350b), 0x40},
  187. {OV5693_REG_8BIT(0x3601), 0x0a},
  188. {OV5693_REG_8BIT(0x3602), 0x38},
  189. {OV5693_REG_8BIT(0x3612), 0x80},
  190. {OV5693_REG_8BIT(0x3620), 0x54},
  191. {OV5693_REG_8BIT(0x3621), 0xc7},
  192. {OV5693_REG_8BIT(0x3622), 0x0f},
  193. {OV5693_REG_8BIT(0x3625), 0x10},
  194. {OV5693_REG_8BIT(0x3630), 0x55},
  195. {OV5693_REG_8BIT(0x3631), 0xf4},
  196. {OV5693_REG_8BIT(0x3632), 0x00},
  197. {OV5693_REG_8BIT(0x3633), 0x34},
  198. {OV5693_REG_8BIT(0x3634), 0x02},
  199. {OV5693_REG_8BIT(0x364d), 0x0d},
  200. {OV5693_REG_8BIT(0x364f), 0xdd},
  201. {OV5693_REG_8BIT(0x3660), 0x04},
  202. {OV5693_REG_8BIT(0x3662), 0x10},
  203. {OV5693_REG_8BIT(0x3663), 0xf1},
  204. {OV5693_REG_8BIT(0x3665), 0x00},
  205. {OV5693_REG_8BIT(0x3666), 0x20},
  206. {OV5693_REG_8BIT(0x3667), 0x00},
  207. {OV5693_REG_8BIT(0x366a), 0x80},
  208. {OV5693_REG_8BIT(0x3680), 0xe0},
  209. {OV5693_REG_8BIT(0x3681), 0x00},
  210. {OV5693_REG_8BIT(0x3700), 0x42},
  211. {OV5693_REG_8BIT(0x3701), 0x14},
  212. {OV5693_REG_8BIT(0x3702), 0xa0},
  213. {OV5693_REG_8BIT(0x3703), 0xd8},
  214. {OV5693_REG_8BIT(0x3704), 0x78},
  215. {OV5693_REG_8BIT(0x3705), 0x02},
  216. {OV5693_REG_8BIT(0x370a), 0x00},
  217. {OV5693_REG_8BIT(0x370b), 0x20},
  218. {OV5693_REG_8BIT(0x370c), 0x0c},
  219. {OV5693_REG_8BIT(0x370d), 0x11},
  220. {OV5693_REG_8BIT(0x370e), 0x00},
  221. {OV5693_REG_8BIT(0x370f), 0x40},
  222. {OV5693_REG_8BIT(0x3710), 0x00},
  223. {OV5693_REG_8BIT(0x371a), 0x1c},
  224. {OV5693_REG_8BIT(0x371b), 0x05},
  225. {OV5693_REG_8BIT(0x371c), 0x01},
  226. {OV5693_REG_8BIT(0x371e), 0xa1},
  227. {OV5693_REG_8BIT(0x371f), 0x0c},
  228. {OV5693_REG_8BIT(0x3721), 0x00},
  229. {OV5693_REG_8BIT(0x3724), 0x10},
  230. {OV5693_REG_8BIT(0x3726), 0x00},
  231. {OV5693_REG_8BIT(0x372a), 0x01},
  232. {OV5693_REG_8BIT(0x3730), 0x10},
  233. {OV5693_REG_8BIT(0x3738), 0x22},
  234. {OV5693_REG_8BIT(0x3739), 0xe5},
  235. {OV5693_REG_8BIT(0x373a), 0x50},
  236. {OV5693_REG_8BIT(0x373b), 0x02},
  237. {OV5693_REG_8BIT(0x373c), 0x41},
  238. {OV5693_REG_8BIT(0x373f), 0x02},
  239. {OV5693_REG_8BIT(0x3740), 0x42},
  240. {OV5693_REG_8BIT(0x3741), 0x02},
  241. {OV5693_REG_8BIT(0x3742), 0x18},
  242. {OV5693_REG_8BIT(0x3743), 0x01},
  243. {OV5693_REG_8BIT(0x3744), 0x02},
  244. {OV5693_REG_8BIT(0x3747), 0x10},
  245. {OV5693_REG_8BIT(0x374c), 0x04},
  246. {OV5693_REG_8BIT(0x3751), 0xf0},
  247. {OV5693_REG_8BIT(0x3752), 0x00},
  248. {OV5693_REG_8BIT(0x3753), 0x00},
  249. {OV5693_REG_8BIT(0x3754), 0xc0},
  250. {OV5693_REG_8BIT(0x3755), 0x00},
  251. {OV5693_REG_8BIT(0x3756), 0x1a},
  252. {OV5693_REG_8BIT(0x3758), 0x00},
  253. {OV5693_REG_8BIT(0x3759), 0x0f},
  254. {OV5693_REG_8BIT(0x376b), 0x44},
  255. {OV5693_REG_8BIT(0x375c), 0x04},
  256. {OV5693_REG_8BIT(0x3774), 0x10},
  257. {OV5693_REG_8BIT(0x3776), 0x00},
  258. {OV5693_REG_8BIT(0x377f), 0x08},
  259. {OV5693_REG_8BIT(0x3780), 0x22},
  260. {OV5693_REG_8BIT(0x3781), 0x0c},
  261. {OV5693_REG_8BIT(0x3784), 0x2c},
  262. {OV5693_REG_8BIT(0x3785), 0x1e},
  263. {OV5693_REG_8BIT(0x378f), 0xf5},
  264. {OV5693_REG_8BIT(0x3791), 0xb0},
  265. {OV5693_REG_8BIT(0x3795), 0x00},
  266. {OV5693_REG_8BIT(0x3796), 0x64},
  267. {OV5693_REG_8BIT(0x3797), 0x11},
  268. {OV5693_REG_8BIT(0x3798), 0x30},
  269. {OV5693_REG_8BIT(0x3799), 0x41},
  270. {OV5693_REG_8BIT(0x379a), 0x07},
  271. {OV5693_REG_8BIT(0x379b), 0xb0},
  272. {OV5693_REG_8BIT(0x379c), 0x0c},
  273. {OV5693_REG_8BIT(0x3a04), 0x06},
  274. {OV5693_REG_8BIT(0x3a05), 0x14},
  275. {OV5693_REG_8BIT(0x3e07), 0x20},
  276. {OV5693_REG_8BIT(0x4000), 0x08},
  277. {OV5693_REG_8BIT(0x4001), 0x04},
  278. {OV5693_REG_8BIT(0x4004), 0x08},
  279. {OV5693_REG_8BIT(0x4006), 0x20},
  280. {OV5693_REG_8BIT(0x4008), 0x24},
  281. {OV5693_REG_8BIT(0x4009), 0x10},
  282. {OV5693_REG_8BIT(0x4058), 0x00},
  283. {OV5693_REG_8BIT(0x4101), 0xb2},
  284. {OV5693_REG_8BIT(0x4307), 0x31},
  285. {OV5693_REG_8BIT(0x4511), 0x05},
  286. {OV5693_REG_8BIT(0x4512), 0x01},
  287. {OV5693_REG_8BIT(0x481f), 0x30},
  288. {OV5693_REG_8BIT(0x4826), 0x2c},
  289. {OV5693_REG_8BIT(0x4d02), 0xfd},
  290. {OV5693_REG_8BIT(0x4d03), 0xf5},
  291. {OV5693_REG_8BIT(0x4d04), 0x0c},
  292. {OV5693_REG_8BIT(0x4d05), 0xcc},
  293. {OV5693_REG_8BIT(0x4837), 0x0a},
  294. {OV5693_REG_8BIT(0x5003), 0x20},
  295. {OV5693_REG_8BIT(0x5013), 0x00},
  296. {OV5693_REG_8BIT(0x5842), 0x01},
  297. {OV5693_REG_8BIT(0x5843), 0x2b},
  298. {OV5693_REG_8BIT(0x5844), 0x01},
  299. {OV5693_REG_8BIT(0x5845), 0x92},
  300. {OV5693_REG_8BIT(0x5846), 0x01},
  301. {OV5693_REG_8BIT(0x5847), 0x8f},
  302. {OV5693_REG_8BIT(0x5848), 0x01},
  303. {OV5693_REG_8BIT(0x5849), 0x0c},
  304. {OV5693_REG_8BIT(0x5e10), 0x0c},
  305. {OV5693_REG_8BIT(0x3820), 0x00},
  306. {OV5693_REG_8BIT(0x3821), 0x1e},
  307. {OV5693_REG_8BIT(0x5041), 0x14}
  308. };
  309. static const struct ov5693_reg_list ov5693_global_setting = {
  310. .num_regs = ARRAY_SIZE(ov5693_global_regs),
  311. .regs = ov5693_global_regs,
  312. };
  313. static const struct v4l2_rect ov5693_default_crop = {
  314. .left = OV5693_ACTIVE_START_LEFT,
  315. .top = OV5693_ACTIVE_START_TOP,
  316. .width = OV5693_ACTIVE_WIDTH,
  317. .height = OV5693_ACTIVE_HEIGHT,
  318. };
  319. static const struct v4l2_mbus_framefmt ov5693_default_fmt = {
  320. .width = OV5693_ACTIVE_WIDTH,
  321. .height = OV5693_ACTIVE_HEIGHT,
  322. .code = MEDIA_BUS_FMT_SBGGR10_1X10,
  323. };
  324. static const s64 link_freq_menu_items[] = {
  325. OV5693_LINK_FREQ_419_2MHZ
  326. };
  327. static const char * const ov5693_test_pattern_menu[] = {
  328. "Disabled",
  329. "Random Data",
  330. "Colour Bars",
  331. "Colour Bars with Rolling Bar"
  332. };
  333. static const u8 ov5693_test_pattern_bits[] = {
  334. 0,
  335. OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM,
  336. OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS,
  337. OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS |
  338. OV5693_TEST_PATTERN_ROLLING,
  339. };
  340. /* I2C I/O Operations */
  341. static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value)
  342. {
  343. struct i2c_client *client = ov5693->client;
  344. __be16 reg;
  345. u8 val[4];
  346. struct i2c_msg msg[] = {
  347. {
  348. .addr = client->addr,
  349. .flags = 0,
  350. .len = 2,
  351. .buf = (u8 *)&reg,
  352. },
  353. {
  354. .addr = client->addr,
  355. .flags = I2C_M_RD,
  356. .buf = (u8 *)&val,
  357. },
  358. };
  359. unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
  360. unsigned int i;
  361. int ret;
  362. reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
  363. msg[1].len = len;
  364. ret = i2c_transfer(client->adapter, msg, 2);
  365. if (ret < 0)
  366. return dev_err_probe(&client->dev, ret,
  367. "Failed to read register 0x%04x: %d\n",
  368. addr & OV5693_REG_ADDR_MASK, ret);
  369. *value = 0;
  370. for (i = 0; i < len; ++i) {
  371. *value <<= 8;
  372. *value |= val[i];
  373. }
  374. return 0;
  375. }
  376. static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value,
  377. int *error)
  378. {
  379. struct i2c_client *client = ov5693->client;
  380. struct {
  381. __be16 reg;
  382. u8 val[4];
  383. } __packed buf;
  384. struct i2c_msg msg = {
  385. .addr = client->addr,
  386. .buf = (u8 *)&buf,
  387. };
  388. unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
  389. unsigned int i;
  390. int ret;
  391. if (*error < 0)
  392. return;
  393. buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
  394. for (i = 0; i < len; ++i) {
  395. buf.val[len - i - 1] = value & 0xff;
  396. value >>= 8;
  397. }
  398. msg.len = len + 2;
  399. ret = i2c_transfer(client->adapter, &msg, 1);
  400. if (ret < 0) {
  401. dev_err(&client->dev, "Failed to write register 0x%04x: %d\n",
  402. addr & OV5693_REG_ADDR_MASK, ret);
  403. *error = ret;
  404. }
  405. }
  406. static int ov5693_write_reg_array(struct ov5693_device *ov5693,
  407. const struct ov5693_reg_list *reglist)
  408. {
  409. unsigned int i;
  410. int ret = 0;
  411. for (i = 0; i < reglist->num_regs; i++)
  412. ov5693_write_reg(ov5693, reglist->regs[i].reg,
  413. reglist->regs[i].val, &ret);
  414. return ret;
  415. }
  416. static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address,
  417. u32 mask, u32 bits)
  418. {
  419. u32 value = 0;
  420. int ret;
  421. ret = ov5693_read_reg(ov5693, address, &value);
  422. if (ret)
  423. return ret;
  424. value &= ~mask;
  425. value |= bits;
  426. ov5693_write_reg(ov5693, address, value, &ret);
  427. return ret;
  428. }
  429. /* V4L2 Controls Functions */
  430. static int ov5693_flip_vert_configure(struct ov5693_device *ov5693,
  431. bool enable)
  432. {
  433. u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN |
  434. OV5693_FORMAT1_FLIP_VERT_SENSOR_EN;
  435. int ret;
  436. ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits,
  437. enable ? bits : 0);
  438. if (ret)
  439. return ret;
  440. return 0;
  441. }
  442. static int ov5693_flip_horz_configure(struct ov5693_device *ov5693,
  443. bool enable)
  444. {
  445. u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN |
  446. OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN;
  447. int ret;
  448. ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits,
  449. enable ? bits : 0);
  450. if (ret)
  451. return ret;
  452. return 0;
  453. }
  454. static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value)
  455. {
  456. u32 exposure;
  457. int ret;
  458. ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure);
  459. if (ret)
  460. return ret;
  461. /* The lowest 4 bits are unsupported fractional bits */
  462. *value = exposure >> 4;
  463. return 0;
  464. }
  465. static int ov5693_exposure_configure(struct ov5693_device *ov5693,
  466. u32 exposure)
  467. {
  468. int ret = 0;
  469. exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK;
  470. ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret);
  471. return ret;
  472. }
  473. static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain)
  474. {
  475. u32 value;
  476. int ret;
  477. ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value);
  478. if (ret)
  479. return ret;
  480. /* As with exposure, the lowest 4 bits are fractional bits. */
  481. *gain = value >> 4;
  482. return ret;
  483. }
  484. static int ov5693_digital_gain_configure(struct ov5693_device *ov5693,
  485. u32 gain)
  486. {
  487. int ret = 0;
  488. gain &= OV5693_MWB_GAIN_MASK;
  489. ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret);
  490. ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret);
  491. ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret);
  492. return ret;
  493. }
  494. static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain)
  495. {
  496. int ret = 0;
  497. gain = (gain << 4) & OV5693_GAIN_CTRL_MASK;
  498. ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret);
  499. return ret;
  500. }
  501. static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank)
  502. {
  503. u16 vts = ov5693->mode.format.height + vblank;
  504. int ret = 0;
  505. ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret);
  506. return ret;
  507. }
  508. static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx)
  509. {
  510. int ret = 0;
  511. ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG,
  512. ov5693_test_pattern_bits[idx], &ret);
  513. return ret;
  514. }
  515. static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl)
  516. {
  517. struct ov5693_device *ov5693 =
  518. container_of(ctrl->handler, struct ov5693_device, ctrls.handler);
  519. int ret = 0;
  520. /* If VBLANK is altered we need to update exposure to compensate */
  521. if (ctrl->id == V4L2_CID_VBLANK) {
  522. int exposure_max;
  523. exposure_max = ov5693->mode.format.height + ctrl->val -
  524. OV5693_INTEGRATION_TIME_MARGIN;
  525. __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
  526. ov5693->ctrls.exposure->minimum,
  527. exposure_max,
  528. ov5693->ctrls.exposure->step,
  529. min(ov5693->ctrls.exposure->val,
  530. exposure_max));
  531. }
  532. /* Only apply changes to the controls if the device is powered up */
  533. if (!pm_runtime_get_if_in_use(ov5693->dev))
  534. return 0;
  535. switch (ctrl->id) {
  536. case V4L2_CID_EXPOSURE:
  537. ret = ov5693_exposure_configure(ov5693, ctrl->val);
  538. break;
  539. case V4L2_CID_ANALOGUE_GAIN:
  540. ret = ov5693_analog_gain_configure(ov5693, ctrl->val);
  541. break;
  542. case V4L2_CID_DIGITAL_GAIN:
  543. ret = ov5693_digital_gain_configure(ov5693, ctrl->val);
  544. break;
  545. case V4L2_CID_HFLIP:
  546. ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val);
  547. break;
  548. case V4L2_CID_VFLIP:
  549. ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val);
  550. break;
  551. case V4L2_CID_VBLANK:
  552. ret = ov5693_vts_configure(ov5693, ctrl->val);
  553. break;
  554. case V4L2_CID_TEST_PATTERN:
  555. ret = ov5693_test_pattern_configure(ov5693, ctrl->val);
  556. break;
  557. default:
  558. ret = -EINVAL;
  559. }
  560. pm_runtime_put(ov5693->dev);
  561. return ret;
  562. }
  563. static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  564. {
  565. struct ov5693_device *ov5693 = container_of(ctrl->handler,
  566. struct ov5693_device,
  567. ctrls.handler);
  568. switch (ctrl->id) {
  569. case V4L2_CID_EXPOSURE_ABSOLUTE:
  570. return ov5693_get_exposure(ov5693, &ctrl->val);
  571. case V4L2_CID_AUTOGAIN:
  572. return ov5693_get_gain(ov5693, &ctrl->val);
  573. default:
  574. return -EINVAL;
  575. }
  576. }
  577. static const struct v4l2_ctrl_ops ov5693_ctrl_ops = {
  578. .s_ctrl = ov5693_s_ctrl,
  579. .g_volatile_ctrl = ov5693_g_volatile_ctrl
  580. };
  581. /* System Control Functions */
  582. static int ov5693_mode_configure(struct ov5693_device *ov5693)
  583. {
  584. const struct ov5693_mode *mode = &ov5693->mode;
  585. int ret = 0;
  586. /* Crop Start X */
  587. ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left,
  588. &ret);
  589. /* Offset X */
  590. ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret);
  591. /* Output Size X */
  592. ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width,
  593. &ret);
  594. /* Crop End X */
  595. ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG,
  596. mode->crop.left + mode->crop.width, &ret);
  597. /* Horizontal Total Size */
  598. ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL,
  599. &ret);
  600. /* Crop Start Y */
  601. ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top,
  602. &ret);
  603. /* Offset Y */
  604. ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret);
  605. /* Output Size Y */
  606. ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height,
  607. &ret);
  608. /* Crop End Y */
  609. ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG,
  610. mode->crop.top + mode->crop.height, &ret);
  611. /* Subsample X increase */
  612. ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG,
  613. ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret);
  614. /* Subsample Y increase */
  615. ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG,
  616. ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret);
  617. if (ret)
  618. return ret;
  619. /* Binning */
  620. ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG,
  621. OV5693_FORMAT1_VBIN_EN,
  622. mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0);
  623. if (ret)
  624. return ret;
  625. ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG,
  626. OV5693_FORMAT2_HBIN_EN,
  627. mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0);
  628. return ret;
  629. }
  630. static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable)
  631. {
  632. int ret = 0;
  633. ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG,
  634. enable ? OV5693_START_STREAMING :
  635. OV5693_STOP_STREAMING, &ret);
  636. return ret;
  637. }
  638. static int ov5693_sw_reset(struct ov5693_device *ov5693)
  639. {
  640. int ret = 0;
  641. ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret);
  642. return ret;
  643. }
  644. static int ov5693_sensor_init(struct ov5693_device *ov5693)
  645. {
  646. int ret;
  647. ret = ov5693_sw_reset(ov5693);
  648. if (ret)
  649. return dev_err_probe(ov5693->dev, ret,
  650. "software reset error\n");
  651. ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting);
  652. if (ret)
  653. return dev_err_probe(ov5693->dev, ret,
  654. "global settings error\n");
  655. ret = ov5693_mode_configure(ov5693);
  656. if (ret)
  657. return dev_err_probe(ov5693->dev, ret,
  658. "mode configure error\n");
  659. ret = ov5693_enable_streaming(ov5693, false);
  660. if (ret)
  661. dev_err(ov5693->dev, "stop streaming error\n");
  662. return ret;
  663. }
  664. static void ov5693_sensor_powerdown(struct ov5693_device *ov5693)
  665. {
  666. gpiod_set_value_cansleep(ov5693->reset, 1);
  667. gpiod_set_value_cansleep(ov5693->powerdown, 1);
  668. regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies);
  669. clk_disable_unprepare(ov5693->xvclk);
  670. }
  671. static int ov5693_sensor_powerup(struct ov5693_device *ov5693)
  672. {
  673. int ret;
  674. gpiod_set_value_cansleep(ov5693->reset, 1);
  675. gpiod_set_value_cansleep(ov5693->powerdown, 1);
  676. ret = clk_prepare_enable(ov5693->xvclk);
  677. if (ret) {
  678. dev_err(ov5693->dev, "Failed to enable clk\n");
  679. goto fail_power;
  680. }
  681. ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies);
  682. if (ret) {
  683. dev_err(ov5693->dev, "Failed to enable regulators\n");
  684. goto fail_power;
  685. }
  686. gpiod_set_value_cansleep(ov5693->powerdown, 0);
  687. gpiod_set_value_cansleep(ov5693->reset, 0);
  688. usleep_range(5000, 7500);
  689. return 0;
  690. fail_power:
  691. ov5693_sensor_powerdown(ov5693);
  692. return ret;
  693. }
  694. static int __maybe_unused ov5693_sensor_suspend(struct device *dev)
  695. {
  696. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  697. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  698. ov5693_sensor_powerdown(ov5693);
  699. return 0;
  700. }
  701. static int __maybe_unused ov5693_sensor_resume(struct device *dev)
  702. {
  703. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  704. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  705. int ret;
  706. mutex_lock(&ov5693->lock);
  707. ret = ov5693_sensor_powerup(ov5693);
  708. if (ret)
  709. goto out_unlock;
  710. ret = ov5693_sensor_init(ov5693);
  711. if (ret) {
  712. dev_err(dev, "ov5693 sensor init failure\n");
  713. goto err_power;
  714. }
  715. goto out_unlock;
  716. err_power:
  717. ov5693_sensor_powerdown(ov5693);
  718. out_unlock:
  719. mutex_unlock(&ov5693->lock);
  720. return ret;
  721. }
  722. static int ov5693_detect(struct ov5693_device *ov5693)
  723. {
  724. int ret;
  725. u32 id;
  726. ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id);
  727. if (ret)
  728. return ret;
  729. if (id != OV5693_CHIP_ID)
  730. return dev_err_probe(ov5693->dev, -ENODEV,
  731. "sensor ID mismatch. Found 0x%04x\n", id);
  732. return 0;
  733. }
  734. /* V4L2 Framework callbacks */
  735. static unsigned int __ov5693_calc_vts(u32 height)
  736. {
  737. /*
  738. * We need to set a sensible default VTS for whatever format height we
  739. * happen to be given from set_fmt(). This function just targets
  740. * an even multiple of 30fps.
  741. */
  742. unsigned int tgt_fps;
  743. tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30);
  744. return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2);
  745. }
  746. static struct v4l2_mbus_framefmt *
  747. __ov5693_get_pad_format(struct ov5693_device *ov5693,
  748. struct v4l2_subdev_state *state,
  749. unsigned int pad, enum v4l2_subdev_format_whence which)
  750. {
  751. switch (which) {
  752. case V4L2_SUBDEV_FORMAT_TRY:
  753. return v4l2_subdev_get_try_format(&ov5693->sd, state, pad);
  754. case V4L2_SUBDEV_FORMAT_ACTIVE:
  755. return &ov5693->mode.format;
  756. default:
  757. return NULL;
  758. }
  759. }
  760. static struct v4l2_rect *
  761. __ov5693_get_pad_crop(struct ov5693_device *ov5693,
  762. struct v4l2_subdev_state *state,
  763. unsigned int pad, enum v4l2_subdev_format_whence which)
  764. {
  765. switch (which) {
  766. case V4L2_SUBDEV_FORMAT_TRY:
  767. return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad);
  768. case V4L2_SUBDEV_FORMAT_ACTIVE:
  769. return &ov5693->mode.crop;
  770. }
  771. return NULL;
  772. }
  773. static int ov5693_get_fmt(struct v4l2_subdev *sd,
  774. struct v4l2_subdev_state *state,
  775. struct v4l2_subdev_format *format)
  776. {
  777. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  778. format->format = ov5693->mode.format;
  779. return 0;
  780. }
  781. static int ov5693_set_fmt(struct v4l2_subdev *sd,
  782. struct v4l2_subdev_state *state,
  783. struct v4l2_subdev_format *format)
  784. {
  785. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  786. const struct v4l2_rect *crop;
  787. struct v4l2_mbus_framefmt *fmt;
  788. unsigned int hratio, vratio;
  789. unsigned int width, height;
  790. unsigned int hblank;
  791. int exposure_max;
  792. crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which);
  793. /*
  794. * Align to two to simplify the binning calculations below, and clamp
  795. * the requested format at the crop rectangle
  796. */
  797. width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
  798. OV5693_MIN_CROP_WIDTH, crop->width);
  799. height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
  800. OV5693_MIN_CROP_HEIGHT, crop->height);
  801. /*
  802. * We can only support setting either the dimensions of the crop rect
  803. * or those dimensions binned (separately) by a factor of two.
  804. */
  805. hratio = clamp_t(unsigned int,
  806. DIV_ROUND_CLOSEST(crop->width, width), 1, 2);
  807. vratio = clamp_t(unsigned int,
  808. DIV_ROUND_CLOSEST(crop->height, height), 1, 2);
  809. fmt = __ov5693_get_pad_format(ov5693, state, format->pad,
  810. format->which);
  811. fmt->width = crop->width / hratio;
  812. fmt->height = crop->height / vratio;
  813. fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
  814. format->format = *fmt;
  815. if (format->which == V4L2_SUBDEV_FORMAT_TRY)
  816. return 0;
  817. mutex_lock(&ov5693->lock);
  818. ov5693->mode.binning_x = hratio > 1;
  819. ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1;
  820. ov5693->mode.binning_y = vratio > 1;
  821. ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1;
  822. ov5693->mode.vts = __ov5693_calc_vts(fmt->height);
  823. __v4l2_ctrl_modify_range(ov5693->ctrls.vblank,
  824. OV5693_TIMING_MIN_VTS,
  825. OV5693_TIMING_MAX_VTS - fmt->height,
  826. 1, ov5693->mode.vts - fmt->height);
  827. __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank,
  828. ov5693->mode.vts - fmt->height);
  829. hblank = OV5693_FIXED_PPL - fmt->width;
  830. __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1,
  831. hblank);
  832. exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
  833. __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
  834. ov5693->ctrls.exposure->minimum, exposure_max,
  835. ov5693->ctrls.exposure->step,
  836. min(ov5693->ctrls.exposure->val,
  837. exposure_max));
  838. mutex_unlock(&ov5693->lock);
  839. return 0;
  840. }
  841. static int ov5693_get_selection(struct v4l2_subdev *sd,
  842. struct v4l2_subdev_state *state,
  843. struct v4l2_subdev_selection *sel)
  844. {
  845. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  846. switch (sel->target) {
  847. case V4L2_SEL_TGT_CROP:
  848. mutex_lock(&ov5693->lock);
  849. sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad,
  850. sel->which);
  851. mutex_unlock(&ov5693->lock);
  852. break;
  853. case V4L2_SEL_TGT_NATIVE_SIZE:
  854. sel->r.top = 0;
  855. sel->r.left = 0;
  856. sel->r.width = OV5693_NATIVE_WIDTH;
  857. sel->r.height = OV5693_NATIVE_HEIGHT;
  858. break;
  859. case V4L2_SEL_TGT_CROP_BOUNDS:
  860. case V4L2_SEL_TGT_CROP_DEFAULT:
  861. sel->r.top = OV5693_ACTIVE_START_TOP;
  862. sel->r.left = OV5693_ACTIVE_START_LEFT;
  863. sel->r.width = OV5693_ACTIVE_WIDTH;
  864. sel->r.height = OV5693_ACTIVE_HEIGHT;
  865. break;
  866. default:
  867. return -EINVAL;
  868. }
  869. return 0;
  870. }
  871. static int ov5693_set_selection(struct v4l2_subdev *sd,
  872. struct v4l2_subdev_state *state,
  873. struct v4l2_subdev_selection *sel)
  874. {
  875. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  876. struct v4l2_mbus_framefmt *format;
  877. struct v4l2_rect *__crop;
  878. struct v4l2_rect rect;
  879. if (sel->target != V4L2_SEL_TGT_CROP)
  880. return -EINVAL;
  881. /*
  882. * Clamp the boundaries of the crop rectangle to the size of the sensor
  883. * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't
  884. * disrupted.
  885. */
  886. rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT,
  887. OV5693_NATIVE_WIDTH);
  888. rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP,
  889. OV5693_NATIVE_HEIGHT);
  890. rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
  891. OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH);
  892. rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
  893. OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT);
  894. /* Make sure the crop rectangle isn't outside the bounds of the array */
  895. rect.width = min_t(unsigned int, rect.width,
  896. OV5693_NATIVE_WIDTH - rect.left);
  897. rect.height = min_t(unsigned int, rect.height,
  898. OV5693_NATIVE_HEIGHT - rect.top);
  899. __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which);
  900. if (rect.width != __crop->width || rect.height != __crop->height) {
  901. /*
  902. * Reset the output image size if the crop rectangle size has
  903. * been modified.
  904. */
  905. format = __ov5693_get_pad_format(ov5693, state, sel->pad,
  906. sel->which);
  907. format->width = rect.width;
  908. format->height = rect.height;
  909. }
  910. *__crop = rect;
  911. sel->r = rect;
  912. return 0;
  913. }
  914. static int ov5693_s_stream(struct v4l2_subdev *sd, int enable)
  915. {
  916. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  917. int ret;
  918. if (enable) {
  919. ret = pm_runtime_get_sync(ov5693->dev);
  920. if (ret < 0)
  921. goto err_power_down;
  922. mutex_lock(&ov5693->lock);
  923. ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler);
  924. if (ret) {
  925. mutex_unlock(&ov5693->lock);
  926. goto err_power_down;
  927. }
  928. ret = ov5693_enable_streaming(ov5693, true);
  929. mutex_unlock(&ov5693->lock);
  930. } else {
  931. mutex_lock(&ov5693->lock);
  932. ret = ov5693_enable_streaming(ov5693, false);
  933. mutex_unlock(&ov5693->lock);
  934. }
  935. if (ret)
  936. goto err_power_down;
  937. ov5693->streaming = !!enable;
  938. if (!enable)
  939. pm_runtime_put(ov5693->dev);
  940. return 0;
  941. err_power_down:
  942. pm_runtime_put_noidle(ov5693->dev);
  943. return ret;
  944. }
  945. static int ov5693_g_frame_interval(struct v4l2_subdev *sd,
  946. struct v4l2_subdev_frame_interval *interval)
  947. {
  948. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  949. unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height +
  950. ov5693->ctrls.vblank->val);
  951. unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize);
  952. interval->interval.numerator = 1;
  953. interval->interval.denominator = fps;
  954. return 0;
  955. }
  956. static int ov5693_enum_mbus_code(struct v4l2_subdev *sd,
  957. struct v4l2_subdev_state *state,
  958. struct v4l2_subdev_mbus_code_enum *code)
  959. {
  960. /* Only a single mbus format is supported */
  961. if (code->index > 0)
  962. return -EINVAL;
  963. code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
  964. return 0;
  965. }
  966. static int ov5693_enum_frame_size(struct v4l2_subdev *sd,
  967. struct v4l2_subdev_state *state,
  968. struct v4l2_subdev_frame_size_enum *fse)
  969. {
  970. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  971. struct v4l2_rect *__crop;
  972. if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
  973. return -EINVAL;
  974. __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which);
  975. if (!__crop)
  976. return -EINVAL;
  977. fse->min_width = __crop->width / (fse->index + 1);
  978. fse->min_height = __crop->height / (fse->index + 1);
  979. fse->max_width = fse->min_width;
  980. fse->max_height = fse->min_height;
  981. return 0;
  982. }
  983. static const struct v4l2_subdev_video_ops ov5693_video_ops = {
  984. .s_stream = ov5693_s_stream,
  985. .g_frame_interval = ov5693_g_frame_interval,
  986. };
  987. static const struct v4l2_subdev_pad_ops ov5693_pad_ops = {
  988. .enum_mbus_code = ov5693_enum_mbus_code,
  989. .enum_frame_size = ov5693_enum_frame_size,
  990. .get_fmt = ov5693_get_fmt,
  991. .set_fmt = ov5693_set_fmt,
  992. .get_selection = ov5693_get_selection,
  993. .set_selection = ov5693_set_selection,
  994. };
  995. static const struct v4l2_subdev_ops ov5693_ops = {
  996. .video = &ov5693_video_ops,
  997. .pad = &ov5693_pad_ops,
  998. };
  999. /* Sensor and Driver Configuration Functions */
  1000. static int ov5693_init_controls(struct ov5693_device *ov5693)
  1001. {
  1002. const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops;
  1003. struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls;
  1004. struct v4l2_fwnode_device_properties props;
  1005. int vblank_max, vblank_def;
  1006. int exposure_max;
  1007. int hblank;
  1008. int ret;
  1009. ret = v4l2_ctrl_handler_init(&ctrls->handler, 12);
  1010. if (ret)
  1011. return ret;
  1012. /* link freq */
  1013. ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler,
  1014. NULL, V4L2_CID_LINK_FREQ,
  1015. 0, 0, link_freq_menu_items);
  1016. if (ctrls->link_freq)
  1017. ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1018. /* pixel rate */
  1019. ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL,
  1020. V4L2_CID_PIXEL_RATE, 0,
  1021. OV5693_PIXEL_RATE, 1,
  1022. OV5693_PIXEL_RATE);
  1023. /* Exposure */
  1024. exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
  1025. ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1026. V4L2_CID_EXPOSURE,
  1027. OV5693_EXPOSURE_MIN, exposure_max,
  1028. OV5693_EXPOSURE_STEP, exposure_max);
  1029. /* Gain */
  1030. ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler,
  1031. ops, V4L2_CID_ANALOGUE_GAIN,
  1032. OV5693_GAIN_MIN,
  1033. OV5693_GAIN_MAX,
  1034. OV5693_GAIN_STEP,
  1035. OV5693_GAIN_DEF);
  1036. ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1037. V4L2_CID_DIGITAL_GAIN,
  1038. OV5693_DIGITAL_GAIN_MIN,
  1039. OV5693_DIGITAL_GAIN_MAX,
  1040. OV5693_DIGITAL_GAIN_STEP,
  1041. OV5693_DIGITAL_GAIN_DEF);
  1042. /* Flip */
  1043. ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1044. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1045. ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1046. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1047. hblank = OV5693_FIXED_PPL - ov5693->mode.format.width;
  1048. ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1049. V4L2_CID_HBLANK, hblank,
  1050. hblank, 1, hblank);
  1051. if (ctrls->hblank)
  1052. ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1053. vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height;
  1054. vblank_def = ov5693->mode.vts - ov5693->mode.format.height;
  1055. ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
  1056. V4L2_CID_VBLANK,
  1057. OV5693_TIMING_MIN_VTS,
  1058. vblank_max, 1, vblank_def);
  1059. ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(
  1060. &ctrls->handler, ops,
  1061. V4L2_CID_TEST_PATTERN,
  1062. ARRAY_SIZE(ov5693_test_pattern_menu) - 1,
  1063. 0, 0, ov5693_test_pattern_menu);
  1064. if (ctrls->handler.error) {
  1065. dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n");
  1066. ret = ctrls->handler.error;
  1067. goto err_free_handler;
  1068. }
  1069. /* set properties from fwnode (e.g. rotation, orientation) */
  1070. ret = v4l2_fwnode_device_parse(ov5693->dev, &props);
  1071. if (ret)
  1072. goto err_free_handler;
  1073. ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops,
  1074. &props);
  1075. if (ret)
  1076. goto err_free_handler;
  1077. /* Use same lock for controls as for everything else. */
  1078. ctrls->handler.lock = &ov5693->lock;
  1079. ov5693->sd.ctrl_handler = &ctrls->handler;
  1080. return 0;
  1081. err_free_handler:
  1082. v4l2_ctrl_handler_free(&ctrls->handler);
  1083. return ret;
  1084. }
  1085. static int ov5693_configure_gpios(struct ov5693_device *ov5693)
  1086. {
  1087. ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset",
  1088. GPIOD_OUT_HIGH);
  1089. if (IS_ERR(ov5693->reset)) {
  1090. dev_err(ov5693->dev, "Error fetching reset GPIO\n");
  1091. return PTR_ERR(ov5693->reset);
  1092. }
  1093. ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown",
  1094. GPIOD_OUT_HIGH);
  1095. if (IS_ERR(ov5693->powerdown)) {
  1096. dev_err(ov5693->dev, "Error fetching powerdown GPIO\n");
  1097. return PTR_ERR(ov5693->powerdown);
  1098. }
  1099. return 0;
  1100. }
  1101. static int ov5693_get_regulators(struct ov5693_device *ov5693)
  1102. {
  1103. unsigned int i;
  1104. for (i = 0; i < OV5693_NUM_SUPPLIES; i++)
  1105. ov5693->supplies[i].supply = ov5693_supply_names[i];
  1106. return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES,
  1107. ov5693->supplies);
  1108. }
  1109. static int ov5693_check_hwcfg(struct ov5693_device *ov5693)
  1110. {
  1111. struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev);
  1112. struct v4l2_fwnode_endpoint bus_cfg = {
  1113. .bus_type = V4L2_MBUS_CSI2_DPHY,
  1114. };
  1115. struct fwnode_handle *endpoint;
  1116. unsigned int i;
  1117. int ret;
  1118. endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
  1119. if (!endpoint)
  1120. return -EPROBE_DEFER; /* Could be provided by cio2-bridge */
  1121. ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
  1122. fwnode_handle_put(endpoint);
  1123. if (ret)
  1124. return ret;
  1125. if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
  1126. dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported");
  1127. ret = -EINVAL;
  1128. goto out_free_bus_cfg;
  1129. }
  1130. if (!bus_cfg.nr_of_link_frequencies) {
  1131. dev_err(ov5693->dev, "no link frequencies defined\n");
  1132. ret = -EINVAL;
  1133. goto out_free_bus_cfg;
  1134. }
  1135. for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
  1136. if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ)
  1137. break;
  1138. if (i == bus_cfg.nr_of_link_frequencies) {
  1139. dev_err(ov5693->dev, "supported link freq %ull not found\n",
  1140. OV5693_LINK_FREQ_419_2MHZ);
  1141. ret = -EINVAL;
  1142. goto out_free_bus_cfg;
  1143. }
  1144. out_free_bus_cfg:
  1145. v4l2_fwnode_endpoint_free(&bus_cfg);
  1146. return ret;
  1147. }
  1148. static int ov5693_probe(struct i2c_client *client)
  1149. {
  1150. struct ov5693_device *ov5693;
  1151. u32 xvclk_rate;
  1152. int ret = 0;
  1153. ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL);
  1154. if (!ov5693)
  1155. return -ENOMEM;
  1156. ov5693->client = client;
  1157. ov5693->dev = &client->dev;
  1158. ret = ov5693_check_hwcfg(ov5693);
  1159. if (ret)
  1160. return ret;
  1161. mutex_init(&ov5693->lock);
  1162. v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops);
  1163. ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk");
  1164. if (IS_ERR(ov5693->xvclk))
  1165. return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk),
  1166. "failed to get xvclk: %ld\n",
  1167. PTR_ERR(ov5693->xvclk));
  1168. if (ov5693->xvclk) {
  1169. xvclk_rate = clk_get_rate(ov5693->xvclk);
  1170. } else {
  1171. ret = fwnode_property_read_u32(dev_fwnode(&client->dev),
  1172. "clock-frequency",
  1173. &xvclk_rate);
  1174. if (ret) {
  1175. dev_err(&client->dev, "can't get clock frequency");
  1176. return ret;
  1177. }
  1178. }
  1179. if (xvclk_rate != OV5693_XVCLK_FREQ)
  1180. dev_warn(&client->dev, "Found clk freq %u, expected %u\n",
  1181. xvclk_rate, OV5693_XVCLK_FREQ);
  1182. ret = ov5693_configure_gpios(ov5693);
  1183. if (ret)
  1184. return ret;
  1185. ret = ov5693_get_regulators(ov5693);
  1186. if (ret)
  1187. return dev_err_probe(&client->dev, ret,
  1188. "Error fetching regulators\n");
  1189. ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1190. ov5693->pad.flags = MEDIA_PAD_FL_SOURCE;
  1191. ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1192. ov5693->mode.crop = ov5693_default_crop;
  1193. ov5693->mode.format = ov5693_default_fmt;
  1194. ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height);
  1195. ret = ov5693_init_controls(ov5693);
  1196. if (ret)
  1197. return ret;
  1198. ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad);
  1199. if (ret)
  1200. goto err_ctrl_handler_free;
  1201. /*
  1202. * We need the driver to work in the event that pm runtime is disable in
  1203. * the kernel, so power up and verify the chip now. In the event that
  1204. * runtime pm is disabled this will leave the chip on, so that streaming
  1205. * will work.
  1206. */
  1207. ret = ov5693_sensor_powerup(ov5693);
  1208. if (ret)
  1209. goto err_media_entity_cleanup;
  1210. ret = ov5693_detect(ov5693);
  1211. if (ret)
  1212. goto err_powerdown;
  1213. pm_runtime_set_active(&client->dev);
  1214. pm_runtime_get_noresume(&client->dev);
  1215. pm_runtime_enable(&client->dev);
  1216. ret = v4l2_async_register_subdev_sensor(&ov5693->sd);
  1217. if (ret) {
  1218. dev_err(&client->dev, "failed to register V4L2 subdev: %d",
  1219. ret);
  1220. goto err_pm_runtime;
  1221. }
  1222. pm_runtime_set_autosuspend_delay(&client->dev, 1000);
  1223. pm_runtime_use_autosuspend(&client->dev);
  1224. pm_runtime_put_autosuspend(&client->dev);
  1225. return ret;
  1226. err_pm_runtime:
  1227. pm_runtime_disable(&client->dev);
  1228. pm_runtime_put_noidle(&client->dev);
  1229. err_powerdown:
  1230. ov5693_sensor_powerdown(ov5693);
  1231. err_media_entity_cleanup:
  1232. media_entity_cleanup(&ov5693->sd.entity);
  1233. err_ctrl_handler_free:
  1234. v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
  1235. return ret;
  1236. }
  1237. static void ov5693_remove(struct i2c_client *client)
  1238. {
  1239. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1240. struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
  1241. v4l2_async_unregister_subdev(sd);
  1242. media_entity_cleanup(&ov5693->sd.entity);
  1243. v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
  1244. mutex_destroy(&ov5693->lock);
  1245. /*
  1246. * Disable runtime PM. In case runtime PM is disabled in the kernel,
  1247. * make sure to turn power off manually.
  1248. */
  1249. pm_runtime_disable(&client->dev);
  1250. if (!pm_runtime_status_suspended(&client->dev))
  1251. ov5693_sensor_powerdown(ov5693);
  1252. pm_runtime_set_suspended(&client->dev);
  1253. }
  1254. static const struct dev_pm_ops ov5693_pm_ops = {
  1255. SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL)
  1256. };
  1257. static const struct acpi_device_id ov5693_acpi_match[] = {
  1258. {"INT33BE"},
  1259. {},
  1260. };
  1261. MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match);
  1262. static const struct of_device_id ov5693_of_match[] = {
  1263. { .compatible = "ovti,ov5693", },
  1264. { /* sentinel */ },
  1265. };
  1266. MODULE_DEVICE_TABLE(of, ov5693_of_match);
  1267. static struct i2c_driver ov5693_driver = {
  1268. .driver = {
  1269. .name = "ov5693",
  1270. .acpi_match_table = ov5693_acpi_match,
  1271. .of_match_table = ov5693_of_match,
  1272. .pm = &ov5693_pm_ops,
  1273. },
  1274. .probe_new = ov5693_probe,
  1275. .remove = ov5693_remove,
  1276. };
  1277. module_i2c_driver(ov5693_driver);
  1278. MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors");
  1279. MODULE_LICENSE("GPL");