ov5675.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2019 Intel Corporation.
  3. #include <asm/unaligned.h>
  4. #include <linux/acpi.h>
  5. #include <linux/delay.h>
  6. #include <linux/i2c.h>
  7. #include <linux/module.h>
  8. #include <linux/pm_runtime.h>
  9. #include <media/v4l2-ctrls.h>
  10. #include <media/v4l2-device.h>
  11. #include <media/v4l2-fwnode.h>
  12. #define OV5675_REG_VALUE_08BIT 1
  13. #define OV5675_REG_VALUE_16BIT 2
  14. #define OV5675_REG_VALUE_24BIT 3
  15. #define OV5675_LINK_FREQ_450MHZ 450000000ULL
  16. #define OV5675_SCLK 90000000LL
  17. #define OV5675_MCLK 19200000
  18. #define OV5675_DATA_LANES 2
  19. #define OV5675_RGB_DEPTH 10
  20. #define OV5675_REG_CHIP_ID 0x300a
  21. #define OV5675_CHIP_ID 0x5675
  22. #define OV5675_REG_MODE_SELECT 0x0100
  23. #define OV5675_MODE_STANDBY 0x00
  24. #define OV5675_MODE_STREAMING 0x01
  25. /* vertical-timings from sensor */
  26. #define OV5675_REG_VTS 0x380e
  27. #define OV5675_VTS_30FPS 0x07e4
  28. #define OV5675_VTS_30FPS_MIN 0x07e4
  29. #define OV5675_VTS_MAX 0x7fff
  30. /* horizontal-timings from sensor */
  31. #define OV5675_REG_HTS 0x380c
  32. /* Exposure controls from sensor */
  33. #define OV5675_REG_EXPOSURE 0x3500
  34. #define OV5675_EXPOSURE_MIN 4
  35. #define OV5675_EXPOSURE_MAX_MARGIN 4
  36. #define OV5675_EXPOSURE_STEP 1
  37. /* Analog gain controls from sensor */
  38. #define OV5675_REG_ANALOG_GAIN 0x3508
  39. #define OV5675_ANAL_GAIN_MIN 128
  40. #define OV5675_ANAL_GAIN_MAX 2047
  41. #define OV5675_ANAL_GAIN_STEP 1
  42. /* Digital gain controls from sensor */
  43. #define OV5675_REG_DIGITAL_GAIN 0x350a
  44. #define OV5675_REG_MWB_R_GAIN 0x5019
  45. #define OV5675_REG_MWB_G_GAIN 0x501b
  46. #define OV5675_REG_MWB_B_GAIN 0x501d
  47. #define OV5675_DGTL_GAIN_MIN 1024
  48. #define OV5675_DGTL_GAIN_MAX 4095
  49. #define OV5675_DGTL_GAIN_STEP 1
  50. #define OV5675_DGTL_GAIN_DEFAULT 1024
  51. /* Group Access */
  52. #define OV5675_REG_GROUP_ACCESS 0x3208
  53. #define OV5675_GROUP_HOLD_START 0x0
  54. #define OV5675_GROUP_HOLD_END 0x10
  55. #define OV5675_GROUP_HOLD_LAUNCH 0xa0
  56. /* Test Pattern Control */
  57. #define OV5675_REG_TEST_PATTERN 0x4503
  58. #define OV5675_TEST_PATTERN_ENABLE BIT(7)
  59. #define OV5675_TEST_PATTERN_BAR_SHIFT 2
  60. /* Flip Mirror Controls from sensor */
  61. #define OV5675_REG_FORMAT1 0x3820
  62. #define OV5675_REG_FORMAT2 0x373d
  63. #define to_ov5675(_sd) container_of(_sd, struct ov5675, sd)
  64. enum {
  65. OV5675_LINK_FREQ_900MBPS,
  66. };
  67. struct ov5675_reg {
  68. u16 address;
  69. u8 val;
  70. };
  71. struct ov5675_reg_list {
  72. u32 num_of_regs;
  73. const struct ov5675_reg *regs;
  74. };
  75. struct ov5675_link_freq_config {
  76. const struct ov5675_reg_list reg_list;
  77. };
  78. struct ov5675_mode {
  79. /* Frame width in pixels */
  80. u32 width;
  81. /* Frame height in pixels */
  82. u32 height;
  83. /* Horizontal timining size */
  84. u32 hts;
  85. /* Default vertical timining size */
  86. u32 vts_def;
  87. /* Min vertical timining size */
  88. u32 vts_min;
  89. /* Link frequency needed for this resolution */
  90. u32 link_freq_index;
  91. /* Sensor register settings for this resolution */
  92. const struct ov5675_reg_list reg_list;
  93. };
  94. static const struct ov5675_reg mipi_data_rate_900mbps[] = {
  95. {0x0103, 0x01},
  96. {0x0100, 0x00},
  97. {0x0300, 0x04},
  98. {0x0302, 0x8d},
  99. {0x0303, 0x00},
  100. {0x030d, 0x26},
  101. };
  102. static const struct ov5675_reg mode_2592x1944_regs[] = {
  103. {0x3002, 0x21},
  104. {0x3107, 0x23},
  105. {0x3501, 0x20},
  106. {0x3503, 0x0c},
  107. {0x3508, 0x03},
  108. {0x3509, 0x00},
  109. {0x3600, 0x66},
  110. {0x3602, 0x30},
  111. {0x3610, 0xa5},
  112. {0x3612, 0x93},
  113. {0x3620, 0x80},
  114. {0x3642, 0x0e},
  115. {0x3661, 0x00},
  116. {0x3662, 0x10},
  117. {0x3664, 0xf3},
  118. {0x3665, 0x9e},
  119. {0x3667, 0xa5},
  120. {0x366e, 0x55},
  121. {0x366f, 0x55},
  122. {0x3670, 0x11},
  123. {0x3671, 0x11},
  124. {0x3672, 0x11},
  125. {0x3673, 0x11},
  126. {0x3714, 0x24},
  127. {0x371a, 0x3e},
  128. {0x3733, 0x10},
  129. {0x3734, 0x00},
  130. {0x373d, 0x24},
  131. {0x3764, 0x20},
  132. {0x3765, 0x20},
  133. {0x3766, 0x12},
  134. {0x37a1, 0x14},
  135. {0x37a8, 0x1c},
  136. {0x37ab, 0x0f},
  137. {0x37c2, 0x04},
  138. {0x37cb, 0x00},
  139. {0x37cc, 0x00},
  140. {0x37cd, 0x00},
  141. {0x37ce, 0x00},
  142. {0x37d8, 0x02},
  143. {0x37d9, 0x08},
  144. {0x37dc, 0x04},
  145. {0x3800, 0x00},
  146. {0x3801, 0x00},
  147. {0x3802, 0x00},
  148. {0x3803, 0x04},
  149. {0x3804, 0x0a},
  150. {0x3805, 0x3f},
  151. {0x3806, 0x07},
  152. {0x3807, 0xb3},
  153. {0x3808, 0x0a},
  154. {0x3809, 0x20},
  155. {0x380a, 0x07},
  156. {0x380b, 0x98},
  157. {0x380c, 0x02},
  158. {0x380d, 0xee},
  159. {0x380e, 0x07},
  160. {0x380f, 0xe4},
  161. {0x3811, 0x10},
  162. {0x3813, 0x0d},
  163. {0x3814, 0x01},
  164. {0x3815, 0x01},
  165. {0x3816, 0x01},
  166. {0x3817, 0x01},
  167. {0x381e, 0x02},
  168. {0x3820, 0x88},
  169. {0x3821, 0x01},
  170. {0x3832, 0x04},
  171. {0x3c80, 0x01},
  172. {0x3c82, 0x00},
  173. {0x3c83, 0xc8},
  174. {0x3c8c, 0x0f},
  175. {0x3c8d, 0xa0},
  176. {0x3c90, 0x07},
  177. {0x3c91, 0x00},
  178. {0x3c92, 0x00},
  179. {0x3c93, 0x00},
  180. {0x3c94, 0xd0},
  181. {0x3c95, 0x50},
  182. {0x3c96, 0x35},
  183. {0x3c97, 0x00},
  184. {0x4001, 0xe0},
  185. {0x4008, 0x02},
  186. {0x4009, 0x0d},
  187. {0x400f, 0x80},
  188. {0x4013, 0x02},
  189. {0x4040, 0x00},
  190. {0x4041, 0x07},
  191. {0x404c, 0x50},
  192. {0x404e, 0x20},
  193. {0x4500, 0x06},
  194. {0x4503, 0x00},
  195. {0x450a, 0x04},
  196. {0x4809, 0x04},
  197. {0x480c, 0x12},
  198. {0x4819, 0x70},
  199. {0x4825, 0x32},
  200. {0x4826, 0x32},
  201. {0x482a, 0x06},
  202. {0x4833, 0x08},
  203. {0x4837, 0x0d},
  204. {0x5000, 0x77},
  205. {0x5b00, 0x01},
  206. {0x5b01, 0x10},
  207. {0x5b02, 0x01},
  208. {0x5b03, 0xdb},
  209. {0x5b05, 0x6c},
  210. {0x5e10, 0xfc},
  211. {0x3500, 0x00},
  212. {0x3501, 0x3E},
  213. {0x3502, 0x60},
  214. {0x3503, 0x08},
  215. {0x3508, 0x04},
  216. {0x3509, 0x00},
  217. {0x3832, 0x48},
  218. {0x5780, 0x3e},
  219. {0x5781, 0x0f},
  220. {0x5782, 0x44},
  221. {0x5783, 0x02},
  222. {0x5784, 0x01},
  223. {0x5785, 0x01},
  224. {0x5786, 0x00},
  225. {0x5787, 0x04},
  226. {0x5788, 0x02},
  227. {0x5789, 0x0f},
  228. {0x578a, 0xfd},
  229. {0x578b, 0xf5},
  230. {0x578c, 0xf5},
  231. {0x578d, 0x03},
  232. {0x578e, 0x08},
  233. {0x578f, 0x0c},
  234. {0x5790, 0x08},
  235. {0x5791, 0x06},
  236. {0x5792, 0x00},
  237. {0x5793, 0x52},
  238. {0x5794, 0xa3},
  239. {0x4003, 0x40},
  240. {0x3107, 0x01},
  241. {0x3c80, 0x08},
  242. {0x3c83, 0xb1},
  243. {0x3c8c, 0x10},
  244. {0x3c8d, 0x00},
  245. {0x3c90, 0x00},
  246. {0x3c94, 0x00},
  247. {0x3c95, 0x00},
  248. {0x3c96, 0x00},
  249. {0x37cb, 0x09},
  250. {0x37cc, 0x15},
  251. {0x37cd, 0x1f},
  252. {0x37ce, 0x1f},
  253. };
  254. static const struct ov5675_reg mode_1296x972_regs[] = {
  255. {0x3002, 0x21},
  256. {0x3107, 0x23},
  257. {0x3501, 0x20},
  258. {0x3503, 0x0c},
  259. {0x3508, 0x03},
  260. {0x3509, 0x00},
  261. {0x3600, 0x66},
  262. {0x3602, 0x30},
  263. {0x3610, 0xa5},
  264. {0x3612, 0x93},
  265. {0x3620, 0x80},
  266. {0x3642, 0x0e},
  267. {0x3661, 0x00},
  268. {0x3662, 0x08},
  269. {0x3664, 0xf3},
  270. {0x3665, 0x9e},
  271. {0x3667, 0xa5},
  272. {0x366e, 0x55},
  273. {0x366f, 0x55},
  274. {0x3670, 0x11},
  275. {0x3671, 0x11},
  276. {0x3672, 0x11},
  277. {0x3673, 0x11},
  278. {0x3714, 0x28},
  279. {0x371a, 0x3e},
  280. {0x3733, 0x10},
  281. {0x3734, 0x00},
  282. {0x373d, 0x24},
  283. {0x3764, 0x20},
  284. {0x3765, 0x20},
  285. {0x3766, 0x12},
  286. {0x37a1, 0x14},
  287. {0x37a8, 0x1c},
  288. {0x37ab, 0x0f},
  289. {0x37c2, 0x14},
  290. {0x37cb, 0x00},
  291. {0x37cc, 0x00},
  292. {0x37cd, 0x00},
  293. {0x37ce, 0x00},
  294. {0x37d8, 0x02},
  295. {0x37d9, 0x04},
  296. {0x37dc, 0x04},
  297. {0x3800, 0x00},
  298. {0x3801, 0x00},
  299. {0x3802, 0x00},
  300. {0x3803, 0x00},
  301. {0x3804, 0x0a},
  302. {0x3805, 0x3f},
  303. {0x3806, 0x07},
  304. {0x3807, 0xb7},
  305. {0x3808, 0x05},
  306. {0x3809, 0x10},
  307. {0x380a, 0x03},
  308. {0x380b, 0xcc},
  309. {0x380c, 0x02},
  310. {0x380d, 0xee},
  311. {0x380e, 0x07},
  312. {0x380f, 0xd0},
  313. {0x3811, 0x08},
  314. {0x3813, 0x0d},
  315. {0x3814, 0x03},
  316. {0x3815, 0x01},
  317. {0x3816, 0x03},
  318. {0x3817, 0x01},
  319. {0x381e, 0x02},
  320. {0x3820, 0x8b},
  321. {0x3821, 0x01},
  322. {0x3832, 0x04},
  323. {0x3c80, 0x01},
  324. {0x3c82, 0x00},
  325. {0x3c83, 0xc8},
  326. {0x3c8c, 0x0f},
  327. {0x3c8d, 0xa0},
  328. {0x3c90, 0x07},
  329. {0x3c91, 0x00},
  330. {0x3c92, 0x00},
  331. {0x3c93, 0x00},
  332. {0x3c94, 0xd0},
  333. {0x3c95, 0x50},
  334. {0x3c96, 0x35},
  335. {0x3c97, 0x00},
  336. {0x4001, 0xe0},
  337. {0x4008, 0x00},
  338. {0x4009, 0x07},
  339. {0x400f, 0x80},
  340. {0x4013, 0x02},
  341. {0x4040, 0x00},
  342. {0x4041, 0x03},
  343. {0x404c, 0x50},
  344. {0x404e, 0x20},
  345. {0x4500, 0x06},
  346. {0x4503, 0x00},
  347. {0x450a, 0x04},
  348. {0x4809, 0x04},
  349. {0x480c, 0x12},
  350. {0x4819, 0x70},
  351. {0x4825, 0x32},
  352. {0x4826, 0x32},
  353. {0x482a, 0x06},
  354. {0x4833, 0x08},
  355. {0x4837, 0x0d},
  356. {0x5000, 0x77},
  357. {0x5b00, 0x01},
  358. {0x5b01, 0x10},
  359. {0x5b02, 0x01},
  360. {0x5b03, 0xdb},
  361. {0x5b05, 0x6c},
  362. {0x5e10, 0xfc},
  363. {0x3500, 0x00},
  364. {0x3501, 0x1F},
  365. {0x3502, 0x20},
  366. {0x3503, 0x08},
  367. {0x3508, 0x04},
  368. {0x3509, 0x00},
  369. {0x3832, 0x48},
  370. {0x5780, 0x3e},
  371. {0x5781, 0x0f},
  372. {0x5782, 0x44},
  373. {0x5783, 0x02},
  374. {0x5784, 0x01},
  375. {0x5785, 0x01},
  376. {0x5786, 0x00},
  377. {0x5787, 0x04},
  378. {0x5788, 0x02},
  379. {0x5789, 0x0f},
  380. {0x578a, 0xfd},
  381. {0x578b, 0xf5},
  382. {0x578c, 0xf5},
  383. {0x578d, 0x03},
  384. {0x578e, 0x08},
  385. {0x578f, 0x0c},
  386. {0x5790, 0x08},
  387. {0x5791, 0x06},
  388. {0x5792, 0x00},
  389. {0x5793, 0x52},
  390. {0x5794, 0xa3},
  391. {0x4003, 0x40},
  392. {0x3107, 0x01},
  393. {0x3c80, 0x08},
  394. {0x3c83, 0xb1},
  395. {0x3c8c, 0x10},
  396. {0x3c8d, 0x00},
  397. {0x3c90, 0x00},
  398. {0x3c94, 0x00},
  399. {0x3c95, 0x00},
  400. {0x3c96, 0x00},
  401. {0x37cb, 0x09},
  402. {0x37cc, 0x15},
  403. {0x37cd, 0x1f},
  404. {0x37ce, 0x1f},
  405. };
  406. static const char * const ov5675_test_pattern_menu[] = {
  407. "Disabled",
  408. "Standard Color Bar",
  409. "Top-Bottom Darker Color Bar",
  410. "Right-Left Darker Color Bar",
  411. "Bottom-Top Darker Color Bar"
  412. };
  413. static const s64 link_freq_menu_items[] = {
  414. OV5675_LINK_FREQ_450MHZ,
  415. };
  416. static const struct ov5675_link_freq_config link_freq_configs[] = {
  417. [OV5675_LINK_FREQ_900MBPS] = {
  418. .reg_list = {
  419. .num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps),
  420. .regs = mipi_data_rate_900mbps,
  421. }
  422. }
  423. };
  424. static const struct ov5675_mode supported_modes[] = {
  425. {
  426. .width = 2592,
  427. .height = 1944,
  428. .hts = 1500,
  429. .vts_def = OV5675_VTS_30FPS,
  430. .vts_min = OV5675_VTS_30FPS_MIN,
  431. .reg_list = {
  432. .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
  433. .regs = mode_2592x1944_regs,
  434. },
  435. .link_freq_index = OV5675_LINK_FREQ_900MBPS,
  436. },
  437. {
  438. .width = 1296,
  439. .height = 972,
  440. .hts = 1500,
  441. .vts_def = OV5675_VTS_30FPS,
  442. .vts_min = OV5675_VTS_30FPS_MIN,
  443. .reg_list = {
  444. .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
  445. .regs = mode_1296x972_regs,
  446. },
  447. .link_freq_index = OV5675_LINK_FREQ_900MBPS,
  448. }
  449. };
  450. struct ov5675 {
  451. struct v4l2_subdev sd;
  452. struct media_pad pad;
  453. struct v4l2_ctrl_handler ctrl_handler;
  454. /* V4L2 Controls */
  455. struct v4l2_ctrl *link_freq;
  456. struct v4l2_ctrl *pixel_rate;
  457. struct v4l2_ctrl *vblank;
  458. struct v4l2_ctrl *hblank;
  459. struct v4l2_ctrl *exposure;
  460. /* Current mode */
  461. const struct ov5675_mode *cur_mode;
  462. /* To serialize asynchronus callbacks */
  463. struct mutex mutex;
  464. /* Streaming on/off */
  465. bool streaming;
  466. /* True if the device has been identified */
  467. bool identified;
  468. };
  469. static u64 to_pixel_rate(u32 f_index)
  470. {
  471. u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES;
  472. do_div(pixel_rate, OV5675_RGB_DEPTH);
  473. return pixel_rate;
  474. }
  475. static u64 to_pixels_per_line(u32 hts, u32 f_index)
  476. {
  477. u64 ppl = hts * to_pixel_rate(f_index);
  478. do_div(ppl, OV5675_SCLK);
  479. return ppl;
  480. }
  481. static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val)
  482. {
  483. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  484. struct i2c_msg msgs[2];
  485. u8 addr_buf[2];
  486. u8 data_buf[4] = {0};
  487. int ret;
  488. if (len > 4)
  489. return -EINVAL;
  490. put_unaligned_be16(reg, addr_buf);
  491. msgs[0].addr = client->addr;
  492. msgs[0].flags = 0;
  493. msgs[0].len = sizeof(addr_buf);
  494. msgs[0].buf = addr_buf;
  495. msgs[1].addr = client->addr;
  496. msgs[1].flags = I2C_M_RD;
  497. msgs[1].len = len;
  498. msgs[1].buf = &data_buf[4 - len];
  499. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  500. if (ret != ARRAY_SIZE(msgs))
  501. return -EIO;
  502. *val = get_unaligned_be32(data_buf);
  503. return 0;
  504. }
  505. static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val)
  506. {
  507. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  508. u8 buf[6];
  509. if (len > 4)
  510. return -EINVAL;
  511. put_unaligned_be16(reg, buf);
  512. put_unaligned_be32(val << 8 * (4 - len), buf + 2);
  513. if (i2c_master_send(client, buf, len + 2) != len + 2)
  514. return -EIO;
  515. return 0;
  516. }
  517. static int ov5675_write_reg_list(struct ov5675 *ov5675,
  518. const struct ov5675_reg_list *r_list)
  519. {
  520. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  521. unsigned int i;
  522. int ret;
  523. for (i = 0; i < r_list->num_of_regs; i++) {
  524. ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1,
  525. r_list->regs[i].val);
  526. if (ret) {
  527. dev_err_ratelimited(&client->dev,
  528. "failed to write reg 0x%4.4x. error = %d",
  529. r_list->regs[i].address, ret);
  530. return ret;
  531. }
  532. }
  533. return 0;
  534. }
  535. static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain)
  536. {
  537. int ret;
  538. ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
  539. OV5675_REG_VALUE_08BIT,
  540. OV5675_GROUP_HOLD_START);
  541. if (ret)
  542. return ret;
  543. ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN,
  544. OV5675_REG_VALUE_16BIT, d_gain);
  545. if (ret)
  546. return ret;
  547. ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN,
  548. OV5675_REG_VALUE_16BIT, d_gain);
  549. if (ret)
  550. return ret;
  551. ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN,
  552. OV5675_REG_VALUE_16BIT, d_gain);
  553. if (ret)
  554. return ret;
  555. ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
  556. OV5675_REG_VALUE_08BIT,
  557. OV5675_GROUP_HOLD_END);
  558. if (ret)
  559. return ret;
  560. ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
  561. OV5675_REG_VALUE_08BIT,
  562. OV5675_GROUP_HOLD_LAUNCH);
  563. return ret;
  564. }
  565. static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern)
  566. {
  567. if (pattern)
  568. pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT |
  569. OV5675_TEST_PATTERN_ENABLE;
  570. return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN,
  571. OV5675_REG_VALUE_08BIT, pattern);
  572. }
  573. /*
  574. * OV5675 supports keeping the pixel order by mirror and flip function
  575. * The Bayer order isn't affected by the flip controls
  576. */
  577. static int ov5675_set_ctrl_hflip(struct ov5675 *ov5675, u32 ctrl_val)
  578. {
  579. int ret;
  580. u32 val;
  581. ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
  582. OV5675_REG_VALUE_08BIT, &val);
  583. if (ret)
  584. return ret;
  585. return ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
  586. OV5675_REG_VALUE_08BIT,
  587. ctrl_val ? val & ~BIT(3) : val | BIT(3));
  588. }
  589. static int ov5675_set_ctrl_vflip(struct ov5675 *ov5675, u8 ctrl_val)
  590. {
  591. int ret;
  592. u32 val;
  593. ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
  594. OV5675_REG_VALUE_08BIT, &val);
  595. if (ret)
  596. return ret;
  597. ret = ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
  598. OV5675_REG_VALUE_08BIT,
  599. ctrl_val ? val | BIT(4) | BIT(5) : val & ~BIT(4) & ~BIT(5));
  600. if (ret)
  601. return ret;
  602. ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT2,
  603. OV5675_REG_VALUE_08BIT, &val);
  604. if (ret)
  605. return ret;
  606. return ov5675_write_reg(ov5675, OV5675_REG_FORMAT2,
  607. OV5675_REG_VALUE_08BIT,
  608. ctrl_val ? val | BIT(1) : val & ~BIT(1));
  609. }
  610. static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl)
  611. {
  612. struct ov5675 *ov5675 = container_of(ctrl->handler,
  613. struct ov5675, ctrl_handler);
  614. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  615. s64 exposure_max;
  616. int ret = 0;
  617. /* Propagate change of current control to all related controls */
  618. if (ctrl->id == V4L2_CID_VBLANK) {
  619. /* Update max exposure while meeting expected vblanking */
  620. exposure_max = ov5675->cur_mode->height + ctrl->val -
  621. OV5675_EXPOSURE_MAX_MARGIN;
  622. __v4l2_ctrl_modify_range(ov5675->exposure,
  623. ov5675->exposure->minimum,
  624. exposure_max, ov5675->exposure->step,
  625. exposure_max);
  626. }
  627. /* V4L2 controls values will be applied only when power is already up */
  628. if (!pm_runtime_get_if_in_use(&client->dev))
  629. return 0;
  630. switch (ctrl->id) {
  631. case V4L2_CID_ANALOGUE_GAIN:
  632. ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN,
  633. OV5675_REG_VALUE_16BIT, ctrl->val);
  634. break;
  635. case V4L2_CID_DIGITAL_GAIN:
  636. ret = ov5675_update_digital_gain(ov5675, ctrl->val);
  637. break;
  638. case V4L2_CID_EXPOSURE:
  639. /* 4 least significant bits of expsoure are fractional part
  640. * val = val << 4
  641. * for ov5675, the unit of exposure is differnt from other
  642. * OmniVision sensors, its exposure value is twice of the
  643. * register value, the exposure should be divided by 2 before
  644. * set register, e.g. val << 3.
  645. */
  646. ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE,
  647. OV5675_REG_VALUE_24BIT, ctrl->val << 3);
  648. break;
  649. case V4L2_CID_VBLANK:
  650. ret = ov5675_write_reg(ov5675, OV5675_REG_VTS,
  651. OV5675_REG_VALUE_16BIT,
  652. ov5675->cur_mode->height + ctrl->val +
  653. 10);
  654. break;
  655. case V4L2_CID_TEST_PATTERN:
  656. ret = ov5675_test_pattern(ov5675, ctrl->val);
  657. break;
  658. case V4L2_CID_HFLIP:
  659. ov5675_set_ctrl_hflip(ov5675, ctrl->val);
  660. break;
  661. case V4L2_CID_VFLIP:
  662. ov5675_set_ctrl_vflip(ov5675, ctrl->val);
  663. break;
  664. default:
  665. ret = -EINVAL;
  666. break;
  667. }
  668. pm_runtime_put(&client->dev);
  669. return ret;
  670. }
  671. static const struct v4l2_ctrl_ops ov5675_ctrl_ops = {
  672. .s_ctrl = ov5675_set_ctrl,
  673. };
  674. static int ov5675_init_controls(struct ov5675 *ov5675)
  675. {
  676. struct v4l2_ctrl_handler *ctrl_hdlr;
  677. s64 exposure_max, h_blank;
  678. int ret;
  679. ctrl_hdlr = &ov5675->ctrl_handler;
  680. ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
  681. if (ret)
  682. return ret;
  683. ctrl_hdlr->lock = &ov5675->mutex;
  684. ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops,
  685. V4L2_CID_LINK_FREQ,
  686. ARRAY_SIZE(link_freq_menu_items) - 1,
  687. 0, link_freq_menu_items);
  688. if (ov5675->link_freq)
  689. ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  690. ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  691. V4L2_CID_PIXEL_RATE, 0,
  692. to_pixel_rate(OV5675_LINK_FREQ_900MBPS),
  693. 1,
  694. to_pixel_rate(OV5675_LINK_FREQ_900MBPS));
  695. ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  696. V4L2_CID_VBLANK,
  697. ov5675->cur_mode->vts_min - ov5675->cur_mode->height,
  698. OV5675_VTS_MAX - ov5675->cur_mode->height, 1,
  699. ov5675->cur_mode->vts_def - ov5675->cur_mode->height);
  700. h_blank = to_pixels_per_line(ov5675->cur_mode->hts,
  701. ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width;
  702. ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  703. V4L2_CID_HBLANK, h_blank, h_blank, 1,
  704. h_blank);
  705. if (ov5675->hblank)
  706. ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  707. v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
  708. OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX,
  709. OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN);
  710. v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
  711. OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX,
  712. OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT);
  713. exposure_max = (ov5675->cur_mode->vts_def - OV5675_EXPOSURE_MAX_MARGIN);
  714. ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  715. V4L2_CID_EXPOSURE,
  716. OV5675_EXPOSURE_MIN, exposure_max,
  717. OV5675_EXPOSURE_STEP,
  718. exposure_max);
  719. v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops,
  720. V4L2_CID_TEST_PATTERN,
  721. ARRAY_SIZE(ov5675_test_pattern_menu) - 1,
  722. 0, 0, ov5675_test_pattern_menu);
  723. v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  724. V4L2_CID_HFLIP, 0, 1, 1, 0);
  725. v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
  726. V4L2_CID_VFLIP, 0, 1, 1, 0);
  727. if (ctrl_hdlr->error) {
  728. v4l2_ctrl_handler_free(ctrl_hdlr);
  729. return ctrl_hdlr->error;
  730. }
  731. ov5675->sd.ctrl_handler = ctrl_hdlr;
  732. return 0;
  733. }
  734. static void ov5675_update_pad_format(const struct ov5675_mode *mode,
  735. struct v4l2_mbus_framefmt *fmt)
  736. {
  737. fmt->width = mode->width;
  738. fmt->height = mode->height;
  739. fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  740. fmt->field = V4L2_FIELD_NONE;
  741. }
  742. static int ov5675_identify_module(struct ov5675 *ov5675)
  743. {
  744. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  745. int ret;
  746. u32 val;
  747. if (ov5675->identified)
  748. return 0;
  749. ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID,
  750. OV5675_REG_VALUE_24BIT, &val);
  751. if (ret)
  752. return ret;
  753. if (val != OV5675_CHIP_ID) {
  754. dev_err(&client->dev, "chip id mismatch: %x!=%x",
  755. OV5675_CHIP_ID, val);
  756. return -ENXIO;
  757. }
  758. ov5675->identified = true;
  759. return 0;
  760. }
  761. static int ov5675_start_streaming(struct ov5675 *ov5675)
  762. {
  763. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  764. const struct ov5675_reg_list *reg_list;
  765. int link_freq_index, ret;
  766. ret = ov5675_identify_module(ov5675);
  767. if (ret)
  768. return ret;
  769. link_freq_index = ov5675->cur_mode->link_freq_index;
  770. reg_list = &link_freq_configs[link_freq_index].reg_list;
  771. ret = ov5675_write_reg_list(ov5675, reg_list);
  772. if (ret) {
  773. dev_err(&client->dev, "failed to set plls");
  774. return ret;
  775. }
  776. reg_list = &ov5675->cur_mode->reg_list;
  777. ret = ov5675_write_reg_list(ov5675, reg_list);
  778. if (ret) {
  779. dev_err(&client->dev, "failed to set mode");
  780. return ret;
  781. }
  782. ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler);
  783. if (ret)
  784. return ret;
  785. ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
  786. OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING);
  787. if (ret) {
  788. dev_err(&client->dev, "failed to set stream");
  789. return ret;
  790. }
  791. return 0;
  792. }
  793. static void ov5675_stop_streaming(struct ov5675 *ov5675)
  794. {
  795. struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
  796. if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
  797. OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY))
  798. dev_err(&client->dev, "failed to set stream");
  799. }
  800. static int ov5675_set_stream(struct v4l2_subdev *sd, int enable)
  801. {
  802. struct ov5675 *ov5675 = to_ov5675(sd);
  803. struct i2c_client *client = v4l2_get_subdevdata(sd);
  804. int ret = 0;
  805. if (ov5675->streaming == enable)
  806. return 0;
  807. mutex_lock(&ov5675->mutex);
  808. if (enable) {
  809. ret = pm_runtime_resume_and_get(&client->dev);
  810. if (ret < 0) {
  811. mutex_unlock(&ov5675->mutex);
  812. return ret;
  813. }
  814. ret = ov5675_start_streaming(ov5675);
  815. if (ret) {
  816. enable = 0;
  817. ov5675_stop_streaming(ov5675);
  818. pm_runtime_put(&client->dev);
  819. }
  820. } else {
  821. ov5675_stop_streaming(ov5675);
  822. pm_runtime_put(&client->dev);
  823. }
  824. ov5675->streaming = enable;
  825. mutex_unlock(&ov5675->mutex);
  826. return ret;
  827. }
  828. static int __maybe_unused ov5675_suspend(struct device *dev)
  829. {
  830. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  831. struct ov5675 *ov5675 = to_ov5675(sd);
  832. mutex_lock(&ov5675->mutex);
  833. if (ov5675->streaming)
  834. ov5675_stop_streaming(ov5675);
  835. mutex_unlock(&ov5675->mutex);
  836. return 0;
  837. }
  838. static int __maybe_unused ov5675_resume(struct device *dev)
  839. {
  840. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  841. struct ov5675 *ov5675 = to_ov5675(sd);
  842. int ret;
  843. mutex_lock(&ov5675->mutex);
  844. if (ov5675->streaming) {
  845. ret = ov5675_start_streaming(ov5675);
  846. if (ret) {
  847. ov5675->streaming = false;
  848. ov5675_stop_streaming(ov5675);
  849. mutex_unlock(&ov5675->mutex);
  850. return ret;
  851. }
  852. }
  853. mutex_unlock(&ov5675->mutex);
  854. return 0;
  855. }
  856. static int ov5675_set_format(struct v4l2_subdev *sd,
  857. struct v4l2_subdev_state *sd_state,
  858. struct v4l2_subdev_format *fmt)
  859. {
  860. struct ov5675 *ov5675 = to_ov5675(sd);
  861. const struct ov5675_mode *mode;
  862. s32 vblank_def, h_blank;
  863. mode = v4l2_find_nearest_size(supported_modes,
  864. ARRAY_SIZE(supported_modes), width,
  865. height, fmt->format.width,
  866. fmt->format.height);
  867. mutex_lock(&ov5675->mutex);
  868. ov5675_update_pad_format(mode, &fmt->format);
  869. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  870. *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
  871. } else {
  872. ov5675->cur_mode = mode;
  873. __v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index);
  874. __v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate,
  875. to_pixel_rate(mode->link_freq_index));
  876. /* Update limits and set FPS to default */
  877. vblank_def = mode->vts_def - mode->height;
  878. __v4l2_ctrl_modify_range(ov5675->vblank,
  879. mode->vts_min - mode->height,
  880. OV5675_VTS_MAX - mode->height, 1,
  881. vblank_def);
  882. __v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def);
  883. h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
  884. mode->width;
  885. __v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1,
  886. h_blank);
  887. }
  888. mutex_unlock(&ov5675->mutex);
  889. return 0;
  890. }
  891. static int ov5675_get_format(struct v4l2_subdev *sd,
  892. struct v4l2_subdev_state *sd_state,
  893. struct v4l2_subdev_format *fmt)
  894. {
  895. struct ov5675 *ov5675 = to_ov5675(sd);
  896. mutex_lock(&ov5675->mutex);
  897. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
  898. fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd,
  899. sd_state,
  900. fmt->pad);
  901. else
  902. ov5675_update_pad_format(ov5675->cur_mode, &fmt->format);
  903. mutex_unlock(&ov5675->mutex);
  904. return 0;
  905. }
  906. static int ov5675_enum_mbus_code(struct v4l2_subdev *sd,
  907. struct v4l2_subdev_state *sd_state,
  908. struct v4l2_subdev_mbus_code_enum *code)
  909. {
  910. if (code->index > 0)
  911. return -EINVAL;
  912. code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  913. return 0;
  914. }
  915. static int ov5675_enum_frame_size(struct v4l2_subdev *sd,
  916. struct v4l2_subdev_state *sd_state,
  917. struct v4l2_subdev_frame_size_enum *fse)
  918. {
  919. if (fse->index >= ARRAY_SIZE(supported_modes))
  920. return -EINVAL;
  921. if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
  922. return -EINVAL;
  923. fse->min_width = supported_modes[fse->index].width;
  924. fse->max_width = fse->min_width;
  925. fse->min_height = supported_modes[fse->index].height;
  926. fse->max_height = fse->min_height;
  927. return 0;
  928. }
  929. static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  930. {
  931. struct ov5675 *ov5675 = to_ov5675(sd);
  932. mutex_lock(&ov5675->mutex);
  933. ov5675_update_pad_format(&supported_modes[0],
  934. v4l2_subdev_get_try_format(sd, fh->state, 0));
  935. mutex_unlock(&ov5675->mutex);
  936. return 0;
  937. }
  938. static const struct v4l2_subdev_video_ops ov5675_video_ops = {
  939. .s_stream = ov5675_set_stream,
  940. };
  941. static const struct v4l2_subdev_pad_ops ov5675_pad_ops = {
  942. .set_fmt = ov5675_set_format,
  943. .get_fmt = ov5675_get_format,
  944. .enum_mbus_code = ov5675_enum_mbus_code,
  945. .enum_frame_size = ov5675_enum_frame_size,
  946. };
  947. static const struct v4l2_subdev_ops ov5675_subdev_ops = {
  948. .video = &ov5675_video_ops,
  949. .pad = &ov5675_pad_ops,
  950. };
  951. static const struct media_entity_operations ov5675_subdev_entity_ops = {
  952. .link_validate = v4l2_subdev_link_validate,
  953. };
  954. static const struct v4l2_subdev_internal_ops ov5675_internal_ops = {
  955. .open = ov5675_open,
  956. };
  957. static int ov5675_check_hwcfg(struct device *dev)
  958. {
  959. struct fwnode_handle *ep;
  960. struct fwnode_handle *fwnode = dev_fwnode(dev);
  961. struct v4l2_fwnode_endpoint bus_cfg = {
  962. .bus_type = V4L2_MBUS_CSI2_DPHY
  963. };
  964. u32 mclk;
  965. int ret;
  966. unsigned int i, j;
  967. if (!fwnode)
  968. return -ENXIO;
  969. ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
  970. if (ret) {
  971. dev_err(dev, "can't get clock frequency");
  972. return ret;
  973. }
  974. if (mclk != OV5675_MCLK) {
  975. dev_err(dev, "external clock %d is not supported", mclk);
  976. return -EINVAL;
  977. }
  978. ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
  979. if (!ep)
  980. return -ENXIO;
  981. ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
  982. fwnode_handle_put(ep);
  983. if (ret)
  984. return ret;
  985. if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) {
  986. dev_err(dev, "number of CSI2 data lanes %d is not supported",
  987. bus_cfg.bus.mipi_csi2.num_data_lanes);
  988. ret = -EINVAL;
  989. goto check_hwcfg_error;
  990. }
  991. if (!bus_cfg.nr_of_link_frequencies) {
  992. dev_err(dev, "no link frequencies defined");
  993. ret = -EINVAL;
  994. goto check_hwcfg_error;
  995. }
  996. for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
  997. for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
  998. if (link_freq_menu_items[i] ==
  999. bus_cfg.link_frequencies[j])
  1000. break;
  1001. }
  1002. if (j == bus_cfg.nr_of_link_frequencies) {
  1003. dev_err(dev, "no link frequency %lld supported",
  1004. link_freq_menu_items[i]);
  1005. ret = -EINVAL;
  1006. goto check_hwcfg_error;
  1007. }
  1008. }
  1009. check_hwcfg_error:
  1010. v4l2_fwnode_endpoint_free(&bus_cfg);
  1011. return ret;
  1012. }
  1013. static void ov5675_remove(struct i2c_client *client)
  1014. {
  1015. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1016. struct ov5675 *ov5675 = to_ov5675(sd);
  1017. v4l2_async_unregister_subdev(sd);
  1018. media_entity_cleanup(&sd->entity);
  1019. v4l2_ctrl_handler_free(sd->ctrl_handler);
  1020. pm_runtime_disable(&client->dev);
  1021. mutex_destroy(&ov5675->mutex);
  1022. }
  1023. static int ov5675_probe(struct i2c_client *client)
  1024. {
  1025. struct ov5675 *ov5675;
  1026. bool full_power;
  1027. int ret;
  1028. ret = ov5675_check_hwcfg(&client->dev);
  1029. if (ret) {
  1030. dev_err(&client->dev, "failed to check HW configuration: %d",
  1031. ret);
  1032. return ret;
  1033. }
  1034. ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL);
  1035. if (!ov5675)
  1036. return -ENOMEM;
  1037. v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops);
  1038. full_power = acpi_dev_state_d0(&client->dev);
  1039. if (full_power) {
  1040. ret = ov5675_identify_module(ov5675);
  1041. if (ret) {
  1042. dev_err(&client->dev, "failed to find sensor: %d", ret);
  1043. return ret;
  1044. }
  1045. }
  1046. mutex_init(&ov5675->mutex);
  1047. ov5675->cur_mode = &supported_modes[0];
  1048. ret = ov5675_init_controls(ov5675);
  1049. if (ret) {
  1050. dev_err(&client->dev, "failed to init controls: %d", ret);
  1051. goto probe_error_v4l2_ctrl_handler_free;
  1052. }
  1053. ov5675->sd.internal_ops = &ov5675_internal_ops;
  1054. ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1055. ov5675->sd.entity.ops = &ov5675_subdev_entity_ops;
  1056. ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1057. ov5675->pad.flags = MEDIA_PAD_FL_SOURCE;
  1058. ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad);
  1059. if (ret) {
  1060. dev_err(&client->dev, "failed to init entity pads: %d", ret);
  1061. goto probe_error_v4l2_ctrl_handler_free;
  1062. }
  1063. ret = v4l2_async_register_subdev_sensor(&ov5675->sd);
  1064. if (ret < 0) {
  1065. dev_err(&client->dev, "failed to register V4L2 subdev: %d",
  1066. ret);
  1067. goto probe_error_media_entity_cleanup;
  1068. }
  1069. /*
  1070. * Device is already turned on by i2c-core with ACPI domain PM.
  1071. * Enable runtime PM and turn off the device.
  1072. */
  1073. /* Set the device's state to active if it's in D0 state. */
  1074. if (full_power)
  1075. pm_runtime_set_active(&client->dev);
  1076. pm_runtime_enable(&client->dev);
  1077. pm_runtime_idle(&client->dev);
  1078. return 0;
  1079. probe_error_media_entity_cleanup:
  1080. media_entity_cleanup(&ov5675->sd.entity);
  1081. probe_error_v4l2_ctrl_handler_free:
  1082. v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler);
  1083. mutex_destroy(&ov5675->mutex);
  1084. return ret;
  1085. }
  1086. static const struct dev_pm_ops ov5675_pm_ops = {
  1087. SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume)
  1088. };
  1089. #ifdef CONFIG_ACPI
  1090. static const struct acpi_device_id ov5675_acpi_ids[] = {
  1091. {"OVTI5675"},
  1092. {}
  1093. };
  1094. MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids);
  1095. #endif
  1096. static struct i2c_driver ov5675_i2c_driver = {
  1097. .driver = {
  1098. .name = "ov5675",
  1099. .pm = &ov5675_pm_ops,
  1100. .acpi_match_table = ACPI_PTR(ov5675_acpi_ids),
  1101. },
  1102. .probe_new = ov5675_probe,
  1103. .remove = ov5675_remove,
  1104. .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
  1105. };
  1106. module_i2c_driver(ov5675_i2c_driver);
  1107. MODULE_AUTHOR("Shawn Tu <[email protected]>");
  1108. MODULE_DESCRIPTION("OmniVision OV5675 sensor driver");
  1109. MODULE_LICENSE("GPL v2");