ov5648.c 66 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2020 Bootlin
  4. * Author: Paul Kocialkowski <[email protected]>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/delay.h>
  8. #include <linux/device.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/of_graph.h>
  12. #include <linux/pm_runtime.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/videodev2.h>
  15. #include <media/v4l2-ctrls.h>
  16. #include <media/v4l2-device.h>
  17. #include <media/v4l2-fwnode.h>
  18. #include <media/v4l2-image-sizes.h>
  19. #include <media/v4l2-mediabus.h>
  20. /* Clock rate */
  21. #define OV5648_XVCLK_RATE 24000000
  22. /* Register definitions */
  23. /* System */
  24. #define OV5648_SW_STANDBY_REG 0x100
  25. #define OV5648_SW_STANDBY_STREAM_ON BIT(0)
  26. #define OV5648_SW_RESET_REG 0x103
  27. #define OV5648_SW_RESET_RESET BIT(0)
  28. #define OV5648_PAD_OEN0_REG 0x3000
  29. #define OV5648_PAD_OEN1_REG 0x3001
  30. #define OV5648_PAD_OEN2_REG 0x3002
  31. #define OV5648_PAD_OUT0_REG 0x3008
  32. #define OV5648_PAD_OUT1_REG 0x3009
  33. #define OV5648_CHIP_ID_H_REG 0x300a
  34. #define OV5648_CHIP_ID_H_VALUE 0x56
  35. #define OV5648_CHIP_ID_L_REG 0x300b
  36. #define OV5648_CHIP_ID_L_VALUE 0x48
  37. #define OV5648_PAD_OUT2_REG 0x300d
  38. #define OV5648_PAD_SEL0_REG 0x300e
  39. #define OV5648_PAD_SEL1_REG 0x300f
  40. #define OV5648_PAD_SEL2_REG 0x3010
  41. #define OV5648_PAD_PK_REG 0x3011
  42. #define OV5648_PAD_PK_PD_DATO_EN BIT(7)
  43. #define OV5648_PAD_PK_DRIVE_STRENGTH_1X (0 << 5)
  44. #define OV5648_PAD_PK_DRIVE_STRENGTH_2X (2 << 5)
  45. #define OV5648_PAD_PK_FREX_N BIT(1)
  46. #define OV5648_A_PWC_PK_O0_REG 0x3013
  47. #define OV5648_A_PWC_PK_O0_BP_REGULATOR_N BIT(3)
  48. #define OV5648_A_PWC_PK_O1_REG 0x3014
  49. #define OV5648_MIPI_PHY0_REG 0x3016
  50. #define OV5648_MIPI_PHY1_REG 0x3017
  51. #define OV5648_MIPI_SC_CTRL0_REG 0x3018
  52. #define OV5648_MIPI_SC_CTRL0_MIPI_LANES(v) (((v) << 5) & GENMASK(7, 5))
  53. #define OV5648_MIPI_SC_CTRL0_PHY_HS_TX_PD BIT(4)
  54. #define OV5648_MIPI_SC_CTRL0_PHY_LP_RX_PD BIT(3)
  55. #define OV5648_MIPI_SC_CTRL0_MIPI_EN BIT(2)
  56. #define OV5648_MIPI_SC_CTRL0_MIPI_SUSP BIT(1)
  57. #define OV5648_MIPI_SC_CTRL0_LANE_DIS_OP BIT(0)
  58. #define OV5648_MIPI_SC_CTRL1_REG 0x3019
  59. #define OV5648_MISC_CTRL0_REG 0x3021
  60. #define OV5648_MIPI_SC_CTRL2_REG 0x3022
  61. #define OV5648_SUB_ID_REG 0x302a
  62. #define OV5648_PLL_CTRL0_REG 0x3034
  63. #define OV5648_PLL_CTRL0_PLL_CHARGE_PUMP(v) (((v) << 4) & GENMASK(6, 4))
  64. #define OV5648_PLL_CTRL0_BITS(v) ((v) & GENMASK(3, 0))
  65. #define OV5648_PLL_CTRL1_REG 0x3035
  66. #define OV5648_PLL_CTRL1_SYS_DIV(v) (((v) << 4) & GENMASK(7, 4))
  67. #define OV5648_PLL_CTRL1_MIPI_DIV(v) ((v) & GENMASK(3, 0))
  68. #define OV5648_PLL_MUL_REG 0x3036
  69. #define OV5648_PLL_MUL(v) ((v) & GENMASK(7, 0))
  70. #define OV5648_PLL_DIV_REG 0x3037
  71. #define OV5648_PLL_DIV_ROOT_DIV(v) ((((v) - 1) << 4) & BIT(4))
  72. #define OV5648_PLL_DIV_PLL_PRE_DIV(v) ((v) & GENMASK(3, 0))
  73. #define OV5648_PLL_DEBUG_REG 0x3038
  74. #define OV5648_PLL_BYPASS_REG 0x3039
  75. #define OV5648_PLLS_BYPASS_REG 0x303a
  76. #define OV5648_PLLS_MUL_REG 0x303b
  77. #define OV5648_PLLS_MUL(v) ((v) & GENMASK(4, 0))
  78. #define OV5648_PLLS_CTRL_REG 0x303c
  79. #define OV5648_PLLS_CTRL_PLL_CHARGE_PUMP(v) (((v) << 4) & GENMASK(6, 4))
  80. #define OV5648_PLLS_CTRL_SYS_DIV(v) ((v) & GENMASK(3, 0))
  81. #define OV5648_PLLS_DIV_REG 0x303d
  82. #define OV5648_PLLS_DIV_PLLS_PRE_DIV(v) (((v) << 4) & GENMASK(5, 4))
  83. #define OV5648_PLLS_DIV_PLLS_DIV_R(v) ((((v) - 1) << 2) & BIT(2))
  84. #define OV5648_PLLS_DIV_PLLS_SEL_DIV(v) ((v) & GENMASK(1, 0))
  85. #define OV5648_SRB_CTRL_REG 0x3106
  86. #define OV5648_SRB_CTRL_SCLK_DIV(v) (((v) << 2) & GENMASK(3, 2))
  87. #define OV5648_SRB_CTRL_RESET_ARBITER_EN BIT(1)
  88. #define OV5648_SRB_CTRL_SCLK_ARBITER_EN BIT(0)
  89. /* Group Hold */
  90. #define OV5648_GROUP_ADR0_REG 0x3200
  91. #define OV5648_GROUP_ADR1_REG 0x3201
  92. #define OV5648_GROUP_ADR2_REG 0x3202
  93. #define OV5648_GROUP_ADR3_REG 0x3203
  94. #define OV5648_GROUP_LEN0_REG 0x3204
  95. #define OV5648_GROUP_LEN1_REG 0x3205
  96. #define OV5648_GROUP_LEN2_REG 0x3206
  97. #define OV5648_GROUP_LEN3_REG 0x3207
  98. #define OV5648_GROUP_ACCESS_REG 0x3208
  99. /* Exposure/gain/banding */
  100. #define OV5648_EXPOSURE_CTRL_HH_REG 0x3500
  101. #define OV5648_EXPOSURE_CTRL_HH(v) (((v) & GENMASK(19, 16)) >> 16)
  102. #define OV5648_EXPOSURE_CTRL_HH_VALUE(v) (((v) << 16) & GENMASK(19, 16))
  103. #define OV5648_EXPOSURE_CTRL_H_REG 0x3501
  104. #define OV5648_EXPOSURE_CTRL_H(v) (((v) & GENMASK(15, 8)) >> 8)
  105. #define OV5648_EXPOSURE_CTRL_H_VALUE(v) (((v) << 8) & GENMASK(15, 8))
  106. #define OV5648_EXPOSURE_CTRL_L_REG 0x3502
  107. #define OV5648_EXPOSURE_CTRL_L(v) ((v) & GENMASK(7, 0))
  108. #define OV5648_EXPOSURE_CTRL_L_VALUE(v) ((v) & GENMASK(7, 0))
  109. #define OV5648_MANUAL_CTRL_REG 0x3503
  110. #define OV5648_MANUAL_CTRL_FRAME_DELAY(v) (((v) << 4) & GENMASK(5, 4))
  111. #define OV5648_MANUAL_CTRL_AGC_MANUAL_EN BIT(1)
  112. #define OV5648_MANUAL_CTRL_AEC_MANUAL_EN BIT(0)
  113. #define OV5648_GAIN_CTRL_H_REG 0x350a
  114. #define OV5648_GAIN_CTRL_H(v) (((v) & GENMASK(9, 8)) >> 8)
  115. #define OV5648_GAIN_CTRL_H_VALUE(v) (((v) << 8) & GENMASK(9, 8))
  116. #define OV5648_GAIN_CTRL_L_REG 0x350b
  117. #define OV5648_GAIN_CTRL_L(v) ((v) & GENMASK(7, 0))
  118. #define OV5648_GAIN_CTRL_L_VALUE(v) ((v) & GENMASK(7, 0))
  119. #define OV5648_ANALOG_CTRL0_REG_BASE 0x3600
  120. #define OV5648_ANALOG_CTRL1_REG_BASE 0x3700
  121. #define OV5648_AEC_CTRL0_REG 0x3a00
  122. #define OV5648_AEC_CTRL0_DEBUG BIT(6)
  123. #define OV5648_AEC_CTRL0_DEBAND_EN BIT(5)
  124. #define OV5648_AEC_CTRL0_DEBAND_LOW_LIMIT_EN BIT(4)
  125. #define OV5648_AEC_CTRL0_START_SEL_EN BIT(3)
  126. #define OV5648_AEC_CTRL0_NIGHT_MODE_EN BIT(2)
  127. #define OV5648_AEC_CTRL0_FREEZE_EN BIT(0)
  128. #define OV5648_EXPOSURE_MIN_REG 0x3a01
  129. #define OV5648_EXPOSURE_MAX_60_H_REG 0x3a02
  130. #define OV5648_EXPOSURE_MAX_60_L_REG 0x3a03
  131. #define OV5648_AEC_CTRL5_REG 0x3a05
  132. #define OV5648_AEC_CTRL6_REG 0x3a06
  133. #define OV5648_AEC_CTRL7_REG 0x3a07
  134. #define OV5648_BANDING_STEP_50_H_REG 0x3a08
  135. #define OV5648_BANDING_STEP_50_L_REG 0x3a09
  136. #define OV5648_BANDING_STEP_60_H_REG 0x3a0a
  137. #define OV5648_BANDING_STEP_60_L_REG 0x3a0b
  138. #define OV5648_AEC_CTRLC_REG 0x3a0c
  139. #define OV5648_BANDING_MAX_60_REG 0x3a0d
  140. #define OV5648_BANDING_MAX_50_REG 0x3a0e
  141. #define OV5648_WPT_REG 0x3a0f
  142. #define OV5648_BPT_REG 0x3a10
  143. #define OV5648_VPT_HIGH_REG 0x3a11
  144. #define OV5648_AVG_MANUAL_REG 0x3a12
  145. #define OV5648_PRE_GAIN_REG 0x3a13
  146. #define OV5648_EXPOSURE_MAX_50_H_REG 0x3a14
  147. #define OV5648_EXPOSURE_MAX_50_L_REG 0x3a15
  148. #define OV5648_GAIN_BASE_NIGHT_REG 0x3a17
  149. #define OV5648_AEC_GAIN_CEILING_H_REG 0x3a18
  150. #define OV5648_AEC_GAIN_CEILING_L_REG 0x3a19
  151. #define OV5648_DIFF_MAX_REG 0x3a1a
  152. #define OV5648_WPT2_REG 0x3a1b
  153. #define OV5648_LED_ADD_ROW_H_REG 0x3a1c
  154. #define OV5648_LED_ADD_ROW_L_REG 0x3a1d
  155. #define OV5648_BPT2_REG 0x3a1e
  156. #define OV5648_VPT_LOW_REG 0x3a1f
  157. #define OV5648_AEC_CTRL20_REG 0x3a20
  158. #define OV5648_AEC_CTRL21_REG 0x3a21
  159. #define OV5648_AVG_START_X_H_REG 0x5680
  160. #define OV5648_AVG_START_X_L_REG 0x5681
  161. #define OV5648_AVG_START_Y_H_REG 0x5682
  162. #define OV5648_AVG_START_Y_L_REG 0x5683
  163. #define OV5648_AVG_WINDOW_X_H_REG 0x5684
  164. #define OV5648_AVG_WINDOW_X_L_REG 0x5685
  165. #define OV5648_AVG_WINDOW_Y_H_REG 0x5686
  166. #define OV5648_AVG_WINDOW_Y_L_REG 0x5687
  167. #define OV5648_AVG_WEIGHT00_REG 0x5688
  168. #define OV5648_AVG_WEIGHT01_REG 0x5689
  169. #define OV5648_AVG_WEIGHT02_REG 0x568a
  170. #define OV5648_AVG_WEIGHT03_REG 0x568b
  171. #define OV5648_AVG_WEIGHT04_REG 0x568c
  172. #define OV5648_AVG_WEIGHT05_REG 0x568d
  173. #define OV5648_AVG_WEIGHT06_REG 0x568e
  174. #define OV5648_AVG_WEIGHT07_REG 0x568f
  175. #define OV5648_AVG_CTRL10_REG 0x5690
  176. #define OV5648_AVG_WEIGHT_SUM_REG 0x5691
  177. #define OV5648_AVG_READOUT_REG 0x5693
  178. #define OV5648_DIG_CTRL0_REG 0x5a00
  179. #define OV5648_DIG_COMP_MAN_H_REG 0x5a02
  180. #define OV5648_DIG_COMP_MAN_L_REG 0x5a03
  181. #define OV5648_GAINC_MAN_H_REG 0x5a20
  182. #define OV5648_GAINC_MAN_L_REG 0x5a21
  183. #define OV5648_GAINC_DGC_MAN_H_REG 0x5a22
  184. #define OV5648_GAINC_DGC_MAN_L_REG 0x5a23
  185. #define OV5648_GAINC_CTRL0_REG 0x5a24
  186. #define OV5648_GAINF_ANA_NUM_REG 0x5a40
  187. #define OV5648_GAINF_DIG_GAIN_REG 0x5a41
  188. /* Timing */
  189. #define OV5648_CROP_START_X_H_REG 0x3800
  190. #define OV5648_CROP_START_X_H(v) (((v) & GENMASK(11, 8)) >> 8)
  191. #define OV5648_CROP_START_X_L_REG 0x3801
  192. #define OV5648_CROP_START_X_L(v) ((v) & GENMASK(7, 0))
  193. #define OV5648_CROP_START_Y_H_REG 0x3802
  194. #define OV5648_CROP_START_Y_H(v) (((v) & GENMASK(11, 8)) >> 8)
  195. #define OV5648_CROP_START_Y_L_REG 0x3803
  196. #define OV5648_CROP_START_Y_L(v) ((v) & GENMASK(7, 0))
  197. #define OV5648_CROP_END_X_H_REG 0x3804
  198. #define OV5648_CROP_END_X_H(v) (((v) & GENMASK(11, 8)) >> 8)
  199. #define OV5648_CROP_END_X_L_REG 0x3805
  200. #define OV5648_CROP_END_X_L(v) ((v) & GENMASK(7, 0))
  201. #define OV5648_CROP_END_Y_H_REG 0x3806
  202. #define OV5648_CROP_END_Y_H(v) (((v) & GENMASK(11, 8)) >> 8)
  203. #define OV5648_CROP_END_Y_L_REG 0x3807
  204. #define OV5648_CROP_END_Y_L(v) ((v) & GENMASK(7, 0))
  205. #define OV5648_OUTPUT_SIZE_X_H_REG 0x3808
  206. #define OV5648_OUTPUT_SIZE_X_H(v) (((v) & GENMASK(11, 8)) >> 8)
  207. #define OV5648_OUTPUT_SIZE_X_L_REG 0x3809
  208. #define OV5648_OUTPUT_SIZE_X_L(v) ((v) & GENMASK(7, 0))
  209. #define OV5648_OUTPUT_SIZE_Y_H_REG 0x380a
  210. #define OV5648_OUTPUT_SIZE_Y_H(v) (((v) & GENMASK(11, 8)) >> 8)
  211. #define OV5648_OUTPUT_SIZE_Y_L_REG 0x380b
  212. #define OV5648_OUTPUT_SIZE_Y_L(v) ((v) & GENMASK(7, 0))
  213. #define OV5648_HTS_H_REG 0x380c
  214. #define OV5648_HTS_H(v) (((v) & GENMASK(12, 8)) >> 8)
  215. #define OV5648_HTS_L_REG 0x380d
  216. #define OV5648_HTS_L(v) ((v) & GENMASK(7, 0))
  217. #define OV5648_VTS_H_REG 0x380e
  218. #define OV5648_VTS_H(v) (((v) & GENMASK(15, 8)) >> 8)
  219. #define OV5648_VTS_L_REG 0x380f
  220. #define OV5648_VTS_L(v) ((v) & GENMASK(7, 0))
  221. #define OV5648_OFFSET_X_H_REG 0x3810
  222. #define OV5648_OFFSET_X_H(v) (((v) & GENMASK(11, 8)) >> 8)
  223. #define OV5648_OFFSET_X_L_REG 0x3811
  224. #define OV5648_OFFSET_X_L(v) ((v) & GENMASK(7, 0))
  225. #define OV5648_OFFSET_Y_H_REG 0x3812
  226. #define OV5648_OFFSET_Y_H(v) (((v) & GENMASK(11, 8)) >> 8)
  227. #define OV5648_OFFSET_Y_L_REG 0x3813
  228. #define OV5648_OFFSET_Y_L(v) ((v) & GENMASK(7, 0))
  229. #define OV5648_SUB_INC_X_REG 0x3814
  230. #define OV5648_SUB_INC_X_ODD(v) (((v) << 4) & GENMASK(7, 4))
  231. #define OV5648_SUB_INC_X_EVEN(v) ((v) & GENMASK(3, 0))
  232. #define OV5648_SUB_INC_Y_REG 0x3815
  233. #define OV5648_SUB_INC_Y_ODD(v) (((v) << 4) & GENMASK(7, 4))
  234. #define OV5648_SUB_INC_Y_EVEN(v) ((v) & GENMASK(3, 0))
  235. #define OV5648_HSYNCST_H_REG 0x3816
  236. #define OV5648_HSYNCST_H(v) (((v) >> 8) & 0xf)
  237. #define OV5648_HSYNCST_L_REG 0x3817
  238. #define OV5648_HSYNCST_L(v) ((v) & GENMASK(7, 0))
  239. #define OV5648_HSYNCW_H_REG 0x3818
  240. #define OV5648_HSYNCW_H(v) (((v) >> 8) & 0xf)
  241. #define OV5648_HSYNCW_L_REG 0x3819
  242. #define OV5648_HSYNCW_L(v) ((v) & GENMASK(7, 0))
  243. #define OV5648_TC20_REG 0x3820
  244. #define OV5648_TC20_DEBUG BIT(6)
  245. #define OV5648_TC20_FLIP_VERT_ISP_EN BIT(2)
  246. #define OV5648_TC20_FLIP_VERT_SENSOR_EN BIT(1)
  247. #define OV5648_TC20_BINNING_VERT_EN BIT(0)
  248. #define OV5648_TC21_REG 0x3821
  249. #define OV5648_TC21_FLIP_HORZ_ISP_EN BIT(2)
  250. #define OV5648_TC21_FLIP_HORZ_SENSOR_EN BIT(1)
  251. #define OV5648_TC21_BINNING_HORZ_EN BIT(0)
  252. /* Strobe/exposure */
  253. #define OV5648_STROBE_REG 0x3b00
  254. #define OV5648_FREX_EXP_HH_REG 0x3b01
  255. #define OV5648_SHUTTER_DLY_H_REG 0x3b02
  256. #define OV5648_SHUTTER_DLY_L_REG 0x3b03
  257. #define OV5648_FREX_EXP_H_REG 0x3b04
  258. #define OV5648_FREX_EXP_L_REG 0x3b05
  259. #define OV5648_FREX_CTRL_REG 0x3b06
  260. #define OV5648_FREX_MODE_SEL_REG 0x3b07
  261. #define OV5648_FREX_MODE_SEL_FREX_SA1 BIT(4)
  262. #define OV5648_FREX_MODE_SEL_FX1_FM_EN BIT(3)
  263. #define OV5648_FREX_MODE_SEL_FREX_INV BIT(2)
  264. #define OV5648_FREX_MODE_SEL_MODE1 0x0
  265. #define OV5648_FREX_MODE_SEL_MODE2 0x1
  266. #define OV5648_FREX_MODE_SEL_ROLLING 0x2
  267. #define OV5648_FREX_EXP_REQ_REG 0x3b08
  268. #define OV5648_FREX_SHUTTER_DLY_REG 0x3b09
  269. #define OV5648_FREX_RST_LEN_REG 0x3b0a
  270. #define OV5648_STROBE_WIDTH_HH_REG 0x3b0b
  271. #define OV5648_STROBE_WIDTH_H_REG 0x3b0c
  272. /* OTP */
  273. #define OV5648_OTP_DATA_REG_BASE 0x3d00
  274. #define OV5648_OTP_PROGRAM_CTRL_REG 0x3d80
  275. #define OV5648_OTP_LOAD_CTRL_REG 0x3d81
  276. /* PSRAM */
  277. #define OV5648_PSRAM_CTRL1_REG 0x3f01
  278. #define OV5648_PSRAM_CTRLF_REG 0x3f0f
  279. /* Black Level */
  280. #define OV5648_BLC_CTRL0_REG 0x4000
  281. #define OV5648_BLC_CTRL1_REG 0x4001
  282. #define OV5648_BLC_CTRL1_START_LINE(v) ((v) & GENMASK(5, 0))
  283. #define OV5648_BLC_CTRL2_REG 0x4002
  284. #define OV5648_BLC_CTRL2_AUTO_EN BIT(6)
  285. #define OV5648_BLC_CTRL2_RESET_FRAME_NUM(v) ((v) & GENMASK(5, 0))
  286. #define OV5648_BLC_CTRL3_REG 0x4003
  287. #define OV5648_BLC_LINE_NUM_REG 0x4004
  288. #define OV5648_BLC_LINE_NUM(v) ((v) & GENMASK(7, 0))
  289. #define OV5648_BLC_CTRL5_REG 0x4005
  290. #define OV5648_BLC_CTRL5_UPDATE_EN BIT(1)
  291. #define OV5648_BLC_LEVEL_REG 0x4009
  292. /* Frame */
  293. #define OV5648_FRAME_CTRL_REG 0x4200
  294. #define OV5648_FRAME_ON_NUM_REG 0x4201
  295. #define OV5648_FRAME_OFF_NUM_REG 0x4202
  296. /* MIPI CSI-2 */
  297. #define OV5648_MIPI_CTRL0_REG 0x4800
  298. #define OV5648_MIPI_CTRL0_CLK_LANE_AUTOGATE BIT(5)
  299. #define OV5648_MIPI_CTRL0_LANE_SYNC_EN BIT(4)
  300. #define OV5648_MIPI_CTRL0_LANE_SELECT_LANE1 0
  301. #define OV5648_MIPI_CTRL0_LANE_SELECT_LANE2 BIT(3)
  302. #define OV5648_MIPI_CTRL0_IDLE_LP00 0
  303. #define OV5648_MIPI_CTRL0_IDLE_LP11 BIT(2)
  304. #define OV5648_MIPI_CTRL1_REG 0x4801
  305. #define OV5648_MIPI_CTRL2_REG 0x4802
  306. #define OV5648_MIPI_CTRL3_REG 0x4803
  307. #define OV5648_MIPI_CTRL4_REG 0x4804
  308. #define OV5648_MIPI_CTRL5_REG 0x4805
  309. #define OV5648_MIPI_MAX_FRAME_COUNT_H_REG 0x4810
  310. #define OV5648_MIPI_MAX_FRAME_COUNT_L_REG 0x4811
  311. #define OV5648_MIPI_CTRL14_REG 0x4814
  312. #define OV5648_MIPI_DT_SPKT_REG 0x4815
  313. #define OV5648_MIPI_HS_ZERO_MIN_H_REG 0x4818
  314. #define OV5648_MIPI_HS_ZERO_MIN_L_REG 0x4819
  315. #define OV5648_MIPI_HS_TRAIN_MIN_H_REG 0x481a
  316. #define OV5648_MIPI_HS_TRAIN_MIN_L_REG 0x481b
  317. #define OV5648_MIPI_CLK_ZERO_MIN_H_REG 0x481c
  318. #define OV5648_MIPI_CLK_ZERO_MIN_L_REG 0x481d
  319. #define OV5648_MIPI_CLK_PREPARE_MIN_H_REG 0x481e
  320. #define OV5648_MIPI_CLK_PREPARE_MIN_L_REG 0x481f
  321. #define OV5648_MIPI_CLK_POST_MIN_H_REG 0x4820
  322. #define OV5648_MIPI_CLK_POST_MIN_L_REG 0x4821
  323. #define OV5648_MIPI_CLK_TRAIL_MIN_H_REG 0x4822
  324. #define OV5648_MIPI_CLK_TRAIL_MIN_L_REG 0x4823
  325. #define OV5648_MIPI_LPX_P_MIN_H_REG 0x4824
  326. #define OV5648_MIPI_LPX_P_MIN_L_REG 0x4825
  327. #define OV5648_MIPI_HS_PREPARE_MIN_H_REG 0x4826
  328. #define OV5648_MIPI_HS_PREPARE_MIN_L_REG 0x4827
  329. #define OV5648_MIPI_HS_EXIT_MIN_H_REG 0x4828
  330. #define OV5648_MIPI_HS_EXIT_MIN_L_REG 0x4829
  331. #define OV5648_MIPI_HS_ZERO_MIN_UI_REG 0x482a
  332. #define OV5648_MIPI_HS_TRAIL_MIN_UI_REG 0x482b
  333. #define OV5648_MIPI_CLK_ZERO_MIN_UI_REG 0x482c
  334. #define OV5648_MIPI_CLK_PREPARE_MIN_UI_REG 0x482d
  335. #define OV5648_MIPI_CLK_POST_MIN_UI_REG 0x482e
  336. #define OV5648_MIPI_CLK_TRAIL_MIN_UI_REG 0x482f
  337. #define OV5648_MIPI_LPX_P_MIN_UI_REG 0x4830
  338. #define OV5648_MIPI_HS_PREPARE_MIN_UI_REG 0x4831
  339. #define OV5648_MIPI_HS_EXIT_MIN_UI_REG 0x4832
  340. #define OV5648_MIPI_REG_MIN_H_REG 0x4833
  341. #define OV5648_MIPI_REG_MIN_L_REG 0x4834
  342. #define OV5648_MIPI_REG_MAX_H_REG 0x4835
  343. #define OV5648_MIPI_REG_MAX_L_REG 0x4836
  344. #define OV5648_MIPI_PCLK_PERIOD_REG 0x4837
  345. #define OV5648_MIPI_WKUP_DLY_REG 0x4838
  346. #define OV5648_MIPI_LP_GPIO_REG 0x483b
  347. #define OV5648_MIPI_SNR_PCLK_DIV_REG 0x4843
  348. /* ISP */
  349. #define OV5648_ISP_CTRL0_REG 0x5000
  350. #define OV5648_ISP_CTRL0_BLACK_CORRECT_EN BIT(2)
  351. #define OV5648_ISP_CTRL0_WHITE_CORRECT_EN BIT(1)
  352. #define OV5648_ISP_CTRL1_REG 0x5001
  353. #define OV5648_ISP_CTRL1_AWB_EN BIT(0)
  354. #define OV5648_ISP_CTRL2_REG 0x5002
  355. #define OV5648_ISP_CTRL2_WIN_EN BIT(6)
  356. #define OV5648_ISP_CTRL2_OTP_EN BIT(1)
  357. #define OV5648_ISP_CTRL2_AWB_GAIN_EN BIT(0)
  358. #define OV5648_ISP_CTRL3_REG 0x5003
  359. #define OV5648_ISP_CTRL3_BUF_EN BIT(3)
  360. #define OV5648_ISP_CTRL3_BIN_MAN_SET BIT(2)
  361. #define OV5648_ISP_CTRL3_BIN_AUTO_EN BIT(1)
  362. #define OV5648_ISP_CTRL4_REG 0x5004
  363. #define OV5648_ISP_CTRL5_REG 0x5005
  364. #define OV5648_ISP_CTRL6_REG 0x5006
  365. #define OV5648_ISP_CTRL7_REG 0x5007
  366. #define OV5648_ISP_MAN_OFFSET_X_H_REG 0x5008
  367. #define OV5648_ISP_MAN_OFFSET_X_L_REG 0x5009
  368. #define OV5648_ISP_MAN_OFFSET_Y_H_REG 0x500a
  369. #define OV5648_ISP_MAN_OFFSET_Y_L_REG 0x500b
  370. #define OV5648_ISP_MAN_WIN_OFFSET_X_H_REG 0x500c
  371. #define OV5648_ISP_MAN_WIN_OFFSET_X_L_REG 0x500d
  372. #define OV5648_ISP_MAN_WIN_OFFSET_Y_H_REG 0x500e
  373. #define OV5648_ISP_MAN_WIN_OFFSET_Y_L_REG 0x500f
  374. #define OV5648_ISP_MAN_WIN_OUTPUT_X_H_REG 0x5010
  375. #define OV5648_ISP_MAN_WIN_OUTPUT_X_L_REG 0x5011
  376. #define OV5648_ISP_MAN_WIN_OUTPUT_Y_H_REG 0x5012
  377. #define OV5648_ISP_MAN_WIN_OUTPUT_Y_L_REG 0x5013
  378. #define OV5648_ISP_MAN_INPUT_X_H_REG 0x5014
  379. #define OV5648_ISP_MAN_INPUT_X_L_REG 0x5015
  380. #define OV5648_ISP_MAN_INPUT_Y_H_REG 0x5016
  381. #define OV5648_ISP_MAN_INPUT_Y_L_REG 0x5017
  382. #define OV5648_ISP_CTRL18_REG 0x5018
  383. #define OV5648_ISP_CTRL19_REG 0x5019
  384. #define OV5648_ISP_CTRL1A_REG 0x501a
  385. #define OV5648_ISP_CTRL1D_REG 0x501d
  386. #define OV5648_ISP_CTRL1F_REG 0x501f
  387. #define OV5648_ISP_CTRL1F_OUTPUT_EN 3
  388. #define OV5648_ISP_CTRL25_REG 0x5025
  389. #define OV5648_ISP_CTRL3D_REG 0x503d
  390. #define OV5648_ISP_CTRL3D_PATTERN_EN BIT(7)
  391. #define OV5648_ISP_CTRL3D_ROLLING_BAR_EN BIT(6)
  392. #define OV5648_ISP_CTRL3D_TRANSPARENT_MODE BIT(5)
  393. #define OV5648_ISP_CTRL3D_SQUARES_BW_MODE BIT(4)
  394. #define OV5648_ISP_CTRL3D_PATTERN_COLOR_BARS 0
  395. #define OV5648_ISP_CTRL3D_PATTERN_RANDOM_DATA 1
  396. #define OV5648_ISP_CTRL3D_PATTERN_COLOR_SQUARES 2
  397. #define OV5648_ISP_CTRL3D_PATTERN_INPUT 3
  398. #define OV5648_ISP_CTRL3E_REG 0x503e
  399. #define OV5648_ISP_CTRL4B_REG 0x504b
  400. #define OV5648_ISP_CTRL4B_POST_BIN_H_EN BIT(5)
  401. #define OV5648_ISP_CTRL4B_POST_BIN_V_EN BIT(4)
  402. #define OV5648_ISP_CTRL4C_REG 0x504c
  403. #define OV5648_ISP_CTRL57_REG 0x5057
  404. #define OV5648_ISP_CTRL58_REG 0x5058
  405. #define OV5648_ISP_CTRL59_REG 0x5059
  406. #define OV5648_ISP_WINDOW_START_X_H_REG 0x5980
  407. #define OV5648_ISP_WINDOW_START_X_L_REG 0x5981
  408. #define OV5648_ISP_WINDOW_START_Y_H_REG 0x5982
  409. #define OV5648_ISP_WINDOW_START_Y_L_REG 0x5983
  410. #define OV5648_ISP_WINDOW_WIN_X_H_REG 0x5984
  411. #define OV5648_ISP_WINDOW_WIN_X_L_REG 0x5985
  412. #define OV5648_ISP_WINDOW_WIN_Y_H_REG 0x5986
  413. #define OV5648_ISP_WINDOW_WIN_Y_L_REG 0x5987
  414. #define OV5648_ISP_WINDOW_MAN_REG 0x5988
  415. /* White Balance */
  416. #define OV5648_AWB_CTRL_REG 0x5180
  417. #define OV5648_AWB_CTRL_FAST_AWB BIT(6)
  418. #define OV5648_AWB_CTRL_GAIN_FREEZE_EN BIT(5)
  419. #define OV5648_AWB_CTRL_SUM_FREEZE_EN BIT(4)
  420. #define OV5648_AWB_CTRL_GAIN_MANUAL_EN BIT(3)
  421. #define OV5648_AWB_DELTA_REG 0x5181
  422. #define OV5648_AWB_STABLE_RANGE_REG 0x5182
  423. #define OV5648_AWB_STABLE_RANGE_WIDE_REG 0x5183
  424. #define OV5648_HSIZE_MAN_REG 0x5185
  425. #define OV5648_GAIN_RED_MAN_H_REG 0x5186
  426. #define OV5648_GAIN_RED_MAN_H(v) (((v) & GENMASK(11, 8)) >> 8)
  427. #define OV5648_GAIN_RED_MAN_L_REG 0x5187
  428. #define OV5648_GAIN_RED_MAN_L(v) ((v) & GENMASK(7, 0))
  429. #define OV5648_GAIN_GREEN_MAN_H_REG 0x5188
  430. #define OV5648_GAIN_GREEN_MAN_H(v) (((v) & GENMASK(11, 8)) >> 8)
  431. #define OV5648_GAIN_GREEN_MAN_L_REG 0x5189
  432. #define OV5648_GAIN_GREEN_MAN_L(v) ((v) & GENMASK(7, 0))
  433. #define OV5648_GAIN_BLUE_MAN_H_REG 0x518a
  434. #define OV5648_GAIN_BLUE_MAN_H(v) (((v) & GENMASK(11, 8)) >> 8)
  435. #define OV5648_GAIN_BLUE_MAN_L_REG 0x518b
  436. #define OV5648_GAIN_BLUE_MAN_L(v) ((v) & GENMASK(7, 0))
  437. #define OV5648_GAIN_RED_LIMIT_REG 0x518c
  438. #define OV5648_GAIN_GREEN_LIMIT_REG 0x518d
  439. #define OV5648_GAIN_BLUE_LIMIT_REG 0x518e
  440. #define OV5648_AWB_FRAME_COUNT_REG 0x518f
  441. #define OV5648_AWB_BASE_MAN_REG 0x51df
  442. /* Macros */
  443. #define ov5648_subdev_sensor(s) \
  444. container_of(s, struct ov5648_sensor, subdev)
  445. #define ov5648_ctrl_subdev(c) \
  446. (&container_of((c)->handler, struct ov5648_sensor, \
  447. ctrls.handler)->subdev)
  448. /* Data structures */
  449. struct ov5648_register_value {
  450. u16 address;
  451. u8 value;
  452. unsigned int delay_ms;
  453. };
  454. /*
  455. * PLL1 Clock Tree:
  456. *
  457. * +-< XVCLK
  458. * |
  459. * +-+ pll_pre_div (0x3037 [3:0], special values: 5: 1.5, 7: 2.5)
  460. * |
  461. * +-+ pll_mul (0x3036 [7:0])
  462. * |
  463. * +-+ sys_div (0x3035 [7:4])
  464. * |
  465. * +-+ mipi_div (0x3035 [3:0])
  466. * | |
  467. * | +-> MIPI_SCLK
  468. * | |
  469. * | +-+ mipi_phy_div (2)
  470. * | |
  471. * | +-> MIPI_CLK
  472. * |
  473. * +-+ root_div (0x3037 [4])
  474. * |
  475. * +-+ bit_div (0x3034 [3:0], 8 bits: 2, 10 bits: 2.5, other: 1)
  476. * |
  477. * +-+ sclk_div (0x3106 [3:2])
  478. * |
  479. * +-> SCLK
  480. * |
  481. * +-+ mipi_div (0x3035, 1: PCLK = SCLK)
  482. * |
  483. * +-> PCLK
  484. */
  485. struct ov5648_pll1_config {
  486. unsigned int pll_pre_div;
  487. unsigned int pll_mul;
  488. unsigned int sys_div;
  489. unsigned int root_div;
  490. unsigned int sclk_div;
  491. unsigned int mipi_div;
  492. };
  493. /*
  494. * PLL2 Clock Tree:
  495. *
  496. * +-< XVCLK
  497. * |
  498. * +-+ plls_pre_div (0x303d [5:4], special values: 0: 1, 1: 1.5)
  499. * |
  500. * +-+ plls_div_r (0x303d [2])
  501. * |
  502. * +-+ plls_mul (0x303b [4:0])
  503. * |
  504. * +-+ sys_div (0x303c [3:0])
  505. * |
  506. * +-+ sel_div (0x303d [1:0], special values: 0: 1, 3: 2.5)
  507. * |
  508. * +-> ADCLK
  509. */
  510. struct ov5648_pll2_config {
  511. unsigned int plls_pre_div;
  512. unsigned int plls_div_r;
  513. unsigned int plls_mul;
  514. unsigned int sys_div;
  515. unsigned int sel_div;
  516. };
  517. /*
  518. * General formulas for (array-centered) mode calculation:
  519. * - photo_array_width = 2624
  520. * - crop_start_x = (photo_array_width - output_size_x) / 2
  521. * - crop_end_x = crop_start_x + offset_x + output_size_x - 1
  522. *
  523. * - photo_array_height = 1956
  524. * - crop_start_y = (photo_array_height - output_size_y) / 2
  525. * - crop_end_y = crop_start_y + offset_y + output_size_y - 1
  526. */
  527. struct ov5648_mode {
  528. unsigned int crop_start_x;
  529. unsigned int offset_x;
  530. unsigned int output_size_x;
  531. unsigned int crop_end_x;
  532. unsigned int hts;
  533. unsigned int crop_start_y;
  534. unsigned int offset_y;
  535. unsigned int output_size_y;
  536. unsigned int crop_end_y;
  537. unsigned int vts;
  538. bool binning_x;
  539. bool binning_y;
  540. unsigned int inc_x_odd;
  541. unsigned int inc_x_even;
  542. unsigned int inc_y_odd;
  543. unsigned int inc_y_even;
  544. /* 8-bit frame interval followed by 10-bit frame interval. */
  545. struct v4l2_fract frame_interval[2];
  546. /* 8-bit config followed by 10-bit config. */
  547. const struct ov5648_pll1_config *pll1_config[2];
  548. const struct ov5648_pll2_config *pll2_config;
  549. const struct ov5648_register_value *register_values;
  550. unsigned int register_values_count;
  551. };
  552. struct ov5648_state {
  553. const struct ov5648_mode *mode;
  554. u32 mbus_code;
  555. bool streaming;
  556. };
  557. struct ov5648_ctrls {
  558. struct v4l2_ctrl *exposure_auto;
  559. struct v4l2_ctrl *exposure;
  560. struct v4l2_ctrl *gain_auto;
  561. struct v4l2_ctrl *gain;
  562. struct v4l2_ctrl *white_balance_auto;
  563. struct v4l2_ctrl *red_balance;
  564. struct v4l2_ctrl *blue_balance;
  565. struct v4l2_ctrl *link_freq;
  566. struct v4l2_ctrl *pixel_rate;
  567. struct v4l2_ctrl_handler handler;
  568. };
  569. struct ov5648_sensor {
  570. struct device *dev;
  571. struct i2c_client *i2c_client;
  572. struct gpio_desc *reset;
  573. struct gpio_desc *powerdown;
  574. struct regulator *avdd;
  575. struct regulator *dvdd;
  576. struct regulator *dovdd;
  577. struct clk *xvclk;
  578. struct v4l2_fwnode_endpoint endpoint;
  579. struct v4l2_subdev subdev;
  580. struct media_pad pad;
  581. struct mutex mutex;
  582. struct ov5648_state state;
  583. struct ov5648_ctrls ctrls;
  584. };
  585. /* Static definitions */
  586. /*
  587. * XVCLK = 24 MHz
  588. * SCLK = 84 MHz
  589. * PCLK = 84 MHz
  590. */
  591. static const struct ov5648_pll1_config ov5648_pll1_config_native_8_bits = {
  592. .pll_pre_div = 3,
  593. .pll_mul = 84,
  594. .sys_div = 2,
  595. .root_div = 1,
  596. .sclk_div = 1,
  597. .mipi_div = 1,
  598. };
  599. /*
  600. * XVCLK = 24 MHz
  601. * SCLK = 84 MHz
  602. * PCLK = 84 MHz
  603. */
  604. static const struct ov5648_pll1_config ov5648_pll1_config_native_10_bits = {
  605. .pll_pre_div = 3,
  606. .pll_mul = 105,
  607. .sys_div = 2,
  608. .root_div = 1,
  609. .sclk_div = 1,
  610. .mipi_div = 1,
  611. };
  612. /*
  613. * XVCLK = 24 MHz
  614. * ADCLK = 200 MHz
  615. */
  616. static const struct ov5648_pll2_config ov5648_pll2_config_native = {
  617. .plls_pre_div = 3,
  618. .plls_div_r = 1,
  619. .plls_mul = 25,
  620. .sys_div = 1,
  621. .sel_div = 1,
  622. };
  623. static const struct ov5648_mode ov5648_modes[] = {
  624. /* 2592x1944 */
  625. {
  626. /* Horizontal */
  627. .crop_start_x = 16,
  628. .offset_x = 0,
  629. .output_size_x = 2592,
  630. .crop_end_x = 2607,
  631. .hts = 2816,
  632. /* Vertical */
  633. .crop_start_y = 6,
  634. .offset_y = 0,
  635. .output_size_y = 1944,
  636. .crop_end_y = 1949,
  637. .vts = 1984,
  638. /* Subsample increase */
  639. .inc_x_odd = 1,
  640. .inc_x_even = 1,
  641. .inc_y_odd = 1,
  642. .inc_y_even = 1,
  643. /* Frame Interval */
  644. .frame_interval = {
  645. { 1, 15 },
  646. { 1, 15 },
  647. },
  648. /* PLL */
  649. .pll1_config = {
  650. &ov5648_pll1_config_native_8_bits,
  651. &ov5648_pll1_config_native_10_bits,
  652. },
  653. .pll2_config = &ov5648_pll2_config_native,
  654. },
  655. /* 1600x1200 (UXGA) */
  656. {
  657. /* Horizontal */
  658. .crop_start_x = 512,
  659. .offset_x = 0,
  660. .output_size_x = 1600,
  661. .crop_end_x = 2111,
  662. .hts = 2816,
  663. /* Vertical */
  664. .crop_start_y = 378,
  665. .offset_y = 0,
  666. .output_size_y = 1200,
  667. .crop_end_y = 1577,
  668. .vts = 1984,
  669. /* Subsample increase */
  670. .inc_x_odd = 1,
  671. .inc_x_even = 1,
  672. .inc_y_odd = 1,
  673. .inc_y_even = 1,
  674. /* Frame Interval */
  675. .frame_interval = {
  676. { 1, 15 },
  677. { 1, 15 },
  678. },
  679. /* PLL */
  680. .pll1_config = {
  681. &ov5648_pll1_config_native_8_bits,
  682. &ov5648_pll1_config_native_10_bits,
  683. },
  684. .pll2_config = &ov5648_pll2_config_native,
  685. },
  686. /* 1920x1080 (Full HD) */
  687. {
  688. /* Horizontal */
  689. .crop_start_x = 352,
  690. .offset_x = 0,
  691. .output_size_x = 1920,
  692. .crop_end_x = 2271,
  693. .hts = 2816,
  694. /* Vertical */
  695. .crop_start_y = 438,
  696. .offset_y = 0,
  697. .output_size_y = 1080,
  698. .crop_end_y = 1517,
  699. .vts = 1984,
  700. /* Subsample increase */
  701. .inc_x_odd = 1,
  702. .inc_x_even = 1,
  703. .inc_y_odd = 1,
  704. .inc_y_even = 1,
  705. /* Frame Interval */
  706. .frame_interval = {
  707. { 1, 15 },
  708. { 1, 15 },
  709. },
  710. /* PLL */
  711. .pll1_config = {
  712. &ov5648_pll1_config_native_8_bits,
  713. &ov5648_pll1_config_native_10_bits,
  714. },
  715. .pll2_config = &ov5648_pll2_config_native,
  716. },
  717. /* 1280x960 */
  718. {
  719. /* Horizontal */
  720. .crop_start_x = 16,
  721. .offset_x = 8,
  722. .output_size_x = 1280,
  723. .crop_end_x = 2607,
  724. .hts = 1912,
  725. /* Vertical */
  726. .crop_start_y = 6,
  727. .offset_y = 6,
  728. .output_size_y = 960,
  729. .crop_end_y = 1949,
  730. .vts = 1496,
  731. /* Binning */
  732. .binning_x = true,
  733. /* Subsample increase */
  734. .inc_x_odd = 3,
  735. .inc_x_even = 1,
  736. .inc_y_odd = 3,
  737. .inc_y_even = 1,
  738. /* Frame Interval */
  739. .frame_interval = {
  740. { 1, 30 },
  741. { 1, 30 },
  742. },
  743. /* PLL */
  744. .pll1_config = {
  745. &ov5648_pll1_config_native_8_bits,
  746. &ov5648_pll1_config_native_10_bits,
  747. },
  748. .pll2_config = &ov5648_pll2_config_native,
  749. },
  750. /* 1280x720 (HD) */
  751. {
  752. /* Horizontal */
  753. .crop_start_x = 16,
  754. .offset_x = 8,
  755. .output_size_x = 1280,
  756. .crop_end_x = 2607,
  757. .hts = 1912,
  758. /* Vertical */
  759. .crop_start_y = 254,
  760. .offset_y = 2,
  761. .output_size_y = 720,
  762. .crop_end_y = 1701,
  763. .vts = 1496,
  764. /* Binning */
  765. .binning_x = true,
  766. /* Subsample increase */
  767. .inc_x_odd = 3,
  768. .inc_x_even = 1,
  769. .inc_y_odd = 3,
  770. .inc_y_even = 1,
  771. /* Frame Interval */
  772. .frame_interval = {
  773. { 1, 30 },
  774. { 1, 30 },
  775. },
  776. /* PLL */
  777. .pll1_config = {
  778. &ov5648_pll1_config_native_8_bits,
  779. &ov5648_pll1_config_native_10_bits,
  780. },
  781. .pll2_config = &ov5648_pll2_config_native,
  782. },
  783. /* 640x480 (VGA) */
  784. {
  785. /* Horizontal */
  786. .crop_start_x = 0,
  787. .offset_x = 8,
  788. .output_size_x = 640,
  789. .crop_end_x = 2623,
  790. .hts = 1896,
  791. /* Vertical */
  792. .crop_start_y = 0,
  793. .offset_y = 2,
  794. .output_size_y = 480,
  795. .crop_end_y = 1953,
  796. .vts = 984,
  797. /* Binning */
  798. .binning_x = true,
  799. /* Subsample increase */
  800. .inc_x_odd = 7,
  801. .inc_x_even = 1,
  802. .inc_y_odd = 7,
  803. .inc_y_even = 1,
  804. /* Frame Interval */
  805. .frame_interval = {
  806. { 1, 30 },
  807. { 1, 30 },
  808. },
  809. /* PLL */
  810. .pll1_config = {
  811. &ov5648_pll1_config_native_8_bits,
  812. &ov5648_pll1_config_native_10_bits,
  813. },
  814. .pll2_config = &ov5648_pll2_config_native,
  815. },
  816. };
  817. static const u32 ov5648_mbus_codes[] = {
  818. MEDIA_BUS_FMT_SBGGR8_1X8,
  819. MEDIA_BUS_FMT_SBGGR10_1X10,
  820. };
  821. static const struct ov5648_register_value ov5648_init_sequence[] = {
  822. /* PSRAM */
  823. { OV5648_PSRAM_CTRL1_REG, 0x0d },
  824. { OV5648_PSRAM_CTRLF_REG, 0xf5 },
  825. };
  826. static const s64 ov5648_link_freq_menu[] = {
  827. 210000000,
  828. 168000000,
  829. };
  830. static const char *const ov5648_test_pattern_menu[] = {
  831. "Disabled",
  832. "Random data",
  833. "Color bars",
  834. "Color bars with rolling bar",
  835. "Color squares",
  836. "Color squares with rolling bar"
  837. };
  838. static const u8 ov5648_test_pattern_bits[] = {
  839. 0,
  840. OV5648_ISP_CTRL3D_PATTERN_EN | OV5648_ISP_CTRL3D_PATTERN_RANDOM_DATA,
  841. OV5648_ISP_CTRL3D_PATTERN_EN | OV5648_ISP_CTRL3D_PATTERN_COLOR_BARS,
  842. OV5648_ISP_CTRL3D_PATTERN_EN | OV5648_ISP_CTRL3D_ROLLING_BAR_EN |
  843. OV5648_ISP_CTRL3D_PATTERN_COLOR_BARS,
  844. OV5648_ISP_CTRL3D_PATTERN_EN | OV5648_ISP_CTRL3D_PATTERN_COLOR_SQUARES,
  845. OV5648_ISP_CTRL3D_PATTERN_EN | OV5648_ISP_CTRL3D_ROLLING_BAR_EN |
  846. OV5648_ISP_CTRL3D_PATTERN_COLOR_SQUARES,
  847. };
  848. /* Input/Output */
  849. static int ov5648_read(struct ov5648_sensor *sensor, u16 address, u8 *value)
  850. {
  851. unsigned char data[2] = { address >> 8, address & 0xff };
  852. struct i2c_client *client = sensor->i2c_client;
  853. int ret;
  854. ret = i2c_master_send(client, data, sizeof(data));
  855. if (ret < 0) {
  856. dev_dbg(&client->dev, "i2c send error at address %#04x\n",
  857. address);
  858. return ret;
  859. }
  860. ret = i2c_master_recv(client, value, 1);
  861. if (ret < 0) {
  862. dev_dbg(&client->dev, "i2c recv error at address %#04x\n",
  863. address);
  864. return ret;
  865. }
  866. return 0;
  867. }
  868. static int ov5648_write(struct ov5648_sensor *sensor, u16 address, u8 value)
  869. {
  870. unsigned char data[3] = { address >> 8, address & 0xff, value };
  871. struct i2c_client *client = sensor->i2c_client;
  872. int ret;
  873. ret = i2c_master_send(client, data, sizeof(data));
  874. if (ret < 0) {
  875. dev_dbg(&client->dev, "i2c send error at address %#04x\n",
  876. address);
  877. return ret;
  878. }
  879. return 0;
  880. }
  881. static int ov5648_write_sequence(struct ov5648_sensor *sensor,
  882. const struct ov5648_register_value *sequence,
  883. unsigned int sequence_count)
  884. {
  885. unsigned int i;
  886. int ret = 0;
  887. for (i = 0; i < sequence_count; i++) {
  888. ret = ov5648_write(sensor, sequence[i].address,
  889. sequence[i].value);
  890. if (ret)
  891. break;
  892. if (sequence[i].delay_ms)
  893. msleep(sequence[i].delay_ms);
  894. }
  895. return ret;
  896. }
  897. static int ov5648_update_bits(struct ov5648_sensor *sensor, u16 address,
  898. u8 mask, u8 bits)
  899. {
  900. u8 value = 0;
  901. int ret;
  902. ret = ov5648_read(sensor, address, &value);
  903. if (ret)
  904. return ret;
  905. value &= ~mask;
  906. value |= bits;
  907. ret = ov5648_write(sensor, address, value);
  908. if (ret)
  909. return ret;
  910. return 0;
  911. }
  912. /* Sensor */
  913. static int ov5648_sw_reset(struct ov5648_sensor *sensor)
  914. {
  915. return ov5648_write(sensor, OV5648_SW_RESET_REG, OV5648_SW_RESET_RESET);
  916. }
  917. static int ov5648_sw_standby(struct ov5648_sensor *sensor, int standby)
  918. {
  919. u8 value = 0;
  920. if (!standby)
  921. value = OV5648_SW_STANDBY_STREAM_ON;
  922. return ov5648_write(sensor, OV5648_SW_STANDBY_REG, value);
  923. }
  924. static int ov5648_chip_id_check(struct ov5648_sensor *sensor)
  925. {
  926. u16 regs[] = { OV5648_CHIP_ID_H_REG, OV5648_CHIP_ID_L_REG };
  927. u8 values[] = { OV5648_CHIP_ID_H_VALUE, OV5648_CHIP_ID_L_VALUE };
  928. unsigned int i;
  929. u8 value;
  930. int ret;
  931. for (i = 0; i < ARRAY_SIZE(regs); i++) {
  932. ret = ov5648_read(sensor, regs[i], &value);
  933. if (ret < 0)
  934. return ret;
  935. if (value != values[i]) {
  936. dev_err(sensor->dev,
  937. "chip id value mismatch: %#x instead of %#x\n",
  938. value, values[i]);
  939. return -EINVAL;
  940. }
  941. }
  942. return 0;
  943. }
  944. static int ov5648_avdd_internal_power(struct ov5648_sensor *sensor, int on)
  945. {
  946. return ov5648_write(sensor, OV5648_A_PWC_PK_O0_REG,
  947. on ? 0 : OV5648_A_PWC_PK_O0_BP_REGULATOR_N);
  948. }
  949. static int ov5648_pad_configure(struct ov5648_sensor *sensor)
  950. {
  951. int ret;
  952. /* Configure pads as input. */
  953. ret = ov5648_write(sensor, OV5648_PAD_OEN1_REG, 0);
  954. if (ret)
  955. return ret;
  956. ret = ov5648_write(sensor, OV5648_PAD_OEN2_REG, 0);
  957. if (ret)
  958. return ret;
  959. /* Disable FREX pin. */
  960. return ov5648_write(sensor, OV5648_PAD_PK_REG,
  961. OV5648_PAD_PK_DRIVE_STRENGTH_1X |
  962. OV5648_PAD_PK_FREX_N);
  963. }
  964. static int ov5648_mipi_configure(struct ov5648_sensor *sensor)
  965. {
  966. struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
  967. &sensor->endpoint.bus.mipi_csi2;
  968. unsigned int lanes_count = bus_mipi_csi2->num_data_lanes;
  969. int ret;
  970. ret = ov5648_write(sensor, OV5648_MIPI_CTRL0_REG,
  971. OV5648_MIPI_CTRL0_CLK_LANE_AUTOGATE |
  972. OV5648_MIPI_CTRL0_LANE_SELECT_LANE1 |
  973. OV5648_MIPI_CTRL0_IDLE_LP11);
  974. if (ret)
  975. return ret;
  976. return ov5648_write(sensor, OV5648_MIPI_SC_CTRL0_REG,
  977. OV5648_MIPI_SC_CTRL0_MIPI_LANES(lanes_count) |
  978. OV5648_MIPI_SC_CTRL0_PHY_LP_RX_PD |
  979. OV5648_MIPI_SC_CTRL0_MIPI_EN);
  980. }
  981. static int ov5648_black_level_configure(struct ov5648_sensor *sensor)
  982. {
  983. int ret;
  984. /* Up to 6 lines are available for black level calibration. */
  985. ret = ov5648_write(sensor, OV5648_BLC_CTRL1_REG,
  986. OV5648_BLC_CTRL1_START_LINE(2));
  987. if (ret)
  988. return ret;
  989. ret = ov5648_write(sensor, OV5648_BLC_CTRL2_REG,
  990. OV5648_BLC_CTRL2_AUTO_EN |
  991. OV5648_BLC_CTRL2_RESET_FRAME_NUM(5));
  992. if (ret)
  993. return ret;
  994. ret = ov5648_write(sensor, OV5648_BLC_LINE_NUM_REG,
  995. OV5648_BLC_LINE_NUM(4));
  996. if (ret)
  997. return ret;
  998. return ov5648_update_bits(sensor, OV5648_BLC_CTRL5_REG,
  999. OV5648_BLC_CTRL5_UPDATE_EN,
  1000. OV5648_BLC_CTRL5_UPDATE_EN);
  1001. }
  1002. static int ov5648_isp_configure(struct ov5648_sensor *sensor)
  1003. {
  1004. u8 bits;
  1005. int ret;
  1006. /* Enable black and white level correction. */
  1007. bits = OV5648_ISP_CTRL0_BLACK_CORRECT_EN |
  1008. OV5648_ISP_CTRL0_WHITE_CORRECT_EN;
  1009. ret = ov5648_update_bits(sensor, OV5648_ISP_CTRL0_REG, bits, bits);
  1010. if (ret)
  1011. return ret;
  1012. /* Enable AWB. */
  1013. ret = ov5648_write(sensor, OV5648_ISP_CTRL1_REG,
  1014. OV5648_ISP_CTRL1_AWB_EN);
  1015. if (ret)
  1016. return ret;
  1017. /* Enable AWB gain and windowing. */
  1018. ret = ov5648_write(sensor, OV5648_ISP_CTRL2_REG,
  1019. OV5648_ISP_CTRL2_WIN_EN |
  1020. OV5648_ISP_CTRL2_AWB_GAIN_EN);
  1021. if (ret)
  1022. return ret;
  1023. /* Enable buffering and auto-binning. */
  1024. ret = ov5648_write(sensor, OV5648_ISP_CTRL3_REG,
  1025. OV5648_ISP_CTRL3_BUF_EN |
  1026. OV5648_ISP_CTRL3_BIN_AUTO_EN);
  1027. if (ret)
  1028. return ret;
  1029. ret = ov5648_write(sensor, OV5648_ISP_CTRL4_REG, 0);
  1030. if (ret)
  1031. return ret;
  1032. ret = ov5648_write(sensor, OV5648_ISP_CTRL1F_REG,
  1033. OV5648_ISP_CTRL1F_OUTPUT_EN);
  1034. if (ret)
  1035. return ret;
  1036. /* Enable post-binning filters. */
  1037. ret = ov5648_write(sensor, OV5648_ISP_CTRL4B_REG,
  1038. OV5648_ISP_CTRL4B_POST_BIN_H_EN |
  1039. OV5648_ISP_CTRL4B_POST_BIN_V_EN);
  1040. if (ret)
  1041. return ret;
  1042. /* Disable debanding and night mode. Debug bit seems necessary. */
  1043. ret = ov5648_write(sensor, OV5648_AEC_CTRL0_REG,
  1044. OV5648_AEC_CTRL0_DEBUG |
  1045. OV5648_AEC_CTRL0_START_SEL_EN);
  1046. if (ret)
  1047. return ret;
  1048. return ov5648_write(sensor, OV5648_MANUAL_CTRL_REG,
  1049. OV5648_MANUAL_CTRL_FRAME_DELAY(1));
  1050. }
  1051. static unsigned long ov5648_mode_pll1_rate(struct ov5648_sensor *sensor,
  1052. const struct ov5648_pll1_config *config)
  1053. {
  1054. unsigned long xvclk_rate;
  1055. unsigned long pll1_rate;
  1056. xvclk_rate = clk_get_rate(sensor->xvclk);
  1057. pll1_rate = xvclk_rate * config->pll_mul;
  1058. switch (config->pll_pre_div) {
  1059. case 5:
  1060. pll1_rate *= 3;
  1061. pll1_rate /= 2;
  1062. break;
  1063. case 7:
  1064. pll1_rate *= 5;
  1065. pll1_rate /= 2;
  1066. break;
  1067. default:
  1068. pll1_rate /= config->pll_pre_div;
  1069. break;
  1070. }
  1071. return pll1_rate;
  1072. }
  1073. static int ov5648_mode_pll1_configure(struct ov5648_sensor *sensor,
  1074. const struct ov5648_mode *mode,
  1075. u32 mbus_code)
  1076. {
  1077. const struct ov5648_pll1_config *config;
  1078. u8 value;
  1079. int ret;
  1080. value = OV5648_PLL_CTRL0_PLL_CHARGE_PUMP(1);
  1081. switch (mbus_code) {
  1082. case MEDIA_BUS_FMT_SBGGR8_1X8:
  1083. config = mode->pll1_config[0];
  1084. value |= OV5648_PLL_CTRL0_BITS(8);
  1085. break;
  1086. case MEDIA_BUS_FMT_SBGGR10_1X10:
  1087. config = mode->pll1_config[1];
  1088. value |= OV5648_PLL_CTRL0_BITS(10);
  1089. break;
  1090. default:
  1091. return -EINVAL;
  1092. }
  1093. ret = ov5648_write(sensor, OV5648_PLL_CTRL0_REG, value);
  1094. if (ret)
  1095. return ret;
  1096. ret = ov5648_write(sensor, OV5648_PLL_DIV_REG,
  1097. OV5648_PLL_DIV_ROOT_DIV(config->root_div) |
  1098. OV5648_PLL_DIV_PLL_PRE_DIV(config->pll_pre_div));
  1099. if (ret)
  1100. return ret;
  1101. ret = ov5648_write(sensor, OV5648_PLL_MUL_REG,
  1102. OV5648_PLL_MUL(config->pll_mul));
  1103. if (ret)
  1104. return ret;
  1105. ret = ov5648_write(sensor, OV5648_PLL_CTRL1_REG,
  1106. OV5648_PLL_CTRL1_SYS_DIV(config->sys_div) |
  1107. OV5648_PLL_CTRL1_MIPI_DIV(config->mipi_div));
  1108. if (ret)
  1109. return ret;
  1110. return ov5648_write(sensor, OV5648_SRB_CTRL_REG,
  1111. OV5648_SRB_CTRL_SCLK_DIV(config->sclk_div) |
  1112. OV5648_SRB_CTRL_SCLK_ARBITER_EN);
  1113. }
  1114. static int ov5648_mode_pll2_configure(struct ov5648_sensor *sensor,
  1115. const struct ov5648_mode *mode)
  1116. {
  1117. const struct ov5648_pll2_config *config = mode->pll2_config;
  1118. int ret;
  1119. ret = ov5648_write(sensor, OV5648_PLLS_DIV_REG,
  1120. OV5648_PLLS_DIV_PLLS_PRE_DIV(config->plls_pre_div) |
  1121. OV5648_PLLS_DIV_PLLS_DIV_R(config->plls_div_r) |
  1122. OV5648_PLLS_DIV_PLLS_SEL_DIV(config->sel_div));
  1123. if (ret)
  1124. return ret;
  1125. ret = ov5648_write(sensor, OV5648_PLLS_MUL_REG,
  1126. OV5648_PLLS_MUL(config->plls_mul));
  1127. if (ret)
  1128. return ret;
  1129. return ov5648_write(sensor, OV5648_PLLS_CTRL_REG,
  1130. OV5648_PLLS_CTRL_PLL_CHARGE_PUMP(1) |
  1131. OV5648_PLLS_CTRL_SYS_DIV(config->sys_div));
  1132. }
  1133. static int ov5648_mode_configure(struct ov5648_sensor *sensor,
  1134. const struct ov5648_mode *mode, u32 mbus_code)
  1135. {
  1136. int ret;
  1137. /* Crop Start X */
  1138. ret = ov5648_write(sensor, OV5648_CROP_START_X_H_REG,
  1139. OV5648_CROP_START_X_H(mode->crop_start_x));
  1140. if (ret)
  1141. return ret;
  1142. ret = ov5648_write(sensor, OV5648_CROP_START_X_L_REG,
  1143. OV5648_CROP_START_X_L(mode->crop_start_x));
  1144. if (ret)
  1145. return ret;
  1146. /* Offset X */
  1147. ret = ov5648_write(sensor, OV5648_OFFSET_X_H_REG,
  1148. OV5648_OFFSET_X_H(mode->offset_x));
  1149. if (ret)
  1150. return ret;
  1151. ret = ov5648_write(sensor, OV5648_OFFSET_X_L_REG,
  1152. OV5648_OFFSET_X_L(mode->offset_x));
  1153. if (ret)
  1154. return ret;
  1155. /* Output Size X */
  1156. ret = ov5648_write(sensor, OV5648_OUTPUT_SIZE_X_H_REG,
  1157. OV5648_OUTPUT_SIZE_X_H(mode->output_size_x));
  1158. if (ret)
  1159. return ret;
  1160. ret = ov5648_write(sensor, OV5648_OUTPUT_SIZE_X_L_REG,
  1161. OV5648_OUTPUT_SIZE_X_L(mode->output_size_x));
  1162. if (ret)
  1163. return ret;
  1164. /* Crop End X */
  1165. ret = ov5648_write(sensor, OV5648_CROP_END_X_H_REG,
  1166. OV5648_CROP_END_X_H(mode->crop_end_x));
  1167. if (ret)
  1168. return ret;
  1169. ret = ov5648_write(sensor, OV5648_CROP_END_X_L_REG,
  1170. OV5648_CROP_END_X_L(mode->crop_end_x));
  1171. if (ret)
  1172. return ret;
  1173. /* Horizontal Total Size */
  1174. ret = ov5648_write(sensor, OV5648_HTS_H_REG, OV5648_HTS_H(mode->hts));
  1175. if (ret)
  1176. return ret;
  1177. ret = ov5648_write(sensor, OV5648_HTS_L_REG, OV5648_HTS_L(mode->hts));
  1178. if (ret)
  1179. return ret;
  1180. /* Crop Start Y */
  1181. ret = ov5648_write(sensor, OV5648_CROP_START_Y_H_REG,
  1182. OV5648_CROP_START_Y_H(mode->crop_start_y));
  1183. if (ret)
  1184. return ret;
  1185. ret = ov5648_write(sensor, OV5648_CROP_START_Y_L_REG,
  1186. OV5648_CROP_START_Y_L(mode->crop_start_y));
  1187. if (ret)
  1188. return ret;
  1189. /* Offset Y */
  1190. ret = ov5648_write(sensor, OV5648_OFFSET_Y_H_REG,
  1191. OV5648_OFFSET_Y_H(mode->offset_y));
  1192. if (ret)
  1193. return ret;
  1194. ret = ov5648_write(sensor, OV5648_OFFSET_Y_L_REG,
  1195. OV5648_OFFSET_Y_L(mode->offset_y));
  1196. if (ret)
  1197. return ret;
  1198. /* Output Size Y */
  1199. ret = ov5648_write(sensor, OV5648_OUTPUT_SIZE_Y_H_REG,
  1200. OV5648_OUTPUT_SIZE_Y_H(mode->output_size_y));
  1201. if (ret)
  1202. return ret;
  1203. ret = ov5648_write(sensor, OV5648_OUTPUT_SIZE_Y_L_REG,
  1204. OV5648_OUTPUT_SIZE_Y_L(mode->output_size_y));
  1205. if (ret)
  1206. return ret;
  1207. /* Crop End Y */
  1208. ret = ov5648_write(sensor, OV5648_CROP_END_Y_H_REG,
  1209. OV5648_CROP_END_Y_H(mode->crop_end_y));
  1210. if (ret)
  1211. return ret;
  1212. ret = ov5648_write(sensor, OV5648_CROP_END_Y_L_REG,
  1213. OV5648_CROP_END_Y_L(mode->crop_end_y));
  1214. if (ret)
  1215. return ret;
  1216. /* Vertical Total Size */
  1217. ret = ov5648_write(sensor, OV5648_VTS_H_REG, OV5648_VTS_H(mode->vts));
  1218. if (ret)
  1219. return ret;
  1220. ret = ov5648_write(sensor, OV5648_VTS_L_REG, OV5648_VTS_L(mode->vts));
  1221. if (ret)
  1222. return ret;
  1223. /* Flip/Mirror/Binning */
  1224. /*
  1225. * A debug bit is enabled by default and needs to be cleared for
  1226. * subsampling to work.
  1227. */
  1228. ret = ov5648_update_bits(sensor, OV5648_TC20_REG,
  1229. OV5648_TC20_DEBUG |
  1230. OV5648_TC20_BINNING_VERT_EN,
  1231. mode->binning_y ? OV5648_TC20_BINNING_VERT_EN :
  1232. 0);
  1233. if (ret)
  1234. return ret;
  1235. ret = ov5648_update_bits(sensor, OV5648_TC21_REG,
  1236. OV5648_TC21_BINNING_HORZ_EN,
  1237. mode->binning_x ? OV5648_TC21_BINNING_HORZ_EN :
  1238. 0);
  1239. if (ret)
  1240. return ret;
  1241. ret = ov5648_write(sensor, OV5648_SUB_INC_X_REG,
  1242. OV5648_SUB_INC_X_ODD(mode->inc_x_odd) |
  1243. OV5648_SUB_INC_X_EVEN(mode->inc_x_even));
  1244. if (ret)
  1245. return ret;
  1246. ret = ov5648_write(sensor, OV5648_SUB_INC_Y_REG,
  1247. OV5648_SUB_INC_Y_ODD(mode->inc_y_odd) |
  1248. OV5648_SUB_INC_Y_EVEN(mode->inc_y_even));
  1249. if (ret)
  1250. return ret;
  1251. /* PLLs */
  1252. ret = ov5648_mode_pll1_configure(sensor, mode, mbus_code);
  1253. if (ret)
  1254. return ret;
  1255. ret = ov5648_mode_pll2_configure(sensor, mode);
  1256. if (ret)
  1257. return ret;
  1258. /* Extra registers */
  1259. if (mode->register_values) {
  1260. ret = ov5648_write_sequence(sensor, mode->register_values,
  1261. mode->register_values_count);
  1262. if (ret)
  1263. return ret;
  1264. }
  1265. return 0;
  1266. }
  1267. static unsigned long ov5648_mode_mipi_clk_rate(struct ov5648_sensor *sensor,
  1268. const struct ov5648_mode *mode,
  1269. u32 mbus_code)
  1270. {
  1271. const struct ov5648_pll1_config *config;
  1272. unsigned long pll1_rate;
  1273. switch (mbus_code) {
  1274. case MEDIA_BUS_FMT_SBGGR8_1X8:
  1275. config = mode->pll1_config[0];
  1276. break;
  1277. case MEDIA_BUS_FMT_SBGGR10_1X10:
  1278. config = mode->pll1_config[1];
  1279. break;
  1280. default:
  1281. return 0;
  1282. }
  1283. pll1_rate = ov5648_mode_pll1_rate(sensor, config);
  1284. return pll1_rate / config->sys_div / config->mipi_div / 2;
  1285. }
  1286. /* Exposure */
  1287. static int ov5648_exposure_auto_configure(struct ov5648_sensor *sensor,
  1288. bool enable)
  1289. {
  1290. return ov5648_update_bits(sensor, OV5648_MANUAL_CTRL_REG,
  1291. OV5648_MANUAL_CTRL_AEC_MANUAL_EN,
  1292. enable ? 0 : OV5648_MANUAL_CTRL_AEC_MANUAL_EN);
  1293. }
  1294. static int ov5648_exposure_configure(struct ov5648_sensor *sensor, u32 exposure)
  1295. {
  1296. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1297. int ret;
  1298. if (ctrls->exposure_auto->val != V4L2_EXPOSURE_MANUAL)
  1299. return -EINVAL;
  1300. ret = ov5648_write(sensor, OV5648_EXPOSURE_CTRL_HH_REG,
  1301. OV5648_EXPOSURE_CTRL_HH(exposure));
  1302. if (ret)
  1303. return ret;
  1304. ret = ov5648_write(sensor, OV5648_EXPOSURE_CTRL_H_REG,
  1305. OV5648_EXPOSURE_CTRL_H(exposure));
  1306. if (ret)
  1307. return ret;
  1308. return ov5648_write(sensor, OV5648_EXPOSURE_CTRL_L_REG,
  1309. OV5648_EXPOSURE_CTRL_L(exposure));
  1310. }
  1311. static int ov5648_exposure_value(struct ov5648_sensor *sensor,
  1312. u32 *exposure)
  1313. {
  1314. u8 exposure_hh = 0, exposure_h = 0, exposure_l = 0;
  1315. int ret;
  1316. ret = ov5648_read(sensor, OV5648_EXPOSURE_CTRL_HH_REG, &exposure_hh);
  1317. if (ret)
  1318. return ret;
  1319. ret = ov5648_read(sensor, OV5648_EXPOSURE_CTRL_H_REG, &exposure_h);
  1320. if (ret)
  1321. return ret;
  1322. ret = ov5648_read(sensor, OV5648_EXPOSURE_CTRL_L_REG, &exposure_l);
  1323. if (ret)
  1324. return ret;
  1325. *exposure = OV5648_EXPOSURE_CTRL_HH_VALUE((u32)exposure_hh) |
  1326. OV5648_EXPOSURE_CTRL_H_VALUE((u32)exposure_h) |
  1327. OV5648_EXPOSURE_CTRL_L_VALUE((u32)exposure_l);
  1328. return 0;
  1329. }
  1330. /* Gain */
  1331. static int ov5648_gain_auto_configure(struct ov5648_sensor *sensor, bool enable)
  1332. {
  1333. return ov5648_update_bits(sensor, OV5648_MANUAL_CTRL_REG,
  1334. OV5648_MANUAL_CTRL_AGC_MANUAL_EN,
  1335. enable ? 0 : OV5648_MANUAL_CTRL_AGC_MANUAL_EN);
  1336. }
  1337. static int ov5648_gain_configure(struct ov5648_sensor *sensor, u32 gain)
  1338. {
  1339. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1340. int ret;
  1341. if (ctrls->gain_auto->val)
  1342. return -EINVAL;
  1343. ret = ov5648_write(sensor, OV5648_GAIN_CTRL_H_REG,
  1344. OV5648_GAIN_CTRL_H(gain));
  1345. if (ret)
  1346. return ret;
  1347. return ov5648_write(sensor, OV5648_GAIN_CTRL_L_REG,
  1348. OV5648_GAIN_CTRL_L(gain));
  1349. }
  1350. static int ov5648_gain_value(struct ov5648_sensor *sensor, u32 *gain)
  1351. {
  1352. u8 gain_h = 0, gain_l = 0;
  1353. int ret;
  1354. ret = ov5648_read(sensor, OV5648_GAIN_CTRL_H_REG, &gain_h);
  1355. if (ret)
  1356. return ret;
  1357. ret = ov5648_read(sensor, OV5648_GAIN_CTRL_L_REG, &gain_l);
  1358. if (ret)
  1359. return ret;
  1360. *gain = OV5648_GAIN_CTRL_H_VALUE((u32)gain_h) |
  1361. OV5648_GAIN_CTRL_L_VALUE((u32)gain_l);
  1362. return 0;
  1363. }
  1364. /* White Balance */
  1365. static int ov5648_white_balance_auto_configure(struct ov5648_sensor *sensor,
  1366. bool enable)
  1367. {
  1368. return ov5648_write(sensor, OV5648_AWB_CTRL_REG,
  1369. enable ? 0 : OV5648_AWB_CTRL_GAIN_MANUAL_EN);
  1370. }
  1371. static int ov5648_white_balance_configure(struct ov5648_sensor *sensor,
  1372. u32 red_balance, u32 blue_balance)
  1373. {
  1374. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1375. int ret;
  1376. if (ctrls->white_balance_auto->val)
  1377. return -EINVAL;
  1378. ret = ov5648_write(sensor, OV5648_GAIN_RED_MAN_H_REG,
  1379. OV5648_GAIN_RED_MAN_H(red_balance));
  1380. if (ret)
  1381. return ret;
  1382. ret = ov5648_write(sensor, OV5648_GAIN_RED_MAN_L_REG,
  1383. OV5648_GAIN_RED_MAN_L(red_balance));
  1384. if (ret)
  1385. return ret;
  1386. ret = ov5648_write(sensor, OV5648_GAIN_BLUE_MAN_H_REG,
  1387. OV5648_GAIN_BLUE_MAN_H(blue_balance));
  1388. if (ret)
  1389. return ret;
  1390. return ov5648_write(sensor, OV5648_GAIN_BLUE_MAN_L_REG,
  1391. OV5648_GAIN_BLUE_MAN_L(blue_balance));
  1392. }
  1393. /* Flip */
  1394. static int ov5648_flip_vert_configure(struct ov5648_sensor *sensor, bool enable)
  1395. {
  1396. u8 bits = OV5648_TC20_FLIP_VERT_ISP_EN |
  1397. OV5648_TC20_FLIP_VERT_SENSOR_EN;
  1398. return ov5648_update_bits(sensor, OV5648_TC20_REG, bits,
  1399. enable ? bits : 0);
  1400. }
  1401. static int ov5648_flip_horz_configure(struct ov5648_sensor *sensor, bool enable)
  1402. {
  1403. u8 bits = OV5648_TC21_FLIP_HORZ_ISP_EN |
  1404. OV5648_TC21_FLIP_HORZ_SENSOR_EN;
  1405. return ov5648_update_bits(sensor, OV5648_TC21_REG, bits,
  1406. enable ? bits : 0);
  1407. }
  1408. /* Test Pattern */
  1409. static int ov5648_test_pattern_configure(struct ov5648_sensor *sensor,
  1410. unsigned int index)
  1411. {
  1412. if (index >= ARRAY_SIZE(ov5648_test_pattern_bits))
  1413. return -EINVAL;
  1414. return ov5648_write(sensor, OV5648_ISP_CTRL3D_REG,
  1415. ov5648_test_pattern_bits[index]);
  1416. }
  1417. /* State */
  1418. static int ov5648_state_mipi_configure(struct ov5648_sensor *sensor,
  1419. const struct ov5648_mode *mode,
  1420. u32 mbus_code)
  1421. {
  1422. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1423. struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
  1424. &sensor->endpoint.bus.mipi_csi2;
  1425. unsigned long mipi_clk_rate;
  1426. unsigned int bits_per_sample;
  1427. unsigned int lanes_count;
  1428. unsigned int i, j;
  1429. s64 mipi_pixel_rate;
  1430. mipi_clk_rate = ov5648_mode_mipi_clk_rate(sensor, mode, mbus_code);
  1431. if (!mipi_clk_rate)
  1432. return -EINVAL;
  1433. for (i = 0; i < ARRAY_SIZE(ov5648_link_freq_menu); i++) {
  1434. s64 freq = ov5648_link_freq_menu[i];
  1435. if (freq == mipi_clk_rate)
  1436. break;
  1437. }
  1438. for (j = 0; j < sensor->endpoint.nr_of_link_frequencies; j++) {
  1439. u64 freq = sensor->endpoint.link_frequencies[j];
  1440. if (freq == mipi_clk_rate)
  1441. break;
  1442. }
  1443. if (i == ARRAY_SIZE(ov5648_link_freq_menu)) {
  1444. dev_err(sensor->dev,
  1445. "failed to find %lu clk rate in link freq\n",
  1446. mipi_clk_rate);
  1447. } else if (j == sensor->endpoint.nr_of_link_frequencies) {
  1448. dev_err(sensor->dev,
  1449. "failed to find %lu clk rate in endpoint link-frequencies\n",
  1450. mipi_clk_rate);
  1451. } else {
  1452. __v4l2_ctrl_s_ctrl(ctrls->link_freq, i);
  1453. }
  1454. switch (mbus_code) {
  1455. case MEDIA_BUS_FMT_SBGGR8_1X8:
  1456. bits_per_sample = 8;
  1457. break;
  1458. case MEDIA_BUS_FMT_SBGGR10_1X10:
  1459. bits_per_sample = 10;
  1460. break;
  1461. default:
  1462. return -EINVAL;
  1463. }
  1464. lanes_count = bus_mipi_csi2->num_data_lanes;
  1465. mipi_pixel_rate = mipi_clk_rate * 2 * lanes_count / bits_per_sample;
  1466. __v4l2_ctrl_s_ctrl_int64(ctrls->pixel_rate, mipi_pixel_rate);
  1467. return 0;
  1468. }
  1469. static int ov5648_state_configure(struct ov5648_sensor *sensor,
  1470. const struct ov5648_mode *mode,
  1471. u32 mbus_code)
  1472. {
  1473. int ret;
  1474. if (sensor->state.streaming)
  1475. return -EBUSY;
  1476. /* State will be configured at first power on otherwise. */
  1477. if (pm_runtime_enabled(sensor->dev) &&
  1478. !pm_runtime_suspended(sensor->dev)) {
  1479. ret = ov5648_mode_configure(sensor, mode, mbus_code);
  1480. if (ret)
  1481. return ret;
  1482. }
  1483. ret = ov5648_state_mipi_configure(sensor, mode, mbus_code);
  1484. if (ret)
  1485. return ret;
  1486. sensor->state.mode = mode;
  1487. sensor->state.mbus_code = mbus_code;
  1488. return 0;
  1489. }
  1490. static int ov5648_state_init(struct ov5648_sensor *sensor)
  1491. {
  1492. int ret;
  1493. mutex_lock(&sensor->mutex);
  1494. ret = ov5648_state_configure(sensor, &ov5648_modes[0],
  1495. ov5648_mbus_codes[0]);
  1496. mutex_unlock(&sensor->mutex);
  1497. return ret;
  1498. }
  1499. /* Sensor Base */
  1500. static int ov5648_sensor_init(struct ov5648_sensor *sensor)
  1501. {
  1502. int ret;
  1503. ret = ov5648_sw_reset(sensor);
  1504. if (ret) {
  1505. dev_err(sensor->dev, "failed to perform sw reset\n");
  1506. return ret;
  1507. }
  1508. ret = ov5648_sw_standby(sensor, 1);
  1509. if (ret) {
  1510. dev_err(sensor->dev, "failed to set sensor standby\n");
  1511. return ret;
  1512. }
  1513. ret = ov5648_chip_id_check(sensor);
  1514. if (ret) {
  1515. dev_err(sensor->dev, "failed to check sensor chip id\n");
  1516. return ret;
  1517. }
  1518. ret = ov5648_avdd_internal_power(sensor, !sensor->avdd);
  1519. if (ret) {
  1520. dev_err(sensor->dev, "failed to set internal avdd power\n");
  1521. return ret;
  1522. }
  1523. ret = ov5648_write_sequence(sensor, ov5648_init_sequence,
  1524. ARRAY_SIZE(ov5648_init_sequence));
  1525. if (ret) {
  1526. dev_err(sensor->dev, "failed to write init sequence\n");
  1527. return ret;
  1528. }
  1529. ret = ov5648_pad_configure(sensor);
  1530. if (ret) {
  1531. dev_err(sensor->dev, "failed to configure pad\n");
  1532. return ret;
  1533. }
  1534. ret = ov5648_mipi_configure(sensor);
  1535. if (ret) {
  1536. dev_err(sensor->dev, "failed to configure MIPI\n");
  1537. return ret;
  1538. }
  1539. ret = ov5648_isp_configure(sensor);
  1540. if (ret) {
  1541. dev_err(sensor->dev, "failed to configure ISP\n");
  1542. return ret;
  1543. }
  1544. ret = ov5648_black_level_configure(sensor);
  1545. if (ret) {
  1546. dev_err(sensor->dev, "failed to configure black level\n");
  1547. return ret;
  1548. }
  1549. /* Configure current mode. */
  1550. ret = ov5648_state_configure(sensor, sensor->state.mode,
  1551. sensor->state.mbus_code);
  1552. if (ret) {
  1553. dev_err(sensor->dev, "failed to configure state\n");
  1554. return ret;
  1555. }
  1556. return 0;
  1557. }
  1558. static int ov5648_sensor_power(struct ov5648_sensor *sensor, bool on)
  1559. {
  1560. /* Keep initialized to zero for disable label. */
  1561. int ret = 0;
  1562. /*
  1563. * General notes about the power sequence:
  1564. * - power-down GPIO must be active (low) during power-on;
  1565. * - reset GPIO state does not matter during power-on;
  1566. * - XVCLK must be provided 1 ms before register access;
  1567. * - 10 ms are needed between power-down deassert and register access.
  1568. */
  1569. /* Note that regulator-and-GPIO-based power is untested. */
  1570. if (on) {
  1571. gpiod_set_value_cansleep(sensor->reset, 1);
  1572. gpiod_set_value_cansleep(sensor->powerdown, 1);
  1573. ret = regulator_enable(sensor->dovdd);
  1574. if (ret) {
  1575. dev_err(sensor->dev,
  1576. "failed to enable DOVDD regulator\n");
  1577. goto disable;
  1578. }
  1579. if (sensor->avdd) {
  1580. ret = regulator_enable(sensor->avdd);
  1581. if (ret) {
  1582. dev_err(sensor->dev,
  1583. "failed to enable AVDD regulator\n");
  1584. goto disable;
  1585. }
  1586. }
  1587. ret = regulator_enable(sensor->dvdd);
  1588. if (ret) {
  1589. dev_err(sensor->dev,
  1590. "failed to enable DVDD regulator\n");
  1591. goto disable;
  1592. }
  1593. /* According to OV5648 power up diagram. */
  1594. usleep_range(5000, 10000);
  1595. ret = clk_prepare_enable(sensor->xvclk);
  1596. if (ret) {
  1597. dev_err(sensor->dev, "failed to enable XVCLK clock\n");
  1598. goto disable;
  1599. }
  1600. gpiod_set_value_cansleep(sensor->reset, 0);
  1601. gpiod_set_value_cansleep(sensor->powerdown, 0);
  1602. usleep_range(20000, 25000);
  1603. } else {
  1604. disable:
  1605. gpiod_set_value_cansleep(sensor->powerdown, 1);
  1606. gpiod_set_value_cansleep(sensor->reset, 1);
  1607. clk_disable_unprepare(sensor->xvclk);
  1608. regulator_disable(sensor->dvdd);
  1609. if (sensor->avdd)
  1610. regulator_disable(sensor->avdd);
  1611. regulator_disable(sensor->dovdd);
  1612. }
  1613. return ret;
  1614. }
  1615. /* Controls */
  1616. static int ov5648_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  1617. {
  1618. struct v4l2_subdev *subdev = ov5648_ctrl_subdev(ctrl);
  1619. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1620. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1621. int ret;
  1622. switch (ctrl->id) {
  1623. case V4L2_CID_EXPOSURE_AUTO:
  1624. ret = ov5648_exposure_value(sensor, &ctrls->exposure->val);
  1625. if (ret)
  1626. return ret;
  1627. break;
  1628. case V4L2_CID_AUTOGAIN:
  1629. ret = ov5648_gain_value(sensor, &ctrls->gain->val);
  1630. if (ret)
  1631. return ret;
  1632. break;
  1633. default:
  1634. return -EINVAL;
  1635. }
  1636. return 0;
  1637. }
  1638. static int ov5648_s_ctrl(struct v4l2_ctrl *ctrl)
  1639. {
  1640. struct v4l2_subdev *subdev = ov5648_ctrl_subdev(ctrl);
  1641. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1642. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1643. unsigned int index;
  1644. bool enable;
  1645. int ret;
  1646. /* Wait for the sensor to be on before setting controls. */
  1647. if (pm_runtime_suspended(sensor->dev))
  1648. return 0;
  1649. switch (ctrl->id) {
  1650. case V4L2_CID_EXPOSURE_AUTO:
  1651. enable = ctrl->val == V4L2_EXPOSURE_AUTO;
  1652. ret = ov5648_exposure_auto_configure(sensor, enable);
  1653. if (ret)
  1654. return ret;
  1655. if (!enable && ctrls->exposure->is_new) {
  1656. ret = ov5648_exposure_configure(sensor,
  1657. ctrls->exposure->val);
  1658. if (ret)
  1659. return ret;
  1660. }
  1661. break;
  1662. case V4L2_CID_AUTOGAIN:
  1663. enable = !!ctrl->val;
  1664. ret = ov5648_gain_auto_configure(sensor, enable);
  1665. if (ret)
  1666. return ret;
  1667. if (!enable) {
  1668. ret = ov5648_gain_configure(sensor, ctrls->gain->val);
  1669. if (ret)
  1670. return ret;
  1671. }
  1672. break;
  1673. case V4L2_CID_AUTO_WHITE_BALANCE:
  1674. enable = !!ctrl->val;
  1675. ret = ov5648_white_balance_auto_configure(sensor, enable);
  1676. if (ret)
  1677. return ret;
  1678. if (!enable) {
  1679. ret = ov5648_white_balance_configure(sensor,
  1680. ctrls->red_balance->val,
  1681. ctrls->blue_balance->val);
  1682. if (ret)
  1683. return ret;
  1684. }
  1685. break;
  1686. case V4L2_CID_HFLIP:
  1687. enable = !!ctrl->val;
  1688. return ov5648_flip_horz_configure(sensor, enable);
  1689. case V4L2_CID_VFLIP:
  1690. enable = !!ctrl->val;
  1691. return ov5648_flip_vert_configure(sensor, enable);
  1692. case V4L2_CID_TEST_PATTERN:
  1693. index = (unsigned int)ctrl->val;
  1694. return ov5648_test_pattern_configure(sensor, index);
  1695. default:
  1696. return -EINVAL;
  1697. }
  1698. return 0;
  1699. }
  1700. static const struct v4l2_ctrl_ops ov5648_ctrl_ops = {
  1701. .g_volatile_ctrl = ov5648_g_volatile_ctrl,
  1702. .s_ctrl = ov5648_s_ctrl,
  1703. };
  1704. static int ov5648_ctrls_init(struct ov5648_sensor *sensor)
  1705. {
  1706. struct ov5648_ctrls *ctrls = &sensor->ctrls;
  1707. struct v4l2_ctrl_handler *handler = &ctrls->handler;
  1708. const struct v4l2_ctrl_ops *ops = &ov5648_ctrl_ops;
  1709. int ret;
  1710. v4l2_ctrl_handler_init(handler, 32);
  1711. /* Use our mutex for ctrl locking. */
  1712. handler->lock = &sensor->mutex;
  1713. /* Exposure */
  1714. ctrls->exposure_auto = v4l2_ctrl_new_std_menu(handler, ops,
  1715. V4L2_CID_EXPOSURE_AUTO,
  1716. V4L2_EXPOSURE_MANUAL, 0,
  1717. V4L2_EXPOSURE_AUTO);
  1718. ctrls->exposure = v4l2_ctrl_new_std(handler, ops, V4L2_CID_EXPOSURE,
  1719. 16, 1048575, 16, 512);
  1720. v4l2_ctrl_auto_cluster(2, &ctrls->exposure_auto, 1, true);
  1721. /* Gain */
  1722. ctrls->gain_auto =
  1723. v4l2_ctrl_new_std(handler, ops, V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  1724. ctrls->gain = v4l2_ctrl_new_std(handler, ops, V4L2_CID_GAIN, 16, 1023,
  1725. 16, 16);
  1726. v4l2_ctrl_auto_cluster(2, &ctrls->gain_auto, 0, true);
  1727. /* White Balance */
  1728. ctrls->white_balance_auto =
  1729. v4l2_ctrl_new_std(handler, ops, V4L2_CID_AUTO_WHITE_BALANCE, 0,
  1730. 1, 1, 1);
  1731. ctrls->red_balance = v4l2_ctrl_new_std(handler, ops,
  1732. V4L2_CID_RED_BALANCE, 0, 4095,
  1733. 1, 1024);
  1734. ctrls->blue_balance = v4l2_ctrl_new_std(handler, ops,
  1735. V4L2_CID_BLUE_BALANCE, 0, 4095,
  1736. 1, 1024);
  1737. v4l2_ctrl_auto_cluster(3, &ctrls->white_balance_auto, 0, false);
  1738. /* Flip */
  1739. v4l2_ctrl_new_std(handler, ops, V4L2_CID_HFLIP, 0, 1, 1, 0);
  1740. v4l2_ctrl_new_std(handler, ops, V4L2_CID_VFLIP, 0, 1, 1, 0);
  1741. /* Test Pattern */
  1742. v4l2_ctrl_new_std_menu_items(handler, ops, V4L2_CID_TEST_PATTERN,
  1743. ARRAY_SIZE(ov5648_test_pattern_menu) - 1,
  1744. 0, 0, ov5648_test_pattern_menu);
  1745. /* MIPI CSI-2 */
  1746. ctrls->link_freq =
  1747. v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
  1748. ARRAY_SIZE(ov5648_link_freq_menu) - 1,
  1749. 0, ov5648_link_freq_menu);
  1750. ctrls->pixel_rate =
  1751. v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 1,
  1752. INT_MAX, 1, 1);
  1753. if (handler->error) {
  1754. ret = handler->error;
  1755. goto error_ctrls;
  1756. }
  1757. ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
  1758. ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
  1759. ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1760. ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1761. sensor->subdev.ctrl_handler = handler;
  1762. return 0;
  1763. error_ctrls:
  1764. v4l2_ctrl_handler_free(handler);
  1765. return ret;
  1766. }
  1767. /* Subdev Video Operations */
  1768. static int ov5648_s_stream(struct v4l2_subdev *subdev, int enable)
  1769. {
  1770. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1771. struct ov5648_state *state = &sensor->state;
  1772. int ret;
  1773. if (enable) {
  1774. ret = pm_runtime_resume_and_get(sensor->dev);
  1775. if (ret < 0)
  1776. return ret;
  1777. }
  1778. mutex_lock(&sensor->mutex);
  1779. ret = ov5648_sw_standby(sensor, !enable);
  1780. mutex_unlock(&sensor->mutex);
  1781. if (ret)
  1782. return ret;
  1783. state->streaming = !!enable;
  1784. if (!enable)
  1785. pm_runtime_put(sensor->dev);
  1786. return 0;
  1787. }
  1788. static int ov5648_g_frame_interval(struct v4l2_subdev *subdev,
  1789. struct v4l2_subdev_frame_interval *interval)
  1790. {
  1791. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1792. const struct ov5648_mode *mode;
  1793. int ret = 0;
  1794. mutex_lock(&sensor->mutex);
  1795. mode = sensor->state.mode;
  1796. switch (sensor->state.mbus_code) {
  1797. case MEDIA_BUS_FMT_SBGGR8_1X8:
  1798. interval->interval = mode->frame_interval[0];
  1799. break;
  1800. case MEDIA_BUS_FMT_SBGGR10_1X10:
  1801. interval->interval = mode->frame_interval[1];
  1802. break;
  1803. default:
  1804. ret = -EINVAL;
  1805. }
  1806. mutex_unlock(&sensor->mutex);
  1807. return ret;
  1808. }
  1809. static const struct v4l2_subdev_video_ops ov5648_subdev_video_ops = {
  1810. .s_stream = ov5648_s_stream,
  1811. .g_frame_interval = ov5648_g_frame_interval,
  1812. .s_frame_interval = ov5648_g_frame_interval,
  1813. };
  1814. /* Subdev Pad Operations */
  1815. static int ov5648_enum_mbus_code(struct v4l2_subdev *subdev,
  1816. struct v4l2_subdev_state *sd_state,
  1817. struct v4l2_subdev_mbus_code_enum *code_enum)
  1818. {
  1819. if (code_enum->index >= ARRAY_SIZE(ov5648_mbus_codes))
  1820. return -EINVAL;
  1821. code_enum->code = ov5648_mbus_codes[code_enum->index];
  1822. return 0;
  1823. }
  1824. static void ov5648_mbus_format_fill(struct v4l2_mbus_framefmt *mbus_format,
  1825. u32 mbus_code,
  1826. const struct ov5648_mode *mode)
  1827. {
  1828. mbus_format->width = mode->output_size_x;
  1829. mbus_format->height = mode->output_size_y;
  1830. mbus_format->code = mbus_code;
  1831. mbus_format->field = V4L2_FIELD_NONE;
  1832. mbus_format->colorspace = V4L2_COLORSPACE_RAW;
  1833. mbus_format->ycbcr_enc =
  1834. V4L2_MAP_YCBCR_ENC_DEFAULT(mbus_format->colorspace);
  1835. mbus_format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
  1836. mbus_format->xfer_func =
  1837. V4L2_MAP_XFER_FUNC_DEFAULT(mbus_format->colorspace);
  1838. }
  1839. static int ov5648_get_fmt(struct v4l2_subdev *subdev,
  1840. struct v4l2_subdev_state *sd_state,
  1841. struct v4l2_subdev_format *format)
  1842. {
  1843. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1844. struct v4l2_mbus_framefmt *mbus_format = &format->format;
  1845. mutex_lock(&sensor->mutex);
  1846. if (format->which == V4L2_SUBDEV_FORMAT_TRY)
  1847. *mbus_format = *v4l2_subdev_get_try_format(subdev, sd_state,
  1848. format->pad);
  1849. else
  1850. ov5648_mbus_format_fill(mbus_format, sensor->state.mbus_code,
  1851. sensor->state.mode);
  1852. mutex_unlock(&sensor->mutex);
  1853. return 0;
  1854. }
  1855. static int ov5648_set_fmt(struct v4l2_subdev *subdev,
  1856. struct v4l2_subdev_state *sd_state,
  1857. struct v4l2_subdev_format *format)
  1858. {
  1859. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1860. struct v4l2_mbus_framefmt *mbus_format = &format->format;
  1861. const struct ov5648_mode *mode;
  1862. u32 mbus_code = 0;
  1863. unsigned int index;
  1864. int ret = 0;
  1865. mutex_lock(&sensor->mutex);
  1866. if (sensor->state.streaming) {
  1867. ret = -EBUSY;
  1868. goto complete;
  1869. }
  1870. /* Try to find requested mbus code. */
  1871. for (index = 0; index < ARRAY_SIZE(ov5648_mbus_codes); index++) {
  1872. if (ov5648_mbus_codes[index] == mbus_format->code) {
  1873. mbus_code = mbus_format->code;
  1874. break;
  1875. }
  1876. }
  1877. /* Fallback to default. */
  1878. if (!mbus_code)
  1879. mbus_code = ov5648_mbus_codes[0];
  1880. /* Find the mode with nearest dimensions. */
  1881. mode = v4l2_find_nearest_size(ov5648_modes, ARRAY_SIZE(ov5648_modes),
  1882. output_size_x, output_size_y,
  1883. mbus_format->width, mbus_format->height);
  1884. if (!mode) {
  1885. ret = -EINVAL;
  1886. goto complete;
  1887. }
  1888. ov5648_mbus_format_fill(mbus_format, mbus_code, mode);
  1889. if (format->which == V4L2_SUBDEV_FORMAT_TRY)
  1890. *v4l2_subdev_get_try_format(subdev, sd_state, format->pad) =
  1891. *mbus_format;
  1892. else if (sensor->state.mode != mode ||
  1893. sensor->state.mbus_code != mbus_code)
  1894. ret = ov5648_state_configure(sensor, mode, mbus_code);
  1895. complete:
  1896. mutex_unlock(&sensor->mutex);
  1897. return ret;
  1898. }
  1899. static int ov5648_enum_frame_size(struct v4l2_subdev *subdev,
  1900. struct v4l2_subdev_state *sd_state,
  1901. struct v4l2_subdev_frame_size_enum *size_enum)
  1902. {
  1903. const struct ov5648_mode *mode;
  1904. if (size_enum->index >= ARRAY_SIZE(ov5648_modes))
  1905. return -EINVAL;
  1906. mode = &ov5648_modes[size_enum->index];
  1907. size_enum->min_width = size_enum->max_width = mode->output_size_x;
  1908. size_enum->min_height = size_enum->max_height = mode->output_size_y;
  1909. return 0;
  1910. }
  1911. static int ov5648_enum_frame_interval(struct v4l2_subdev *subdev,
  1912. struct v4l2_subdev_state *sd_state,
  1913. struct v4l2_subdev_frame_interval_enum *interval_enum)
  1914. {
  1915. const struct ov5648_mode *mode = NULL;
  1916. unsigned int mode_index;
  1917. unsigned int interval_index;
  1918. if (interval_enum->index > 0)
  1919. return -EINVAL;
  1920. /*
  1921. * Multiple modes with the same dimensions may have different frame
  1922. * intervals, so look up each relevant mode.
  1923. */
  1924. for (mode_index = 0, interval_index = 0;
  1925. mode_index < ARRAY_SIZE(ov5648_modes); mode_index++) {
  1926. mode = &ov5648_modes[mode_index];
  1927. if (mode->output_size_x == interval_enum->width &&
  1928. mode->output_size_y == interval_enum->height) {
  1929. if (interval_index == interval_enum->index)
  1930. break;
  1931. interval_index++;
  1932. }
  1933. }
  1934. if (mode_index == ARRAY_SIZE(ov5648_modes))
  1935. return -EINVAL;
  1936. switch (interval_enum->code) {
  1937. case MEDIA_BUS_FMT_SBGGR8_1X8:
  1938. interval_enum->interval = mode->frame_interval[0];
  1939. break;
  1940. case MEDIA_BUS_FMT_SBGGR10_1X10:
  1941. interval_enum->interval = mode->frame_interval[1];
  1942. break;
  1943. default:
  1944. return -EINVAL;
  1945. }
  1946. return 0;
  1947. }
  1948. static const struct v4l2_subdev_pad_ops ov5648_subdev_pad_ops = {
  1949. .enum_mbus_code = ov5648_enum_mbus_code,
  1950. .get_fmt = ov5648_get_fmt,
  1951. .set_fmt = ov5648_set_fmt,
  1952. .enum_frame_size = ov5648_enum_frame_size,
  1953. .enum_frame_interval = ov5648_enum_frame_interval,
  1954. };
  1955. static const struct v4l2_subdev_ops ov5648_subdev_ops = {
  1956. .video = &ov5648_subdev_video_ops,
  1957. .pad = &ov5648_subdev_pad_ops,
  1958. };
  1959. static int ov5648_suspend(struct device *dev)
  1960. {
  1961. struct i2c_client *client = to_i2c_client(dev);
  1962. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  1963. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1964. struct ov5648_state *state = &sensor->state;
  1965. int ret = 0;
  1966. mutex_lock(&sensor->mutex);
  1967. if (state->streaming) {
  1968. ret = ov5648_sw_standby(sensor, true);
  1969. if (ret)
  1970. goto complete;
  1971. }
  1972. ret = ov5648_sensor_power(sensor, false);
  1973. if (ret)
  1974. ov5648_sw_standby(sensor, false);
  1975. complete:
  1976. mutex_unlock(&sensor->mutex);
  1977. return ret;
  1978. }
  1979. static int ov5648_resume(struct device *dev)
  1980. {
  1981. struct i2c_client *client = to_i2c_client(dev);
  1982. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  1983. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  1984. struct ov5648_state *state = &sensor->state;
  1985. int ret = 0;
  1986. mutex_lock(&sensor->mutex);
  1987. ret = ov5648_sensor_power(sensor, true);
  1988. if (ret)
  1989. goto complete;
  1990. ret = ov5648_sensor_init(sensor);
  1991. if (ret)
  1992. goto error_power;
  1993. ret = __v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
  1994. if (ret)
  1995. goto error_power;
  1996. if (state->streaming) {
  1997. ret = ov5648_sw_standby(sensor, false);
  1998. if (ret)
  1999. goto error_power;
  2000. }
  2001. goto complete;
  2002. error_power:
  2003. ov5648_sensor_power(sensor, false);
  2004. complete:
  2005. mutex_unlock(&sensor->mutex);
  2006. return ret;
  2007. }
  2008. static int ov5648_probe(struct i2c_client *client)
  2009. {
  2010. struct device *dev = &client->dev;
  2011. struct fwnode_handle *handle;
  2012. struct ov5648_sensor *sensor;
  2013. struct v4l2_subdev *subdev;
  2014. struct media_pad *pad;
  2015. unsigned long rate;
  2016. int ret;
  2017. sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
  2018. if (!sensor)
  2019. return -ENOMEM;
  2020. sensor->dev = dev;
  2021. sensor->i2c_client = client;
  2022. /* Graph Endpoint */
  2023. handle = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
  2024. if (!handle) {
  2025. dev_err(dev, "unable to find endpoint node\n");
  2026. return -EINVAL;
  2027. }
  2028. sensor->endpoint.bus_type = V4L2_MBUS_CSI2_DPHY;
  2029. ret = v4l2_fwnode_endpoint_alloc_parse(handle, &sensor->endpoint);
  2030. fwnode_handle_put(handle);
  2031. if (ret) {
  2032. dev_err(dev, "failed to parse endpoint node\n");
  2033. return ret;
  2034. }
  2035. /* GPIOs */
  2036. sensor->powerdown = devm_gpiod_get_optional(dev, "powerdown",
  2037. GPIOD_OUT_HIGH);
  2038. if (IS_ERR(sensor->powerdown)) {
  2039. ret = PTR_ERR(sensor->powerdown);
  2040. goto error_endpoint;
  2041. }
  2042. sensor->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
  2043. if (IS_ERR(sensor->reset)) {
  2044. ret = PTR_ERR(sensor->reset);
  2045. goto error_endpoint;
  2046. }
  2047. /* Regulators */
  2048. /* DVDD: digital core */
  2049. sensor->dvdd = devm_regulator_get(dev, "dvdd");
  2050. if (IS_ERR(sensor->dvdd)) {
  2051. dev_err(dev, "cannot get DVDD (digital core) regulator\n");
  2052. ret = PTR_ERR(sensor->dvdd);
  2053. goto error_endpoint;
  2054. }
  2055. /* DOVDD: digital I/O */
  2056. sensor->dovdd = devm_regulator_get(dev, "dovdd");
  2057. if (IS_ERR(sensor->dovdd)) {
  2058. dev_err(dev, "cannot get DOVDD (digital I/O) regulator\n");
  2059. ret = PTR_ERR(sensor->dovdd);
  2060. goto error_endpoint;
  2061. }
  2062. /* AVDD: analog */
  2063. sensor->avdd = devm_regulator_get_optional(dev, "avdd");
  2064. if (IS_ERR(sensor->avdd)) {
  2065. dev_info(dev, "no AVDD regulator provided, using internal\n");
  2066. sensor->avdd = NULL;
  2067. }
  2068. /* External Clock */
  2069. sensor->xvclk = devm_clk_get(dev, NULL);
  2070. if (IS_ERR(sensor->xvclk)) {
  2071. dev_err(dev, "failed to get external clock\n");
  2072. ret = PTR_ERR(sensor->xvclk);
  2073. goto error_endpoint;
  2074. }
  2075. rate = clk_get_rate(sensor->xvclk);
  2076. if (rate != OV5648_XVCLK_RATE) {
  2077. dev_err(dev, "clock rate %lu Hz is unsupported\n", rate);
  2078. ret = -EINVAL;
  2079. goto error_endpoint;
  2080. }
  2081. /* Subdev, entity and pad */
  2082. subdev = &sensor->subdev;
  2083. v4l2_i2c_subdev_init(subdev, client, &ov5648_subdev_ops);
  2084. subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  2085. subdev->entity.function = MEDIA_ENT_F_CAM_SENSOR;
  2086. pad = &sensor->pad;
  2087. pad->flags = MEDIA_PAD_FL_SOURCE;
  2088. ret = media_entity_pads_init(&subdev->entity, 1, pad);
  2089. if (ret)
  2090. goto error_entity;
  2091. /* Mutex */
  2092. mutex_init(&sensor->mutex);
  2093. /* Sensor */
  2094. ret = ov5648_ctrls_init(sensor);
  2095. if (ret)
  2096. goto error_mutex;
  2097. ret = ov5648_state_init(sensor);
  2098. if (ret)
  2099. goto error_ctrls;
  2100. /* Runtime PM */
  2101. pm_runtime_enable(sensor->dev);
  2102. pm_runtime_set_suspended(sensor->dev);
  2103. /* V4L2 subdev register */
  2104. ret = v4l2_async_register_subdev_sensor(subdev);
  2105. if (ret)
  2106. goto error_pm;
  2107. return 0;
  2108. error_pm:
  2109. pm_runtime_disable(sensor->dev);
  2110. error_ctrls:
  2111. v4l2_ctrl_handler_free(&sensor->ctrls.handler);
  2112. error_mutex:
  2113. mutex_destroy(&sensor->mutex);
  2114. error_entity:
  2115. media_entity_cleanup(&sensor->subdev.entity);
  2116. error_endpoint:
  2117. v4l2_fwnode_endpoint_free(&sensor->endpoint);
  2118. return ret;
  2119. }
  2120. static void ov5648_remove(struct i2c_client *client)
  2121. {
  2122. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  2123. struct ov5648_sensor *sensor = ov5648_subdev_sensor(subdev);
  2124. v4l2_async_unregister_subdev(subdev);
  2125. pm_runtime_disable(sensor->dev);
  2126. v4l2_ctrl_handler_free(&sensor->ctrls.handler);
  2127. mutex_destroy(&sensor->mutex);
  2128. media_entity_cleanup(&subdev->entity);
  2129. v4l2_fwnode_endpoint_free(&sensor->endpoint);
  2130. }
  2131. static const struct dev_pm_ops ov5648_pm_ops = {
  2132. SET_RUNTIME_PM_OPS(ov5648_suspend, ov5648_resume, NULL)
  2133. };
  2134. static const struct of_device_id ov5648_of_match[] = {
  2135. { .compatible = "ovti,ov5648" },
  2136. { }
  2137. };
  2138. MODULE_DEVICE_TABLE(of, ov5648_of_match);
  2139. static struct i2c_driver ov5648_driver = {
  2140. .driver = {
  2141. .name = "ov5648",
  2142. .of_match_table = ov5648_of_match,
  2143. .pm = &ov5648_pm_ops,
  2144. },
  2145. .probe_new = ov5648_probe,
  2146. .remove = ov5648_remove,
  2147. };
  2148. module_i2c_driver(ov5648_driver);
  2149. MODULE_AUTHOR("Paul Kocialkowski <[email protected]>");
  2150. MODULE_DESCRIPTION("V4L2 driver for the OmniVision OV5648 image sensor");
  2151. MODULE_LICENSE("GPL v2");