ov5645.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for the OV5645 camera sensor.
  4. *
  5. * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
  6. * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
  7. * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  8. *
  9. * Based on:
  10. * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
  11. * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
  12. * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
  13. * - the OV5640 driver posted on linux-media:
  14. * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
  15. */
  16. /*
  17. */
  18. #include <linux/bitops.h>
  19. #include <linux/clk.h>
  20. #include <linux/delay.h>
  21. #include <linux/device.h>
  22. #include <linux/gpio/consumer.h>
  23. #include <linux/i2c.h>
  24. #include <linux/init.h>
  25. #include <linux/module.h>
  26. #include <linux/of.h>
  27. #include <linux/of_graph.h>
  28. #include <linux/regulator/consumer.h>
  29. #include <linux/slab.h>
  30. #include <linux/types.h>
  31. #include <media/v4l2-ctrls.h>
  32. #include <media/v4l2-fwnode.h>
  33. #include <media/v4l2-subdev.h>
  34. #define OV5645_SYSTEM_CTRL0 0x3008
  35. #define OV5645_SYSTEM_CTRL0_START 0x02
  36. #define OV5645_SYSTEM_CTRL0_STOP 0x42
  37. #define OV5645_CHIP_ID_HIGH 0x300a
  38. #define OV5645_CHIP_ID_HIGH_BYTE 0x56
  39. #define OV5645_CHIP_ID_LOW 0x300b
  40. #define OV5645_CHIP_ID_LOW_BYTE 0x45
  41. #define OV5645_IO_MIPI_CTRL00 0x300e
  42. #define OV5645_PAD_OUTPUT00 0x3019
  43. #define OV5645_AWB_MANUAL_CONTROL 0x3406
  44. #define OV5645_AWB_MANUAL_ENABLE BIT(0)
  45. #define OV5645_AEC_PK_MANUAL 0x3503
  46. #define OV5645_AEC_MANUAL_ENABLE BIT(0)
  47. #define OV5645_AGC_MANUAL_ENABLE BIT(1)
  48. #define OV5645_TIMING_TC_REG20 0x3820
  49. #define OV5645_SENSOR_VFLIP BIT(1)
  50. #define OV5645_ISP_VFLIP BIT(2)
  51. #define OV5645_TIMING_TC_REG21 0x3821
  52. #define OV5645_SENSOR_MIRROR BIT(1)
  53. #define OV5645_MIPI_CTRL00 0x4800
  54. #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
  55. #define OV5645_TEST_PATTERN_MASK 0x3
  56. #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
  57. #define OV5645_TEST_PATTERN_ENABLE BIT(7)
  58. #define OV5645_SDE_SAT_U 0x5583
  59. #define OV5645_SDE_SAT_V 0x5584
  60. /* regulator supplies */
  61. static const char * const ov5645_supply_name[] = {
  62. "vdddo", /* Digital I/O (1.8V) supply */
  63. "vdda", /* Analog (2.8V) supply */
  64. "vddd", /* Digital Core (1.5V) supply */
  65. };
  66. #define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
  67. struct reg_value {
  68. u16 reg;
  69. u8 val;
  70. };
  71. struct ov5645_mode_info {
  72. u32 width;
  73. u32 height;
  74. const struct reg_value *data;
  75. u32 data_size;
  76. u32 pixel_clock;
  77. u32 link_freq;
  78. };
  79. struct ov5645 {
  80. struct i2c_client *i2c_client;
  81. struct device *dev;
  82. struct v4l2_subdev sd;
  83. struct media_pad pad;
  84. struct v4l2_fwnode_endpoint ep;
  85. struct v4l2_mbus_framefmt fmt;
  86. struct v4l2_rect crop;
  87. struct clk *xclk;
  88. struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
  89. const struct ov5645_mode_info *current_mode;
  90. struct v4l2_ctrl_handler ctrls;
  91. struct v4l2_ctrl *pixel_clock;
  92. struct v4l2_ctrl *link_freq;
  93. /* Cached register values */
  94. u8 aec_pk_manual;
  95. u8 timing_tc_reg20;
  96. u8 timing_tc_reg21;
  97. struct mutex power_lock; /* lock to protect power state */
  98. int power_count;
  99. struct gpio_desc *enable_gpio;
  100. struct gpio_desc *rst_gpio;
  101. };
  102. static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
  103. {
  104. return container_of(sd, struct ov5645, sd);
  105. }
  106. static const struct reg_value ov5645_global_init_setting[] = {
  107. { 0x3103, 0x11 },
  108. { 0x3008, 0x82 },
  109. { 0x3008, 0x42 },
  110. { 0x3103, 0x03 },
  111. { 0x3503, 0x07 },
  112. { 0x3002, 0x1c },
  113. { 0x3006, 0xc3 },
  114. { 0x3017, 0x00 },
  115. { 0x3018, 0x00 },
  116. { 0x302e, 0x0b },
  117. { 0x3037, 0x13 },
  118. { 0x3108, 0x01 },
  119. { 0x3611, 0x06 },
  120. { 0x3500, 0x00 },
  121. { 0x3501, 0x01 },
  122. { 0x3502, 0x00 },
  123. { 0x350a, 0x00 },
  124. { 0x350b, 0x3f },
  125. { 0x3620, 0x33 },
  126. { 0x3621, 0xe0 },
  127. { 0x3622, 0x01 },
  128. { 0x3630, 0x2e },
  129. { 0x3631, 0x00 },
  130. { 0x3632, 0x32 },
  131. { 0x3633, 0x52 },
  132. { 0x3634, 0x70 },
  133. { 0x3635, 0x13 },
  134. { 0x3636, 0x03 },
  135. { 0x3703, 0x5a },
  136. { 0x3704, 0xa0 },
  137. { 0x3705, 0x1a },
  138. { 0x3709, 0x12 },
  139. { 0x370b, 0x61 },
  140. { 0x370f, 0x10 },
  141. { 0x3715, 0x78 },
  142. { 0x3717, 0x01 },
  143. { 0x371b, 0x20 },
  144. { 0x3731, 0x12 },
  145. { 0x3901, 0x0a },
  146. { 0x3905, 0x02 },
  147. { 0x3906, 0x10 },
  148. { 0x3719, 0x86 },
  149. { 0x3810, 0x00 },
  150. { 0x3811, 0x10 },
  151. { 0x3812, 0x00 },
  152. { 0x3821, 0x01 },
  153. { 0x3824, 0x01 },
  154. { 0x3826, 0x03 },
  155. { 0x3828, 0x08 },
  156. { 0x3a19, 0xf8 },
  157. { 0x3c01, 0x34 },
  158. { 0x3c04, 0x28 },
  159. { 0x3c05, 0x98 },
  160. { 0x3c07, 0x07 },
  161. { 0x3c09, 0xc2 },
  162. { 0x3c0a, 0x9c },
  163. { 0x3c0b, 0x40 },
  164. { 0x3c01, 0x34 },
  165. { 0x4001, 0x02 },
  166. { 0x4514, 0x00 },
  167. { 0x4520, 0xb0 },
  168. { 0x460b, 0x37 },
  169. { 0x460c, 0x20 },
  170. { 0x4818, 0x01 },
  171. { 0x481d, 0xf0 },
  172. { 0x481f, 0x50 },
  173. { 0x4823, 0x70 },
  174. { 0x4831, 0x14 },
  175. { 0x5000, 0xa7 },
  176. { 0x5001, 0x83 },
  177. { 0x501d, 0x00 },
  178. { 0x501f, 0x00 },
  179. { 0x503d, 0x00 },
  180. { 0x505c, 0x30 },
  181. { 0x5181, 0x59 },
  182. { 0x5183, 0x00 },
  183. { 0x5191, 0xf0 },
  184. { 0x5192, 0x03 },
  185. { 0x5684, 0x10 },
  186. { 0x5685, 0xa0 },
  187. { 0x5686, 0x0c },
  188. { 0x5687, 0x78 },
  189. { 0x5a00, 0x08 },
  190. { 0x5a21, 0x00 },
  191. { 0x5a24, 0x00 },
  192. { 0x3008, 0x02 },
  193. { 0x3503, 0x00 },
  194. { 0x5180, 0xff },
  195. { 0x5181, 0xf2 },
  196. { 0x5182, 0x00 },
  197. { 0x5183, 0x14 },
  198. { 0x5184, 0x25 },
  199. { 0x5185, 0x24 },
  200. { 0x5186, 0x09 },
  201. { 0x5187, 0x09 },
  202. { 0x5188, 0x0a },
  203. { 0x5189, 0x75 },
  204. { 0x518a, 0x52 },
  205. { 0x518b, 0xea },
  206. { 0x518c, 0xa8 },
  207. { 0x518d, 0x42 },
  208. { 0x518e, 0x38 },
  209. { 0x518f, 0x56 },
  210. { 0x5190, 0x42 },
  211. { 0x5191, 0xf8 },
  212. { 0x5192, 0x04 },
  213. { 0x5193, 0x70 },
  214. { 0x5194, 0xf0 },
  215. { 0x5195, 0xf0 },
  216. { 0x5196, 0x03 },
  217. { 0x5197, 0x01 },
  218. { 0x5198, 0x04 },
  219. { 0x5199, 0x12 },
  220. { 0x519a, 0x04 },
  221. { 0x519b, 0x00 },
  222. { 0x519c, 0x06 },
  223. { 0x519d, 0x82 },
  224. { 0x519e, 0x38 },
  225. { 0x5381, 0x1e },
  226. { 0x5382, 0x5b },
  227. { 0x5383, 0x08 },
  228. { 0x5384, 0x0a },
  229. { 0x5385, 0x7e },
  230. { 0x5386, 0x88 },
  231. { 0x5387, 0x7c },
  232. { 0x5388, 0x6c },
  233. { 0x5389, 0x10 },
  234. { 0x538a, 0x01 },
  235. { 0x538b, 0x98 },
  236. { 0x5300, 0x08 },
  237. { 0x5301, 0x30 },
  238. { 0x5302, 0x10 },
  239. { 0x5303, 0x00 },
  240. { 0x5304, 0x08 },
  241. { 0x5305, 0x30 },
  242. { 0x5306, 0x08 },
  243. { 0x5307, 0x16 },
  244. { 0x5309, 0x08 },
  245. { 0x530a, 0x30 },
  246. { 0x530b, 0x04 },
  247. { 0x530c, 0x06 },
  248. { 0x5480, 0x01 },
  249. { 0x5481, 0x08 },
  250. { 0x5482, 0x14 },
  251. { 0x5483, 0x28 },
  252. { 0x5484, 0x51 },
  253. { 0x5485, 0x65 },
  254. { 0x5486, 0x71 },
  255. { 0x5487, 0x7d },
  256. { 0x5488, 0x87 },
  257. { 0x5489, 0x91 },
  258. { 0x548a, 0x9a },
  259. { 0x548b, 0xaa },
  260. { 0x548c, 0xb8 },
  261. { 0x548d, 0xcd },
  262. { 0x548e, 0xdd },
  263. { 0x548f, 0xea },
  264. { 0x5490, 0x1d },
  265. { 0x5580, 0x02 },
  266. { 0x5583, 0x40 },
  267. { 0x5584, 0x10 },
  268. { 0x5589, 0x10 },
  269. { 0x558a, 0x00 },
  270. { 0x558b, 0xf8 },
  271. { 0x5800, 0x3f },
  272. { 0x5801, 0x16 },
  273. { 0x5802, 0x0e },
  274. { 0x5803, 0x0d },
  275. { 0x5804, 0x17 },
  276. { 0x5805, 0x3f },
  277. { 0x5806, 0x0b },
  278. { 0x5807, 0x06 },
  279. { 0x5808, 0x04 },
  280. { 0x5809, 0x04 },
  281. { 0x580a, 0x06 },
  282. { 0x580b, 0x0b },
  283. { 0x580c, 0x09 },
  284. { 0x580d, 0x03 },
  285. { 0x580e, 0x00 },
  286. { 0x580f, 0x00 },
  287. { 0x5810, 0x03 },
  288. { 0x5811, 0x08 },
  289. { 0x5812, 0x0a },
  290. { 0x5813, 0x03 },
  291. { 0x5814, 0x00 },
  292. { 0x5815, 0x00 },
  293. { 0x5816, 0x04 },
  294. { 0x5817, 0x09 },
  295. { 0x5818, 0x0f },
  296. { 0x5819, 0x08 },
  297. { 0x581a, 0x06 },
  298. { 0x581b, 0x06 },
  299. { 0x581c, 0x08 },
  300. { 0x581d, 0x0c },
  301. { 0x581e, 0x3f },
  302. { 0x581f, 0x1e },
  303. { 0x5820, 0x12 },
  304. { 0x5821, 0x13 },
  305. { 0x5822, 0x21 },
  306. { 0x5823, 0x3f },
  307. { 0x5824, 0x68 },
  308. { 0x5825, 0x28 },
  309. { 0x5826, 0x2c },
  310. { 0x5827, 0x28 },
  311. { 0x5828, 0x08 },
  312. { 0x5829, 0x48 },
  313. { 0x582a, 0x64 },
  314. { 0x582b, 0x62 },
  315. { 0x582c, 0x64 },
  316. { 0x582d, 0x28 },
  317. { 0x582e, 0x46 },
  318. { 0x582f, 0x62 },
  319. { 0x5830, 0x60 },
  320. { 0x5831, 0x62 },
  321. { 0x5832, 0x26 },
  322. { 0x5833, 0x48 },
  323. { 0x5834, 0x66 },
  324. { 0x5835, 0x44 },
  325. { 0x5836, 0x64 },
  326. { 0x5837, 0x28 },
  327. { 0x5838, 0x66 },
  328. { 0x5839, 0x48 },
  329. { 0x583a, 0x2c },
  330. { 0x583b, 0x28 },
  331. { 0x583c, 0x26 },
  332. { 0x583d, 0xae },
  333. { 0x5025, 0x00 },
  334. { 0x3a0f, 0x30 },
  335. { 0x3a10, 0x28 },
  336. { 0x3a1b, 0x30 },
  337. { 0x3a1e, 0x26 },
  338. { 0x3a11, 0x60 },
  339. { 0x3a1f, 0x14 },
  340. { 0x0601, 0x02 },
  341. { 0x3008, 0x42 },
  342. { 0x3008, 0x02 },
  343. { OV5645_IO_MIPI_CTRL00, 0x40 },
  344. { OV5645_MIPI_CTRL00, 0x24 },
  345. { OV5645_PAD_OUTPUT00, 0x70 }
  346. };
  347. static const struct reg_value ov5645_setting_sxga[] = {
  348. { 0x3612, 0xa9 },
  349. { 0x3614, 0x50 },
  350. { 0x3618, 0x00 },
  351. { 0x3034, 0x18 },
  352. { 0x3035, 0x21 },
  353. { 0x3036, 0x70 },
  354. { 0x3600, 0x09 },
  355. { 0x3601, 0x43 },
  356. { 0x3708, 0x66 },
  357. { 0x370c, 0xc3 },
  358. { 0x3800, 0x00 },
  359. { 0x3801, 0x00 },
  360. { 0x3802, 0x00 },
  361. { 0x3803, 0x06 },
  362. { 0x3804, 0x0a },
  363. { 0x3805, 0x3f },
  364. { 0x3806, 0x07 },
  365. { 0x3807, 0x9d },
  366. { 0x3808, 0x05 },
  367. { 0x3809, 0x00 },
  368. { 0x380a, 0x03 },
  369. { 0x380b, 0xc0 },
  370. { 0x380c, 0x07 },
  371. { 0x380d, 0x68 },
  372. { 0x380e, 0x03 },
  373. { 0x380f, 0xd8 },
  374. { 0x3813, 0x06 },
  375. { 0x3814, 0x31 },
  376. { 0x3815, 0x31 },
  377. { 0x3820, 0x47 },
  378. { 0x3a02, 0x03 },
  379. { 0x3a03, 0xd8 },
  380. { 0x3a08, 0x01 },
  381. { 0x3a09, 0xf8 },
  382. { 0x3a0a, 0x01 },
  383. { 0x3a0b, 0xa4 },
  384. { 0x3a0e, 0x02 },
  385. { 0x3a0d, 0x02 },
  386. { 0x3a14, 0x03 },
  387. { 0x3a15, 0xd8 },
  388. { 0x3a18, 0x00 },
  389. { 0x4004, 0x02 },
  390. { 0x4005, 0x18 },
  391. { 0x4300, 0x32 },
  392. { 0x4202, 0x00 }
  393. };
  394. static const struct reg_value ov5645_setting_1080p[] = {
  395. { 0x3612, 0xab },
  396. { 0x3614, 0x50 },
  397. { 0x3618, 0x04 },
  398. { 0x3034, 0x18 },
  399. { 0x3035, 0x11 },
  400. { 0x3036, 0x54 },
  401. { 0x3600, 0x08 },
  402. { 0x3601, 0x33 },
  403. { 0x3708, 0x63 },
  404. { 0x370c, 0xc0 },
  405. { 0x3800, 0x01 },
  406. { 0x3801, 0x50 },
  407. { 0x3802, 0x01 },
  408. { 0x3803, 0xb2 },
  409. { 0x3804, 0x08 },
  410. { 0x3805, 0xef },
  411. { 0x3806, 0x05 },
  412. { 0x3807, 0xf1 },
  413. { 0x3808, 0x07 },
  414. { 0x3809, 0x80 },
  415. { 0x380a, 0x04 },
  416. { 0x380b, 0x38 },
  417. { 0x380c, 0x09 },
  418. { 0x380d, 0xc4 },
  419. { 0x380e, 0x04 },
  420. { 0x380f, 0x60 },
  421. { 0x3813, 0x04 },
  422. { 0x3814, 0x11 },
  423. { 0x3815, 0x11 },
  424. { 0x3820, 0x47 },
  425. { 0x4514, 0x88 },
  426. { 0x3a02, 0x04 },
  427. { 0x3a03, 0x60 },
  428. { 0x3a08, 0x01 },
  429. { 0x3a09, 0x50 },
  430. { 0x3a0a, 0x01 },
  431. { 0x3a0b, 0x18 },
  432. { 0x3a0e, 0x03 },
  433. { 0x3a0d, 0x04 },
  434. { 0x3a14, 0x04 },
  435. { 0x3a15, 0x60 },
  436. { 0x3a18, 0x00 },
  437. { 0x4004, 0x06 },
  438. { 0x4005, 0x18 },
  439. { 0x4300, 0x32 },
  440. { 0x4202, 0x00 },
  441. { 0x4837, 0x0b }
  442. };
  443. static const struct reg_value ov5645_setting_full[] = {
  444. { 0x3612, 0xab },
  445. { 0x3614, 0x50 },
  446. { 0x3618, 0x04 },
  447. { 0x3034, 0x18 },
  448. { 0x3035, 0x11 },
  449. { 0x3036, 0x54 },
  450. { 0x3600, 0x08 },
  451. { 0x3601, 0x33 },
  452. { 0x3708, 0x63 },
  453. { 0x370c, 0xc0 },
  454. { 0x3800, 0x00 },
  455. { 0x3801, 0x00 },
  456. { 0x3802, 0x00 },
  457. { 0x3803, 0x00 },
  458. { 0x3804, 0x0a },
  459. { 0x3805, 0x3f },
  460. { 0x3806, 0x07 },
  461. { 0x3807, 0x9f },
  462. { 0x3808, 0x0a },
  463. { 0x3809, 0x20 },
  464. { 0x380a, 0x07 },
  465. { 0x380b, 0x98 },
  466. { 0x380c, 0x0b },
  467. { 0x380d, 0x1c },
  468. { 0x380e, 0x07 },
  469. { 0x380f, 0xb0 },
  470. { 0x3813, 0x06 },
  471. { 0x3814, 0x11 },
  472. { 0x3815, 0x11 },
  473. { 0x3820, 0x47 },
  474. { 0x4514, 0x88 },
  475. { 0x3a02, 0x07 },
  476. { 0x3a03, 0xb0 },
  477. { 0x3a08, 0x01 },
  478. { 0x3a09, 0x27 },
  479. { 0x3a0a, 0x00 },
  480. { 0x3a0b, 0xf6 },
  481. { 0x3a0e, 0x06 },
  482. { 0x3a0d, 0x08 },
  483. { 0x3a14, 0x07 },
  484. { 0x3a15, 0xb0 },
  485. { 0x3a18, 0x01 },
  486. { 0x4004, 0x06 },
  487. { 0x4005, 0x18 },
  488. { 0x4300, 0x32 },
  489. { 0x4837, 0x0b },
  490. { 0x4202, 0x00 }
  491. };
  492. static const s64 link_freq[] = {
  493. 224000000,
  494. 336000000
  495. };
  496. static const struct ov5645_mode_info ov5645_mode_info_data[] = {
  497. {
  498. .width = 1280,
  499. .height = 960,
  500. .data = ov5645_setting_sxga,
  501. .data_size = ARRAY_SIZE(ov5645_setting_sxga),
  502. .pixel_clock = 112000000,
  503. .link_freq = 0 /* an index in link_freq[] */
  504. },
  505. {
  506. .width = 1920,
  507. .height = 1080,
  508. .data = ov5645_setting_1080p,
  509. .data_size = ARRAY_SIZE(ov5645_setting_1080p),
  510. .pixel_clock = 168000000,
  511. .link_freq = 1 /* an index in link_freq[] */
  512. },
  513. {
  514. .width = 2592,
  515. .height = 1944,
  516. .data = ov5645_setting_full,
  517. .data_size = ARRAY_SIZE(ov5645_setting_full),
  518. .pixel_clock = 168000000,
  519. .link_freq = 1 /* an index in link_freq[] */
  520. },
  521. };
  522. static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
  523. {
  524. u8 regbuf[3];
  525. int ret;
  526. regbuf[0] = reg >> 8;
  527. regbuf[1] = reg & 0xff;
  528. regbuf[2] = val;
  529. ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
  530. if (ret < 0) {
  531. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
  532. __func__, ret, reg, val);
  533. return ret;
  534. }
  535. return 0;
  536. }
  537. static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
  538. {
  539. u8 regbuf[2];
  540. int ret;
  541. regbuf[0] = reg >> 8;
  542. regbuf[1] = reg & 0xff;
  543. ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
  544. if (ret < 0) {
  545. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
  546. __func__, ret, reg);
  547. return ret;
  548. }
  549. ret = i2c_master_recv(ov5645->i2c_client, val, 1);
  550. if (ret < 0) {
  551. dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
  552. __func__, ret, reg);
  553. return ret;
  554. }
  555. return 0;
  556. }
  557. static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
  558. {
  559. u8 val = ov5645->aec_pk_manual;
  560. int ret;
  561. if (mode == V4L2_EXPOSURE_AUTO)
  562. val &= ~OV5645_AEC_MANUAL_ENABLE;
  563. else /* V4L2_EXPOSURE_MANUAL */
  564. val |= OV5645_AEC_MANUAL_ENABLE;
  565. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  566. if (!ret)
  567. ov5645->aec_pk_manual = val;
  568. return ret;
  569. }
  570. static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
  571. {
  572. u8 val = ov5645->aec_pk_manual;
  573. int ret;
  574. if (enable)
  575. val &= ~OV5645_AGC_MANUAL_ENABLE;
  576. else
  577. val |= OV5645_AGC_MANUAL_ENABLE;
  578. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  579. if (!ret)
  580. ov5645->aec_pk_manual = val;
  581. return ret;
  582. }
  583. static int ov5645_set_register_array(struct ov5645 *ov5645,
  584. const struct reg_value *settings,
  585. unsigned int num_settings)
  586. {
  587. unsigned int i;
  588. int ret;
  589. for (i = 0; i < num_settings; ++i, ++settings) {
  590. ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
  591. if (ret < 0)
  592. return ret;
  593. }
  594. return 0;
  595. }
  596. static int ov5645_set_power_on(struct ov5645 *ov5645)
  597. {
  598. int ret;
  599. ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
  600. if (ret < 0)
  601. return ret;
  602. ret = clk_prepare_enable(ov5645->xclk);
  603. if (ret < 0) {
  604. dev_err(ov5645->dev, "clk prepare enable failed\n");
  605. regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
  606. return ret;
  607. }
  608. usleep_range(5000, 15000);
  609. gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
  610. usleep_range(1000, 2000);
  611. gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
  612. msleep(20);
  613. return 0;
  614. }
  615. static void ov5645_set_power_off(struct ov5645 *ov5645)
  616. {
  617. gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
  618. gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
  619. clk_disable_unprepare(ov5645->xclk);
  620. regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
  621. }
  622. static int ov5645_s_power(struct v4l2_subdev *sd, int on)
  623. {
  624. struct ov5645 *ov5645 = to_ov5645(sd);
  625. int ret = 0;
  626. mutex_lock(&ov5645->power_lock);
  627. /* If the power count is modified from 0 to != 0 or from != 0 to 0,
  628. * update the power state.
  629. */
  630. if (ov5645->power_count == !on) {
  631. if (on) {
  632. ret = ov5645_set_power_on(ov5645);
  633. if (ret < 0)
  634. goto exit;
  635. ret = ov5645_set_register_array(ov5645,
  636. ov5645_global_init_setting,
  637. ARRAY_SIZE(ov5645_global_init_setting));
  638. if (ret < 0) {
  639. dev_err(ov5645->dev,
  640. "could not set init registers\n");
  641. ov5645_set_power_off(ov5645);
  642. goto exit;
  643. }
  644. usleep_range(500, 1000);
  645. } else {
  646. ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
  647. ov5645_set_power_off(ov5645);
  648. }
  649. }
  650. /* Update the power count. */
  651. ov5645->power_count += on ? 1 : -1;
  652. WARN_ON(ov5645->power_count < 0);
  653. exit:
  654. mutex_unlock(&ov5645->power_lock);
  655. return ret;
  656. }
  657. static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
  658. {
  659. u32 reg_value = (value * 0x10) + 0x40;
  660. int ret;
  661. ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
  662. if (ret < 0)
  663. return ret;
  664. return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
  665. }
  666. static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
  667. {
  668. u8 val = ov5645->timing_tc_reg21;
  669. int ret;
  670. if (value == 0)
  671. val &= ~(OV5645_SENSOR_MIRROR);
  672. else
  673. val |= (OV5645_SENSOR_MIRROR);
  674. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
  675. if (!ret)
  676. ov5645->timing_tc_reg21 = val;
  677. return ret;
  678. }
  679. static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
  680. {
  681. u8 val = ov5645->timing_tc_reg20;
  682. int ret;
  683. if (value == 0)
  684. val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  685. else
  686. val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  687. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
  688. if (!ret)
  689. ov5645->timing_tc_reg20 = val;
  690. return ret;
  691. }
  692. static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
  693. {
  694. u8 val = 0;
  695. if (value) {
  696. val = OV5645_SET_TEST_PATTERN(value - 1);
  697. val |= OV5645_TEST_PATTERN_ENABLE;
  698. }
  699. return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
  700. }
  701. static const char * const ov5645_test_pattern_menu[] = {
  702. "Disabled",
  703. "Vertical Color Bars",
  704. "Pseudo-Random Data",
  705. "Color Square",
  706. "Black Image",
  707. };
  708. static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
  709. {
  710. u8 val = 0;
  711. if (!enable_auto)
  712. val = OV5645_AWB_MANUAL_ENABLE;
  713. return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
  714. }
  715. static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
  716. {
  717. struct ov5645 *ov5645 = container_of(ctrl->handler,
  718. struct ov5645, ctrls);
  719. int ret;
  720. mutex_lock(&ov5645->power_lock);
  721. if (!ov5645->power_count) {
  722. mutex_unlock(&ov5645->power_lock);
  723. return 0;
  724. }
  725. switch (ctrl->id) {
  726. case V4L2_CID_SATURATION:
  727. ret = ov5645_set_saturation(ov5645, ctrl->val);
  728. break;
  729. case V4L2_CID_AUTO_WHITE_BALANCE:
  730. ret = ov5645_set_awb(ov5645, ctrl->val);
  731. break;
  732. case V4L2_CID_AUTOGAIN:
  733. ret = ov5645_set_agc_mode(ov5645, ctrl->val);
  734. break;
  735. case V4L2_CID_EXPOSURE_AUTO:
  736. ret = ov5645_set_aec_mode(ov5645, ctrl->val);
  737. break;
  738. case V4L2_CID_TEST_PATTERN:
  739. ret = ov5645_set_test_pattern(ov5645, ctrl->val);
  740. break;
  741. case V4L2_CID_HFLIP:
  742. ret = ov5645_set_hflip(ov5645, ctrl->val);
  743. break;
  744. case V4L2_CID_VFLIP:
  745. ret = ov5645_set_vflip(ov5645, ctrl->val);
  746. break;
  747. default:
  748. ret = -EINVAL;
  749. break;
  750. }
  751. mutex_unlock(&ov5645->power_lock);
  752. return ret;
  753. }
  754. static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
  755. .s_ctrl = ov5645_s_ctrl,
  756. };
  757. static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
  758. struct v4l2_subdev_state *sd_state,
  759. struct v4l2_subdev_mbus_code_enum *code)
  760. {
  761. if (code->index > 0)
  762. return -EINVAL;
  763. code->code = MEDIA_BUS_FMT_UYVY8_1X16;
  764. return 0;
  765. }
  766. static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
  767. struct v4l2_subdev_state *sd_state,
  768. struct v4l2_subdev_frame_size_enum *fse)
  769. {
  770. if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
  771. return -EINVAL;
  772. if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
  773. return -EINVAL;
  774. fse->min_width = ov5645_mode_info_data[fse->index].width;
  775. fse->max_width = ov5645_mode_info_data[fse->index].width;
  776. fse->min_height = ov5645_mode_info_data[fse->index].height;
  777. fse->max_height = ov5645_mode_info_data[fse->index].height;
  778. return 0;
  779. }
  780. static struct v4l2_mbus_framefmt *
  781. __ov5645_get_pad_format(struct ov5645 *ov5645,
  782. struct v4l2_subdev_state *sd_state,
  783. unsigned int pad,
  784. enum v4l2_subdev_format_whence which)
  785. {
  786. switch (which) {
  787. case V4L2_SUBDEV_FORMAT_TRY:
  788. return v4l2_subdev_get_try_format(&ov5645->sd, sd_state, pad);
  789. case V4L2_SUBDEV_FORMAT_ACTIVE:
  790. return &ov5645->fmt;
  791. default:
  792. return NULL;
  793. }
  794. }
  795. static int ov5645_get_format(struct v4l2_subdev *sd,
  796. struct v4l2_subdev_state *sd_state,
  797. struct v4l2_subdev_format *format)
  798. {
  799. struct ov5645 *ov5645 = to_ov5645(sd);
  800. format->format = *__ov5645_get_pad_format(ov5645, sd_state,
  801. format->pad,
  802. format->which);
  803. return 0;
  804. }
  805. static struct v4l2_rect *
  806. __ov5645_get_pad_crop(struct ov5645 *ov5645,
  807. struct v4l2_subdev_state *sd_state,
  808. unsigned int pad, enum v4l2_subdev_format_whence which)
  809. {
  810. switch (which) {
  811. case V4L2_SUBDEV_FORMAT_TRY:
  812. return v4l2_subdev_get_try_crop(&ov5645->sd, sd_state, pad);
  813. case V4L2_SUBDEV_FORMAT_ACTIVE:
  814. return &ov5645->crop;
  815. default:
  816. return NULL;
  817. }
  818. }
  819. static int ov5645_set_format(struct v4l2_subdev *sd,
  820. struct v4l2_subdev_state *sd_state,
  821. struct v4l2_subdev_format *format)
  822. {
  823. struct ov5645 *ov5645 = to_ov5645(sd);
  824. struct v4l2_mbus_framefmt *__format;
  825. struct v4l2_rect *__crop;
  826. const struct ov5645_mode_info *new_mode;
  827. int ret;
  828. __crop = __ov5645_get_pad_crop(ov5645, sd_state, format->pad,
  829. format->which);
  830. new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
  831. ARRAY_SIZE(ov5645_mode_info_data),
  832. width, height,
  833. format->format.width, format->format.height);
  834. __crop->width = new_mode->width;
  835. __crop->height = new_mode->height;
  836. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  837. ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
  838. new_mode->pixel_clock);
  839. if (ret < 0)
  840. return ret;
  841. ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
  842. new_mode->link_freq);
  843. if (ret < 0)
  844. return ret;
  845. ov5645->current_mode = new_mode;
  846. }
  847. __format = __ov5645_get_pad_format(ov5645, sd_state, format->pad,
  848. format->which);
  849. __format->width = __crop->width;
  850. __format->height = __crop->height;
  851. __format->code = MEDIA_BUS_FMT_UYVY8_1X16;
  852. __format->field = V4L2_FIELD_NONE;
  853. __format->colorspace = V4L2_COLORSPACE_SRGB;
  854. format->format = *__format;
  855. return 0;
  856. }
  857. static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
  858. struct v4l2_subdev_state *sd_state)
  859. {
  860. struct v4l2_subdev_format fmt = { 0 };
  861. fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  862. fmt.format.width = 1920;
  863. fmt.format.height = 1080;
  864. ov5645_set_format(subdev, sd_state, &fmt);
  865. return 0;
  866. }
  867. static int ov5645_get_selection(struct v4l2_subdev *sd,
  868. struct v4l2_subdev_state *sd_state,
  869. struct v4l2_subdev_selection *sel)
  870. {
  871. struct ov5645 *ov5645 = to_ov5645(sd);
  872. if (sel->target != V4L2_SEL_TGT_CROP)
  873. return -EINVAL;
  874. sel->r = *__ov5645_get_pad_crop(ov5645, sd_state, sel->pad,
  875. sel->which);
  876. return 0;
  877. }
  878. static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
  879. {
  880. struct ov5645 *ov5645 = to_ov5645(subdev);
  881. int ret;
  882. if (enable) {
  883. ret = ov5645_set_register_array(ov5645,
  884. ov5645->current_mode->data,
  885. ov5645->current_mode->data_size);
  886. if (ret < 0) {
  887. dev_err(ov5645->dev, "could not set mode %dx%d\n",
  888. ov5645->current_mode->width,
  889. ov5645->current_mode->height);
  890. return ret;
  891. }
  892. ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
  893. if (ret < 0) {
  894. dev_err(ov5645->dev, "could not sync v4l2 controls\n");
  895. return ret;
  896. }
  897. ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
  898. if (ret < 0)
  899. return ret;
  900. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  901. OV5645_SYSTEM_CTRL0_START);
  902. if (ret < 0)
  903. return ret;
  904. } else {
  905. ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
  906. if (ret < 0)
  907. return ret;
  908. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  909. OV5645_SYSTEM_CTRL0_STOP);
  910. if (ret < 0)
  911. return ret;
  912. }
  913. return 0;
  914. }
  915. static const struct v4l2_subdev_core_ops ov5645_core_ops = {
  916. .s_power = ov5645_s_power,
  917. };
  918. static const struct v4l2_subdev_video_ops ov5645_video_ops = {
  919. .s_stream = ov5645_s_stream,
  920. };
  921. static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
  922. .init_cfg = ov5645_entity_init_cfg,
  923. .enum_mbus_code = ov5645_enum_mbus_code,
  924. .enum_frame_size = ov5645_enum_frame_size,
  925. .get_fmt = ov5645_get_format,
  926. .set_fmt = ov5645_set_format,
  927. .get_selection = ov5645_get_selection,
  928. };
  929. static const struct v4l2_subdev_ops ov5645_subdev_ops = {
  930. .core = &ov5645_core_ops,
  931. .video = &ov5645_video_ops,
  932. .pad = &ov5645_subdev_pad_ops,
  933. };
  934. static int ov5645_probe(struct i2c_client *client)
  935. {
  936. struct device *dev = &client->dev;
  937. struct device_node *endpoint;
  938. struct ov5645 *ov5645;
  939. u8 chip_id_high, chip_id_low;
  940. unsigned int i;
  941. u32 xclk_freq;
  942. int ret;
  943. ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
  944. if (!ov5645)
  945. return -ENOMEM;
  946. ov5645->i2c_client = client;
  947. ov5645->dev = dev;
  948. endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
  949. if (!endpoint) {
  950. dev_err(dev, "endpoint node not found\n");
  951. return -EINVAL;
  952. }
  953. ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
  954. &ov5645->ep);
  955. of_node_put(endpoint);
  956. if (ret < 0) {
  957. dev_err(dev, "parsing endpoint node failed\n");
  958. return ret;
  959. }
  960. if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
  961. dev_err(dev, "invalid bus type, must be CSI2\n");
  962. return -EINVAL;
  963. }
  964. /* get system clock (xclk) */
  965. ov5645->xclk = devm_clk_get(dev, "xclk");
  966. if (IS_ERR(ov5645->xclk)) {
  967. dev_err(dev, "could not get xclk");
  968. return PTR_ERR(ov5645->xclk);
  969. }
  970. ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
  971. if (ret) {
  972. dev_err(dev, "could not get xclk frequency\n");
  973. return ret;
  974. }
  975. /* external clock must be 24MHz, allow 1% tolerance */
  976. if (xclk_freq < 23760000 || xclk_freq > 24240000) {
  977. dev_err(dev, "external clock frequency %u is not supported\n",
  978. xclk_freq);
  979. return -EINVAL;
  980. }
  981. ret = clk_set_rate(ov5645->xclk, xclk_freq);
  982. if (ret) {
  983. dev_err(dev, "could not set xclk frequency\n");
  984. return ret;
  985. }
  986. for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
  987. ov5645->supplies[i].supply = ov5645_supply_name[i];
  988. ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
  989. ov5645->supplies);
  990. if (ret < 0)
  991. return ret;
  992. ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
  993. if (IS_ERR(ov5645->enable_gpio)) {
  994. dev_err(dev, "cannot get enable gpio\n");
  995. return PTR_ERR(ov5645->enable_gpio);
  996. }
  997. ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  998. if (IS_ERR(ov5645->rst_gpio)) {
  999. dev_err(dev, "cannot get reset gpio\n");
  1000. return PTR_ERR(ov5645->rst_gpio);
  1001. }
  1002. mutex_init(&ov5645->power_lock);
  1003. v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
  1004. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1005. V4L2_CID_SATURATION, -4, 4, 1, 0);
  1006. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1007. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1008. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1009. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1010. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1011. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  1012. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1013. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  1014. v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
  1015. V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
  1016. 0, V4L2_EXPOSURE_AUTO);
  1017. v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
  1018. V4L2_CID_TEST_PATTERN,
  1019. ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
  1020. 0, 0, ov5645_test_pattern_menu);
  1021. ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
  1022. &ov5645_ctrl_ops,
  1023. V4L2_CID_PIXEL_RATE,
  1024. 1, INT_MAX, 1, 1);
  1025. ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
  1026. &ov5645_ctrl_ops,
  1027. V4L2_CID_LINK_FREQ,
  1028. ARRAY_SIZE(link_freq) - 1,
  1029. 0, link_freq);
  1030. if (ov5645->link_freq)
  1031. ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1032. ov5645->sd.ctrl_handler = &ov5645->ctrls;
  1033. if (ov5645->ctrls.error) {
  1034. dev_err(dev, "%s: control initialization error %d\n",
  1035. __func__, ov5645->ctrls.error);
  1036. ret = ov5645->ctrls.error;
  1037. goto free_ctrl;
  1038. }
  1039. v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
  1040. ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1041. ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
  1042. ov5645->sd.dev = &client->dev;
  1043. ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1044. ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
  1045. if (ret < 0) {
  1046. dev_err(dev, "could not register media entity\n");
  1047. goto free_ctrl;
  1048. }
  1049. ret = ov5645_s_power(&ov5645->sd, true);
  1050. if (ret < 0) {
  1051. dev_err(dev, "could not power up OV5645\n");
  1052. goto free_entity;
  1053. }
  1054. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
  1055. if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
  1056. dev_err(dev, "could not read ID high\n");
  1057. ret = -ENODEV;
  1058. goto power_down;
  1059. }
  1060. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
  1061. if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
  1062. dev_err(dev, "could not read ID low\n");
  1063. ret = -ENODEV;
  1064. goto power_down;
  1065. }
  1066. dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
  1067. ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
  1068. &ov5645->aec_pk_manual);
  1069. if (ret < 0) {
  1070. dev_err(dev, "could not read AEC/AGC mode\n");
  1071. ret = -ENODEV;
  1072. goto power_down;
  1073. }
  1074. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
  1075. &ov5645->timing_tc_reg20);
  1076. if (ret < 0) {
  1077. dev_err(dev, "could not read vflip value\n");
  1078. ret = -ENODEV;
  1079. goto power_down;
  1080. }
  1081. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
  1082. &ov5645->timing_tc_reg21);
  1083. if (ret < 0) {
  1084. dev_err(dev, "could not read hflip value\n");
  1085. ret = -ENODEV;
  1086. goto power_down;
  1087. }
  1088. ov5645_s_power(&ov5645->sd, false);
  1089. ret = v4l2_async_register_subdev(&ov5645->sd);
  1090. if (ret < 0) {
  1091. dev_err(dev, "could not register v4l2 device\n");
  1092. goto free_entity;
  1093. }
  1094. ov5645_entity_init_cfg(&ov5645->sd, NULL);
  1095. return 0;
  1096. power_down:
  1097. ov5645_s_power(&ov5645->sd, false);
  1098. free_entity:
  1099. media_entity_cleanup(&ov5645->sd.entity);
  1100. free_ctrl:
  1101. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1102. mutex_destroy(&ov5645->power_lock);
  1103. return ret;
  1104. }
  1105. static void ov5645_remove(struct i2c_client *client)
  1106. {
  1107. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1108. struct ov5645 *ov5645 = to_ov5645(sd);
  1109. v4l2_async_unregister_subdev(&ov5645->sd);
  1110. media_entity_cleanup(&ov5645->sd.entity);
  1111. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1112. mutex_destroy(&ov5645->power_lock);
  1113. }
  1114. static const struct i2c_device_id ov5645_id[] = {
  1115. { "ov5645", 0 },
  1116. {}
  1117. };
  1118. MODULE_DEVICE_TABLE(i2c, ov5645_id);
  1119. static const struct of_device_id ov5645_of_match[] = {
  1120. { .compatible = "ovti,ov5645" },
  1121. { /* sentinel */ }
  1122. };
  1123. MODULE_DEVICE_TABLE(of, ov5645_of_match);
  1124. static struct i2c_driver ov5645_i2c_driver = {
  1125. .driver = {
  1126. .of_match_table = ov5645_of_match,
  1127. .name = "ov5645",
  1128. },
  1129. .probe_new = ov5645_probe,
  1130. .remove = ov5645_remove,
  1131. .id_table = ov5645_id,
  1132. };
  1133. module_i2c_driver(ov5645_i2c_driver);
  1134. MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
  1135. MODULE_AUTHOR("Todor Tomov <[email protected]>");
  1136. MODULE_LICENSE("GPL v2");