hi556.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2019 Intel Corporation.
  3. #include <asm/unaligned.h>
  4. #include <linux/acpi.h>
  5. #include <linux/delay.h>
  6. #include <linux/i2c.h>
  7. #include <linux/module.h>
  8. #include <linux/pm_runtime.h>
  9. #include <media/v4l2-ctrls.h>
  10. #include <media/v4l2-device.h>
  11. #include <media/v4l2-fwnode.h>
  12. #define HI556_REG_VALUE_08BIT 1
  13. #define HI556_REG_VALUE_16BIT 2
  14. #define HI556_REG_VALUE_24BIT 3
  15. #define HI556_LINK_FREQ_437MHZ 437000000ULL
  16. #define HI556_MCLK 19200000
  17. #define HI556_DATA_LANES 2
  18. #define HI556_RGB_DEPTH 10
  19. #define HI556_REG_CHIP_ID 0x0f16
  20. #define HI556_CHIP_ID 0x0556
  21. #define HI556_REG_MODE_SELECT 0x0a00
  22. #define HI556_MODE_STANDBY 0x0000
  23. #define HI556_MODE_STREAMING 0x0100
  24. /* vertical-timings from sensor */
  25. #define HI556_REG_FLL 0x0006
  26. #define HI556_FLL_30FPS 0x0814
  27. #define HI556_FLL_30FPS_MIN 0x0814
  28. #define HI556_FLL_MAX 0x7fff
  29. /* horizontal-timings from sensor */
  30. #define HI556_REG_LLP 0x0008
  31. /* Exposure controls from sensor */
  32. #define HI556_REG_EXPOSURE 0x0074
  33. #define HI556_EXPOSURE_MIN 6
  34. #define HI556_EXPOSURE_MAX_MARGIN 2
  35. #define HI556_EXPOSURE_STEP 1
  36. /* Analog gain controls from sensor */
  37. #define HI556_REG_ANALOG_GAIN 0x0077
  38. #define HI556_ANAL_GAIN_MIN 0
  39. #define HI556_ANAL_GAIN_MAX 240
  40. #define HI556_ANAL_GAIN_STEP 1
  41. /* Digital gain controls from sensor */
  42. #define HI556_REG_MWB_GR_GAIN 0x0078
  43. #define HI556_REG_MWB_GB_GAIN 0x007a
  44. #define HI556_REG_MWB_R_GAIN 0x007c
  45. #define HI556_REG_MWB_B_GAIN 0x007e
  46. #define HI556_DGTL_GAIN_MIN 0
  47. #define HI556_DGTL_GAIN_MAX 2048
  48. #define HI556_DGTL_GAIN_STEP 1
  49. #define HI556_DGTL_GAIN_DEFAULT 256
  50. /* Test Pattern Control */
  51. #define HI556_REG_ISP 0X0a05
  52. #define HI556_REG_ISP_TPG_EN 0x01
  53. #define HI556_REG_TEST_PATTERN 0x0201
  54. enum {
  55. HI556_LINK_FREQ_437MHZ_INDEX,
  56. };
  57. struct hi556_reg {
  58. u16 address;
  59. u16 val;
  60. };
  61. struct hi556_reg_list {
  62. u32 num_of_regs;
  63. const struct hi556_reg *regs;
  64. };
  65. struct hi556_link_freq_config {
  66. const struct hi556_reg_list reg_list;
  67. };
  68. struct hi556_mode {
  69. /* Frame width in pixels */
  70. u32 width;
  71. /* Frame height in pixels */
  72. u32 height;
  73. /* Horizontal timining size */
  74. u32 llp;
  75. /* Default vertical timining size */
  76. u32 fll_def;
  77. /* Min vertical timining size */
  78. u32 fll_min;
  79. /* Link frequency needed for this resolution */
  80. u32 link_freq_index;
  81. /* Sensor register settings for this resolution */
  82. const struct hi556_reg_list reg_list;
  83. };
  84. #define to_hi556(_sd) container_of(_sd, struct hi556, sd)
  85. //SENSOR_INITIALIZATION
  86. static const struct hi556_reg mipi_data_rate_874mbps[] = {
  87. {0x0e00, 0x0102},
  88. {0x0e02, 0x0102},
  89. {0x0e0c, 0x0100},
  90. {0x2000, 0x7400},
  91. {0x2002, 0x001c},
  92. {0x2004, 0x0242},
  93. {0x2006, 0x0942},
  94. {0x2008, 0x7007},
  95. {0x200a, 0x0fd9},
  96. {0x200c, 0x0259},
  97. {0x200e, 0x7008},
  98. {0x2010, 0x160e},
  99. {0x2012, 0x0047},
  100. {0x2014, 0x2118},
  101. {0x2016, 0x0041},
  102. {0x2018, 0x00d8},
  103. {0x201a, 0x0145},
  104. {0x201c, 0x0006},
  105. {0x201e, 0x0181},
  106. {0x2020, 0x13cc},
  107. {0x2022, 0x2057},
  108. {0x2024, 0x7001},
  109. {0x2026, 0x0fca},
  110. {0x2028, 0x00cb},
  111. {0x202a, 0x009f},
  112. {0x202c, 0x7002},
  113. {0x202e, 0x13cc},
  114. {0x2030, 0x019b},
  115. {0x2032, 0x014d},
  116. {0x2034, 0x2987},
  117. {0x2036, 0x2766},
  118. {0x2038, 0x0020},
  119. {0x203a, 0x2060},
  120. {0x203c, 0x0e5d},
  121. {0x203e, 0x181d},
  122. {0x2040, 0x2066},
  123. {0x2042, 0x20c4},
  124. {0x2044, 0x5000},
  125. {0x2046, 0x0005},
  126. {0x2048, 0x0000},
  127. {0x204a, 0x01db},
  128. {0x204c, 0x025a},
  129. {0x204e, 0x00c0},
  130. {0x2050, 0x0005},
  131. {0x2052, 0x0006},
  132. {0x2054, 0x0ad9},
  133. {0x2056, 0x0259},
  134. {0x2058, 0x0618},
  135. {0x205a, 0x0258},
  136. {0x205c, 0x2266},
  137. {0x205e, 0x20c8},
  138. {0x2060, 0x2060},
  139. {0x2062, 0x707b},
  140. {0x2064, 0x0fdd},
  141. {0x2066, 0x81b8},
  142. {0x2068, 0x5040},
  143. {0x206a, 0x0020},
  144. {0x206c, 0x5060},
  145. {0x206e, 0x3143},
  146. {0x2070, 0x5081},
  147. {0x2072, 0x025c},
  148. {0x2074, 0x7800},
  149. {0x2076, 0x7400},
  150. {0x2078, 0x001c},
  151. {0x207a, 0x0242},
  152. {0x207c, 0x0942},
  153. {0x207e, 0x0bd9},
  154. {0x2080, 0x0259},
  155. {0x2082, 0x7008},
  156. {0x2084, 0x160e},
  157. {0x2086, 0x0047},
  158. {0x2088, 0x2118},
  159. {0x208a, 0x0041},
  160. {0x208c, 0x00d8},
  161. {0x208e, 0x0145},
  162. {0x2090, 0x0006},
  163. {0x2092, 0x0181},
  164. {0x2094, 0x13cc},
  165. {0x2096, 0x2057},
  166. {0x2098, 0x7001},
  167. {0x209a, 0x0fca},
  168. {0x209c, 0x00cb},
  169. {0x209e, 0x009f},
  170. {0x20a0, 0x7002},
  171. {0x20a2, 0x13cc},
  172. {0x20a4, 0x019b},
  173. {0x20a6, 0x014d},
  174. {0x20a8, 0x2987},
  175. {0x20aa, 0x2766},
  176. {0x20ac, 0x0020},
  177. {0x20ae, 0x2060},
  178. {0x20b0, 0x0e5d},
  179. {0x20b2, 0x181d},
  180. {0x20b4, 0x2066},
  181. {0x20b6, 0x20c4},
  182. {0x20b8, 0x50a0},
  183. {0x20ba, 0x0005},
  184. {0x20bc, 0x0000},
  185. {0x20be, 0x01db},
  186. {0x20c0, 0x025a},
  187. {0x20c2, 0x00c0},
  188. {0x20c4, 0x0005},
  189. {0x20c6, 0x0006},
  190. {0x20c8, 0x0ad9},
  191. {0x20ca, 0x0259},
  192. {0x20cc, 0x0618},
  193. {0x20ce, 0x0258},
  194. {0x20d0, 0x2266},
  195. {0x20d2, 0x20c8},
  196. {0x20d4, 0x2060},
  197. {0x20d6, 0x707b},
  198. {0x20d8, 0x0fdd},
  199. {0x20da, 0x86b8},
  200. {0x20dc, 0x50e0},
  201. {0x20de, 0x0020},
  202. {0x20e0, 0x5100},
  203. {0x20e2, 0x3143},
  204. {0x20e4, 0x5121},
  205. {0x20e6, 0x7800},
  206. {0x20e8, 0x3140},
  207. {0x20ea, 0x01c4},
  208. {0x20ec, 0x01c1},
  209. {0x20ee, 0x01c0},
  210. {0x20f0, 0x01c4},
  211. {0x20f2, 0x2700},
  212. {0x20f4, 0x3d40},
  213. {0x20f6, 0x7800},
  214. {0x20f8, 0xffff},
  215. {0x27fe, 0xe000},
  216. {0x3000, 0x60f8},
  217. {0x3002, 0x187f},
  218. {0x3004, 0x7060},
  219. {0x3006, 0x0114},
  220. {0x3008, 0x60b0},
  221. {0x300a, 0x1473},
  222. {0x300c, 0x0013},
  223. {0x300e, 0x140f},
  224. {0x3010, 0x0040},
  225. {0x3012, 0x100f},
  226. {0x3014, 0x60f8},
  227. {0x3016, 0x187f},
  228. {0x3018, 0x7060},
  229. {0x301a, 0x0114},
  230. {0x301c, 0x60b0},
  231. {0x301e, 0x1473},
  232. {0x3020, 0x0013},
  233. {0x3022, 0x140f},
  234. {0x3024, 0x0040},
  235. {0x3026, 0x000f},
  236. {0x0b00, 0x0000},
  237. {0x0b02, 0x0045},
  238. {0x0b04, 0xb405},
  239. {0x0b06, 0xc403},
  240. {0x0b08, 0x0081},
  241. {0x0b0a, 0x8252},
  242. {0x0b0c, 0xf814},
  243. {0x0b0e, 0xc618},
  244. {0x0b10, 0xa828},
  245. {0x0b12, 0x004c},
  246. {0x0b14, 0x4068},
  247. {0x0b16, 0x0000},
  248. {0x0f30, 0x5b15},
  249. {0x0f32, 0x7067},
  250. {0x0954, 0x0009},
  251. {0x0956, 0x0000},
  252. {0x0958, 0xbb80},
  253. {0x095a, 0x5140},
  254. {0x0c00, 0x1110},
  255. {0x0c02, 0x0011},
  256. {0x0c04, 0x0000},
  257. {0x0c06, 0x0200},
  258. {0x0c10, 0x0040},
  259. {0x0c12, 0x0040},
  260. {0x0c14, 0x0040},
  261. {0x0c16, 0x0040},
  262. {0x0a10, 0x4000},
  263. {0x3068, 0xf800},
  264. {0x306a, 0xf876},
  265. {0x006c, 0x0000},
  266. {0x005e, 0x0200},
  267. {0x000e, 0x0100},
  268. {0x0e0a, 0x0001},
  269. {0x004a, 0x0100},
  270. {0x004c, 0x0000},
  271. {0x004e, 0x0100},
  272. {0x000c, 0x0022},
  273. {0x0008, 0x0b00},
  274. {0x005a, 0x0202},
  275. {0x0012, 0x000e},
  276. {0x0018, 0x0a33},
  277. {0x0022, 0x0008},
  278. {0x0028, 0x0017},
  279. {0x0024, 0x0028},
  280. {0x002a, 0x002d},
  281. {0x0026, 0x0030},
  282. {0x002c, 0x07c9},
  283. {0x002e, 0x1111},
  284. {0x0030, 0x1111},
  285. {0x0032, 0x1111},
  286. {0x0006, 0x07bc},
  287. {0x0a22, 0x0000},
  288. {0x0a12, 0x0a20},
  289. {0x0a14, 0x0798},
  290. {0x003e, 0x0000},
  291. {0x0074, 0x080e},
  292. {0x0070, 0x0407},
  293. {0x0002, 0x0000},
  294. {0x0a02, 0x0100},
  295. {0x0a24, 0x0100},
  296. {0x0046, 0x0000},
  297. {0x0076, 0x0000},
  298. {0x0060, 0x0000},
  299. {0x0062, 0x0530},
  300. {0x0064, 0x0500},
  301. {0x0066, 0x0530},
  302. {0x0068, 0x0500},
  303. {0x0122, 0x0300},
  304. {0x015a, 0xff08},
  305. {0x0804, 0x0300},
  306. {0x0806, 0x0100},
  307. {0x005c, 0x0102},
  308. {0x0a1a, 0x0800},
  309. };
  310. static const struct hi556_reg mode_2592x1944_regs[] = {
  311. {0x0a00, 0x0000},
  312. {0x0b0a, 0x8252},
  313. {0x0f30, 0x5b15},
  314. {0x0f32, 0x7067},
  315. {0x004a, 0x0100},
  316. {0x004c, 0x0000},
  317. {0x004e, 0x0100},
  318. {0x000c, 0x0022},
  319. {0x0008, 0x0b00},
  320. {0x005a, 0x0202},
  321. {0x0012, 0x000e},
  322. {0x0018, 0x0a33},
  323. {0x0022, 0x0008},
  324. {0x0028, 0x0017},
  325. {0x0024, 0x0028},
  326. {0x002a, 0x002d},
  327. {0x0026, 0x0030},
  328. {0x002c, 0x07c9},
  329. {0x002e, 0x1111},
  330. {0x0030, 0x1111},
  331. {0x0032, 0x1111},
  332. {0x0006, 0x0814},
  333. {0x0a22, 0x0000},
  334. {0x0a12, 0x0a20},
  335. {0x0a14, 0x0798},
  336. {0x003e, 0x0000},
  337. {0x0074, 0x0812},
  338. {0x0070, 0x0409},
  339. {0x0804, 0x0300},
  340. {0x0806, 0x0100},
  341. {0x0a04, 0x014a},
  342. {0x090c, 0x0fdc},
  343. {0x090e, 0x002d},
  344. {0x0902, 0x4319},
  345. {0x0914, 0xc10a},
  346. {0x0916, 0x071f},
  347. {0x0918, 0x0408},
  348. {0x091a, 0x0c0d},
  349. {0x091c, 0x0f09},
  350. {0x091e, 0x0a00},
  351. {0x0958, 0xbb80},
  352. };
  353. static const struct hi556_reg mode_1296x972_regs[] = {
  354. {0x0a00, 0x0000},
  355. {0x0b0a, 0x8259},
  356. {0x0f30, 0x5b15},
  357. {0x0f32, 0x7167},
  358. {0x004a, 0x0100},
  359. {0x004c, 0x0000},
  360. {0x004e, 0x0100},
  361. {0x000c, 0x0122},
  362. {0x0008, 0x0b00},
  363. {0x005a, 0x0404},
  364. {0x0012, 0x000c},
  365. {0x0018, 0x0a33},
  366. {0x0022, 0x0008},
  367. {0x0028, 0x0017},
  368. {0x0024, 0x0022},
  369. {0x002a, 0x002b},
  370. {0x0026, 0x0030},
  371. {0x002c, 0x07c9},
  372. {0x002e, 0x3311},
  373. {0x0030, 0x3311},
  374. {0x0032, 0x3311},
  375. {0x0006, 0x0814},
  376. {0x0a22, 0x0000},
  377. {0x0a12, 0x0510},
  378. {0x0a14, 0x03cc},
  379. {0x003e, 0x0000},
  380. {0x0074, 0x0812},
  381. {0x0070, 0x0409},
  382. {0x0804, 0x0308},
  383. {0x0806, 0x0100},
  384. {0x0a04, 0x016a},
  385. {0x090e, 0x0010},
  386. {0x090c, 0x09c0},
  387. {0x0902, 0x4319},
  388. {0x0914, 0xc106},
  389. {0x0916, 0x040e},
  390. {0x0918, 0x0304},
  391. {0x091a, 0x0708},
  392. {0x091c, 0x0e06},
  393. {0x091e, 0x0300},
  394. {0x0958, 0xbb80},
  395. };
  396. static const char * const hi556_test_pattern_menu[] = {
  397. "Disabled",
  398. "Solid Colour",
  399. "100% Colour Bars",
  400. "Fade To Grey Colour Bars",
  401. "PN9",
  402. "Gradient Horizontal",
  403. "Gradient Vertical",
  404. "Check Board",
  405. "Slant Pattern",
  406. };
  407. static const s64 link_freq_menu_items[] = {
  408. HI556_LINK_FREQ_437MHZ,
  409. };
  410. static const struct hi556_link_freq_config link_freq_configs[] = {
  411. [HI556_LINK_FREQ_437MHZ_INDEX] = {
  412. .reg_list = {
  413. .num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps),
  414. .regs = mipi_data_rate_874mbps,
  415. }
  416. }
  417. };
  418. static const struct hi556_mode supported_modes[] = {
  419. {
  420. .width = 2592,
  421. .height = 1944,
  422. .fll_def = HI556_FLL_30FPS,
  423. .fll_min = HI556_FLL_30FPS_MIN,
  424. .llp = 0x0b00,
  425. .reg_list = {
  426. .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
  427. .regs = mode_2592x1944_regs,
  428. },
  429. .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
  430. },
  431. {
  432. .width = 1296,
  433. .height = 972,
  434. .fll_def = HI556_FLL_30FPS,
  435. .fll_min = HI556_FLL_30FPS_MIN,
  436. .llp = 0x0b00,
  437. .reg_list = {
  438. .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
  439. .regs = mode_1296x972_regs,
  440. },
  441. .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
  442. }
  443. };
  444. struct hi556 {
  445. struct v4l2_subdev sd;
  446. struct media_pad pad;
  447. struct v4l2_ctrl_handler ctrl_handler;
  448. /* V4L2 Controls */
  449. struct v4l2_ctrl *link_freq;
  450. struct v4l2_ctrl *pixel_rate;
  451. struct v4l2_ctrl *vblank;
  452. struct v4l2_ctrl *hblank;
  453. struct v4l2_ctrl *exposure;
  454. /* Current mode */
  455. const struct hi556_mode *cur_mode;
  456. /* To serialize asynchronus callbacks */
  457. struct mutex mutex;
  458. /* Streaming on/off */
  459. bool streaming;
  460. /* True if the device has been identified */
  461. bool identified;
  462. };
  463. static u64 to_pixel_rate(u32 f_index)
  464. {
  465. u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES;
  466. do_div(pixel_rate, HI556_RGB_DEPTH);
  467. return pixel_rate;
  468. }
  469. static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val)
  470. {
  471. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  472. struct i2c_msg msgs[2];
  473. u8 addr_buf[2];
  474. u8 data_buf[4] = {0};
  475. int ret;
  476. if (len > 4)
  477. return -EINVAL;
  478. put_unaligned_be16(reg, addr_buf);
  479. msgs[0].addr = client->addr;
  480. msgs[0].flags = 0;
  481. msgs[0].len = sizeof(addr_buf);
  482. msgs[0].buf = addr_buf;
  483. msgs[1].addr = client->addr;
  484. msgs[1].flags = I2C_M_RD;
  485. msgs[1].len = len;
  486. msgs[1].buf = &data_buf[4 - len];
  487. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  488. if (ret != ARRAY_SIZE(msgs))
  489. return -EIO;
  490. *val = get_unaligned_be32(data_buf);
  491. return 0;
  492. }
  493. static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val)
  494. {
  495. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  496. u8 buf[6];
  497. if (len > 4)
  498. return -EINVAL;
  499. put_unaligned_be16(reg, buf);
  500. put_unaligned_be32(val << 8 * (4 - len), buf + 2);
  501. if (i2c_master_send(client, buf, len + 2) != len + 2)
  502. return -EIO;
  503. return 0;
  504. }
  505. static int hi556_write_reg_list(struct hi556 *hi556,
  506. const struct hi556_reg_list *r_list)
  507. {
  508. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  509. unsigned int i;
  510. int ret;
  511. for (i = 0; i < r_list->num_of_regs; i++) {
  512. ret = hi556_write_reg(hi556, r_list->regs[i].address,
  513. HI556_REG_VALUE_16BIT,
  514. r_list->regs[i].val);
  515. if (ret) {
  516. dev_err_ratelimited(&client->dev,
  517. "failed to write reg 0x%4.4x. error = %d",
  518. r_list->regs[i].address, ret);
  519. return ret;
  520. }
  521. }
  522. return 0;
  523. }
  524. static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain)
  525. {
  526. int ret;
  527. ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN,
  528. HI556_REG_VALUE_16BIT, d_gain);
  529. if (ret)
  530. return ret;
  531. ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN,
  532. HI556_REG_VALUE_16BIT, d_gain);
  533. if (ret)
  534. return ret;
  535. ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN,
  536. HI556_REG_VALUE_16BIT, d_gain);
  537. if (ret)
  538. return ret;
  539. return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN,
  540. HI556_REG_VALUE_16BIT, d_gain);
  541. }
  542. static int hi556_test_pattern(struct hi556 *hi556, u32 pattern)
  543. {
  544. int ret;
  545. u32 val;
  546. if (pattern) {
  547. ret = hi556_read_reg(hi556, HI556_REG_ISP,
  548. HI556_REG_VALUE_08BIT, &val);
  549. if (ret)
  550. return ret;
  551. ret = hi556_write_reg(hi556, HI556_REG_ISP,
  552. HI556_REG_VALUE_08BIT,
  553. val | HI556_REG_ISP_TPG_EN);
  554. if (ret)
  555. return ret;
  556. }
  557. return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN,
  558. HI556_REG_VALUE_08BIT, pattern);
  559. }
  560. static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
  561. {
  562. struct hi556 *hi556 = container_of(ctrl->handler,
  563. struct hi556, ctrl_handler);
  564. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  565. s64 exposure_max;
  566. int ret = 0;
  567. /* Propagate change of current control to all related controls */
  568. if (ctrl->id == V4L2_CID_VBLANK) {
  569. /* Update max exposure while meeting expected vblanking */
  570. exposure_max = hi556->cur_mode->height + ctrl->val -
  571. HI556_EXPOSURE_MAX_MARGIN;
  572. __v4l2_ctrl_modify_range(hi556->exposure,
  573. hi556->exposure->minimum,
  574. exposure_max, hi556->exposure->step,
  575. exposure_max);
  576. }
  577. /* V4L2 controls values will be applied only when power is already up */
  578. if (!pm_runtime_get_if_in_use(&client->dev))
  579. return 0;
  580. switch (ctrl->id) {
  581. case V4L2_CID_ANALOGUE_GAIN:
  582. ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN,
  583. HI556_REG_VALUE_16BIT, ctrl->val);
  584. break;
  585. case V4L2_CID_DIGITAL_GAIN:
  586. ret = hi556_update_digital_gain(hi556, ctrl->val);
  587. break;
  588. case V4L2_CID_EXPOSURE:
  589. ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE,
  590. HI556_REG_VALUE_16BIT, ctrl->val);
  591. break;
  592. case V4L2_CID_VBLANK:
  593. /* Update FLL that meets expected vertical blanking */
  594. ret = hi556_write_reg(hi556, HI556_REG_FLL,
  595. HI556_REG_VALUE_16BIT,
  596. hi556->cur_mode->height + ctrl->val);
  597. break;
  598. case V4L2_CID_TEST_PATTERN:
  599. ret = hi556_test_pattern(hi556, ctrl->val);
  600. break;
  601. default:
  602. ret = -EINVAL;
  603. break;
  604. }
  605. pm_runtime_put(&client->dev);
  606. return ret;
  607. }
  608. static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
  609. .s_ctrl = hi556_set_ctrl,
  610. };
  611. static int hi556_init_controls(struct hi556 *hi556)
  612. {
  613. struct v4l2_ctrl_handler *ctrl_hdlr;
  614. s64 exposure_max, h_blank;
  615. int ret;
  616. ctrl_hdlr = &hi556->ctrl_handler;
  617. ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
  618. if (ret)
  619. return ret;
  620. ctrl_hdlr->lock = &hi556->mutex;
  621. hi556->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi556_ctrl_ops,
  622. V4L2_CID_LINK_FREQ,
  623. ARRAY_SIZE(link_freq_menu_items) - 1,
  624. 0, link_freq_menu_items);
  625. if (hi556->link_freq)
  626. hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  627. hi556->pixel_rate = v4l2_ctrl_new_std
  628. (ctrl_hdlr, &hi556_ctrl_ops,
  629. V4L2_CID_PIXEL_RATE, 0,
  630. to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX),
  631. 1,
  632. to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX));
  633. hi556->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
  634. V4L2_CID_VBLANK,
  635. hi556->cur_mode->fll_min -
  636. hi556->cur_mode->height,
  637. HI556_FLL_MAX -
  638. hi556->cur_mode->height, 1,
  639. hi556->cur_mode->fll_def -
  640. hi556->cur_mode->height);
  641. h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
  642. hi556->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
  643. V4L2_CID_HBLANK, h_blank, h_blank, 1,
  644. h_blank);
  645. if (hi556->hblank)
  646. hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  647. v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
  648. HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX,
  649. HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN);
  650. v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
  651. HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX,
  652. HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT);
  653. exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN;
  654. hi556->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
  655. V4L2_CID_EXPOSURE,
  656. HI556_EXPOSURE_MIN, exposure_max,
  657. HI556_EXPOSURE_STEP,
  658. exposure_max);
  659. v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hi556_ctrl_ops,
  660. V4L2_CID_TEST_PATTERN,
  661. ARRAY_SIZE(hi556_test_pattern_menu) - 1,
  662. 0, 0, hi556_test_pattern_menu);
  663. if (ctrl_hdlr->error)
  664. return ctrl_hdlr->error;
  665. hi556->sd.ctrl_handler = ctrl_hdlr;
  666. return 0;
  667. }
  668. static void hi556_assign_pad_format(const struct hi556_mode *mode,
  669. struct v4l2_mbus_framefmt *fmt)
  670. {
  671. fmt->width = mode->width;
  672. fmt->height = mode->height;
  673. fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  674. fmt->field = V4L2_FIELD_NONE;
  675. }
  676. static int hi556_identify_module(struct hi556 *hi556)
  677. {
  678. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  679. int ret;
  680. u32 val;
  681. if (hi556->identified)
  682. return 0;
  683. ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID,
  684. HI556_REG_VALUE_16BIT, &val);
  685. if (ret)
  686. return ret;
  687. if (val != HI556_CHIP_ID) {
  688. dev_err(&client->dev, "chip id mismatch: %x!=%x",
  689. HI556_CHIP_ID, val);
  690. return -ENXIO;
  691. }
  692. hi556->identified = true;
  693. return 0;
  694. }
  695. static int hi556_start_streaming(struct hi556 *hi556)
  696. {
  697. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  698. const struct hi556_reg_list *reg_list;
  699. int link_freq_index, ret;
  700. ret = hi556_identify_module(hi556);
  701. if (ret)
  702. return ret;
  703. link_freq_index = hi556->cur_mode->link_freq_index;
  704. reg_list = &link_freq_configs[link_freq_index].reg_list;
  705. ret = hi556_write_reg_list(hi556, reg_list);
  706. if (ret) {
  707. dev_err(&client->dev, "failed to set plls");
  708. return ret;
  709. }
  710. reg_list = &hi556->cur_mode->reg_list;
  711. ret = hi556_write_reg_list(hi556, reg_list);
  712. if (ret) {
  713. dev_err(&client->dev, "failed to set mode");
  714. return ret;
  715. }
  716. ret = __v4l2_ctrl_handler_setup(hi556->sd.ctrl_handler);
  717. if (ret)
  718. return ret;
  719. ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
  720. HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING);
  721. if (ret) {
  722. dev_err(&client->dev, "failed to set stream");
  723. return ret;
  724. }
  725. return 0;
  726. }
  727. static void hi556_stop_streaming(struct hi556 *hi556)
  728. {
  729. struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
  730. if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
  731. HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY))
  732. dev_err(&client->dev, "failed to set stream");
  733. }
  734. static int hi556_set_stream(struct v4l2_subdev *sd, int enable)
  735. {
  736. struct hi556 *hi556 = to_hi556(sd);
  737. struct i2c_client *client = v4l2_get_subdevdata(sd);
  738. int ret = 0;
  739. if (hi556->streaming == enable)
  740. return 0;
  741. mutex_lock(&hi556->mutex);
  742. if (enable) {
  743. ret = pm_runtime_resume_and_get(&client->dev);
  744. if (ret < 0) {
  745. mutex_unlock(&hi556->mutex);
  746. return ret;
  747. }
  748. ret = hi556_start_streaming(hi556);
  749. if (ret) {
  750. enable = 0;
  751. hi556_stop_streaming(hi556);
  752. pm_runtime_put(&client->dev);
  753. }
  754. } else {
  755. hi556_stop_streaming(hi556);
  756. pm_runtime_put(&client->dev);
  757. }
  758. hi556->streaming = enable;
  759. mutex_unlock(&hi556->mutex);
  760. return ret;
  761. }
  762. static int __maybe_unused hi556_suspend(struct device *dev)
  763. {
  764. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  765. struct hi556 *hi556 = to_hi556(sd);
  766. mutex_lock(&hi556->mutex);
  767. if (hi556->streaming)
  768. hi556_stop_streaming(hi556);
  769. mutex_unlock(&hi556->mutex);
  770. return 0;
  771. }
  772. static int __maybe_unused hi556_resume(struct device *dev)
  773. {
  774. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  775. struct hi556 *hi556 = to_hi556(sd);
  776. int ret;
  777. mutex_lock(&hi556->mutex);
  778. if (hi556->streaming) {
  779. ret = hi556_start_streaming(hi556);
  780. if (ret)
  781. goto error;
  782. }
  783. mutex_unlock(&hi556->mutex);
  784. return 0;
  785. error:
  786. hi556_stop_streaming(hi556);
  787. hi556->streaming = 0;
  788. mutex_unlock(&hi556->mutex);
  789. return ret;
  790. }
  791. static int hi556_set_format(struct v4l2_subdev *sd,
  792. struct v4l2_subdev_state *sd_state,
  793. struct v4l2_subdev_format *fmt)
  794. {
  795. struct hi556 *hi556 = to_hi556(sd);
  796. const struct hi556_mode *mode;
  797. s32 vblank_def, h_blank;
  798. mode = v4l2_find_nearest_size(supported_modes,
  799. ARRAY_SIZE(supported_modes), width,
  800. height, fmt->format.width,
  801. fmt->format.height);
  802. mutex_lock(&hi556->mutex);
  803. hi556_assign_pad_format(mode, &fmt->format);
  804. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  805. *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
  806. } else {
  807. hi556->cur_mode = mode;
  808. __v4l2_ctrl_s_ctrl(hi556->link_freq, mode->link_freq_index);
  809. __v4l2_ctrl_s_ctrl_int64(hi556->pixel_rate,
  810. to_pixel_rate(mode->link_freq_index));
  811. /* Update limits and set FPS to default */
  812. vblank_def = mode->fll_def - mode->height;
  813. __v4l2_ctrl_modify_range(hi556->vblank,
  814. mode->fll_min - mode->height,
  815. HI556_FLL_MAX - mode->height, 1,
  816. vblank_def);
  817. __v4l2_ctrl_s_ctrl(hi556->vblank, vblank_def);
  818. h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
  819. __v4l2_ctrl_modify_range(hi556->hblank, h_blank, h_blank, 1,
  820. h_blank);
  821. }
  822. mutex_unlock(&hi556->mutex);
  823. return 0;
  824. }
  825. static int hi556_get_format(struct v4l2_subdev *sd,
  826. struct v4l2_subdev_state *sd_state,
  827. struct v4l2_subdev_format *fmt)
  828. {
  829. struct hi556 *hi556 = to_hi556(sd);
  830. mutex_lock(&hi556->mutex);
  831. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
  832. fmt->format = *v4l2_subdev_get_try_format(&hi556->sd,
  833. sd_state,
  834. fmt->pad);
  835. else
  836. hi556_assign_pad_format(hi556->cur_mode, &fmt->format);
  837. mutex_unlock(&hi556->mutex);
  838. return 0;
  839. }
  840. static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
  841. struct v4l2_subdev_state *sd_state,
  842. struct v4l2_subdev_mbus_code_enum *code)
  843. {
  844. if (code->index > 0)
  845. return -EINVAL;
  846. code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
  847. return 0;
  848. }
  849. static int hi556_enum_frame_size(struct v4l2_subdev *sd,
  850. struct v4l2_subdev_state *sd_state,
  851. struct v4l2_subdev_frame_size_enum *fse)
  852. {
  853. if (fse->index >= ARRAY_SIZE(supported_modes))
  854. return -EINVAL;
  855. if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
  856. return -EINVAL;
  857. fse->min_width = supported_modes[fse->index].width;
  858. fse->max_width = fse->min_width;
  859. fse->min_height = supported_modes[fse->index].height;
  860. fse->max_height = fse->min_height;
  861. return 0;
  862. }
  863. static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  864. {
  865. struct hi556 *hi556 = to_hi556(sd);
  866. mutex_lock(&hi556->mutex);
  867. hi556_assign_pad_format(&supported_modes[0],
  868. v4l2_subdev_get_try_format(sd, fh->state, 0));
  869. mutex_unlock(&hi556->mutex);
  870. return 0;
  871. }
  872. static const struct v4l2_subdev_video_ops hi556_video_ops = {
  873. .s_stream = hi556_set_stream,
  874. };
  875. static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
  876. .set_fmt = hi556_set_format,
  877. .get_fmt = hi556_get_format,
  878. .enum_mbus_code = hi556_enum_mbus_code,
  879. .enum_frame_size = hi556_enum_frame_size,
  880. };
  881. static const struct v4l2_subdev_ops hi556_subdev_ops = {
  882. .video = &hi556_video_ops,
  883. .pad = &hi556_pad_ops,
  884. };
  885. static const struct media_entity_operations hi556_subdev_entity_ops = {
  886. .link_validate = v4l2_subdev_link_validate,
  887. };
  888. static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
  889. .open = hi556_open,
  890. };
  891. static int hi556_check_hwcfg(struct device *dev)
  892. {
  893. struct fwnode_handle *ep;
  894. struct fwnode_handle *fwnode = dev_fwnode(dev);
  895. struct v4l2_fwnode_endpoint bus_cfg = {
  896. .bus_type = V4L2_MBUS_CSI2_DPHY
  897. };
  898. u32 mclk;
  899. int ret = 0;
  900. unsigned int i, j;
  901. if (!fwnode)
  902. return -ENXIO;
  903. ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
  904. if (ret) {
  905. dev_err(dev, "can't get clock frequency");
  906. return ret;
  907. }
  908. if (mclk != HI556_MCLK) {
  909. dev_err(dev, "external clock %d is not supported", mclk);
  910. return -EINVAL;
  911. }
  912. ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
  913. if (!ep)
  914. return -ENXIO;
  915. ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
  916. fwnode_handle_put(ep);
  917. if (ret)
  918. return ret;
  919. if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
  920. dev_err(dev, "number of CSI2 data lanes %d is not supported",
  921. bus_cfg.bus.mipi_csi2.num_data_lanes);
  922. ret = -EINVAL;
  923. goto check_hwcfg_error;
  924. }
  925. if (!bus_cfg.nr_of_link_frequencies) {
  926. dev_err(dev, "no link frequencies defined");
  927. ret = -EINVAL;
  928. goto check_hwcfg_error;
  929. }
  930. for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
  931. for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
  932. if (link_freq_menu_items[i] ==
  933. bus_cfg.link_frequencies[j])
  934. break;
  935. }
  936. if (j == bus_cfg.nr_of_link_frequencies) {
  937. dev_err(dev, "no link frequency %lld supported",
  938. link_freq_menu_items[i]);
  939. ret = -EINVAL;
  940. goto check_hwcfg_error;
  941. }
  942. }
  943. check_hwcfg_error:
  944. v4l2_fwnode_endpoint_free(&bus_cfg);
  945. return ret;
  946. }
  947. static void hi556_remove(struct i2c_client *client)
  948. {
  949. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  950. struct hi556 *hi556 = to_hi556(sd);
  951. v4l2_async_unregister_subdev(sd);
  952. media_entity_cleanup(&sd->entity);
  953. v4l2_ctrl_handler_free(sd->ctrl_handler);
  954. pm_runtime_disable(&client->dev);
  955. mutex_destroy(&hi556->mutex);
  956. }
  957. static int hi556_probe(struct i2c_client *client)
  958. {
  959. struct hi556 *hi556;
  960. bool full_power;
  961. int ret;
  962. ret = hi556_check_hwcfg(&client->dev);
  963. if (ret) {
  964. dev_err(&client->dev, "failed to check HW configuration: %d",
  965. ret);
  966. return ret;
  967. }
  968. hi556 = devm_kzalloc(&client->dev, sizeof(*hi556), GFP_KERNEL);
  969. if (!hi556)
  970. return -ENOMEM;
  971. v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops);
  972. full_power = acpi_dev_state_d0(&client->dev);
  973. if (full_power) {
  974. ret = hi556_identify_module(hi556);
  975. if (ret) {
  976. dev_err(&client->dev, "failed to find sensor: %d", ret);
  977. return ret;
  978. }
  979. }
  980. mutex_init(&hi556->mutex);
  981. hi556->cur_mode = &supported_modes[0];
  982. ret = hi556_init_controls(hi556);
  983. if (ret) {
  984. dev_err(&client->dev, "failed to init controls: %d", ret);
  985. goto probe_error_v4l2_ctrl_handler_free;
  986. }
  987. hi556->sd.internal_ops = &hi556_internal_ops;
  988. hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  989. hi556->sd.entity.ops = &hi556_subdev_entity_ops;
  990. hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  991. hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
  992. ret = media_entity_pads_init(&hi556->sd.entity, 1, &hi556->pad);
  993. if (ret) {
  994. dev_err(&client->dev, "failed to init entity pads: %d", ret);
  995. goto probe_error_v4l2_ctrl_handler_free;
  996. }
  997. ret = v4l2_async_register_subdev_sensor(&hi556->sd);
  998. if (ret < 0) {
  999. dev_err(&client->dev, "failed to register V4L2 subdev: %d",
  1000. ret);
  1001. goto probe_error_media_entity_cleanup;
  1002. }
  1003. /* Set the device's state to active if it's in D0 state. */
  1004. if (full_power)
  1005. pm_runtime_set_active(&client->dev);
  1006. pm_runtime_enable(&client->dev);
  1007. pm_runtime_idle(&client->dev);
  1008. return 0;
  1009. probe_error_media_entity_cleanup:
  1010. media_entity_cleanup(&hi556->sd.entity);
  1011. probe_error_v4l2_ctrl_handler_free:
  1012. v4l2_ctrl_handler_free(hi556->sd.ctrl_handler);
  1013. mutex_destroy(&hi556->mutex);
  1014. return ret;
  1015. }
  1016. static const struct dev_pm_ops hi556_pm_ops = {
  1017. SET_SYSTEM_SLEEP_PM_OPS(hi556_suspend, hi556_resume)
  1018. };
  1019. #ifdef CONFIG_ACPI
  1020. static const struct acpi_device_id hi556_acpi_ids[] = {
  1021. {"INT3537"},
  1022. {}
  1023. };
  1024. MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids);
  1025. #endif
  1026. static struct i2c_driver hi556_i2c_driver = {
  1027. .driver = {
  1028. .name = "hi556",
  1029. .pm = &hi556_pm_ops,
  1030. .acpi_match_table = ACPI_PTR(hi556_acpi_ids),
  1031. },
  1032. .probe_new = hi556_probe,
  1033. .remove = hi556_remove,
  1034. .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
  1035. };
  1036. module_i2c_driver(hi556_i2c_driver);
  1037. MODULE_AUTHOR("Shawn Tu <[email protected]>");
  1038. MODULE_DESCRIPTION("Hynix HI556 sensor driver");
  1039. MODULE_LICENSE("GPL v2");