adv748x-csi2.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for Analog Devices ADV748X CSI-2 Transmitter
  4. *
  5. * Copyright (C) 2017 Renesas Electronics Corp.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/mutex.h>
  9. #include <media/v4l2-ctrls.h>
  10. #include <media/v4l2-device.h>
  11. #include <media/v4l2-ioctl.h>
  12. #include "adv748x.h"
  13. int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc)
  14. {
  15. return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT);
  16. }
  17. /**
  18. * adv748x_csi2_register_link : Register and link internal entities
  19. *
  20. * @tx: CSI2 private entity
  21. * @v4l2_dev: Video registration device
  22. * @src: Source subdevice to establish link
  23. * @src_pad: Pad number of source to link to this @tx
  24. * @enable: Link enabled flag
  25. *
  26. * Ensure that the subdevice is registered against the v4l2_device, and link the
  27. * source pad to the sink pad of the CSI2 bus entity.
  28. */
  29. static int adv748x_csi2_register_link(struct adv748x_csi2 *tx,
  30. struct v4l2_device *v4l2_dev,
  31. struct v4l2_subdev *src,
  32. unsigned int src_pad,
  33. bool enable)
  34. {
  35. int ret;
  36. if (!src->v4l2_dev) {
  37. ret = v4l2_device_register_subdev(v4l2_dev, src);
  38. if (ret)
  39. return ret;
  40. }
  41. ret = media_create_pad_link(&src->entity, src_pad,
  42. &tx->sd.entity, ADV748X_CSI2_SINK,
  43. enable ? MEDIA_LNK_FL_ENABLED : 0);
  44. if (ret)
  45. return ret;
  46. if (enable)
  47. tx->src = src;
  48. return 0;
  49. }
  50. /* -----------------------------------------------------------------------------
  51. * v4l2_subdev_internal_ops
  52. *
  53. * We use the internal registered operation to be able to ensure that our
  54. * incremental subdevices (not connected in the forward path) can be registered
  55. * against the resulting video path and media device.
  56. */
  57. static int adv748x_csi2_registered(struct v4l2_subdev *sd)
  58. {
  59. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  60. struct adv748x_state *state = tx->state;
  61. int ret;
  62. adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB",
  63. sd->name);
  64. /*
  65. * Link TXA to AFE and HDMI, and TXB to AFE only as TXB cannot output
  66. * HDMI.
  67. *
  68. * The HDMI->TXA link is enabled by default, as is the AFE->TXB one.
  69. */
  70. if (is_afe_enabled(state)) {
  71. ret = adv748x_csi2_register_link(tx, sd->v4l2_dev,
  72. &state->afe.sd,
  73. ADV748X_AFE_SOURCE,
  74. is_txb(tx));
  75. if (ret)
  76. return ret;
  77. /* TXB can output AFE signals only. */
  78. if (is_txb(tx))
  79. state->afe.tx = tx;
  80. }
  81. /* Register link to HDMI for TXA only. */
  82. if (is_txb(tx) || !is_hdmi_enabled(state))
  83. return 0;
  84. ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd,
  85. ADV748X_HDMI_SOURCE, true);
  86. if (ret)
  87. return ret;
  88. /* The default HDMI output is TXA. */
  89. state->hdmi.tx = tx;
  90. return 0;
  91. }
  92. static const struct v4l2_subdev_internal_ops adv748x_csi2_internal_ops = {
  93. .registered = adv748x_csi2_registered,
  94. };
  95. /* -----------------------------------------------------------------------------
  96. * v4l2_subdev_video_ops
  97. */
  98. static int adv748x_csi2_s_stream(struct v4l2_subdev *sd, int enable)
  99. {
  100. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  101. struct v4l2_subdev *src;
  102. src = adv748x_get_remote_sd(&tx->pads[ADV748X_CSI2_SINK]);
  103. if (!src)
  104. return -EPIPE;
  105. return v4l2_subdev_call(src, video, s_stream, enable);
  106. }
  107. static const struct v4l2_subdev_video_ops adv748x_csi2_video_ops = {
  108. .s_stream = adv748x_csi2_s_stream,
  109. };
  110. /* -----------------------------------------------------------------------------
  111. * v4l2_subdev_pad_ops
  112. *
  113. * The CSI2 bus pads are ignorant to the data sizes or formats.
  114. * But we must support setting the pad formats for format propagation.
  115. */
  116. static struct v4l2_mbus_framefmt *
  117. adv748x_csi2_get_pad_format(struct v4l2_subdev *sd,
  118. struct v4l2_subdev_state *sd_state,
  119. unsigned int pad, u32 which)
  120. {
  121. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  122. if (which == V4L2_SUBDEV_FORMAT_TRY)
  123. return v4l2_subdev_get_try_format(sd, sd_state, pad);
  124. return &tx->format;
  125. }
  126. static int adv748x_csi2_get_format(struct v4l2_subdev *sd,
  127. struct v4l2_subdev_state *sd_state,
  128. struct v4l2_subdev_format *sdformat)
  129. {
  130. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  131. struct adv748x_state *state = tx->state;
  132. struct v4l2_mbus_framefmt *mbusformat;
  133. mbusformat = adv748x_csi2_get_pad_format(sd, sd_state, sdformat->pad,
  134. sdformat->which);
  135. if (!mbusformat)
  136. return -EINVAL;
  137. mutex_lock(&state->mutex);
  138. sdformat->format = *mbusformat;
  139. mutex_unlock(&state->mutex);
  140. return 0;
  141. }
  142. static int adv748x_csi2_set_format(struct v4l2_subdev *sd,
  143. struct v4l2_subdev_state *sd_state,
  144. struct v4l2_subdev_format *sdformat)
  145. {
  146. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  147. struct adv748x_state *state = tx->state;
  148. struct v4l2_mbus_framefmt *mbusformat;
  149. int ret = 0;
  150. mbusformat = adv748x_csi2_get_pad_format(sd, sd_state, sdformat->pad,
  151. sdformat->which);
  152. if (!mbusformat)
  153. return -EINVAL;
  154. mutex_lock(&state->mutex);
  155. if (sdformat->pad == ADV748X_CSI2_SOURCE) {
  156. const struct v4l2_mbus_framefmt *sink_fmt;
  157. sink_fmt = adv748x_csi2_get_pad_format(sd, sd_state,
  158. ADV748X_CSI2_SINK,
  159. sdformat->which);
  160. if (!sink_fmt) {
  161. ret = -EINVAL;
  162. goto unlock;
  163. }
  164. sdformat->format = *sink_fmt;
  165. }
  166. *mbusformat = sdformat->format;
  167. unlock:
  168. mutex_unlock(&state->mutex);
  169. return ret;
  170. }
  171. static int adv748x_csi2_get_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
  172. struct v4l2_mbus_config *config)
  173. {
  174. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  175. if (pad != ADV748X_CSI2_SOURCE)
  176. return -EINVAL;
  177. config->type = V4L2_MBUS_CSI2_DPHY;
  178. config->bus.mipi_csi2.num_data_lanes = tx->active_lanes;
  179. return 0;
  180. }
  181. static const struct v4l2_subdev_pad_ops adv748x_csi2_pad_ops = {
  182. .get_fmt = adv748x_csi2_get_format,
  183. .set_fmt = adv748x_csi2_set_format,
  184. .get_mbus_config = adv748x_csi2_get_mbus_config,
  185. };
  186. /* -----------------------------------------------------------------------------
  187. * v4l2_subdev_ops
  188. */
  189. static const struct v4l2_subdev_ops adv748x_csi2_ops = {
  190. .video = &adv748x_csi2_video_ops,
  191. .pad = &adv748x_csi2_pad_ops,
  192. };
  193. /* -----------------------------------------------------------------------------
  194. * Subdev module and controls
  195. */
  196. int adv748x_csi2_set_pixelrate(struct v4l2_subdev *sd, s64 rate)
  197. {
  198. struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
  199. if (!tx->pixel_rate)
  200. return -EINVAL;
  201. return v4l2_ctrl_s_ctrl_int64(tx->pixel_rate, rate);
  202. }
  203. static int adv748x_csi2_s_ctrl(struct v4l2_ctrl *ctrl)
  204. {
  205. switch (ctrl->id) {
  206. case V4L2_CID_PIXEL_RATE:
  207. return 0;
  208. default:
  209. return -EINVAL;
  210. }
  211. }
  212. static const struct v4l2_ctrl_ops adv748x_csi2_ctrl_ops = {
  213. .s_ctrl = adv748x_csi2_s_ctrl,
  214. };
  215. static int adv748x_csi2_init_controls(struct adv748x_csi2 *tx)
  216. {
  217. v4l2_ctrl_handler_init(&tx->ctrl_hdl, 1);
  218. tx->pixel_rate = v4l2_ctrl_new_std(&tx->ctrl_hdl,
  219. &adv748x_csi2_ctrl_ops,
  220. V4L2_CID_PIXEL_RATE, 1, INT_MAX,
  221. 1, 1);
  222. tx->sd.ctrl_handler = &tx->ctrl_hdl;
  223. if (tx->ctrl_hdl.error) {
  224. v4l2_ctrl_handler_free(&tx->ctrl_hdl);
  225. return tx->ctrl_hdl.error;
  226. }
  227. return v4l2_ctrl_handler_setup(&tx->ctrl_hdl);
  228. }
  229. int adv748x_csi2_init(struct adv748x_state *state, struct adv748x_csi2 *tx)
  230. {
  231. int ret;
  232. if (!is_tx_enabled(tx))
  233. return 0;
  234. adv748x_subdev_init(&tx->sd, state, &adv748x_csi2_ops,
  235. MEDIA_ENT_F_VID_IF_BRIDGE,
  236. is_txa(tx) ? "txa" : "txb");
  237. /* Ensure that matching is based upon the endpoint fwnodes */
  238. tx->sd.fwnode = of_fwnode_handle(state->endpoints[tx->port]);
  239. /* Register internal ops for incremental subdev registration */
  240. tx->sd.internal_ops = &adv748x_csi2_internal_ops;
  241. tx->pads[ADV748X_CSI2_SINK].flags = MEDIA_PAD_FL_SINK;
  242. tx->pads[ADV748X_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  243. ret = media_entity_pads_init(&tx->sd.entity, ADV748X_CSI2_NR_PADS,
  244. tx->pads);
  245. if (ret)
  246. return ret;
  247. ret = adv748x_csi2_init_controls(tx);
  248. if (ret)
  249. goto err_free_media;
  250. ret = v4l2_async_register_subdev(&tx->sd);
  251. if (ret)
  252. goto err_free_ctrl;
  253. return 0;
  254. err_free_ctrl:
  255. v4l2_ctrl_handler_free(&tx->ctrl_hdl);
  256. err_free_media:
  257. media_entity_cleanup(&tx->sd.entity);
  258. return ret;
  259. }
  260. void adv748x_csi2_cleanup(struct adv748x_csi2 *tx)
  261. {
  262. if (!is_tx_enabled(tx))
  263. return;
  264. v4l2_async_unregister_subdev(&tx->sd);
  265. media_entity_cleanup(&tx->sd.entity);
  266. v4l2_ctrl_handler_free(&tx->ctrl_hdl);
  267. }