af9013.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Afatech AF9013 demodulator driver
  4. *
  5. * Copyright (C) 2007 Antti Palosaari <[email protected]>
  6. * Copyright (C) 2011 Antti Palosaari <[email protected]>
  7. *
  8. * Thanks to Afatech who kindly provided information.
  9. */
  10. #include "af9013_priv.h"
  11. struct af9013_state {
  12. struct i2c_client *client;
  13. struct regmap *regmap;
  14. struct i2c_mux_core *muxc;
  15. struct dvb_frontend fe;
  16. u32 clk;
  17. u8 tuner;
  18. u32 if_frequency;
  19. u8 ts_mode;
  20. u8 ts_output_pin;
  21. bool spec_inv;
  22. u8 api_version[4];
  23. u8 gpio[4];
  24. u32 bandwidth_hz;
  25. enum fe_status fe_status;
  26. /* RF and IF AGC limits used for signal strength calc */
  27. u8 strength_en, rf_agc_50, rf_agc_80, if_agc_50, if_agc_80;
  28. unsigned long set_frontend_jiffies;
  29. unsigned long read_status_jiffies;
  30. unsigned long strength_jiffies;
  31. unsigned long cnr_jiffies;
  32. unsigned long ber_ucb_jiffies;
  33. u16 dvbv3_snr;
  34. u16 dvbv3_strength;
  35. u32 dvbv3_ber;
  36. u32 dvbv3_ucblocks;
  37. bool first_tune;
  38. };
  39. static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
  40. {
  41. struct i2c_client *client = state->client;
  42. int ret;
  43. u8 pos;
  44. u16 addr;
  45. dev_dbg(&client->dev, "gpio %u, gpioval %02x\n", gpio, gpioval);
  46. /*
  47. * GPIO0 & GPIO1 0xd735
  48. * GPIO2 & GPIO3 0xd736
  49. */
  50. switch (gpio) {
  51. case 0:
  52. case 1:
  53. addr = 0xd735;
  54. break;
  55. case 2:
  56. case 3:
  57. addr = 0xd736;
  58. break;
  59. default:
  60. ret = -EINVAL;
  61. goto err;
  62. }
  63. switch (gpio) {
  64. case 0:
  65. case 2:
  66. pos = 0;
  67. break;
  68. case 1:
  69. case 3:
  70. default:
  71. pos = 4;
  72. break;
  73. }
  74. ret = regmap_update_bits(state->regmap, addr, 0x0f << pos,
  75. gpioval << pos);
  76. if (ret)
  77. goto err;
  78. return 0;
  79. err:
  80. dev_dbg(&client->dev, "failed %d\n", ret);
  81. return ret;
  82. }
  83. static int af9013_get_tune_settings(struct dvb_frontend *fe,
  84. struct dvb_frontend_tune_settings *fesettings)
  85. {
  86. fesettings->min_delay_ms = 800;
  87. fesettings->step_size = 0;
  88. fesettings->max_drift = 0;
  89. return 0;
  90. }
  91. static int af9013_set_frontend(struct dvb_frontend *fe)
  92. {
  93. struct af9013_state *state = fe->demodulator_priv;
  94. struct i2c_client *client = state->client;
  95. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  96. int ret, i, sampling_freq;
  97. bool auto_mode, spec_inv;
  98. u8 buf[6];
  99. u32 if_frequency, freq_cw;
  100. dev_dbg(&client->dev, "frequency %u, bandwidth_hz %u\n",
  101. c->frequency, c->bandwidth_hz);
  102. /* program tuner */
  103. if (fe->ops.tuner_ops.set_params) {
  104. ret = fe->ops.tuner_ops.set_params(fe);
  105. if (ret)
  106. goto err;
  107. }
  108. /* program CFOE coefficients */
  109. if (c->bandwidth_hz != state->bandwidth_hz) {
  110. for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
  111. if (coeff_lut[i].clock == state->clk &&
  112. coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
  113. break;
  114. }
  115. }
  116. /* Return an error if can't find bandwidth or the right clock */
  117. if (i == ARRAY_SIZE(coeff_lut)) {
  118. ret = -EINVAL;
  119. goto err;
  120. }
  121. ret = regmap_bulk_write(state->regmap, 0xae00, coeff_lut[i].val,
  122. sizeof(coeff_lut[i].val));
  123. if (ret)
  124. goto err;
  125. }
  126. /* program frequency control */
  127. if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
  128. /* get used IF frequency */
  129. if (fe->ops.tuner_ops.get_if_frequency) {
  130. ret = fe->ops.tuner_ops.get_if_frequency(fe,
  131. &if_frequency);
  132. if (ret)
  133. goto err;
  134. } else {
  135. if_frequency = state->if_frequency;
  136. }
  137. dev_dbg(&client->dev, "if_frequency %u\n", if_frequency);
  138. sampling_freq = if_frequency;
  139. while (sampling_freq > (state->clk / 2))
  140. sampling_freq -= state->clk;
  141. if (sampling_freq < 0) {
  142. sampling_freq *= -1;
  143. spec_inv = state->spec_inv;
  144. } else {
  145. spec_inv = !state->spec_inv;
  146. }
  147. freq_cw = DIV_ROUND_CLOSEST_ULL((u64)sampling_freq * 0x800000,
  148. state->clk);
  149. if (spec_inv)
  150. freq_cw = 0x800000 - freq_cw;
  151. buf[0] = (freq_cw >> 0) & 0xff;
  152. buf[1] = (freq_cw >> 8) & 0xff;
  153. buf[2] = (freq_cw >> 16) & 0x7f;
  154. freq_cw = 0x800000 - freq_cw;
  155. buf[3] = (freq_cw >> 0) & 0xff;
  156. buf[4] = (freq_cw >> 8) & 0xff;
  157. buf[5] = (freq_cw >> 16) & 0x7f;
  158. ret = regmap_bulk_write(state->regmap, 0xd140, buf, 3);
  159. if (ret)
  160. goto err;
  161. ret = regmap_bulk_write(state->regmap, 0x9be7, buf, 6);
  162. if (ret)
  163. goto err;
  164. }
  165. /* clear TPS lock flag */
  166. ret = regmap_update_bits(state->regmap, 0xd330, 0x08, 0x08);
  167. if (ret)
  168. goto err;
  169. /* clear MPEG2 lock flag */
  170. ret = regmap_update_bits(state->regmap, 0xd507, 0x40, 0x00);
  171. if (ret)
  172. goto err;
  173. /* empty channel function */
  174. ret = regmap_update_bits(state->regmap, 0x9bfe, 0x01, 0x00);
  175. if (ret)
  176. goto err;
  177. /* empty DVB-T channel function */
  178. ret = regmap_update_bits(state->regmap, 0x9bc2, 0x01, 0x00);
  179. if (ret)
  180. goto err;
  181. /* transmission parameters */
  182. auto_mode = false;
  183. memset(buf, 0, 3);
  184. switch (c->transmission_mode) {
  185. case TRANSMISSION_MODE_AUTO:
  186. auto_mode = true;
  187. break;
  188. case TRANSMISSION_MODE_2K:
  189. break;
  190. case TRANSMISSION_MODE_8K:
  191. buf[0] |= (1 << 0);
  192. break;
  193. default:
  194. dev_dbg(&client->dev, "invalid transmission_mode\n");
  195. auto_mode = true;
  196. }
  197. switch (c->guard_interval) {
  198. case GUARD_INTERVAL_AUTO:
  199. auto_mode = true;
  200. break;
  201. case GUARD_INTERVAL_1_32:
  202. break;
  203. case GUARD_INTERVAL_1_16:
  204. buf[0] |= (1 << 2);
  205. break;
  206. case GUARD_INTERVAL_1_8:
  207. buf[0] |= (2 << 2);
  208. break;
  209. case GUARD_INTERVAL_1_4:
  210. buf[0] |= (3 << 2);
  211. break;
  212. default:
  213. dev_dbg(&client->dev, "invalid guard_interval\n");
  214. auto_mode = true;
  215. }
  216. switch (c->hierarchy) {
  217. case HIERARCHY_AUTO:
  218. auto_mode = true;
  219. break;
  220. case HIERARCHY_NONE:
  221. break;
  222. case HIERARCHY_1:
  223. buf[0] |= (1 << 4);
  224. break;
  225. case HIERARCHY_2:
  226. buf[0] |= (2 << 4);
  227. break;
  228. case HIERARCHY_4:
  229. buf[0] |= (3 << 4);
  230. break;
  231. default:
  232. dev_dbg(&client->dev, "invalid hierarchy\n");
  233. auto_mode = true;
  234. }
  235. switch (c->modulation) {
  236. case QAM_AUTO:
  237. auto_mode = true;
  238. break;
  239. case QPSK:
  240. break;
  241. case QAM_16:
  242. buf[1] |= (1 << 6);
  243. break;
  244. case QAM_64:
  245. buf[1] |= (2 << 6);
  246. break;
  247. default:
  248. dev_dbg(&client->dev, "invalid modulation\n");
  249. auto_mode = true;
  250. }
  251. /* Use HP. How and which case we can switch to LP? */
  252. buf[1] |= (1 << 4);
  253. switch (c->code_rate_HP) {
  254. case FEC_AUTO:
  255. auto_mode = true;
  256. break;
  257. case FEC_1_2:
  258. break;
  259. case FEC_2_3:
  260. buf[2] |= (1 << 0);
  261. break;
  262. case FEC_3_4:
  263. buf[2] |= (2 << 0);
  264. break;
  265. case FEC_5_6:
  266. buf[2] |= (3 << 0);
  267. break;
  268. case FEC_7_8:
  269. buf[2] |= (4 << 0);
  270. break;
  271. default:
  272. dev_dbg(&client->dev, "invalid code_rate_HP\n");
  273. auto_mode = true;
  274. }
  275. switch (c->code_rate_LP) {
  276. case FEC_AUTO:
  277. auto_mode = true;
  278. break;
  279. case FEC_1_2:
  280. break;
  281. case FEC_2_3:
  282. buf[2] |= (1 << 3);
  283. break;
  284. case FEC_3_4:
  285. buf[2] |= (2 << 3);
  286. break;
  287. case FEC_5_6:
  288. buf[2] |= (3 << 3);
  289. break;
  290. case FEC_7_8:
  291. buf[2] |= (4 << 3);
  292. break;
  293. case FEC_NONE:
  294. break;
  295. default:
  296. dev_dbg(&client->dev, "invalid code_rate_LP\n");
  297. auto_mode = true;
  298. }
  299. switch (c->bandwidth_hz) {
  300. case 6000000:
  301. break;
  302. case 7000000:
  303. buf[1] |= (1 << 2);
  304. break;
  305. case 8000000:
  306. buf[1] |= (2 << 2);
  307. break;
  308. default:
  309. dev_dbg(&client->dev, "invalid bandwidth_hz\n");
  310. ret = -EINVAL;
  311. goto err;
  312. }
  313. ret = regmap_bulk_write(state->regmap, 0xd3c0, buf, 3);
  314. if (ret)
  315. goto err;
  316. if (auto_mode) {
  317. /* clear easy mode flag */
  318. ret = regmap_write(state->regmap, 0xaefd, 0x00);
  319. if (ret)
  320. goto err;
  321. dev_dbg(&client->dev, "auto params\n");
  322. } else {
  323. /* set easy mode flag */
  324. ret = regmap_write(state->regmap, 0xaefd, 0x01);
  325. if (ret)
  326. goto err;
  327. ret = regmap_write(state->regmap, 0xaefe, 0x00);
  328. if (ret)
  329. goto err;
  330. dev_dbg(&client->dev, "manual params\n");
  331. }
  332. /* Reset FSM */
  333. ret = regmap_write(state->regmap, 0xffff, 0x00);
  334. if (ret)
  335. goto err;
  336. state->bandwidth_hz = c->bandwidth_hz;
  337. state->set_frontend_jiffies = jiffies;
  338. state->first_tune = false;
  339. return 0;
  340. err:
  341. dev_dbg(&client->dev, "failed %d\n", ret);
  342. return ret;
  343. }
  344. static int af9013_get_frontend(struct dvb_frontend *fe,
  345. struct dtv_frontend_properties *c)
  346. {
  347. struct af9013_state *state = fe->demodulator_priv;
  348. struct i2c_client *client = state->client;
  349. int ret;
  350. u8 buf[3];
  351. dev_dbg(&client->dev, "\n");
  352. ret = regmap_bulk_read(state->regmap, 0xd3c0, buf, 3);
  353. if (ret)
  354. goto err;
  355. switch ((buf[1] >> 6) & 3) {
  356. case 0:
  357. c->modulation = QPSK;
  358. break;
  359. case 1:
  360. c->modulation = QAM_16;
  361. break;
  362. case 2:
  363. c->modulation = QAM_64;
  364. break;
  365. }
  366. switch ((buf[0] >> 0) & 3) {
  367. case 0:
  368. c->transmission_mode = TRANSMISSION_MODE_2K;
  369. break;
  370. case 1:
  371. c->transmission_mode = TRANSMISSION_MODE_8K;
  372. }
  373. switch ((buf[0] >> 2) & 3) {
  374. case 0:
  375. c->guard_interval = GUARD_INTERVAL_1_32;
  376. break;
  377. case 1:
  378. c->guard_interval = GUARD_INTERVAL_1_16;
  379. break;
  380. case 2:
  381. c->guard_interval = GUARD_INTERVAL_1_8;
  382. break;
  383. case 3:
  384. c->guard_interval = GUARD_INTERVAL_1_4;
  385. break;
  386. }
  387. switch ((buf[0] >> 4) & 7) {
  388. case 0:
  389. c->hierarchy = HIERARCHY_NONE;
  390. break;
  391. case 1:
  392. c->hierarchy = HIERARCHY_1;
  393. break;
  394. case 2:
  395. c->hierarchy = HIERARCHY_2;
  396. break;
  397. case 3:
  398. c->hierarchy = HIERARCHY_4;
  399. break;
  400. }
  401. switch ((buf[2] >> 0) & 7) {
  402. case 0:
  403. c->code_rate_HP = FEC_1_2;
  404. break;
  405. case 1:
  406. c->code_rate_HP = FEC_2_3;
  407. break;
  408. case 2:
  409. c->code_rate_HP = FEC_3_4;
  410. break;
  411. case 3:
  412. c->code_rate_HP = FEC_5_6;
  413. break;
  414. case 4:
  415. c->code_rate_HP = FEC_7_8;
  416. break;
  417. }
  418. switch ((buf[2] >> 3) & 7) {
  419. case 0:
  420. c->code_rate_LP = FEC_1_2;
  421. break;
  422. case 1:
  423. c->code_rate_LP = FEC_2_3;
  424. break;
  425. case 2:
  426. c->code_rate_LP = FEC_3_4;
  427. break;
  428. case 3:
  429. c->code_rate_LP = FEC_5_6;
  430. break;
  431. case 4:
  432. c->code_rate_LP = FEC_7_8;
  433. break;
  434. }
  435. switch ((buf[1] >> 2) & 3) {
  436. case 0:
  437. c->bandwidth_hz = 6000000;
  438. break;
  439. case 1:
  440. c->bandwidth_hz = 7000000;
  441. break;
  442. case 2:
  443. c->bandwidth_hz = 8000000;
  444. break;
  445. }
  446. return 0;
  447. err:
  448. dev_dbg(&client->dev, "failed %d\n", ret);
  449. return ret;
  450. }
  451. static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
  452. {
  453. struct af9013_state *state = fe->demodulator_priv;
  454. struct i2c_client *client = state->client;
  455. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  456. int ret, stmp1;
  457. unsigned int utmp, utmp1, utmp2, utmp3, utmp4;
  458. u8 buf[7];
  459. dev_dbg(&client->dev, "\n");
  460. /*
  461. * Return status from the cache if it is younger than 2000ms with the
  462. * exception of last tune is done during 4000ms.
  463. */
  464. if (time_is_after_jiffies(state->read_status_jiffies + msecs_to_jiffies(2000)) &&
  465. time_is_before_jiffies(state->set_frontend_jiffies + msecs_to_jiffies(4000))) {
  466. *status = state->fe_status;
  467. } else {
  468. /* MPEG2 lock */
  469. ret = regmap_read(state->regmap, 0xd507, &utmp);
  470. if (ret)
  471. goto err;
  472. if ((utmp >> 6) & 0x01) {
  473. utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  474. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  475. } else {
  476. /* TPS lock */
  477. ret = regmap_read(state->regmap, 0xd330, &utmp);
  478. if (ret)
  479. goto err;
  480. if ((utmp >> 3) & 0x01)
  481. utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  482. FE_HAS_VITERBI;
  483. else
  484. utmp1 = 0;
  485. }
  486. dev_dbg(&client->dev, "fe_status %02x\n", utmp1);
  487. state->read_status_jiffies = jiffies;
  488. state->fe_status = utmp1;
  489. *status = utmp1;
  490. }
  491. /* Signal strength */
  492. switch (state->strength_en) {
  493. case 0:
  494. /* Check if we support signal strength */
  495. ret = regmap_read(state->regmap, 0x9bee, &utmp);
  496. if (ret)
  497. goto err;
  498. if ((utmp >> 0) & 0x01) {
  499. /* Read agc values for signal strength estimation */
  500. ret = regmap_read(state->regmap, 0x9bbd, &utmp1);
  501. if (ret)
  502. goto err;
  503. ret = regmap_read(state->regmap, 0x9bd0, &utmp2);
  504. if (ret)
  505. goto err;
  506. ret = regmap_read(state->regmap, 0x9be2, &utmp3);
  507. if (ret)
  508. goto err;
  509. ret = regmap_read(state->regmap, 0x9be4, &utmp4);
  510. if (ret)
  511. goto err;
  512. state->rf_agc_50 = utmp1;
  513. state->rf_agc_80 = utmp2;
  514. state->if_agc_50 = utmp3;
  515. state->if_agc_80 = utmp4;
  516. dev_dbg(&client->dev,
  517. "rf_agc_50 %u, rf_agc_80 %u, if_agc_50 %u, if_agc_80 %u\n",
  518. utmp1, utmp2, utmp3, utmp4);
  519. state->strength_en = 1;
  520. } else {
  521. /* Signal strength is not supported */
  522. state->strength_en = 2;
  523. break;
  524. }
  525. fallthrough;
  526. case 1:
  527. if (time_is_after_jiffies(state->strength_jiffies + msecs_to_jiffies(2000)))
  528. break;
  529. /* Read value */
  530. ret = regmap_bulk_read(state->regmap, 0xd07c, buf, 2);
  531. if (ret)
  532. goto err;
  533. /*
  534. * Construct line equation from tuner dependent -80/-50 dBm agc
  535. * limits and use it to map current agc value to dBm estimate
  536. */
  537. #define agc_gain (buf[0] + buf[1])
  538. #define agc_gain_50dbm (state->rf_agc_50 + state->if_agc_50)
  539. #define agc_gain_80dbm (state->rf_agc_80 + state->if_agc_80)
  540. stmp1 = 30000 * (agc_gain - agc_gain_80dbm) /
  541. (agc_gain_50dbm - agc_gain_80dbm) - 80000;
  542. dev_dbg(&client->dev,
  543. "strength %d, agc_gain %d, agc_gain_50dbm %d, agc_gain_80dbm %d\n",
  544. stmp1, agc_gain, agc_gain_50dbm, agc_gain_80dbm);
  545. state->strength_jiffies = jiffies;
  546. /* Convert [-90, -30] dBm to [0x0000, 0xffff] for dvbv3 */
  547. utmp1 = clamp(stmp1 + 90000, 0, 60000);
  548. state->dvbv3_strength = div_u64((u64)utmp1 * 0xffff, 60000);
  549. c->strength.stat[0].scale = FE_SCALE_DECIBEL;
  550. c->strength.stat[0].svalue = stmp1;
  551. break;
  552. default:
  553. c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  554. break;
  555. }
  556. /* CNR */
  557. switch (state->fe_status & FE_HAS_VITERBI) {
  558. case FE_HAS_VITERBI:
  559. if (time_is_after_jiffies(state->cnr_jiffies + msecs_to_jiffies(2000)))
  560. break;
  561. /* Check if cnr ready */
  562. ret = regmap_read(state->regmap, 0xd2e1, &utmp);
  563. if (ret)
  564. goto err;
  565. if (!((utmp >> 3) & 0x01)) {
  566. dev_dbg(&client->dev, "cnr not ready\n");
  567. break;
  568. }
  569. /* Read value */
  570. ret = regmap_bulk_read(state->regmap, 0xd2e3, buf, 3);
  571. if (ret)
  572. goto err;
  573. utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
  574. /* Read current modulation */
  575. ret = regmap_read(state->regmap, 0xd3c1, &utmp);
  576. if (ret)
  577. goto err;
  578. switch ((utmp >> 6) & 3) {
  579. case 0:
  580. /*
  581. * QPSK
  582. * CNR[dB] 13 * -log10((1690000 - value) / value) + 2.6
  583. * value [653799, 1689999], 2.6 / 13 = 3355443
  584. */
  585. utmp1 = clamp(utmp1, 653799U, 1689999U);
  586. utmp1 = ((u64)(intlog10(utmp1)
  587. - intlog10(1690000 - utmp1)
  588. + 3355443) * 13 * 1000) >> 24;
  589. break;
  590. case 1:
  591. /*
  592. * QAM-16
  593. * CNR[dB] 6 * log10((value - 370000) / (828000 - value)) + 15.7
  594. * value [371105, 827999], 15.7 / 6 = 43900382
  595. */
  596. utmp1 = clamp(utmp1, 371105U, 827999U);
  597. utmp1 = ((u64)(intlog10(utmp1 - 370000)
  598. - intlog10(828000 - utmp1)
  599. + 43900382) * 6 * 1000) >> 24;
  600. break;
  601. case 2:
  602. /*
  603. * QAM-64
  604. * CNR[dB] 8 * log10((value - 193000) / (425000 - value)) + 23.8
  605. * value [193246, 424999], 23.8 / 8 = 49912218
  606. */
  607. utmp1 = clamp(utmp1, 193246U, 424999U);
  608. utmp1 = ((u64)(intlog10(utmp1 - 193000)
  609. - intlog10(425000 - utmp1)
  610. + 49912218) * 8 * 1000) >> 24;
  611. break;
  612. default:
  613. dev_dbg(&client->dev, "invalid modulation %u\n",
  614. (utmp >> 6) & 3);
  615. utmp1 = 0;
  616. break;
  617. }
  618. dev_dbg(&client->dev, "cnr %u\n", utmp1);
  619. state->cnr_jiffies = jiffies;
  620. state->dvbv3_snr = utmp1 / 100;
  621. c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  622. c->cnr.stat[0].svalue = utmp1;
  623. break;
  624. default:
  625. c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  626. break;
  627. }
  628. /* BER / PER */
  629. switch (state->fe_status & FE_HAS_SYNC) {
  630. case FE_HAS_SYNC:
  631. if (time_is_after_jiffies(state->ber_ucb_jiffies + msecs_to_jiffies(2000)))
  632. break;
  633. /* Check if ber / ucb is ready */
  634. ret = regmap_read(state->regmap, 0xd391, &utmp);
  635. if (ret)
  636. goto err;
  637. if (!((utmp >> 4) & 0x01)) {
  638. dev_dbg(&client->dev, "ber not ready\n");
  639. break;
  640. }
  641. /* Read value */
  642. ret = regmap_bulk_read(state->regmap, 0xd385, buf, 7);
  643. if (ret)
  644. goto err;
  645. utmp1 = buf[4] << 16 | buf[3] << 8 | buf[2] << 0;
  646. utmp2 = (buf[1] << 8 | buf[0] << 0) * 204 * 8;
  647. utmp3 = buf[6] << 8 | buf[5] << 0;
  648. utmp4 = buf[1] << 8 | buf[0] << 0;
  649. /* Use 10000 TS packets for measure */
  650. if (utmp4 != 10000) {
  651. buf[0] = (10000 >> 0) & 0xff;
  652. buf[1] = (10000 >> 8) & 0xff;
  653. ret = regmap_bulk_write(state->regmap, 0xd385, buf, 2);
  654. if (ret)
  655. goto err;
  656. }
  657. /* Reset ber / ucb counter */
  658. ret = regmap_update_bits(state->regmap, 0xd391, 0x20, 0x20);
  659. if (ret)
  660. goto err;
  661. dev_dbg(&client->dev, "post_bit_error %u, post_bit_count %u\n",
  662. utmp1, utmp2);
  663. dev_dbg(&client->dev, "block_error %u, block_count %u\n",
  664. utmp3, utmp4);
  665. state->ber_ucb_jiffies = jiffies;
  666. state->dvbv3_ber = utmp1;
  667. state->dvbv3_ucblocks += utmp3;
  668. c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
  669. c->post_bit_error.stat[0].uvalue += utmp1;
  670. c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
  671. c->post_bit_count.stat[0].uvalue += utmp2;
  672. c->block_error.stat[0].scale = FE_SCALE_COUNTER;
  673. c->block_error.stat[0].uvalue += utmp3;
  674. c->block_count.stat[0].scale = FE_SCALE_COUNTER;
  675. c->block_count.stat[0].uvalue += utmp4;
  676. break;
  677. default:
  678. c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  679. c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  680. c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  681. c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  682. break;
  683. }
  684. return 0;
  685. err:
  686. dev_dbg(&client->dev, "failed %d\n", ret);
  687. return ret;
  688. }
  689. static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
  690. {
  691. struct af9013_state *state = fe->demodulator_priv;
  692. *snr = state->dvbv3_snr;
  693. return 0;
  694. }
  695. static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  696. {
  697. struct af9013_state *state = fe->demodulator_priv;
  698. *strength = state->dvbv3_strength;
  699. return 0;
  700. }
  701. static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
  702. {
  703. struct af9013_state *state = fe->demodulator_priv;
  704. *ber = state->dvbv3_ber;
  705. return 0;
  706. }
  707. static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  708. {
  709. struct af9013_state *state = fe->demodulator_priv;
  710. *ucblocks = state->dvbv3_ucblocks;
  711. return 0;
  712. }
  713. static int af9013_init(struct dvb_frontend *fe)
  714. {
  715. struct af9013_state *state = fe->demodulator_priv;
  716. struct i2c_client *client = state->client;
  717. int ret, i, len;
  718. unsigned int utmp;
  719. u8 buf[3];
  720. const struct af9013_reg_mask_val *tab;
  721. dev_dbg(&client->dev, "\n");
  722. /* ADC on */
  723. ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x00);
  724. if (ret)
  725. goto err;
  726. /* Clear reset */
  727. ret = regmap_update_bits(state->regmap, 0xd417, 0x02, 0x00);
  728. if (ret)
  729. goto err;
  730. /* Disable reset */
  731. ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x00);
  732. if (ret)
  733. goto err;
  734. /* write API version to firmware */
  735. ret = regmap_bulk_write(state->regmap, 0x9bf2, state->api_version, 4);
  736. if (ret)
  737. goto err;
  738. /* program ADC control */
  739. switch (state->clk) {
  740. case 28800000: /* 28.800 MHz */
  741. utmp = 0;
  742. break;
  743. case 20480000: /* 20.480 MHz */
  744. utmp = 1;
  745. break;
  746. case 28000000: /* 28.000 MHz */
  747. utmp = 2;
  748. break;
  749. case 25000000: /* 25.000 MHz */
  750. utmp = 3;
  751. break;
  752. default:
  753. ret = -EINVAL;
  754. goto err;
  755. }
  756. ret = regmap_update_bits(state->regmap, 0x9bd2, 0x0f, utmp);
  757. if (ret)
  758. goto err;
  759. utmp = div_u64((u64)state->clk * 0x80000, 1000000);
  760. buf[0] = (utmp >> 0) & 0xff;
  761. buf[1] = (utmp >> 8) & 0xff;
  762. buf[2] = (utmp >> 16) & 0xff;
  763. ret = regmap_bulk_write(state->regmap, 0xd180, buf, 3);
  764. if (ret)
  765. goto err;
  766. /* Demod core settings */
  767. dev_dbg(&client->dev, "load demod core settings\n");
  768. len = ARRAY_SIZE(demod_init_tab);
  769. tab = demod_init_tab;
  770. for (i = 0; i < len; i++) {
  771. ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
  772. tab[i].val);
  773. if (ret)
  774. goto err;
  775. }
  776. /* Demod tuner specific settings */
  777. dev_dbg(&client->dev, "load tuner specific settings\n");
  778. switch (state->tuner) {
  779. case AF9013_TUNER_MXL5003D:
  780. len = ARRAY_SIZE(tuner_init_tab_mxl5003d);
  781. tab = tuner_init_tab_mxl5003d;
  782. break;
  783. case AF9013_TUNER_MXL5005D:
  784. case AF9013_TUNER_MXL5005R:
  785. case AF9013_TUNER_MXL5007T:
  786. len = ARRAY_SIZE(tuner_init_tab_mxl5005);
  787. tab = tuner_init_tab_mxl5005;
  788. break;
  789. case AF9013_TUNER_ENV77H11D5:
  790. len = ARRAY_SIZE(tuner_init_tab_env77h11d5);
  791. tab = tuner_init_tab_env77h11d5;
  792. break;
  793. case AF9013_TUNER_MT2060:
  794. len = ARRAY_SIZE(tuner_init_tab_mt2060);
  795. tab = tuner_init_tab_mt2060;
  796. break;
  797. case AF9013_TUNER_MC44S803:
  798. len = ARRAY_SIZE(tuner_init_tab_mc44s803);
  799. tab = tuner_init_tab_mc44s803;
  800. break;
  801. case AF9013_TUNER_QT1010:
  802. case AF9013_TUNER_QT1010A:
  803. len = ARRAY_SIZE(tuner_init_tab_qt1010);
  804. tab = tuner_init_tab_qt1010;
  805. break;
  806. case AF9013_TUNER_MT2060_2:
  807. len = ARRAY_SIZE(tuner_init_tab_mt2060_2);
  808. tab = tuner_init_tab_mt2060_2;
  809. break;
  810. case AF9013_TUNER_TDA18271:
  811. case AF9013_TUNER_TDA18218:
  812. len = ARRAY_SIZE(tuner_init_tab_tda18271);
  813. tab = tuner_init_tab_tda18271;
  814. break;
  815. case AF9013_TUNER_UNKNOWN:
  816. default:
  817. len = ARRAY_SIZE(tuner_init_tab_unknown);
  818. tab = tuner_init_tab_unknown;
  819. break;
  820. }
  821. for (i = 0; i < len; i++) {
  822. ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
  823. tab[i].val);
  824. if (ret)
  825. goto err;
  826. }
  827. /* TS interface */
  828. if (state->ts_output_pin == 7)
  829. utmp = 1 << 3 | state->ts_mode << 1;
  830. else
  831. utmp = 0 << 3 | state->ts_mode << 1;
  832. ret = regmap_update_bits(state->regmap, 0xd500, 0x0e, utmp);
  833. if (ret)
  834. goto err;
  835. /* enable lock led */
  836. ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x01);
  837. if (ret)
  838. goto err;
  839. state->first_tune = true;
  840. return 0;
  841. err:
  842. dev_dbg(&client->dev, "failed %d\n", ret);
  843. return ret;
  844. }
  845. static int af9013_sleep(struct dvb_frontend *fe)
  846. {
  847. struct af9013_state *state = fe->demodulator_priv;
  848. struct i2c_client *client = state->client;
  849. int ret;
  850. unsigned int utmp;
  851. dev_dbg(&client->dev, "\n");
  852. /* disable lock led */
  853. ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x00);
  854. if (ret)
  855. goto err;
  856. /* Enable reset */
  857. ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x10);
  858. if (ret)
  859. goto err;
  860. /* Start reset execution */
  861. ret = regmap_write(state->regmap, 0xaeff, 0x01);
  862. if (ret)
  863. goto err;
  864. /* Wait reset performs */
  865. ret = regmap_read_poll_timeout(state->regmap, 0xd417, utmp,
  866. (utmp >> 1) & 0x01, 5000, 1000000);
  867. if (ret)
  868. goto err;
  869. if (!((utmp >> 1) & 0x01)) {
  870. ret = -ETIMEDOUT;
  871. goto err;
  872. }
  873. /* ADC off */
  874. ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x08);
  875. if (ret)
  876. goto err;
  877. return 0;
  878. err:
  879. dev_dbg(&client->dev, "failed %d\n", ret);
  880. return ret;
  881. }
  882. static const struct dvb_frontend_ops af9013_ops;
  883. static int af9013_download_firmware(struct af9013_state *state)
  884. {
  885. struct i2c_client *client = state->client;
  886. int ret, i, len, rem;
  887. unsigned int utmp;
  888. u8 buf[4];
  889. u16 checksum = 0;
  890. const struct firmware *firmware;
  891. const char *name = AF9013_FIRMWARE;
  892. dev_dbg(&client->dev, "\n");
  893. /* Check whether firmware is already running */
  894. ret = regmap_read(state->regmap, 0x98be, &utmp);
  895. if (ret)
  896. goto err;
  897. dev_dbg(&client->dev, "firmware status %02x\n", utmp);
  898. if (utmp == 0x0c)
  899. return 0;
  900. dev_info(&client->dev, "found a '%s' in cold state, will try to load a firmware\n",
  901. af9013_ops.info.name);
  902. /* Request the firmware, will block and timeout */
  903. ret = request_firmware(&firmware, name, &client->dev);
  904. if (ret) {
  905. dev_info(&client->dev, "firmware file '%s' not found %d\n",
  906. name, ret);
  907. goto err;
  908. }
  909. dev_info(&client->dev, "downloading firmware from file '%s'\n",
  910. name);
  911. /* Write firmware checksum & size */
  912. for (i = 0; i < firmware->size; i++)
  913. checksum += firmware->data[i];
  914. buf[0] = (checksum >> 8) & 0xff;
  915. buf[1] = (checksum >> 0) & 0xff;
  916. buf[2] = (firmware->size >> 8) & 0xff;
  917. buf[3] = (firmware->size >> 0) & 0xff;
  918. ret = regmap_bulk_write(state->regmap, 0x50fc, buf, 4);
  919. if (ret)
  920. goto err_release_firmware;
  921. /* Download firmware */
  922. #define LEN_MAX 16
  923. for (rem = firmware->size; rem > 0; rem -= LEN_MAX) {
  924. len = min(LEN_MAX, rem);
  925. ret = regmap_bulk_write(state->regmap,
  926. 0x5100 + firmware->size - rem,
  927. &firmware->data[firmware->size - rem],
  928. len);
  929. if (ret) {
  930. dev_err(&client->dev, "firmware download failed %d\n",
  931. ret);
  932. goto err_release_firmware;
  933. }
  934. }
  935. release_firmware(firmware);
  936. /* Boot firmware */
  937. ret = regmap_write(state->regmap, 0xe205, 0x01);
  938. if (ret)
  939. goto err;
  940. /* Check firmware status. 0c=OK, 04=fail */
  941. ret = regmap_read_poll_timeout(state->regmap, 0x98be, utmp,
  942. (utmp == 0x0c || utmp == 0x04),
  943. 5000, 1000000);
  944. if (ret)
  945. goto err;
  946. dev_dbg(&client->dev, "firmware status %02x\n", utmp);
  947. if (utmp == 0x04) {
  948. ret = -ENODEV;
  949. dev_err(&client->dev, "firmware did not run\n");
  950. goto err;
  951. } else if (utmp != 0x0c) {
  952. ret = -ENODEV;
  953. dev_err(&client->dev, "firmware boot timeout\n");
  954. goto err;
  955. }
  956. dev_info(&client->dev, "found a '%s' in warm state\n",
  957. af9013_ops.info.name);
  958. return 0;
  959. err_release_firmware:
  960. release_firmware(firmware);
  961. err:
  962. dev_dbg(&client->dev, "failed %d\n", ret);
  963. return ret;
  964. }
  965. static const struct dvb_frontend_ops af9013_ops = {
  966. .delsys = { SYS_DVBT },
  967. .info = {
  968. .name = "Afatech AF9013",
  969. .frequency_min_hz = 174 * MHz,
  970. .frequency_max_hz = 862 * MHz,
  971. .frequency_stepsize_hz = 250 * kHz,
  972. .caps = FE_CAN_FEC_1_2 |
  973. FE_CAN_FEC_2_3 |
  974. FE_CAN_FEC_3_4 |
  975. FE_CAN_FEC_5_6 |
  976. FE_CAN_FEC_7_8 |
  977. FE_CAN_FEC_AUTO |
  978. FE_CAN_QPSK |
  979. FE_CAN_QAM_16 |
  980. FE_CAN_QAM_64 |
  981. FE_CAN_QAM_AUTO |
  982. FE_CAN_TRANSMISSION_MODE_AUTO |
  983. FE_CAN_GUARD_INTERVAL_AUTO |
  984. FE_CAN_HIERARCHY_AUTO |
  985. FE_CAN_RECOVER |
  986. FE_CAN_MUTE_TS
  987. },
  988. .init = af9013_init,
  989. .sleep = af9013_sleep,
  990. .get_tune_settings = af9013_get_tune_settings,
  991. .set_frontend = af9013_set_frontend,
  992. .get_frontend = af9013_get_frontend,
  993. .read_status = af9013_read_status,
  994. .read_snr = af9013_read_snr,
  995. .read_signal_strength = af9013_read_signal_strength,
  996. .read_ber = af9013_read_ber,
  997. .read_ucblocks = af9013_read_ucblocks,
  998. };
  999. static int af9013_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
  1000. {
  1001. struct af9013_state *state = fe->demodulator_priv;
  1002. struct i2c_client *client = state->client;
  1003. int ret;
  1004. dev_dbg(&client->dev, "onoff %d\n", onoff);
  1005. ret = regmap_update_bits(state->regmap, 0xd503, 0x01, onoff);
  1006. if (ret)
  1007. goto err;
  1008. return 0;
  1009. err:
  1010. dev_dbg(&client->dev, "failed %d\n", ret);
  1011. return ret;
  1012. }
  1013. static int af9013_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
  1014. int onoff)
  1015. {
  1016. struct af9013_state *state = fe->demodulator_priv;
  1017. struct i2c_client *client = state->client;
  1018. int ret;
  1019. u8 buf[2];
  1020. dev_dbg(&client->dev, "index %d, pid %04x, onoff %d\n",
  1021. index, pid, onoff);
  1022. if (pid > 0x1fff) {
  1023. /* 0x2000 is kernel virtual pid for whole ts (all pids) */
  1024. ret = 0;
  1025. goto err;
  1026. }
  1027. buf[0] = (pid >> 0) & 0xff;
  1028. buf[1] = (pid >> 8) & 0xff;
  1029. ret = regmap_bulk_write(state->regmap, 0xd505, buf, 2);
  1030. if (ret)
  1031. goto err;
  1032. ret = regmap_write(state->regmap, 0xd504, onoff << 5 | index << 0);
  1033. if (ret)
  1034. goto err;
  1035. return 0;
  1036. err:
  1037. dev_dbg(&client->dev, "failed %d\n", ret);
  1038. return ret;
  1039. }
  1040. static struct dvb_frontend *af9013_get_dvb_frontend(struct i2c_client *client)
  1041. {
  1042. struct af9013_state *state = i2c_get_clientdata(client);
  1043. dev_dbg(&client->dev, "\n");
  1044. return &state->fe;
  1045. }
  1046. static struct i2c_adapter *af9013_get_i2c_adapter(struct i2c_client *client)
  1047. {
  1048. struct af9013_state *state = i2c_get_clientdata(client);
  1049. dev_dbg(&client->dev, "\n");
  1050. return state->muxc->adapter[0];
  1051. }
  1052. /*
  1053. * XXX: Hackish solution. We use virtual register, reg bit 16, to carry info
  1054. * about i2c adapter locking. Own locking is needed because i2c mux call has
  1055. * already locked i2c adapter.
  1056. */
  1057. static int af9013_select(struct i2c_mux_core *muxc, u32 chan)
  1058. {
  1059. struct af9013_state *state = i2c_mux_priv(muxc);
  1060. struct i2c_client *client = state->client;
  1061. int ret;
  1062. dev_dbg(&client->dev, "\n");
  1063. if (state->ts_mode == AF9013_TS_MODE_USB)
  1064. ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x08);
  1065. else
  1066. ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x04);
  1067. if (ret)
  1068. goto err;
  1069. return 0;
  1070. err:
  1071. dev_dbg(&client->dev, "failed %d\n", ret);
  1072. return ret;
  1073. }
  1074. static int af9013_deselect(struct i2c_mux_core *muxc, u32 chan)
  1075. {
  1076. struct af9013_state *state = i2c_mux_priv(muxc);
  1077. struct i2c_client *client = state->client;
  1078. int ret;
  1079. dev_dbg(&client->dev, "\n");
  1080. if (state->ts_mode == AF9013_TS_MODE_USB)
  1081. ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x00);
  1082. else
  1083. ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x00);
  1084. if (ret)
  1085. goto err;
  1086. return 0;
  1087. err:
  1088. dev_dbg(&client->dev, "failed %d\n", ret);
  1089. return ret;
  1090. }
  1091. /* Own I2C access routines needed for regmap as chip uses extra command byte */
  1092. static int af9013_wregs(struct i2c_client *client, u8 cmd, u16 reg,
  1093. const u8 *val, int len, u8 lock)
  1094. {
  1095. int ret;
  1096. u8 buf[21];
  1097. struct i2c_msg msg[1] = {
  1098. {
  1099. .addr = client->addr,
  1100. .flags = 0,
  1101. .len = 3 + len,
  1102. .buf = buf,
  1103. }
  1104. };
  1105. if (3 + len > sizeof(buf)) {
  1106. ret = -EINVAL;
  1107. goto err;
  1108. }
  1109. buf[0] = (reg >> 8) & 0xff;
  1110. buf[1] = (reg >> 0) & 0xff;
  1111. buf[2] = cmd;
  1112. memcpy(&buf[3], val, len);
  1113. if (lock)
  1114. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1115. ret = __i2c_transfer(client->adapter, msg, 1);
  1116. if (lock)
  1117. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1118. if (ret < 0) {
  1119. goto err;
  1120. } else if (ret != 1) {
  1121. ret = -EREMOTEIO;
  1122. goto err;
  1123. }
  1124. return 0;
  1125. err:
  1126. dev_dbg(&client->dev, "failed %d\n", ret);
  1127. return ret;
  1128. }
  1129. static int af9013_rregs(struct i2c_client *client, u8 cmd, u16 reg,
  1130. u8 *val, int len, u8 lock)
  1131. {
  1132. int ret;
  1133. u8 buf[3];
  1134. struct i2c_msg msg[2] = {
  1135. {
  1136. .addr = client->addr,
  1137. .flags = 0,
  1138. .len = 3,
  1139. .buf = buf,
  1140. }, {
  1141. .addr = client->addr,
  1142. .flags = I2C_M_RD,
  1143. .len = len,
  1144. .buf = val,
  1145. }
  1146. };
  1147. buf[0] = (reg >> 8) & 0xff;
  1148. buf[1] = (reg >> 0) & 0xff;
  1149. buf[2] = cmd;
  1150. if (lock)
  1151. i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1152. ret = __i2c_transfer(client->adapter, msg, 2);
  1153. if (lock)
  1154. i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
  1155. if (ret < 0) {
  1156. goto err;
  1157. } else if (ret != 2) {
  1158. ret = -EREMOTEIO;
  1159. goto err;
  1160. }
  1161. return 0;
  1162. err:
  1163. dev_dbg(&client->dev, "failed %d\n", ret);
  1164. return ret;
  1165. }
  1166. static int af9013_regmap_write(void *context, const void *data, size_t count)
  1167. {
  1168. struct i2c_client *client = context;
  1169. struct af9013_state *state = i2c_get_clientdata(client);
  1170. int ret, i;
  1171. u8 cmd;
  1172. u8 lock = !((u8 *)data)[0];
  1173. u16 reg = ((u8 *)data)[1] << 8 | ((u8 *)data)[2] << 0;
  1174. u8 *val = &((u8 *)data)[3];
  1175. const unsigned int len = count - 3;
  1176. if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
  1177. cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|1 << 0;
  1178. ret = af9013_wregs(client, cmd, reg, val, len, lock);
  1179. if (ret)
  1180. goto err;
  1181. } else if (reg >= 0x5100 && reg < 0x8fff) {
  1182. /* Firmware download */
  1183. cmd = 1 << 7|1 << 6|(len - 1) << 2|1 << 1|1 << 0;
  1184. ret = af9013_wregs(client, cmd, reg, val, len, lock);
  1185. if (ret)
  1186. goto err;
  1187. } else {
  1188. cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|1 << 0;
  1189. for (i = 0; i < len; i++) {
  1190. ret = af9013_wregs(client, cmd, reg + i, val + i, 1,
  1191. lock);
  1192. if (ret)
  1193. goto err;
  1194. }
  1195. }
  1196. return 0;
  1197. err:
  1198. dev_dbg(&client->dev, "failed %d\n", ret);
  1199. return ret;
  1200. }
  1201. static int af9013_regmap_read(void *context, const void *reg_buf,
  1202. size_t reg_size, void *val_buf, size_t val_size)
  1203. {
  1204. struct i2c_client *client = context;
  1205. struct af9013_state *state = i2c_get_clientdata(client);
  1206. int ret, i;
  1207. u8 cmd;
  1208. u8 lock = !((u8 *)reg_buf)[0];
  1209. u16 reg = ((u8 *)reg_buf)[1] << 8 | ((u8 *)reg_buf)[2] << 0;
  1210. u8 *val = &((u8 *)val_buf)[0];
  1211. const unsigned int len = val_size;
  1212. if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
  1213. cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|0 << 0;
  1214. ret = af9013_rregs(client, cmd, reg, val_buf, len, lock);
  1215. if (ret)
  1216. goto err;
  1217. } else {
  1218. cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|0 << 0;
  1219. for (i = 0; i < len; i++) {
  1220. ret = af9013_rregs(client, cmd, reg + i, val + i, 1,
  1221. lock);
  1222. if (ret)
  1223. goto err;
  1224. }
  1225. }
  1226. return 0;
  1227. err:
  1228. dev_dbg(&client->dev, "failed %d\n", ret);
  1229. return ret;
  1230. }
  1231. static int af9013_probe(struct i2c_client *client,
  1232. const struct i2c_device_id *id)
  1233. {
  1234. struct af9013_state *state;
  1235. struct af9013_platform_data *pdata = client->dev.platform_data;
  1236. struct dtv_frontend_properties *c;
  1237. int ret, i;
  1238. u8 firmware_version[4];
  1239. static const struct regmap_bus regmap_bus = {
  1240. .read = af9013_regmap_read,
  1241. .write = af9013_regmap_write,
  1242. };
  1243. static const struct regmap_config regmap_config = {
  1244. /* Actual reg is 16 bits, see i2c adapter lock */
  1245. .reg_bits = 24,
  1246. .val_bits = 8,
  1247. };
  1248. state = kzalloc(sizeof(*state), GFP_KERNEL);
  1249. if (!state) {
  1250. ret = -ENOMEM;
  1251. goto err;
  1252. }
  1253. dev_dbg(&client->dev, "\n");
  1254. /* Setup the state */
  1255. state->client = client;
  1256. i2c_set_clientdata(client, state);
  1257. state->clk = pdata->clk;
  1258. state->tuner = pdata->tuner;
  1259. state->if_frequency = pdata->if_frequency;
  1260. state->ts_mode = pdata->ts_mode;
  1261. state->ts_output_pin = pdata->ts_output_pin;
  1262. state->spec_inv = pdata->spec_inv;
  1263. memcpy(&state->api_version, pdata->api_version, sizeof(state->api_version));
  1264. memcpy(&state->gpio, pdata->gpio, sizeof(state->gpio));
  1265. state->regmap = regmap_init(&client->dev, &regmap_bus, client,
  1266. &regmap_config);
  1267. if (IS_ERR(state->regmap)) {
  1268. ret = PTR_ERR(state->regmap);
  1269. goto err_kfree;
  1270. }
  1271. /* Create mux i2c adapter */
  1272. state->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
  1273. af9013_select, af9013_deselect);
  1274. if (!state->muxc) {
  1275. ret = -ENOMEM;
  1276. goto err_regmap_exit;
  1277. }
  1278. state->muxc->priv = state;
  1279. ret = i2c_mux_add_adapter(state->muxc, 0, 0, 0);
  1280. if (ret)
  1281. goto err_regmap_exit;
  1282. /* Download firmware */
  1283. if (state->ts_mode != AF9013_TS_MODE_USB) {
  1284. ret = af9013_download_firmware(state);
  1285. if (ret)
  1286. goto err_i2c_mux_del_adapters;
  1287. }
  1288. /* Firmware version */
  1289. ret = regmap_bulk_read(state->regmap, 0x5103, firmware_version,
  1290. sizeof(firmware_version));
  1291. if (ret)
  1292. goto err_i2c_mux_del_adapters;
  1293. /* Set GPIOs */
  1294. for (i = 0; i < sizeof(state->gpio); i++) {
  1295. ret = af9013_set_gpio(state, i, state->gpio[i]);
  1296. if (ret)
  1297. goto err_i2c_mux_del_adapters;
  1298. }
  1299. /* Create dvb frontend */
  1300. memcpy(&state->fe.ops, &af9013_ops, sizeof(state->fe.ops));
  1301. state->fe.demodulator_priv = state;
  1302. /* Setup callbacks */
  1303. pdata->get_dvb_frontend = af9013_get_dvb_frontend;
  1304. pdata->get_i2c_adapter = af9013_get_i2c_adapter;
  1305. pdata->pid_filter = af9013_pid_filter;
  1306. pdata->pid_filter_ctrl = af9013_pid_filter_ctrl;
  1307. /* Init stats to indicate which stats are supported */
  1308. c = &state->fe.dtv_property_cache;
  1309. c->strength.len = 1;
  1310. c->cnr.len = 1;
  1311. c->post_bit_error.len = 1;
  1312. c->post_bit_count.len = 1;
  1313. c->block_error.len = 1;
  1314. c->block_count.len = 1;
  1315. dev_info(&client->dev, "Afatech AF9013 successfully attached\n");
  1316. dev_info(&client->dev, "firmware version: %d.%d.%d.%d\n",
  1317. firmware_version[0], firmware_version[1],
  1318. firmware_version[2], firmware_version[3]);
  1319. return 0;
  1320. err_i2c_mux_del_adapters:
  1321. i2c_mux_del_adapters(state->muxc);
  1322. err_regmap_exit:
  1323. regmap_exit(state->regmap);
  1324. err_kfree:
  1325. kfree(state);
  1326. err:
  1327. dev_dbg(&client->dev, "failed %d\n", ret);
  1328. return ret;
  1329. }
  1330. static void af9013_remove(struct i2c_client *client)
  1331. {
  1332. struct af9013_state *state = i2c_get_clientdata(client);
  1333. dev_dbg(&client->dev, "\n");
  1334. i2c_mux_del_adapters(state->muxc);
  1335. regmap_exit(state->regmap);
  1336. kfree(state);
  1337. }
  1338. static const struct i2c_device_id af9013_id_table[] = {
  1339. {"af9013", 0},
  1340. {}
  1341. };
  1342. MODULE_DEVICE_TABLE(i2c, af9013_id_table);
  1343. static struct i2c_driver af9013_driver = {
  1344. .driver = {
  1345. .name = "af9013",
  1346. .suppress_bind_attrs = true,
  1347. },
  1348. .probe = af9013_probe,
  1349. .remove = af9013_remove,
  1350. .id_table = af9013_id_table,
  1351. };
  1352. module_i2c_driver(af9013_driver);
  1353. MODULE_AUTHOR("Antti Palosaari <[email protected]>");
  1354. MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
  1355. MODULE_LICENSE("GPL");
  1356. MODULE_FIRMWARE(AF9013_FIRMWARE);