pcc.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2014 Linaro Ltd.
  4. * Author: Ashwin Chaugule <[email protected]>
  5. *
  6. * PCC (Platform Communication Channel) is defined in the ACPI 5.0+
  7. * specification. It is a mailbox like mechanism to allow clients
  8. * such as CPPC (Collaborative Processor Performance Control), RAS
  9. * (Reliability, Availability and Serviceability) and MPST (Memory
  10. * Node Power State Table) to talk to the platform (e.g. BMC) through
  11. * shared memory regions as defined in the PCC table entries. The PCC
  12. * specification supports a Doorbell mechanism for the PCC clients
  13. * to notify the platform about new data. This Doorbell information
  14. * is also specified in each PCC table entry.
  15. *
  16. * Typical high level flow of operation is:
  17. *
  18. * PCC Reads:
  19. * * Client tries to acquire a channel lock.
  20. * * After it is acquired it writes READ cmd in communication region cmd
  21. * address.
  22. * * Client issues mbox_send_message() which rings the PCC doorbell
  23. * for its PCC channel.
  24. * * If command completes, then client has control over channel and
  25. * it can proceed with its reads.
  26. * * Client releases lock.
  27. *
  28. * PCC Writes:
  29. * * Client tries to acquire channel lock.
  30. * * Client writes to its communication region after it acquires a
  31. * channel lock.
  32. * * Client writes WRITE cmd in communication region cmd address.
  33. * * Client issues mbox_send_message() which rings the PCC doorbell
  34. * for its PCC channel.
  35. * * If command completes, then writes have succeeded and it can release
  36. * the channel lock.
  37. *
  38. * There is a Nominal latency defined for each channel which indicates
  39. * how long to wait until a command completes. If command is not complete
  40. * the client needs to retry or assume failure.
  41. *
  42. * For more details about PCC, please see the ACPI specification from
  43. * http://www.uefi.org/ACPIv5.1 Section 14.
  44. *
  45. * This file implements PCC as a Mailbox controller and allows for PCC
  46. * clients to be implemented as its Mailbox Client Channels.
  47. */
  48. #include <linux/acpi.h>
  49. #include <linux/delay.h>
  50. #include <linux/io.h>
  51. #include <linux/init.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/list.h>
  54. #include <linux/log2.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/mailbox_controller.h>
  57. #include <linux/mailbox_client.h>
  58. #include <linux/io-64-nonatomic-lo-hi.h>
  59. #include <acpi/pcc.h>
  60. #include "mailbox.h"
  61. #define MBOX_IRQ_NAME "pcc-mbox"
  62. /**
  63. * struct pcc_chan_reg - PCC register bundle
  64. *
  65. * @vaddr: cached virtual address for this register
  66. * @gas: pointer to the generic address structure for this register
  67. * @preserve_mask: bitmask to preserve when writing to this register
  68. * @set_mask: bitmask to set when writing to this register
  69. * @status_mask: bitmask to determine and/or update the status for this register
  70. */
  71. struct pcc_chan_reg {
  72. void __iomem *vaddr;
  73. struct acpi_generic_address *gas;
  74. u64 preserve_mask;
  75. u64 set_mask;
  76. u64 status_mask;
  77. };
  78. /**
  79. * struct pcc_chan_info - PCC channel specific information
  80. *
  81. * @chan: PCC channel information with Shared Memory Region info
  82. * @db: PCC register bundle for the doorbell register
  83. * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge
  84. * register
  85. * @cmd_complete: PCC register bundle for the command complete check register
  86. * @cmd_update: PCC register bundle for the command complete update register
  87. * @error: PCC register bundle for the error status register
  88. * @plat_irq: platform interrupt
  89. */
  90. struct pcc_chan_info {
  91. struct pcc_mbox_chan chan;
  92. struct pcc_chan_reg db;
  93. struct pcc_chan_reg plat_irq_ack;
  94. struct pcc_chan_reg cmd_complete;
  95. struct pcc_chan_reg cmd_update;
  96. struct pcc_chan_reg error;
  97. int plat_irq;
  98. };
  99. #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan)
  100. static struct pcc_chan_info *chan_info;
  101. static int pcc_chan_count;
  102. /*
  103. * PCC can be used with perf critical drivers such as CPPC
  104. * So it makes sense to locally cache the virtual address and
  105. * use it to read/write to PCC registers such as doorbell register
  106. *
  107. * The below read_register and write_registers are used to read and
  108. * write from perf critical registers such as PCC doorbell register
  109. */
  110. static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
  111. {
  112. switch (bit_width) {
  113. case 8:
  114. *val = readb(vaddr);
  115. break;
  116. case 16:
  117. *val = readw(vaddr);
  118. break;
  119. case 32:
  120. *val = readl(vaddr);
  121. break;
  122. case 64:
  123. *val = readq(vaddr);
  124. break;
  125. }
  126. }
  127. static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
  128. {
  129. switch (bit_width) {
  130. case 8:
  131. writeb(val, vaddr);
  132. break;
  133. case 16:
  134. writew(val, vaddr);
  135. break;
  136. case 32:
  137. writel(val, vaddr);
  138. break;
  139. case 64:
  140. writeq(val, vaddr);
  141. break;
  142. }
  143. }
  144. static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
  145. {
  146. int ret = 0;
  147. if (!reg->gas) {
  148. *val = 0;
  149. return 0;
  150. }
  151. if (reg->vaddr)
  152. read_register(reg->vaddr, val, reg->gas->bit_width);
  153. else
  154. ret = acpi_read(val, reg->gas);
  155. return ret;
  156. }
  157. static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
  158. {
  159. int ret = 0;
  160. if (!reg->gas)
  161. return 0;
  162. if (reg->vaddr)
  163. write_register(reg->vaddr, val, reg->gas->bit_width);
  164. else
  165. ret = acpi_write(val, reg->gas);
  166. return ret;
  167. }
  168. static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg)
  169. {
  170. int ret = 0;
  171. u64 val;
  172. ret = pcc_chan_reg_read(reg, &val);
  173. if (ret)
  174. return ret;
  175. val &= reg->preserve_mask;
  176. val |= reg->set_mask;
  177. return pcc_chan_reg_write(reg, val);
  178. }
  179. /**
  180. * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number
  181. * @interrupt: GSI number.
  182. * @flags: interrupt flags
  183. *
  184. * Returns: a valid linux IRQ number on success
  185. * 0 or -EINVAL on failure
  186. */
  187. static int pcc_map_interrupt(u32 interrupt, u32 flags)
  188. {
  189. int trigger, polarity;
  190. if (!interrupt)
  191. return 0;
  192. trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
  193. : ACPI_LEVEL_SENSITIVE;
  194. polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
  195. : ACPI_ACTIVE_HIGH;
  196. return acpi_register_gsi(NULL, interrupt, trigger, polarity);
  197. }
  198. /**
  199. * pcc_mbox_irq - PCC mailbox interrupt handler
  200. * @irq: interrupt number
  201. * @p: data/cookie passed from the caller to identify the channel
  202. *
  203. * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not
  204. */
  205. static irqreturn_t pcc_mbox_irq(int irq, void *p)
  206. {
  207. struct pcc_chan_info *pchan;
  208. struct mbox_chan *chan = p;
  209. u64 val;
  210. int ret;
  211. pchan = chan->con_priv;
  212. ret = pcc_chan_reg_read(&pchan->cmd_complete, &val);
  213. if (ret)
  214. return IRQ_NONE;
  215. if (val) { /* Ensure GAS exists and value is non-zero */
  216. val &= pchan->cmd_complete.status_mask;
  217. if (!val)
  218. return IRQ_NONE;
  219. }
  220. ret = pcc_chan_reg_read(&pchan->error, &val);
  221. if (ret)
  222. return IRQ_NONE;
  223. val &= pchan->error.status_mask;
  224. if (val) {
  225. val &= ~pchan->error.status_mask;
  226. pcc_chan_reg_write(&pchan->error, val);
  227. return IRQ_NONE;
  228. }
  229. if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack))
  230. return IRQ_NONE;
  231. mbox_chan_received_data(chan, NULL);
  232. return IRQ_HANDLED;
  233. }
  234. /**
  235. * pcc_mbox_request_channel - PCC clients call this function to
  236. * request a pointer to their PCC subspace, from which they
  237. * can get the details of communicating with the remote.
  238. * @cl: Pointer to Mailbox client, so we know where to bind the
  239. * Channel.
  240. * @subspace_id: The PCC Subspace index as parsed in the PCC client
  241. * ACPI package. This is used to lookup the array of PCC
  242. * subspaces as parsed by the PCC Mailbox controller.
  243. *
  244. * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR.
  245. */
  246. struct pcc_mbox_chan *
  247. pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id)
  248. {
  249. struct pcc_chan_info *pchan;
  250. struct mbox_chan *chan;
  251. struct device *dev;
  252. unsigned long flags;
  253. if (subspace_id < 0 || subspace_id >= pcc_chan_count)
  254. return ERR_PTR(-ENOENT);
  255. pchan = chan_info + subspace_id;
  256. chan = pchan->chan.mchan;
  257. if (IS_ERR(chan) || chan->cl) {
  258. pr_err("Channel not found for idx: %d\n", subspace_id);
  259. return ERR_PTR(-EBUSY);
  260. }
  261. dev = chan->mbox->dev;
  262. spin_lock_irqsave(&chan->lock, flags);
  263. chan->msg_free = 0;
  264. chan->msg_count = 0;
  265. chan->active_req = NULL;
  266. chan->cl = cl;
  267. init_completion(&chan->tx_complete);
  268. if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone)
  269. chan->txdone_method = TXDONE_BY_ACK;
  270. spin_unlock_irqrestore(&chan->lock, flags);
  271. if (pchan->plat_irq > 0) {
  272. int rc;
  273. rc = devm_request_irq(dev, pchan->plat_irq, pcc_mbox_irq, 0,
  274. MBOX_IRQ_NAME, chan);
  275. if (unlikely(rc)) {
  276. dev_err(dev, "failed to register PCC interrupt %d\n",
  277. pchan->plat_irq);
  278. pcc_mbox_free_channel(&pchan->chan);
  279. return ERR_PTR(rc);
  280. }
  281. }
  282. return &pchan->chan;
  283. }
  284. EXPORT_SYMBOL_GPL(pcc_mbox_request_channel);
  285. /**
  286. * pcc_mbox_free_channel - Clients call this to free their Channel.
  287. *
  288. * @pchan: Pointer to the PCC mailbox channel as returned by
  289. * pcc_mbox_request_channel()
  290. */
  291. void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan)
  292. {
  293. struct pcc_chan_info *pchan_info = to_pcc_chan_info(pchan);
  294. struct mbox_chan *chan = pchan->mchan;
  295. unsigned long flags;
  296. if (!chan || !chan->cl)
  297. return;
  298. if (pchan_info->plat_irq > 0)
  299. devm_free_irq(chan->mbox->dev, pchan_info->plat_irq, chan);
  300. spin_lock_irqsave(&chan->lock, flags);
  301. chan->cl = NULL;
  302. chan->active_req = NULL;
  303. if (chan->txdone_method == TXDONE_BY_ACK)
  304. chan->txdone_method = TXDONE_BY_POLL;
  305. spin_unlock_irqrestore(&chan->lock, flags);
  306. }
  307. EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
  308. /**
  309. * pcc_send_data - Called from Mailbox Controller code. Used
  310. * here only to ring the channel doorbell. The PCC client
  311. * specific read/write is done in the client driver in
  312. * order to maintain atomicity over PCC channel once
  313. * OS has control over it. See above for flow of operations.
  314. * @chan: Pointer to Mailbox channel over which to send data.
  315. * @data: Client specific data written over channel. Used here
  316. * only for debug after PCC transaction completes.
  317. *
  318. * Return: Err if something failed else 0 for success.
  319. */
  320. static int pcc_send_data(struct mbox_chan *chan, void *data)
  321. {
  322. int ret;
  323. struct pcc_chan_info *pchan = chan->con_priv;
  324. ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update);
  325. if (ret)
  326. return ret;
  327. return pcc_chan_reg_read_modify_write(&pchan->db);
  328. }
  329. static const struct mbox_chan_ops pcc_chan_ops = {
  330. .send_data = pcc_send_data,
  331. };
  332. /**
  333. * parse_pcc_subspace - Count PCC subspaces defined
  334. * @header: Pointer to the ACPI subtable header under the PCCT.
  335. * @end: End of subtable entry.
  336. *
  337. * Return: If we find a PCC subspace entry of a valid type, return 0.
  338. * Otherwise, return -EINVAL.
  339. *
  340. * This gets called for each entry in the PCC table.
  341. */
  342. static int parse_pcc_subspace(union acpi_subtable_headers *header,
  343. const unsigned long end)
  344. {
  345. struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header;
  346. if (ss->header.type < ACPI_PCCT_TYPE_RESERVED)
  347. return 0;
  348. return -EINVAL;
  349. }
  350. static int
  351. pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas,
  352. u64 preserve_mask, u64 set_mask, u64 status_mask, char *name)
  353. {
  354. if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  355. if (!(gas->bit_width >= 8 && gas->bit_width <= 64 &&
  356. is_power_of_2(gas->bit_width))) {
  357. pr_err("Error: Cannot access register of %u bit width",
  358. gas->bit_width);
  359. return -EFAULT;
  360. }
  361. reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8);
  362. if (!reg->vaddr) {
  363. pr_err("Failed to ioremap PCC %s register\n", name);
  364. return -ENOMEM;
  365. }
  366. }
  367. reg->gas = gas;
  368. reg->preserve_mask = preserve_mask;
  369. reg->set_mask = set_mask;
  370. reg->status_mask = status_mask;
  371. return 0;
  372. }
  373. /**
  374. * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register
  375. *
  376. * @pchan: Pointer to the PCC channel info structure.
  377. * @pcct_entry: Pointer to the ACPI subtable header.
  378. *
  379. * Return: 0 for Success, else errno.
  380. *
  381. * There should be one entry per PCC channel. This gets called for each
  382. * entry in the PCC table. This uses PCCY Type1 structure for all applicable
  383. * types(Type 1-4) to fetch irq
  384. */
  385. static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan,
  386. struct acpi_subtable_header *pcct_entry)
  387. {
  388. int ret = 0;
  389. struct acpi_pcct_hw_reduced *pcct_ss;
  390. if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE ||
  391. pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
  392. return 0;
  393. pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
  394. pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt,
  395. (u32)pcct_ss->flags);
  396. if (pchan->plat_irq <= 0) {
  397. pr_err("PCC GSI %d not registered\n",
  398. pcct_ss->platform_interrupt);
  399. return -EINVAL;
  400. }
  401. if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  402. struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss;
  403. ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
  404. &pcct2_ss->platform_ack_register,
  405. pcct2_ss->ack_preserve_mask,
  406. pcct2_ss->ack_write_mask, 0,
  407. "PLAT IRQ ACK");
  408. } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE ||
  409. pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) {
  410. struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss;
  411. ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
  412. &pcct_ext->platform_ack_register,
  413. pcct_ext->ack_preserve_mask,
  414. pcct_ext->ack_set_mask, 0,
  415. "PLAT IRQ ACK");
  416. }
  417. return ret;
  418. }
  419. /**
  420. * pcc_parse_subspace_db_reg - Parse the PCC doorbell register
  421. *
  422. * @pchan: Pointer to the PCC channel info structure.
  423. * @pcct_entry: Pointer to the ACPI subtable header.
  424. *
  425. * Return: 0 for Success, else errno.
  426. */
  427. static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan,
  428. struct acpi_subtable_header *pcct_entry)
  429. {
  430. int ret = 0;
  431. if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  432. struct acpi_pcct_subspace *pcct_ss;
  433. pcct_ss = (struct acpi_pcct_subspace *)pcct_entry;
  434. ret = pcc_chan_reg_init(&pchan->db,
  435. &pcct_ss->doorbell_register,
  436. pcct_ss->preserve_mask,
  437. pcct_ss->write_mask, 0, "Doorbell");
  438. } else {
  439. struct acpi_pcct_ext_pcc_master *pcct_ext;
  440. pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry;
  441. ret = pcc_chan_reg_init(&pchan->db,
  442. &pcct_ext->doorbell_register,
  443. pcct_ext->preserve_mask,
  444. pcct_ext->write_mask, 0, "Doorbell");
  445. if (ret)
  446. return ret;
  447. ret = pcc_chan_reg_init(&pchan->cmd_complete,
  448. &pcct_ext->cmd_complete_register,
  449. 0, 0, pcct_ext->cmd_complete_mask,
  450. "Command Complete Check");
  451. if (ret)
  452. return ret;
  453. ret = pcc_chan_reg_init(&pchan->cmd_update,
  454. &pcct_ext->cmd_update_register,
  455. pcct_ext->cmd_update_preserve_mask,
  456. pcct_ext->cmd_update_set_mask, 0,
  457. "Command Complete Update");
  458. if (ret)
  459. return ret;
  460. ret = pcc_chan_reg_init(&pchan->error,
  461. &pcct_ext->error_status_register,
  462. 0, 0, pcct_ext->error_status_mask,
  463. "Error Status");
  464. }
  465. return ret;
  466. }
  467. /**
  468. * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information
  469. *
  470. * @pchan: Pointer to the PCC channel info structure.
  471. * @pcct_entry: Pointer to the ACPI subtable header.
  472. *
  473. */
  474. static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan,
  475. struct acpi_subtable_header *pcct_entry)
  476. {
  477. if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  478. struct acpi_pcct_subspace *pcct_ss =
  479. (struct acpi_pcct_subspace *)pcct_entry;
  480. pchan->chan.shmem_base_addr = pcct_ss->base_address;
  481. pchan->chan.shmem_size = pcct_ss->length;
  482. pchan->chan.latency = pcct_ss->latency;
  483. pchan->chan.max_access_rate = pcct_ss->max_access_rate;
  484. pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time;
  485. } else {
  486. struct acpi_pcct_ext_pcc_master *pcct_ext =
  487. (struct acpi_pcct_ext_pcc_master *)pcct_entry;
  488. pchan->chan.shmem_base_addr = pcct_ext->base_address;
  489. pchan->chan.shmem_size = pcct_ext->length;
  490. pchan->chan.latency = pcct_ext->latency;
  491. pchan->chan.max_access_rate = pcct_ext->max_access_rate;
  492. pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time;
  493. }
  494. }
  495. /**
  496. * acpi_pcc_probe - Parse the ACPI tree for the PCCT.
  497. *
  498. * Return: 0 for Success, else errno.
  499. */
  500. static int __init acpi_pcc_probe(void)
  501. {
  502. int count, i, rc = 0;
  503. acpi_status status;
  504. struct acpi_table_header *pcct_tbl;
  505. struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED];
  506. status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
  507. if (ACPI_FAILURE(status) || !pcct_tbl)
  508. return -ENODEV;
  509. /* Set up the subtable handlers */
  510. for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE;
  511. i < ACPI_PCCT_TYPE_RESERVED; i++) {
  512. proc[i].id = i;
  513. proc[i].count = 0;
  514. proc[i].handler = parse_pcc_subspace;
  515. }
  516. count = acpi_table_parse_entries_array(ACPI_SIG_PCCT,
  517. sizeof(struct acpi_table_pcct), proc,
  518. ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES);
  519. if (count <= 0 || count > MAX_PCC_SUBSPACES) {
  520. if (count < 0)
  521. pr_warn("Error parsing PCC subspaces from PCCT\n");
  522. else
  523. pr_warn("Invalid PCCT: %d PCC subspaces\n", count);
  524. rc = -EINVAL;
  525. } else {
  526. pcc_chan_count = count;
  527. }
  528. acpi_put_table(pcct_tbl);
  529. return rc;
  530. }
  531. /**
  532. * pcc_mbox_probe - Called when we find a match for the
  533. * PCCT platform device. This is purely used to represent
  534. * the PCCT as a virtual device for registering with the
  535. * generic Mailbox framework.
  536. *
  537. * @pdev: Pointer to platform device returned when a match
  538. * is found.
  539. *
  540. * Return: 0 for Success, else errno.
  541. */
  542. static int pcc_mbox_probe(struct platform_device *pdev)
  543. {
  544. struct device *dev = &pdev->dev;
  545. struct mbox_controller *pcc_mbox_ctrl;
  546. struct mbox_chan *pcc_mbox_channels;
  547. struct acpi_table_header *pcct_tbl;
  548. struct acpi_subtable_header *pcct_entry;
  549. struct acpi_table_pcct *acpi_pcct_tbl;
  550. acpi_status status = AE_OK;
  551. int i, rc, count = pcc_chan_count;
  552. /* Search for PCCT */
  553. status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
  554. if (ACPI_FAILURE(status) || !pcct_tbl)
  555. return -ENODEV;
  556. pcc_mbox_channels = devm_kcalloc(dev, count, sizeof(*pcc_mbox_channels),
  557. GFP_KERNEL);
  558. if (!pcc_mbox_channels) {
  559. rc = -ENOMEM;
  560. goto err;
  561. }
  562. chan_info = devm_kcalloc(dev, count, sizeof(*chan_info), GFP_KERNEL);
  563. if (!chan_info) {
  564. rc = -ENOMEM;
  565. goto err;
  566. }
  567. pcc_mbox_ctrl = devm_kzalloc(dev, sizeof(*pcc_mbox_ctrl), GFP_KERNEL);
  568. if (!pcc_mbox_ctrl) {
  569. rc = -ENOMEM;
  570. goto err;
  571. }
  572. /* Point to the first PCC subspace entry */
  573. pcct_entry = (struct acpi_subtable_header *) (
  574. (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct));
  575. acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl;
  576. if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL)
  577. pcc_mbox_ctrl->txdone_irq = true;
  578. for (i = 0; i < count; i++) {
  579. struct pcc_chan_info *pchan = chan_info + i;
  580. pcc_mbox_channels[i].con_priv = pchan;
  581. pchan->chan.mchan = &pcc_mbox_channels[i];
  582. if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE &&
  583. !pcc_mbox_ctrl->txdone_irq) {
  584. pr_err("Platform Interrupt flag must be set to 1");
  585. rc = -EINVAL;
  586. goto err;
  587. }
  588. if (pcc_mbox_ctrl->txdone_irq) {
  589. rc = pcc_parse_subspace_irq(pchan, pcct_entry);
  590. if (rc < 0)
  591. goto err;
  592. }
  593. rc = pcc_parse_subspace_db_reg(pchan, pcct_entry);
  594. if (rc < 0)
  595. goto err;
  596. pcc_parse_subspace_shmem(pchan, pcct_entry);
  597. pcct_entry = (struct acpi_subtable_header *)
  598. ((unsigned long) pcct_entry + pcct_entry->length);
  599. }
  600. pcc_mbox_ctrl->num_chans = count;
  601. pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans);
  602. pcc_mbox_ctrl->chans = pcc_mbox_channels;
  603. pcc_mbox_ctrl->ops = &pcc_chan_ops;
  604. pcc_mbox_ctrl->dev = dev;
  605. pr_info("Registering PCC driver as Mailbox controller\n");
  606. rc = mbox_controller_register(pcc_mbox_ctrl);
  607. if (rc)
  608. pr_err("Err registering PCC as Mailbox controller: %d\n", rc);
  609. else
  610. return 0;
  611. err:
  612. acpi_put_table(pcct_tbl);
  613. return rc;
  614. }
  615. static struct platform_driver pcc_mbox_driver = {
  616. .probe = pcc_mbox_probe,
  617. .driver = {
  618. .name = "PCCT",
  619. },
  620. };
  621. static int __init pcc_init(void)
  622. {
  623. int ret;
  624. struct platform_device *pcc_pdev;
  625. if (acpi_disabled)
  626. return -ENODEV;
  627. /* Check if PCC support is available. */
  628. ret = acpi_pcc_probe();
  629. if (ret) {
  630. pr_debug("ACPI PCC probe failed.\n");
  631. return -ENODEV;
  632. }
  633. pcc_pdev = platform_create_bundle(&pcc_mbox_driver,
  634. pcc_mbox_probe, NULL, 0, NULL, 0);
  635. if (IS_ERR(pcc_pdev)) {
  636. pr_debug("Err creating PCC platform bundle\n");
  637. pcc_chan_count = 0;
  638. return PTR_ERR(pcc_pdev);
  639. }
  640. return 0;
  641. }
  642. /*
  643. * Make PCC init postcore so that users of this mailbox
  644. * such as the ACPI Processor driver have it available
  645. * at their init.
  646. */
  647. postcore_initcall(pcc_init);