hi3660-mailbox.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2017-2018 HiSilicon Limited.
  3. // Copyright (c) 2017-2018 Linaro Limited.
  4. #include <linux/bitops.h>
  5. #include <linux/delay.h>
  6. #include <linux/device.h>
  7. #include <linux/err.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/iopoll.h>
  11. #include <linux/mailbox_controller.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/slab.h>
  15. #include "mailbox.h"
  16. #define MBOX_CHAN_MAX 32
  17. #define MBOX_RX 0x0
  18. #define MBOX_TX 0x1
  19. #define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40))
  20. #define MBOX_SRC_REG 0x00
  21. #define MBOX_DST_REG 0x04
  22. #define MBOX_DCLR_REG 0x08
  23. #define MBOX_DSTAT_REG 0x0c
  24. #define MBOX_MODE_REG 0x10
  25. #define MBOX_IMASK_REG 0x14
  26. #define MBOX_ICLR_REG 0x18
  27. #define MBOX_SEND_REG 0x1c
  28. #define MBOX_DATA_REG 0x20
  29. #define MBOX_IPC_LOCK_REG 0xa00
  30. #define MBOX_IPC_UNLOCK 0x1acce551
  31. #define MBOX_AUTOMATIC_ACK 1
  32. #define MBOX_STATE_IDLE BIT(4)
  33. #define MBOX_STATE_READY BIT(5)
  34. #define MBOX_STATE_ACK BIT(7)
  35. #define MBOX_MSG_LEN 8
  36. /**
  37. * struct hi3660_chan_info - Hi3660 mailbox channel information
  38. * @dst_irq: Interrupt vector for remote processor
  39. * @ack_irq: Interrupt vector for local processor
  40. *
  41. * A channel can be used for TX or RX, it can trigger remote
  42. * processor interrupt to notify remote processor and can receive
  43. * interrupt if it has an incoming message.
  44. */
  45. struct hi3660_chan_info {
  46. unsigned int dst_irq;
  47. unsigned int ack_irq;
  48. };
  49. /**
  50. * struct hi3660_mbox - Hi3660 mailbox controller data
  51. * @dev: Device to which it is attached
  52. * @base: Base address of the register mapping region
  53. * @chan: Representation of channels in mailbox controller
  54. * @mchan: Representation of channel info
  55. * @controller: Representation of a communication channel controller
  56. *
  57. * Mailbox controller includes 32 channels and can allocate
  58. * channel for message transferring.
  59. */
  60. struct hi3660_mbox {
  61. struct device *dev;
  62. void __iomem *base;
  63. struct mbox_chan chan[MBOX_CHAN_MAX];
  64. struct hi3660_chan_info mchan[MBOX_CHAN_MAX];
  65. struct mbox_controller controller;
  66. };
  67. static struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox)
  68. {
  69. return container_of(mbox, struct hi3660_mbox, controller);
  70. }
  71. static int hi3660_mbox_check_state(struct mbox_chan *chan)
  72. {
  73. unsigned long ch = (unsigned long)chan->con_priv;
  74. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  75. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  76. void __iomem *base = MBOX_BASE(mbox, ch);
  77. unsigned long val;
  78. unsigned int ret;
  79. /* Mailbox is ready to use */
  80. if (readl(base + MBOX_MODE_REG) & MBOX_STATE_READY)
  81. return 0;
  82. /* Wait for acknowledge from remote */
  83. ret = readx_poll_timeout_atomic(readl, base + MBOX_MODE_REG,
  84. val, (val & MBOX_STATE_ACK), 1000, 300000);
  85. if (ret) {
  86. dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__);
  87. return ret;
  88. }
  89. /* clear ack state, mailbox will get back to ready state */
  90. writel(BIT(mchan->ack_irq), base + MBOX_ICLR_REG);
  91. return 0;
  92. }
  93. static int hi3660_mbox_unlock(struct mbox_chan *chan)
  94. {
  95. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  96. unsigned int val, retry = 3;
  97. do {
  98. writel(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG);
  99. val = readl(mbox->base + MBOX_IPC_LOCK_REG);
  100. if (!val)
  101. break;
  102. udelay(10);
  103. } while (retry--);
  104. if (val)
  105. dev_err(mbox->dev, "%s: failed to unlock mailbox\n", __func__);
  106. return (!val) ? 0 : -ETIMEDOUT;
  107. }
  108. static int hi3660_mbox_acquire_channel(struct mbox_chan *chan)
  109. {
  110. unsigned long ch = (unsigned long)chan->con_priv;
  111. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  112. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  113. void __iomem *base = MBOX_BASE(mbox, ch);
  114. unsigned int val, retry;
  115. for (retry = 10; retry; retry--) {
  116. /* Check if channel is in idle state */
  117. if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) {
  118. writel(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
  119. /* Check ack bit has been set successfully */
  120. val = readl(base + MBOX_SRC_REG);
  121. if (val & BIT(mchan->ack_irq))
  122. break;
  123. }
  124. }
  125. if (!retry)
  126. dev_err(mbox->dev, "%s: failed to acquire channel\n", __func__);
  127. return retry ? 0 : -ETIMEDOUT;
  128. }
  129. static int hi3660_mbox_startup(struct mbox_chan *chan)
  130. {
  131. int ret;
  132. ret = hi3660_mbox_unlock(chan);
  133. if (ret)
  134. return ret;
  135. ret = hi3660_mbox_acquire_channel(chan);
  136. if (ret)
  137. return ret;
  138. return 0;
  139. }
  140. static int hi3660_mbox_send_data(struct mbox_chan *chan, void *msg)
  141. {
  142. unsigned long ch = (unsigned long)chan->con_priv;
  143. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  144. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  145. void __iomem *base = MBOX_BASE(mbox, ch);
  146. u32 *buf = msg;
  147. unsigned int i;
  148. int ret;
  149. ret = hi3660_mbox_check_state(chan);
  150. if (ret)
  151. return ret;
  152. /* Clear mask for destination interrupt */
  153. writel_relaxed(~BIT(mchan->dst_irq), base + MBOX_IMASK_REG);
  154. /* Config destination for interrupt vector */
  155. writel_relaxed(BIT(mchan->dst_irq), base + MBOX_DST_REG);
  156. /* Automatic acknowledge mode */
  157. writel_relaxed(MBOX_AUTOMATIC_ACK, base + MBOX_MODE_REG);
  158. /* Fill message data */
  159. for (i = 0; i < MBOX_MSG_LEN; i++)
  160. writel_relaxed(buf[i], base + MBOX_DATA_REG + i * 4);
  161. /* Trigger data transferring */
  162. writel(BIT(mchan->ack_irq), base + MBOX_SEND_REG);
  163. return 0;
  164. }
  165. static const struct mbox_chan_ops hi3660_mbox_ops = {
  166. .startup = hi3660_mbox_startup,
  167. .send_data = hi3660_mbox_send_data,
  168. };
  169. static struct mbox_chan *hi3660_mbox_xlate(struct mbox_controller *controller,
  170. const struct of_phandle_args *spec)
  171. {
  172. struct hi3660_mbox *mbox = to_hi3660_mbox(controller);
  173. struct hi3660_chan_info *mchan;
  174. unsigned int ch = spec->args[0];
  175. if (ch >= MBOX_CHAN_MAX) {
  176. dev_err(mbox->dev, "Invalid channel idx %d\n", ch);
  177. return ERR_PTR(-EINVAL);
  178. }
  179. mchan = &mbox->mchan[ch];
  180. mchan->dst_irq = spec->args[1];
  181. mchan->ack_irq = spec->args[2];
  182. return &mbox->chan[ch];
  183. }
  184. static const struct of_device_id hi3660_mbox_of_match[] = {
  185. { .compatible = "hisilicon,hi3660-mbox", },
  186. {},
  187. };
  188. MODULE_DEVICE_TABLE(of, hi3660_mbox_of_match);
  189. static int hi3660_mbox_probe(struct platform_device *pdev)
  190. {
  191. struct device *dev = &pdev->dev;
  192. struct hi3660_mbox *mbox;
  193. struct mbox_chan *chan;
  194. unsigned long ch;
  195. int err;
  196. mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
  197. if (!mbox)
  198. return -ENOMEM;
  199. mbox->base = devm_platform_ioremap_resource(pdev, 0);
  200. if (IS_ERR(mbox->base))
  201. return PTR_ERR(mbox->base);
  202. mbox->dev = dev;
  203. mbox->controller.dev = dev;
  204. mbox->controller.chans = mbox->chan;
  205. mbox->controller.num_chans = MBOX_CHAN_MAX;
  206. mbox->controller.ops = &hi3660_mbox_ops;
  207. mbox->controller.of_xlate = hi3660_mbox_xlate;
  208. /* Initialize mailbox channel data */
  209. chan = mbox->chan;
  210. for (ch = 0; ch < MBOX_CHAN_MAX; ch++)
  211. chan[ch].con_priv = (void *)ch;
  212. err = devm_mbox_controller_register(dev, &mbox->controller);
  213. if (err) {
  214. dev_err(dev, "Failed to register mailbox %d\n", err);
  215. return err;
  216. }
  217. platform_set_drvdata(pdev, mbox);
  218. dev_info(dev, "Mailbox enabled\n");
  219. return 0;
  220. }
  221. static struct platform_driver hi3660_mbox_driver = {
  222. .probe = hi3660_mbox_probe,
  223. .driver = {
  224. .name = "hi3660-mbox",
  225. .of_match_table = hi3660_mbox_of_match,
  226. },
  227. };
  228. static int __init hi3660_mbox_init(void)
  229. {
  230. return platform_driver_register(&hi3660_mbox_driver);
  231. }
  232. core_initcall(hi3660_mbox_init);
  233. static void __exit hi3660_mbox_exit(void)
  234. {
  235. platform_driver_unregister(&hi3660_mbox_driver);
  236. }
  237. module_exit(hi3660_mbox_exit);
  238. MODULE_LICENSE("GPL");
  239. MODULE_DESCRIPTION("Hisilicon Hi3660 Mailbox Controller");
  240. MODULE_AUTHOR("Leo Yan <[email protected]>");