smu.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PowerMac G5 SMU driver
  4. *
  5. * Copyright 2004 J. Mayer <[email protected]>
  6. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  7. */
  8. /*
  9. * TODO:
  10. * - maybe add timeout to commands ?
  11. * - blocking version of time functions
  12. * - polling version of i2c commands (including timer that works with
  13. * interrupts off)
  14. * - maybe avoid some data copies with i2c by directly using the smu cmd
  15. * buffer and a lower level internal interface
  16. * - understand SMU -> CPU events and implement reception of them via
  17. * the userland interface
  18. */
  19. #include <linux/types.h>
  20. #include <linux/kernel.h>
  21. #include <linux/device.h>
  22. #include <linux/dmapool.h>
  23. #include <linux/memblock.h>
  24. #include <linux/vmalloc.h>
  25. #include <linux/highmem.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/rtc.h>
  29. #include <linux/completion.h>
  30. #include <linux/miscdevice.h>
  31. #include <linux/delay.h>
  32. #include <linux/poll.h>
  33. #include <linux/mutex.h>
  34. #include <linux/of_device.h>
  35. #include <linux/of_irq.h>
  36. #include <linux/of_platform.h>
  37. #include <linux/slab.h>
  38. #include <linux/sched/signal.h>
  39. #include <asm/byteorder.h>
  40. #include <asm/io.h>
  41. #include <asm/machdep.h>
  42. #include <asm/pmac_feature.h>
  43. #include <asm/smu.h>
  44. #include <asm/sections.h>
  45. #include <linux/uaccess.h>
  46. #define VERSION "0.7"
  47. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  48. #undef DEBUG_SMU
  49. #ifdef DEBUG_SMU
  50. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  51. #else
  52. #define DPRINTK(fmt, args...) do { } while (0)
  53. #endif
  54. /*
  55. * This is the command buffer passed to the SMU hardware
  56. */
  57. #define SMU_MAX_DATA 254
  58. struct smu_cmd_buf {
  59. u8 cmd;
  60. u8 length;
  61. u8 data[SMU_MAX_DATA];
  62. };
  63. struct smu_device {
  64. spinlock_t lock;
  65. struct device_node *of_node;
  66. struct platform_device *of_dev;
  67. int doorbell; /* doorbell gpio */
  68. u32 __iomem *db_buf; /* doorbell buffer */
  69. struct device_node *db_node;
  70. unsigned int db_irq;
  71. int msg;
  72. struct device_node *msg_node;
  73. unsigned int msg_irq;
  74. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  75. u32 cmd_buf_abs; /* command buffer absolute */
  76. struct list_head cmd_list;
  77. struct smu_cmd *cmd_cur; /* pending command */
  78. int broken_nap;
  79. struct list_head cmd_i2c_list;
  80. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  81. struct timer_list i2c_timer;
  82. };
  83. /*
  84. * I don't think there will ever be more than one SMU, so
  85. * for now, just hard code that
  86. */
  87. static DEFINE_MUTEX(smu_mutex);
  88. static struct smu_device *smu;
  89. static DEFINE_MUTEX(smu_part_access);
  90. static int smu_irq_inited;
  91. static unsigned long smu_cmdbuf_abs;
  92. static void smu_i2c_retry(struct timer_list *t);
  93. /*
  94. * SMU driver low level stuff
  95. */
  96. static void smu_start_cmd(void)
  97. {
  98. unsigned long faddr, fend;
  99. struct smu_cmd *cmd;
  100. if (list_empty(&smu->cmd_list))
  101. return;
  102. /* Fetch first command in queue */
  103. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  104. smu->cmd_cur = cmd;
  105. list_del(&cmd->link);
  106. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  107. cmd->data_len);
  108. DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
  109. /* Fill the SMU command buffer */
  110. smu->cmd_buf->cmd = cmd->cmd;
  111. smu->cmd_buf->length = cmd->data_len;
  112. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  113. /* Flush command and data to RAM */
  114. faddr = (unsigned long)smu->cmd_buf;
  115. fend = faddr + smu->cmd_buf->length + 2;
  116. flush_dcache_range(faddr, fend);
  117. /* We also disable NAP mode for the duration of the command
  118. * on U3 based machines.
  119. * This is slightly racy as it can be written back to 1 by a sysctl
  120. * but that never happens in practice. There seem to be an issue with
  121. * U3 based machines such as the iMac G5 where napping for the
  122. * whole duration of the command prevents the SMU from fetching it
  123. * from memory. This might be related to the strange i2c based
  124. * mechanism the SMU uses to access memory.
  125. */
  126. if (smu->broken_nap)
  127. powersave_nap = 0;
  128. /* This isn't exactly a DMA mapping here, I suspect
  129. * the SMU is actually communicating with us via i2c to the
  130. * northbridge or the CPU to access RAM.
  131. */
  132. writel(smu->cmd_buf_abs, smu->db_buf);
  133. /* Ring the SMU doorbell */
  134. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  135. }
  136. static irqreturn_t smu_db_intr(int irq, void *arg)
  137. {
  138. unsigned long flags;
  139. struct smu_cmd *cmd;
  140. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  141. void *misc = NULL;
  142. u8 gpio;
  143. int rc = 0;
  144. /* SMU completed the command, well, we hope, let's make sure
  145. * of it
  146. */
  147. spin_lock_irqsave(&smu->lock, flags);
  148. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  149. if ((gpio & 7) != 7) {
  150. spin_unlock_irqrestore(&smu->lock, flags);
  151. return IRQ_HANDLED;
  152. }
  153. cmd = smu->cmd_cur;
  154. smu->cmd_cur = NULL;
  155. if (cmd == NULL)
  156. goto bail;
  157. if (rc == 0) {
  158. unsigned long faddr;
  159. int reply_len;
  160. u8 ack;
  161. /* CPU might have brought back the cache line, so we need
  162. * to flush again before peeking at the SMU response. We
  163. * flush the entire buffer for now as we haven't read the
  164. * reply length (it's only 2 cache lines anyway)
  165. */
  166. faddr = (unsigned long)smu->cmd_buf;
  167. flush_dcache_range(faddr, faddr + 256);
  168. /* Now check ack */
  169. ack = (~cmd->cmd) & 0xff;
  170. if (ack != smu->cmd_buf->cmd) {
  171. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  172. ack, smu->cmd_buf->cmd);
  173. rc = -EIO;
  174. }
  175. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  176. DPRINTK("SMU: reply len: %d\n", reply_len);
  177. if (reply_len > cmd->reply_len) {
  178. printk(KERN_WARNING "SMU: reply buffer too small,"
  179. "got %d bytes for a %d bytes buffer\n",
  180. reply_len, cmd->reply_len);
  181. reply_len = cmd->reply_len;
  182. }
  183. cmd->reply_len = reply_len;
  184. if (cmd->reply_buf && reply_len)
  185. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  186. }
  187. /* Now complete the command. Write status last in order as we lost
  188. * ownership of the command structure as soon as it's no longer -1
  189. */
  190. done = cmd->done;
  191. misc = cmd->misc;
  192. mb();
  193. cmd->status = rc;
  194. /* Re-enable NAP mode */
  195. if (smu->broken_nap)
  196. powersave_nap = 1;
  197. bail:
  198. /* Start next command if any */
  199. smu_start_cmd();
  200. spin_unlock_irqrestore(&smu->lock, flags);
  201. /* Call command completion handler if any */
  202. if (done)
  203. done(cmd, misc);
  204. /* It's an edge interrupt, nothing to do */
  205. return IRQ_HANDLED;
  206. }
  207. static irqreturn_t smu_msg_intr(int irq, void *arg)
  208. {
  209. /* I don't quite know what to do with this one, we seem to never
  210. * receive it, so I suspect we have to arm it someway in the SMU
  211. * to start getting events that way.
  212. */
  213. printk(KERN_INFO "SMU: message interrupt !\n");
  214. /* It's an edge interrupt, nothing to do */
  215. return IRQ_HANDLED;
  216. }
  217. /*
  218. * Queued command management.
  219. *
  220. */
  221. int smu_queue_cmd(struct smu_cmd *cmd)
  222. {
  223. unsigned long flags;
  224. if (smu == NULL)
  225. return -ENODEV;
  226. if (cmd->data_len > SMU_MAX_DATA ||
  227. cmd->reply_len > SMU_MAX_DATA)
  228. return -EINVAL;
  229. cmd->status = 1;
  230. spin_lock_irqsave(&smu->lock, flags);
  231. list_add_tail(&cmd->link, &smu->cmd_list);
  232. if (smu->cmd_cur == NULL)
  233. smu_start_cmd();
  234. spin_unlock_irqrestore(&smu->lock, flags);
  235. /* Workaround for early calls when irq isn't available */
  236. if (!smu_irq_inited || !smu->db_irq)
  237. smu_spinwait_cmd(cmd);
  238. return 0;
  239. }
  240. EXPORT_SYMBOL(smu_queue_cmd);
  241. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  242. unsigned int data_len,
  243. void (*done)(struct smu_cmd *cmd, void *misc),
  244. void *misc, ...)
  245. {
  246. struct smu_cmd *cmd = &scmd->cmd;
  247. va_list list;
  248. int i;
  249. if (data_len > sizeof(scmd->buffer))
  250. return -EINVAL;
  251. memset(scmd, 0, sizeof(*scmd));
  252. cmd->cmd = command;
  253. cmd->data_len = data_len;
  254. cmd->data_buf = scmd->buffer;
  255. cmd->reply_len = sizeof(scmd->buffer);
  256. cmd->reply_buf = scmd->buffer;
  257. cmd->done = done;
  258. cmd->misc = misc;
  259. va_start(list, misc);
  260. for (i = 0; i < data_len; ++i)
  261. scmd->buffer[i] = (u8)va_arg(list, int);
  262. va_end(list);
  263. return smu_queue_cmd(cmd);
  264. }
  265. EXPORT_SYMBOL(smu_queue_simple);
  266. void smu_poll(void)
  267. {
  268. u8 gpio;
  269. if (smu == NULL)
  270. return;
  271. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  272. if ((gpio & 7) == 7)
  273. smu_db_intr(smu->db_irq, smu);
  274. }
  275. EXPORT_SYMBOL(smu_poll);
  276. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  277. {
  278. struct completion *comp = misc;
  279. complete(comp);
  280. }
  281. EXPORT_SYMBOL(smu_done_complete);
  282. void smu_spinwait_cmd(struct smu_cmd *cmd)
  283. {
  284. while(cmd->status == 1)
  285. smu_poll();
  286. }
  287. EXPORT_SYMBOL(smu_spinwait_cmd);
  288. /* RTC low level commands */
  289. static inline int bcd2hex (int n)
  290. {
  291. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  292. }
  293. static inline int hex2bcd (int n)
  294. {
  295. return ((n / 10) << 4) + (n % 10);
  296. }
  297. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  298. struct rtc_time *time)
  299. {
  300. cmd_buf->cmd = 0x8e;
  301. cmd_buf->length = 8;
  302. cmd_buf->data[0] = 0x80;
  303. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  304. cmd_buf->data[2] = hex2bcd(time->tm_min);
  305. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  306. cmd_buf->data[4] = time->tm_wday;
  307. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  308. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  309. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  310. }
  311. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  312. {
  313. struct smu_simple_cmd cmd;
  314. int rc;
  315. if (smu == NULL)
  316. return -ENODEV;
  317. memset(time, 0, sizeof(struct rtc_time));
  318. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  319. SMU_CMD_RTC_GET_DATETIME);
  320. if (rc)
  321. return rc;
  322. smu_spinwait_simple(&cmd);
  323. time->tm_sec = bcd2hex(cmd.buffer[0]);
  324. time->tm_min = bcd2hex(cmd.buffer[1]);
  325. time->tm_hour = bcd2hex(cmd.buffer[2]);
  326. time->tm_wday = bcd2hex(cmd.buffer[3]);
  327. time->tm_mday = bcd2hex(cmd.buffer[4]);
  328. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  329. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  330. return 0;
  331. }
  332. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  333. {
  334. struct smu_simple_cmd cmd;
  335. int rc;
  336. if (smu == NULL)
  337. return -ENODEV;
  338. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  339. SMU_CMD_RTC_SET_DATETIME,
  340. hex2bcd(time->tm_sec),
  341. hex2bcd(time->tm_min),
  342. hex2bcd(time->tm_hour),
  343. time->tm_wday,
  344. hex2bcd(time->tm_mday),
  345. hex2bcd(time->tm_mon) + 1,
  346. hex2bcd(time->tm_year - 100));
  347. if (rc)
  348. return rc;
  349. smu_spinwait_simple(&cmd);
  350. return 0;
  351. }
  352. void smu_shutdown(void)
  353. {
  354. struct smu_simple_cmd cmd;
  355. if (smu == NULL)
  356. return;
  357. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  358. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  359. return;
  360. smu_spinwait_simple(&cmd);
  361. for (;;)
  362. ;
  363. }
  364. void smu_restart(void)
  365. {
  366. struct smu_simple_cmd cmd;
  367. if (smu == NULL)
  368. return;
  369. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  370. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  371. return;
  372. smu_spinwait_simple(&cmd);
  373. for (;;)
  374. ;
  375. }
  376. int smu_present(void)
  377. {
  378. return smu != NULL;
  379. }
  380. EXPORT_SYMBOL(smu_present);
  381. int __init smu_init (void)
  382. {
  383. struct device_node *np;
  384. const u32 *data;
  385. int ret = 0;
  386. np = of_find_node_by_type(NULL, "smu");
  387. if (np == NULL)
  388. return -ENODEV;
  389. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  390. /*
  391. * SMU based G5s need some memory below 2Gb. Thankfully this is
  392. * called at a time where memblock is still available.
  393. */
  394. smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL);
  395. if (smu_cmdbuf_abs == 0) {
  396. printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
  397. ret = -EINVAL;
  398. goto fail_np;
  399. }
  400. smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES);
  401. if (!smu)
  402. panic("%s: Failed to allocate %zu bytes\n", __func__,
  403. sizeof(struct smu_device));
  404. spin_lock_init(&smu->lock);
  405. INIT_LIST_HEAD(&smu->cmd_list);
  406. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  407. smu->of_node = np;
  408. smu->db_irq = 0;
  409. smu->msg_irq = 0;
  410. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  411. * 32 bits value safely
  412. */
  413. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  414. smu->cmd_buf = __va(smu_cmdbuf_abs);
  415. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  416. if (smu->db_node == NULL) {
  417. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  418. ret = -ENXIO;
  419. goto fail_bootmem;
  420. }
  421. data = of_get_property(smu->db_node, "reg", NULL);
  422. if (data == NULL) {
  423. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  424. ret = -ENXIO;
  425. goto fail_db_node;
  426. }
  427. /* Current setup has one doorbell GPIO that does both doorbell
  428. * and ack. GPIOs are at 0x50, best would be to find that out
  429. * in the device-tree though.
  430. */
  431. smu->doorbell = *data;
  432. if (smu->doorbell < 0x50)
  433. smu->doorbell += 0x50;
  434. /* Now look for the smu-interrupt GPIO */
  435. do {
  436. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  437. if (smu->msg_node == NULL)
  438. break;
  439. data = of_get_property(smu->msg_node, "reg", NULL);
  440. if (data == NULL) {
  441. of_node_put(smu->msg_node);
  442. smu->msg_node = NULL;
  443. break;
  444. }
  445. smu->msg = *data;
  446. if (smu->msg < 0x50)
  447. smu->msg += 0x50;
  448. } while(0);
  449. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  450. * device-tree entry giving the address. Best would probably to use
  451. * an offset for K2 base though, but let's do it that way for now.
  452. */
  453. smu->db_buf = ioremap(0x8000860c, 0x1000);
  454. if (smu->db_buf == NULL) {
  455. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  456. ret = -ENXIO;
  457. goto fail_msg_node;
  458. }
  459. /* U3 has an issue with NAP mode when issuing SMU commands */
  460. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  461. if (smu->broken_nap)
  462. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  463. sys_ctrler = SYS_CTRLER_SMU;
  464. return 0;
  465. fail_msg_node:
  466. of_node_put(smu->msg_node);
  467. fail_db_node:
  468. of_node_put(smu->db_node);
  469. fail_bootmem:
  470. memblock_free(smu, sizeof(struct smu_device));
  471. smu = NULL;
  472. fail_np:
  473. of_node_put(np);
  474. return ret;
  475. }
  476. static int smu_late_init(void)
  477. {
  478. if (!smu)
  479. return 0;
  480. timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
  481. if (smu->db_node) {
  482. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  483. if (!smu->db_irq)
  484. printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
  485. smu->db_node);
  486. }
  487. if (smu->msg_node) {
  488. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  489. if (!smu->msg_irq)
  490. printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
  491. smu->msg_node);
  492. }
  493. /*
  494. * Try to request the interrupts
  495. */
  496. if (smu->db_irq) {
  497. if (request_irq(smu->db_irq, smu_db_intr,
  498. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  499. printk(KERN_WARNING "SMU: can't "
  500. "request interrupt %d\n",
  501. smu->db_irq);
  502. smu->db_irq = 0;
  503. }
  504. }
  505. if (smu->msg_irq) {
  506. if (request_irq(smu->msg_irq, smu_msg_intr,
  507. IRQF_SHARED, "SMU message", smu) < 0) {
  508. printk(KERN_WARNING "SMU: can't "
  509. "request interrupt %d\n",
  510. smu->msg_irq);
  511. smu->msg_irq = 0;
  512. }
  513. }
  514. smu_irq_inited = 1;
  515. return 0;
  516. }
  517. /* This has to be before arch_initcall as the low i2c stuff relies on the
  518. * above having been done before we reach arch_initcalls
  519. */
  520. core_initcall(smu_late_init);
  521. /*
  522. * sysfs visibility
  523. */
  524. static void smu_expose_childs(struct work_struct *unused)
  525. {
  526. struct device_node *np;
  527. for_each_child_of_node(smu->of_node, np)
  528. if (of_device_is_compatible(np, "smu-sensors"))
  529. of_platform_device_create(np, "smu-sensors",
  530. &smu->of_dev->dev);
  531. }
  532. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  533. static int smu_platform_probe(struct platform_device* dev)
  534. {
  535. if (!smu)
  536. return -ENODEV;
  537. smu->of_dev = dev;
  538. /*
  539. * Ok, we are matched, now expose all i2c busses. We have to defer
  540. * that unfortunately or it would deadlock inside the device model
  541. */
  542. schedule_work(&smu_expose_childs_work);
  543. return 0;
  544. }
  545. static const struct of_device_id smu_platform_match[] =
  546. {
  547. {
  548. .type = "smu",
  549. },
  550. {},
  551. };
  552. static struct platform_driver smu_of_platform_driver =
  553. {
  554. .driver = {
  555. .name = "smu",
  556. .of_match_table = smu_platform_match,
  557. },
  558. .probe = smu_platform_probe,
  559. };
  560. static int __init smu_init_sysfs(void)
  561. {
  562. /*
  563. * For now, we don't power manage machines with an SMU chip,
  564. * I'm a bit too far from figuring out how that works with those
  565. * new chipsets, but that will come back and bite us
  566. */
  567. platform_driver_register(&smu_of_platform_driver);
  568. return 0;
  569. }
  570. device_initcall(smu_init_sysfs);
  571. struct platform_device *smu_get_ofdev(void)
  572. {
  573. if (!smu)
  574. return NULL;
  575. return smu->of_dev;
  576. }
  577. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  578. /*
  579. * i2c interface
  580. */
  581. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  582. {
  583. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  584. void *misc = cmd->misc;
  585. unsigned long flags;
  586. /* Check for read case */
  587. if (!fail && cmd->read) {
  588. if (cmd->pdata[0] < 1)
  589. fail = 1;
  590. else
  591. memcpy(cmd->info.data, &cmd->pdata[1],
  592. cmd->info.datalen);
  593. }
  594. DPRINTK("SMU: completing, success: %d\n", !fail);
  595. /* Update status and mark no pending i2c command with lock
  596. * held so nobody comes in while we dequeue an eventual
  597. * pending next i2c command
  598. */
  599. spin_lock_irqsave(&smu->lock, flags);
  600. smu->cmd_i2c_cur = NULL;
  601. wmb();
  602. cmd->status = fail ? -EIO : 0;
  603. /* Is there another i2c command waiting ? */
  604. if (!list_empty(&smu->cmd_i2c_list)) {
  605. struct smu_i2c_cmd *newcmd;
  606. /* Fetch it, new current, remove from list */
  607. newcmd = list_entry(smu->cmd_i2c_list.next,
  608. struct smu_i2c_cmd, link);
  609. smu->cmd_i2c_cur = newcmd;
  610. list_del(&cmd->link);
  611. /* Queue with low level smu */
  612. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  613. if (smu->cmd_cur == NULL)
  614. smu_start_cmd();
  615. }
  616. spin_unlock_irqrestore(&smu->lock, flags);
  617. /* Call command completion handler if any */
  618. if (done)
  619. done(cmd, misc);
  620. }
  621. static void smu_i2c_retry(struct timer_list *unused)
  622. {
  623. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  624. DPRINTK("SMU: i2c failure, requeuing...\n");
  625. /* requeue command simply by resetting reply_len */
  626. cmd->pdata[0] = 0xff;
  627. cmd->scmd.reply_len = sizeof(cmd->pdata);
  628. smu_queue_cmd(&cmd->scmd);
  629. }
  630. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  631. {
  632. struct smu_i2c_cmd *cmd = misc;
  633. int fail = 0;
  634. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  635. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  636. /* Check for possible status */
  637. if (scmd->status < 0)
  638. fail = 1;
  639. else if (cmd->read) {
  640. if (cmd->stage == 0)
  641. fail = cmd->pdata[0] != 0;
  642. else
  643. fail = cmd->pdata[0] >= 0x80;
  644. } else {
  645. fail = cmd->pdata[0] != 0;
  646. }
  647. /* Handle failures by requeuing command, after 5ms interval
  648. */
  649. if (fail && --cmd->retries > 0) {
  650. DPRINTK("SMU: i2c failure, starting timer...\n");
  651. BUG_ON(cmd != smu->cmd_i2c_cur);
  652. if (!smu_irq_inited) {
  653. mdelay(5);
  654. smu_i2c_retry(NULL);
  655. return;
  656. }
  657. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  658. return;
  659. }
  660. /* If failure or stage 1, command is complete */
  661. if (fail || cmd->stage != 0) {
  662. smu_i2c_complete_command(cmd, fail);
  663. return;
  664. }
  665. DPRINTK("SMU: going to stage 1\n");
  666. /* Ok, initial command complete, now poll status */
  667. scmd->reply_buf = cmd->pdata;
  668. scmd->reply_len = sizeof(cmd->pdata);
  669. scmd->data_buf = cmd->pdata;
  670. scmd->data_len = 1;
  671. cmd->pdata[0] = 0;
  672. cmd->stage = 1;
  673. cmd->retries = 20;
  674. smu_queue_cmd(scmd);
  675. }
  676. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  677. {
  678. unsigned long flags;
  679. if (smu == NULL)
  680. return -ENODEV;
  681. /* Fill most fields of scmd */
  682. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  683. cmd->scmd.done = smu_i2c_low_completion;
  684. cmd->scmd.misc = cmd;
  685. cmd->scmd.reply_buf = cmd->pdata;
  686. cmd->scmd.reply_len = sizeof(cmd->pdata);
  687. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  688. cmd->scmd.status = 1;
  689. cmd->stage = 0;
  690. cmd->pdata[0] = 0xff;
  691. cmd->retries = 20;
  692. cmd->status = 1;
  693. /* Check transfer type, sanitize some "info" fields
  694. * based on transfer type and do more checking
  695. */
  696. cmd->info.caddr = cmd->info.devaddr;
  697. cmd->read = cmd->info.devaddr & 0x01;
  698. switch(cmd->info.type) {
  699. case SMU_I2C_TRANSFER_SIMPLE:
  700. cmd->info.sublen = 0;
  701. memset(cmd->info.subaddr, 0, sizeof(cmd->info.subaddr));
  702. break;
  703. case SMU_I2C_TRANSFER_COMBINED:
  704. cmd->info.devaddr &= 0xfe;
  705. fallthrough;
  706. case SMU_I2C_TRANSFER_STDSUB:
  707. if (cmd->info.sublen > 3)
  708. return -EINVAL;
  709. break;
  710. default:
  711. return -EINVAL;
  712. }
  713. /* Finish setting up command based on transfer direction
  714. */
  715. if (cmd->read) {
  716. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  717. return -EINVAL;
  718. memset(cmd->info.data, 0xff, cmd->info.datalen);
  719. cmd->scmd.data_len = 9;
  720. } else {
  721. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  722. return -EINVAL;
  723. cmd->scmd.data_len = 9 + cmd->info.datalen;
  724. }
  725. DPRINTK("SMU: i2c enqueuing command\n");
  726. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  727. cmd->read ? "read" : "write", cmd->info.datalen,
  728. cmd->info.bus, cmd->info.caddr,
  729. cmd->info.subaddr[0], cmd->info.type);
  730. /* Enqueue command in i2c list, and if empty, enqueue also in
  731. * main command list
  732. */
  733. spin_lock_irqsave(&smu->lock, flags);
  734. if (smu->cmd_i2c_cur == NULL) {
  735. smu->cmd_i2c_cur = cmd;
  736. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  737. if (smu->cmd_cur == NULL)
  738. smu_start_cmd();
  739. } else
  740. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  741. spin_unlock_irqrestore(&smu->lock, flags);
  742. return 0;
  743. }
  744. /*
  745. * Handling of "partitions"
  746. */
  747. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  748. {
  749. DECLARE_COMPLETION_ONSTACK(comp);
  750. unsigned int chunk;
  751. struct smu_cmd cmd;
  752. int rc;
  753. u8 params[8];
  754. /* We currently use a chunk size of 0xe. We could check the
  755. * SMU firmware version and use bigger sizes though
  756. */
  757. chunk = 0xe;
  758. while (len) {
  759. unsigned int clen = min(len, chunk);
  760. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  761. cmd.data_len = 7;
  762. cmd.data_buf = params;
  763. cmd.reply_len = chunk;
  764. cmd.reply_buf = dest;
  765. cmd.done = smu_done_complete;
  766. cmd.misc = &comp;
  767. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  768. params[1] = 0x4;
  769. *((u32 *)&params[2]) = addr;
  770. params[6] = clen;
  771. rc = smu_queue_cmd(&cmd);
  772. if (rc)
  773. return rc;
  774. wait_for_completion(&comp);
  775. if (cmd.status != 0)
  776. return rc;
  777. if (cmd.reply_len != clen) {
  778. printk(KERN_DEBUG "SMU: short read in "
  779. "smu_read_datablock, got: %d, want: %d\n",
  780. cmd.reply_len, clen);
  781. return -EIO;
  782. }
  783. len -= clen;
  784. addr += clen;
  785. dest += clen;
  786. }
  787. return 0;
  788. }
  789. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  790. {
  791. DECLARE_COMPLETION_ONSTACK(comp);
  792. struct smu_simple_cmd cmd;
  793. unsigned int addr, len, tlen;
  794. struct smu_sdbp_header *hdr;
  795. struct property *prop;
  796. /* First query the partition info */
  797. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  798. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  799. smu_done_complete, &comp,
  800. SMU_CMD_PARTITION_LATEST, id);
  801. wait_for_completion(&comp);
  802. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  803. cmd.cmd.status, cmd.cmd.reply_len);
  804. /* Partition doesn't exist (or other error) */
  805. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  806. return NULL;
  807. /* Fetch address and length from reply */
  808. addr = *((u16 *)cmd.buffer);
  809. len = cmd.buffer[3] << 2;
  810. /* Calucluate total length to allocate, including the 17 bytes
  811. * for "sdb-partition-XX" that we append at the end of the buffer
  812. */
  813. tlen = sizeof(struct property) + len + 18;
  814. prop = kzalloc(tlen, GFP_KERNEL);
  815. if (prop == NULL)
  816. return NULL;
  817. hdr = (struct smu_sdbp_header *)(prop + 1);
  818. prop->name = ((char *)prop) + tlen - 18;
  819. sprintf(prop->name, "sdb-partition-%02x", id);
  820. prop->length = len;
  821. prop->value = hdr;
  822. prop->next = NULL;
  823. /* Read the datablock */
  824. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  825. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  826. "partition %02x !\n", id);
  827. goto failure;
  828. }
  829. /* Got it, check a few things and create the property */
  830. if (hdr->id != id) {
  831. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  832. "%02x !\n", id, hdr->id);
  833. goto failure;
  834. }
  835. if (of_add_property(smu->of_node, prop)) {
  836. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  837. "property !\n", id);
  838. goto failure;
  839. }
  840. return hdr;
  841. failure:
  842. kfree(prop);
  843. return NULL;
  844. }
  845. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  846. * when interruptible is 1
  847. */
  848. static const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  849. unsigned int *size, int interruptible)
  850. {
  851. char pname[32];
  852. const struct smu_sdbp_header *part;
  853. if (!smu)
  854. return NULL;
  855. sprintf(pname, "sdb-partition-%02x", id);
  856. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  857. if (interruptible) {
  858. int rc;
  859. rc = mutex_lock_interruptible(&smu_part_access);
  860. if (rc)
  861. return ERR_PTR(rc);
  862. } else
  863. mutex_lock(&smu_part_access);
  864. part = of_get_property(smu->of_node, pname, size);
  865. if (part == NULL) {
  866. DPRINTK("trying to extract from SMU ...\n");
  867. part = smu_create_sdb_partition(id);
  868. if (part != NULL && size)
  869. *size = part->len << 2;
  870. }
  871. mutex_unlock(&smu_part_access);
  872. return part;
  873. }
  874. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  875. {
  876. return __smu_get_sdb_partition(id, size, 0);
  877. }
  878. EXPORT_SYMBOL(smu_get_sdb_partition);
  879. /*
  880. * Userland driver interface
  881. */
  882. static LIST_HEAD(smu_clist);
  883. static DEFINE_SPINLOCK(smu_clist_lock);
  884. enum smu_file_mode {
  885. smu_file_commands,
  886. smu_file_events,
  887. smu_file_closing
  888. };
  889. struct smu_private
  890. {
  891. struct list_head list;
  892. enum smu_file_mode mode;
  893. int busy;
  894. struct smu_cmd cmd;
  895. spinlock_t lock;
  896. wait_queue_head_t wait;
  897. u8 buffer[SMU_MAX_DATA];
  898. };
  899. static int smu_open(struct inode *inode, struct file *file)
  900. {
  901. struct smu_private *pp;
  902. unsigned long flags;
  903. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  904. if (!pp)
  905. return -ENOMEM;
  906. spin_lock_init(&pp->lock);
  907. pp->mode = smu_file_commands;
  908. init_waitqueue_head(&pp->wait);
  909. mutex_lock(&smu_mutex);
  910. spin_lock_irqsave(&smu_clist_lock, flags);
  911. list_add(&pp->list, &smu_clist);
  912. spin_unlock_irqrestore(&smu_clist_lock, flags);
  913. file->private_data = pp;
  914. mutex_unlock(&smu_mutex);
  915. return 0;
  916. }
  917. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  918. {
  919. struct smu_private *pp = misc;
  920. wake_up_all(&pp->wait);
  921. }
  922. static ssize_t smu_write(struct file *file, const char __user *buf,
  923. size_t count, loff_t *ppos)
  924. {
  925. struct smu_private *pp = file->private_data;
  926. unsigned long flags;
  927. struct smu_user_cmd_hdr hdr;
  928. int rc = 0;
  929. if (pp->busy)
  930. return -EBUSY;
  931. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  932. return -EFAULT;
  933. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  934. pp->mode = smu_file_events;
  935. return 0;
  936. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  937. const struct smu_sdbp_header *part;
  938. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  939. if (part == NULL)
  940. return -EINVAL;
  941. else if (IS_ERR(part))
  942. return PTR_ERR(part);
  943. return 0;
  944. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  945. return -EINVAL;
  946. else if (pp->mode != smu_file_commands)
  947. return -EBADFD;
  948. else if (hdr.data_len > SMU_MAX_DATA)
  949. return -EINVAL;
  950. spin_lock_irqsave(&pp->lock, flags);
  951. if (pp->busy) {
  952. spin_unlock_irqrestore(&pp->lock, flags);
  953. return -EBUSY;
  954. }
  955. pp->busy = 1;
  956. pp->cmd.status = 1;
  957. spin_unlock_irqrestore(&pp->lock, flags);
  958. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  959. pp->busy = 0;
  960. return -EFAULT;
  961. }
  962. pp->cmd.cmd = hdr.cmd;
  963. pp->cmd.data_len = hdr.data_len;
  964. pp->cmd.reply_len = SMU_MAX_DATA;
  965. pp->cmd.data_buf = pp->buffer;
  966. pp->cmd.reply_buf = pp->buffer;
  967. pp->cmd.done = smu_user_cmd_done;
  968. pp->cmd.misc = pp;
  969. rc = smu_queue_cmd(&pp->cmd);
  970. if (rc < 0)
  971. return rc;
  972. return count;
  973. }
  974. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  975. char __user *buf, size_t count)
  976. {
  977. DECLARE_WAITQUEUE(wait, current);
  978. struct smu_user_reply_hdr hdr;
  979. unsigned long flags;
  980. int size, rc = 0;
  981. if (!pp->busy)
  982. return 0;
  983. if (count < sizeof(struct smu_user_reply_hdr))
  984. return -EOVERFLOW;
  985. spin_lock_irqsave(&pp->lock, flags);
  986. if (pp->cmd.status == 1) {
  987. if (file->f_flags & O_NONBLOCK) {
  988. spin_unlock_irqrestore(&pp->lock, flags);
  989. return -EAGAIN;
  990. }
  991. add_wait_queue(&pp->wait, &wait);
  992. for (;;) {
  993. set_current_state(TASK_INTERRUPTIBLE);
  994. rc = 0;
  995. if (pp->cmd.status != 1)
  996. break;
  997. rc = -ERESTARTSYS;
  998. if (signal_pending(current))
  999. break;
  1000. spin_unlock_irqrestore(&pp->lock, flags);
  1001. schedule();
  1002. spin_lock_irqsave(&pp->lock, flags);
  1003. }
  1004. set_current_state(TASK_RUNNING);
  1005. remove_wait_queue(&pp->wait, &wait);
  1006. }
  1007. spin_unlock_irqrestore(&pp->lock, flags);
  1008. if (rc)
  1009. return rc;
  1010. if (pp->cmd.status != 0)
  1011. pp->cmd.reply_len = 0;
  1012. size = sizeof(hdr) + pp->cmd.reply_len;
  1013. if (count < size)
  1014. size = count;
  1015. rc = size;
  1016. hdr.status = pp->cmd.status;
  1017. hdr.reply_len = pp->cmd.reply_len;
  1018. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1019. return -EFAULT;
  1020. size -= sizeof(hdr);
  1021. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1022. return -EFAULT;
  1023. pp->busy = 0;
  1024. return rc;
  1025. }
  1026. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1027. char __user *buf, size_t count)
  1028. {
  1029. /* Not implemented */
  1030. msleep_interruptible(1000);
  1031. return 0;
  1032. }
  1033. static ssize_t smu_read(struct file *file, char __user *buf,
  1034. size_t count, loff_t *ppos)
  1035. {
  1036. struct smu_private *pp = file->private_data;
  1037. if (pp->mode == smu_file_commands)
  1038. return smu_read_command(file, pp, buf, count);
  1039. if (pp->mode == smu_file_events)
  1040. return smu_read_events(file, pp, buf, count);
  1041. return -EBADFD;
  1042. }
  1043. static __poll_t smu_fpoll(struct file *file, poll_table *wait)
  1044. {
  1045. struct smu_private *pp = file->private_data;
  1046. __poll_t mask = 0;
  1047. unsigned long flags;
  1048. if (!pp)
  1049. return 0;
  1050. if (pp->mode == smu_file_commands) {
  1051. poll_wait(file, &pp->wait, wait);
  1052. spin_lock_irqsave(&pp->lock, flags);
  1053. if (pp->busy && pp->cmd.status != 1)
  1054. mask |= EPOLLIN;
  1055. spin_unlock_irqrestore(&pp->lock, flags);
  1056. }
  1057. if (pp->mode == smu_file_events) {
  1058. /* Not yet implemented */
  1059. }
  1060. return mask;
  1061. }
  1062. static int smu_release(struct inode *inode, struct file *file)
  1063. {
  1064. struct smu_private *pp = file->private_data;
  1065. unsigned long flags;
  1066. unsigned int busy;
  1067. if (!pp)
  1068. return 0;
  1069. file->private_data = NULL;
  1070. /* Mark file as closing to avoid races with new request */
  1071. spin_lock_irqsave(&pp->lock, flags);
  1072. pp->mode = smu_file_closing;
  1073. busy = pp->busy;
  1074. /* Wait for any pending request to complete */
  1075. if (busy && pp->cmd.status == 1) {
  1076. DECLARE_WAITQUEUE(wait, current);
  1077. add_wait_queue(&pp->wait, &wait);
  1078. for (;;) {
  1079. set_current_state(TASK_UNINTERRUPTIBLE);
  1080. if (pp->cmd.status != 1)
  1081. break;
  1082. spin_unlock_irqrestore(&pp->lock, flags);
  1083. schedule();
  1084. spin_lock_irqsave(&pp->lock, flags);
  1085. }
  1086. set_current_state(TASK_RUNNING);
  1087. remove_wait_queue(&pp->wait, &wait);
  1088. }
  1089. spin_unlock_irqrestore(&pp->lock, flags);
  1090. spin_lock_irqsave(&smu_clist_lock, flags);
  1091. list_del(&pp->list);
  1092. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1093. kfree(pp);
  1094. return 0;
  1095. }
  1096. static const struct file_operations smu_device_fops = {
  1097. .llseek = no_llseek,
  1098. .read = smu_read,
  1099. .write = smu_write,
  1100. .poll = smu_fpoll,
  1101. .open = smu_open,
  1102. .release = smu_release,
  1103. };
  1104. static struct miscdevice pmu_device = {
  1105. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1106. };
  1107. static int smu_device_init(void)
  1108. {
  1109. if (!smu)
  1110. return -ENODEV;
  1111. if (misc_register(&pmu_device) < 0)
  1112. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1113. return 0;
  1114. }
  1115. device_initcall(smu_device_init);