irq-mtk-sysirq.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014 MediaTek Inc.
  4. * Author: Joe.C <[email protected]>
  5. */
  6. #include <linux/irq.h>
  7. #include <linux/irqchip.h>
  8. #include <linux/irqdomain.h>
  9. #include <linux/of.h>
  10. #include <linux/of_irq.h>
  11. #include <linux/of_address.h>
  12. #include <linux/io.h>
  13. #include <linux/slab.h>
  14. #include <linux/spinlock.h>
  15. struct mtk_sysirq_chip_data {
  16. raw_spinlock_t lock;
  17. u32 nr_intpol_bases;
  18. void __iomem **intpol_bases;
  19. u32 *intpol_words;
  20. u8 *intpol_idx;
  21. u16 *which_word;
  22. };
  23. static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
  24. {
  25. irq_hw_number_t hwirq = data->hwirq;
  26. struct mtk_sysirq_chip_data *chip_data = data->chip_data;
  27. u8 intpol_idx = chip_data->intpol_idx[hwirq];
  28. void __iomem *base;
  29. u32 offset, reg_index, value;
  30. unsigned long flags;
  31. int ret;
  32. base = chip_data->intpol_bases[intpol_idx];
  33. reg_index = chip_data->which_word[hwirq];
  34. offset = hwirq & 0x1f;
  35. raw_spin_lock_irqsave(&chip_data->lock, flags);
  36. value = readl_relaxed(base + reg_index * 4);
  37. if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
  38. if (type == IRQ_TYPE_LEVEL_LOW)
  39. type = IRQ_TYPE_LEVEL_HIGH;
  40. else
  41. type = IRQ_TYPE_EDGE_RISING;
  42. value |= (1 << offset);
  43. } else {
  44. value &= ~(1 << offset);
  45. }
  46. writel_relaxed(value, base + reg_index * 4);
  47. data = data->parent_data;
  48. ret = data->chip->irq_set_type(data, type);
  49. raw_spin_unlock_irqrestore(&chip_data->lock, flags);
  50. return ret;
  51. }
  52. static struct irq_chip mtk_sysirq_chip = {
  53. .name = "MT_SYSIRQ",
  54. .irq_mask = irq_chip_mask_parent,
  55. .irq_unmask = irq_chip_unmask_parent,
  56. .irq_eoi = irq_chip_eoi_parent,
  57. .irq_set_type = mtk_sysirq_set_type,
  58. .irq_retrigger = irq_chip_retrigger_hierarchy,
  59. .irq_set_affinity = irq_chip_set_affinity_parent,
  60. .flags = IRQCHIP_SKIP_SET_WAKE,
  61. };
  62. static int mtk_sysirq_domain_translate(struct irq_domain *d,
  63. struct irq_fwspec *fwspec,
  64. unsigned long *hwirq,
  65. unsigned int *type)
  66. {
  67. if (is_of_node(fwspec->fwnode)) {
  68. if (fwspec->param_count != 3)
  69. return -EINVAL;
  70. /* No PPI should point to this domain */
  71. if (fwspec->param[0] != 0)
  72. return -EINVAL;
  73. *hwirq = fwspec->param[1];
  74. *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
  75. return 0;
  76. }
  77. return -EINVAL;
  78. }
  79. static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
  80. unsigned int nr_irqs, void *arg)
  81. {
  82. int i;
  83. irq_hw_number_t hwirq;
  84. struct irq_fwspec *fwspec = arg;
  85. struct irq_fwspec gic_fwspec = *fwspec;
  86. if (fwspec->param_count != 3)
  87. return -EINVAL;
  88. /* sysirq doesn't support PPI */
  89. if (fwspec->param[0])
  90. return -EINVAL;
  91. hwirq = fwspec->param[1];
  92. for (i = 0; i < nr_irqs; i++)
  93. irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
  94. &mtk_sysirq_chip,
  95. domain->host_data);
  96. gic_fwspec.fwnode = domain->parent->fwnode;
  97. return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec);
  98. }
  99. static const struct irq_domain_ops sysirq_domain_ops = {
  100. .translate = mtk_sysirq_domain_translate,
  101. .alloc = mtk_sysirq_domain_alloc,
  102. .free = irq_domain_free_irqs_common,
  103. };
  104. static int __init mtk_sysirq_of_init(struct device_node *node,
  105. struct device_node *parent)
  106. {
  107. struct irq_domain *domain, *domain_parent;
  108. struct mtk_sysirq_chip_data *chip_data;
  109. int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
  110. domain_parent = irq_find_host(parent);
  111. if (!domain_parent) {
  112. pr_err("mtk_sysirq: interrupt-parent not found\n");
  113. return -EINVAL;
  114. }
  115. chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
  116. if (!chip_data)
  117. return -ENOMEM;
  118. while (of_get_address(node, i++, NULL, NULL))
  119. nr_intpol_bases++;
  120. if (nr_intpol_bases == 0) {
  121. pr_err("mtk_sysirq: base address not specified\n");
  122. ret = -EINVAL;
  123. goto out_free_chip;
  124. }
  125. chip_data->intpol_words = kcalloc(nr_intpol_bases,
  126. sizeof(*chip_data->intpol_words),
  127. GFP_KERNEL);
  128. if (!chip_data->intpol_words) {
  129. ret = -ENOMEM;
  130. goto out_free_chip;
  131. }
  132. chip_data->intpol_bases = kcalloc(nr_intpol_bases,
  133. sizeof(*chip_data->intpol_bases),
  134. GFP_KERNEL);
  135. if (!chip_data->intpol_bases) {
  136. ret = -ENOMEM;
  137. goto out_free_intpol_words;
  138. }
  139. for (i = 0; i < nr_intpol_bases; i++) {
  140. struct resource res;
  141. ret = of_address_to_resource(node, i, &res);
  142. size = resource_size(&res);
  143. intpol_num += size * 8;
  144. chip_data->intpol_words[i] = size / 4;
  145. chip_data->intpol_bases[i] = of_iomap(node, i);
  146. if (ret || !chip_data->intpol_bases[i]) {
  147. pr_err("%pOF: couldn't map region %d\n", node, i);
  148. ret = -ENODEV;
  149. goto out_free_intpol;
  150. }
  151. }
  152. chip_data->intpol_idx = kcalloc(intpol_num,
  153. sizeof(*chip_data->intpol_idx),
  154. GFP_KERNEL);
  155. if (!chip_data->intpol_idx) {
  156. ret = -ENOMEM;
  157. goto out_free_intpol;
  158. }
  159. chip_data->which_word = kcalloc(intpol_num,
  160. sizeof(*chip_data->which_word),
  161. GFP_KERNEL);
  162. if (!chip_data->which_word) {
  163. ret = -ENOMEM;
  164. goto out_free_intpol_idx;
  165. }
  166. /*
  167. * assign an index of the intpol_bases for each irq
  168. * to set it fast later
  169. */
  170. for (i = 0; i < intpol_num ; i++) {
  171. u32 word = i / 32, j;
  172. for (j = 0; word >= chip_data->intpol_words[j] ; j++)
  173. word -= chip_data->intpol_words[j];
  174. chip_data->intpol_idx[i] = j;
  175. chip_data->which_word[i] = word;
  176. }
  177. domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
  178. &sysirq_domain_ops, chip_data);
  179. if (!domain) {
  180. ret = -ENOMEM;
  181. goto out_free_which_word;
  182. }
  183. raw_spin_lock_init(&chip_data->lock);
  184. return 0;
  185. out_free_which_word:
  186. kfree(chip_data->which_word);
  187. out_free_intpol_idx:
  188. kfree(chip_data->intpol_idx);
  189. out_free_intpol:
  190. for (i = 0; i < nr_intpol_bases; i++)
  191. if (chip_data->intpol_bases[i])
  192. iounmap(chip_data->intpol_bases[i]);
  193. kfree(chip_data->intpol_bases);
  194. out_free_intpol_words:
  195. kfree(chip_data->intpol_words);
  196. out_free_chip:
  197. kfree(chip_data);
  198. return ret;
  199. }
  200. IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);