qcom-hv-haptics.c 137 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/atomic.h>
  7. #include <linux/debugfs.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/fs.h>
  11. #include <linux/hrtimer.h>
  12. #include <linux/init.h>
  13. #include <linux/input.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/nvmem-consumer.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/regmap.h>
  24. #include <linux/regulator/driver.h>
  25. #include <linux/slab.h>
  26. #include <linux/suspend.h>
  27. #include <linux/types.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/workqueue.h>
  30. #include <linux/qpnp/qpnp-pbs.h>
  31. #include <linux/soc/qcom/battery_charger.h>
  32. #define CREATE_TRACE_POINTS
  33. #include <trace/events/qcom_haptics.h>
  34. /* status register definitions in HAPTICS_CFG module */
  35. #define HAP_CFG_REVISION2_REG 0x01
  36. #define HAP_CFG_V1 0x1
  37. #define HAP_CFG_V2 0x2
  38. #define HAP_CFG_V3 0x3
  39. #define HAP_CFG_V4 0x4
  40. #define HAP_CFG_STATUS_DATA_MSB_REG 0x09
  41. /* STATUS_DATA_MSB definitions while MOD_STATUS_SEL is 0 */
  42. #define AUTO_RES_CAL_DONE_BIT BIT(5)
  43. #define CAL_TLRA_CL_STS_MSB_MASK GENMASK(4, 0)
  44. /* STATUS_DATA_MSB definition while MOD_STATUS_SEL is 3 */
  45. #define LAST_GOOD_TLRA_CL_MSB_MASK GENMASK(4, 0)
  46. /* STATUS_DATA_MSB definition while MOD_STATUS_SEL is 4 */
  47. #define TLRA_CL_ERR_MSB_MASK GENMASK(4, 0)
  48. /* STATUS_DATA_MSB when MOD_STATUS_SEL is 5 and MOD_STATUS_XT.SEL is 1 */
  49. #define FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V2 GENMASK(1, 0)
  50. #define FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V3 GENMASK(2, 0)
  51. #define FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V4 GENMASK(3, 0)
  52. #define FIFO_EMPTY_FLAG_BIT BIT(6)
  53. #define FIFO_FULL_FLAG_BIT BIT(5)
  54. #define HAP_CFG_STATUS_DATA_LSB_REG 0x0A
  55. /* STATUS_DATA_LSB definition while MOD_STATUS_SEL is 0 */
  56. #define CAL_TLRA_CL_STS_LSB_MASK GENMASK(7, 0)
  57. /* STATUS_DATA_LSB when MOD_STATUS_SEL is 5 and MOD_STATUS_XT.SEL is 1 */
  58. #define FIFO_REAL_TIME_FILL_STATUS_LSB_MASK GENMASK(7, 0)
  59. /* STATUS_DATA_LSB when MOD_STATUS_SEL is 5 and MOD_STATUS_XT.SEL is 0 */
  60. #define HAP_DRV_PATTERN_SRC_STATUS_MASK GENMASK(2, 0)
  61. #define HAP_CFG_FAULT_STATUS_REG 0x0C
  62. #define SC_FLAG_BIT BIT(2)
  63. #define AUTO_RES_ERROR_BIT BIT(1)
  64. #define HPRW_RDY_FAULT_BIT BIT(0)
  65. /* Only for HAP525_HV */
  66. #define HAP_CFG_HPWR_INTF_REG 0x0B
  67. #define HPWR_INTF_STATUS_MASK GENMASK(1, 0)
  68. #define HPWR_DISABLED 0
  69. #define HPWR_READY 3
  70. #define HAP_CFG_REAL_TIME_LRA_IMPEDANCE_REG 0x0E
  71. #define LRA_IMPEDANCE_MOHMS_LSB 250
  72. #define HAP_CFG_INT_RT_STS_REG 0x10
  73. #define FIFO_EMPTY_BIT BIT(1)
  74. /* config register definitions in HAPTICS_CFG module */
  75. #define HAP_CFG_EN_CTL_REG 0x46
  76. #define HAPTICS_EN_BIT BIT(7)
  77. #define HAP_CFG_DRV_CTRL_REG 0x47
  78. #define PSTG_DLY_MASK GENMASK(7, 6)
  79. #define DRV_SLEW_RATE_MASK GENMASK(2, 0)
  80. #define HAP_CFG_VMAX_REG 0x48
  81. #define VMAX_HV_STEP_MV 50
  82. #define VMAX_MV_STEP_MV 32
  83. #define MAX_VMAX_MV 11000
  84. #define MAX_HV_VMAX_MV 10000
  85. #define MAX_MV_VMAX_MV 6000
  86. #define CLAMPED_VMAX_MV 5000
  87. #define DEFAULT_VMAX_MV 5000
  88. #define HAP_CFG_DRV_WF_SEL_REG 0x49
  89. #define DRV_WF_FMT_BIT BIT(4)
  90. #define DRV_WF_SEL_MASK GENMASK(1, 0)
  91. #define HAP_CFG_AUTO_SHUTDOWN_CFG_REG 0x4A
  92. #define HAP_CFG_TRIG_PRIORITY_REG 0x4B
  93. #define SWR_IGNORE_BIT BIT(4)
  94. #define HAP_CFG_SPMI_PLAY_REG 0x4C
  95. #define PLAY_EN_BIT BIT(7)
  96. #define PATX_MEM_SEL_MASK GENMASK(5, 4) /* This is only for HAP525_HV */
  97. #define BRAKE_EN_BIT BIT(3)
  98. #define PAT_SRC_MASK GENMASK(2, 0)
  99. #define HAP_CFG_EXT_TRIG_REG 0x4D
  100. #define HAP_CFG_SWR_ACCESS_REG 0x4E
  101. #define SWR_PAT_CFG_EN_BIT BIT(7)
  102. #define SWR_PAT_INPUT_EN_BIT BIT(6)
  103. #define SWR_PAT_RES_N_BIT BIT(5)
  104. #define HAP_CFG_BRAKE_MODE_CFG_REG 0x50
  105. #define BRAKE_MODE_MASK GENMASK(7, 6)
  106. #define BRAKE_MODE_SHIFT 6
  107. #define BRAKE_SINE_GAIN_MASK GENMASK(3, 2)
  108. #define BRAKE_SINE_GAIN_SHIFT 2
  109. #define BRAKE_WF_SEL_MASK GENMASK(1, 0)
  110. #define HAP_CFG_CL_BRAKE_CFG_REG 0x51
  111. #define HAP_CFG_CL_BRAKE_CAL_PARAM_REG 0x52
  112. #define HAP_CFG_CL_BRAKE_RSET_REG 0x53
  113. #define HAP_CFG_PWM_CFG_REG 0x5A
  114. #define HAP_CFG_TLRA_OL_HIGH_REG 0x5C
  115. #define TLRA_OL_MSB_MASK GENMASK(3, 0)
  116. #define HAP_CFG_TLRA_OL_LOW_REG 0x5D
  117. #define TLRA_OL_LSB_MASK GENMASK(7, 0)
  118. #define TLRA_STEP_US 5
  119. #define TLRA_MAX_US 20475
  120. #define HAP_CFG_RC_CLK_CAL_COUNT_MSB_REG 0x5E
  121. #define RC_CLK_CAL_COUNT_MSB_MASK GENMASK(1, 0)
  122. #define HAP_CFG_RC_CLK_CAL_COUNT_LSB_REG 0x5F
  123. #define RC_CLK_CAL_COUNT_LSB_MASK GENMASK(7, 0)
  124. #define HAP_CFG_DRV_DUTY_CFG_REG 0x60
  125. #define ADT_DRV_DUTY_EN_BIT BIT(7)
  126. #define ADT_BRK_DUTY_EN_BIT BIT(6)
  127. #define DRV_DUTY_MASK GENMASK(5, 3)
  128. #define DRV_DUTY_62P5_PCT 2
  129. #define DRV_DUTY_SHIFT 3
  130. #define BRK_DUTY_MASK GENMASK(2, 0)
  131. #define BRK_DUTY_75_PCT 6
  132. #define HAP_CFG_ADT_DRV_DUTY_CFG_REG 0x61
  133. #define HAP_CFG_ZX_WIND_CFG_REG 0x62
  134. #define HAP_CFG_AUTORES_CFG_REG 0x63
  135. #define AUTORES_EN_BIT BIT(7)
  136. #define AUTORES_EN_DLY_MASK GENMASK(5, 2)
  137. #define AUTORES_EN_DLY(cycles) ((cycles) * 2)
  138. #define AUTORES_EN_DLY_6_CYCLES AUTORES_EN_DLY(6)
  139. #define AUTORES_EN_DLY_7_CYCLES AUTORES_EN_DLY(7)
  140. #define AUTORES_EN_DLY_SHIFT 2
  141. #define AUTORES_ERR_WINDOW_MASK GENMASK(1, 0)
  142. #define AUTORES_ERR_WINDOW_12P5_PERCENT 0x0
  143. #define AUTORES_ERR_WINDOW_25_PERCENT 0x1
  144. #define AUTORES_ERR_WINDOW_50_PERCENT 0x2
  145. #define AUTORES_ERR_WINDOW_100_PERCENT 0x3
  146. #define HAP_CFG_AUTORES_ERR_RECOVERY_REG 0x64
  147. #define EN_HW_RECOVERY_BIT BIT(1)
  148. #define SW_ERR_DRV_FREQ_BIT BIT(0)
  149. #define HAP_CFG_ISC_CFG_REG 0x65
  150. #define ILIM_CC_EN_BIT BIT(7)
  151. /* Following bits are only for HAP525_HV */
  152. #define EN_SC_DET_P_HAP525_HV_BIT BIT(6)
  153. #define EN_SC_DET_N_HAP525_HV_BIT BIT(5)
  154. #define EN_IMP_DET_HAP525_HV_BIT BIT(4)
  155. #define ILIM_PULSE_DENSITY_MASK GENMASK(3, 2)
  156. #define ILIM_DENSITY_8_OVER_64_CYCLES 0
  157. #define HAP_CFG_FAULT_CLR_REG 0x66
  158. #define SC_CLR_BIT BIT(2)
  159. #define AUTO_RES_ERR_CLR_BIT BIT(1)
  160. #define HPWR_RDY_FAULT_CLR_BIT BIT(0)
  161. #define HAP_CFG_VMAX_HDRM_REG 0x67
  162. #define VMAX_HDRM_MASK GENMASK(6, 0)
  163. #define VMAX_HDRM_STEP_MV 50
  164. #define VMAX_HDRM_MAX_MV 6350
  165. #define HAP_CFG_VSET_CFG_REG 0x68
  166. #define FORCE_VSET_ACK_BIT BIT(1) /* This is only for HAP525_HV */
  167. #define FORCE_VREG_RDY_BIT BIT(0)
  168. #define HAP_CFG_MOD_STATUS_SEL_REG 0x70
  169. #define HAP_CFG_MOD_STATUS_XT_REG 0x71
  170. #define HAP_CFG_CAL_EN_REG 0x72
  171. #define CAL_RC_CLK_MASK GENMASK(3, 2)
  172. #define CAL_RC_CLK_SHIFT 2
  173. #define CAL_RC_CLK_DISABLED_VAL 0
  174. #define CAL_RC_CLK_AUTO_VAL 1
  175. #define CAL_RC_CLK_MANUAL_VAL 2
  176. /* For HAP520_MV and HAP525_HV */
  177. #define HAP_CFG_ISC_CFG2_REG 0x77
  178. #define EN_SC_DET_P_HAP520_MV_BIT BIT(6)
  179. #define EN_SC_DET_N_HAP520_MV_BIT BIT(5)
  180. #define ISC_THRESH_HAP520_MV_MASK GENMASK(2, 0)
  181. #define ISC_THRESH_HAP520_MV_140MA 0x01
  182. #define ISC_THRESH_HAP525_HV_MASK GENMASK(4, 0)
  183. #define ISC_THRESH_HAP525_HV_125MA 0x11
  184. #define ISC_THRESH_HAP525_HV_250MA 0x12
  185. /* These registers are only applicable for HAP520_MV */
  186. #define HAP_CFG_HW_CONFIG_REG 0x0D
  187. #define HV_HAP_DRIVER_BIT BIT(1)
  188. #define HAP_CFG_HPWR_INTF_CTL_REG 0x80
  189. #define INTF_CTL_MASK GENMASK(1, 0)
  190. #define INTF_CTL_BOB 1
  191. #define INTF_CTL_BHARGER 2
  192. #define HAP_CFG_VHPWR_REG 0x84
  193. #define VHPWR_STEP_MV 32
  194. /* Only for HAP525_HV */
  195. #define HAP_CFG_RT_LRA_IMPD_MEAS_CFG_REG 0xA4
  196. #define LRA_IMPEDANCE_MEAS_EN_BIT BIT(7)
  197. #define LRA_IMPEDANCE_MEAS_CURRENT_SEL_BIT BIT(0)
  198. #define CURRENT_SEL_VAL_125MA 0
  199. #define CURRENT_SEL_VAL_250MA 1
  200. /* version register definitions for HAPTICS_PATTERN module */
  201. #define HAP_PTN_REVISION2_REG 0x01
  202. #define HAP_PTN_V1 0x1
  203. #define HAP_PTN_V2 0x2
  204. #define HAP_PTN_V3 0x3
  205. #define HAP_PTN_V4 0x4
  206. /* status register definition for HAPTICS_PATTERN module */
  207. #define HAP_PTN_FIFO_READY_STS_REG 0x08
  208. #define FIFO_READY_BIT BIT(0)
  209. #define HAP_PTN_NUM_PAT_REG 0x09
  210. /* config register definition for HAPTICS_PATTERN module */
  211. #define HAP_PTN_FIFO_DIN_0_REG 0x20
  212. #define HAP_PTN_FIFO_DIN_NUM 4
  213. #define HAP_PTN_FIFO_PLAY_RATE_REG 0x24
  214. #define PAT_MEM_PLAY_RATE_MASK GENMASK(7, 4)
  215. #define FIFO_PLAY_RATE_MASK GENMASK(3, 0)
  216. #define HAP_PTN_FIFO_EMPTY_CFG_REG 0x2A
  217. #define EMPTY_THRESH_MASK GENMASK(3, 0)
  218. #define HAP_PTN_FIFO_THRESH_LSB 40
  219. #define HAP_PTN_FIFO_DEPTH_CFG_REG 0x2B
  220. #define HAP_PTN_FIFO_DIN_1B_REG 0x2C
  221. #define HAP_PTN_DIRECT_PLAY_REG 0x26
  222. #define DIRECT_PLAY_MAX_AMPLITUDE 0xFF
  223. #define HAP_PTN_AUTORES_CAL_CFG_REG 0x28
  224. #define HAP_PTN_PTRN1_TLRA_MSB_REG 0x30
  225. #define HAP_PTN_PTRN1_TLRA_LSB_REG 0x31
  226. #define HAP_PTN_PTRN2_TLRA_MSB_REG 0x32
  227. #define HAP_PTN_PTRN2_TLRA_LSB_REG 0x33
  228. #define HAP_PTN_PTRN1_CFG_REG 0x34
  229. #define PTRN_FLRA2X_SHIFT 7
  230. #define PTRN_SAMPLE_PER_MASK GENMASK(2, 0)
  231. #define PTRN_AMP_MSB_MASK BIT(0)
  232. #define PTRN_AMP_LSB_MASK GENMASK(7, 0)
  233. #define HAP_PTN_PTRN2_CFG_REG 0x50
  234. #define HAP_PTN_BRAKE_AMP_REG 0x70
  235. /* HAPTICS_PATTERN registers only present in HAP525_HV */
  236. #define HAP_PTN_MEM_OP_ACCESS_REG 0x2D
  237. #define MEM_PAT_ACCESS_BIT BIT(7)
  238. #define MEM_PAT_RW_SEL_MASK GENMASK(5, 4)
  239. #define MEM_FLUSH_RELOAD_BIT BIT(0)
  240. #define HAP_PTN_MMAP_FIFO_REG 0xA0
  241. #define MMAP_FIFO_EXIST_BIT BIT(7)
  242. #define MMAP_FIFO_LEN_MASK GENMASK(3, 0)
  243. #define MMAP_FIFO_LEN_PER_LSB 128
  244. #define HAP_PTN_MMAP_PAT1_REG 0xA1
  245. #define MMAP_PAT_LEN_PER_LSB 32
  246. #define MMAP_PAT1_LEN_MASK GENMASK(6, 0)
  247. #define MMAP_PAT2_LEN_MASK GENMASK(5, 0)
  248. #define MMAP_PAT3_PAT4_LEN_MASK GENMASK(4, 0)
  249. /* register in HBOOST module */
  250. #define HAP_BOOST_REVISION1 0x00
  251. #define HAP_BOOST_REVISION2 0x01
  252. #define HAP_BOOST_V0P0 0x0000
  253. #define HAP_BOOST_V0P1 0x0001
  254. #define HAP_BOOST_V0P2 0x0002
  255. #define HAP_BOOST_STATUS4_REG 0x0B
  256. #define BOOST_DTEST1_STATUS_BIT BIT(0)
  257. #define HAP_BOOST_HW_CTRL_FOLLOW_REG 0x41
  258. #define FOLLOW_HW_EN_BIT BIT(7)
  259. #define FOLLOW_HW_CCM_BIT BIT(6)
  260. #define FOLLOW_HW_VSET_BIT BIT(5)
  261. #define HAP_BOOST_VREG_EN_REG 0x46
  262. #define VREG_EN_BIT BIT(7)
  263. #define HAP_BOOST_CLAMP_REG 0x70
  264. #define CLAMP_5V_BIT BIT(0)
  265. /* haptics SDAM registers offset definition */
  266. #define HAP_STATUS_DATA_MSB_SDAM_OFFSET 0x46
  267. #define HAP_AUTO_BRAKE_CAL_VMAX_OFFSET 0x4B
  268. #define HAP_AUTO_BRAKE_CAL_PTRN1_CFG0_OFFSET 0x4C
  269. #define HAP_AUTO_BRAKE_CAL_PTRN1_LSB0_OFFSET 0x52
  270. #define HAP_LRA_PTRN1_TLRA_LSB_OFFSET 0x64
  271. #define HAP_LRA_PTRN1_TLRA_MSB_OFFSET 0x65
  272. #define HAP_LRA_NOMINAL_OHM_SDAM_OFFSET 0x75
  273. #define HAP_LRA_DETECTED_OHM_SDAM_OFFSET 0x76
  274. #define HAP_AUTO_BRAKE_CAL_DONE_OFFSET 0x7E
  275. #define AUTO_BRAKE_CAL_DONE 0x80
  276. #define PBS_ARG_REG 0x42
  277. #define HAP_VREG_ON_VAL 0x1
  278. #define HAP_VREG_OFF_VAL 0x2
  279. #define HAP_AUTO_BRAKE_CAL_VAL 0x3
  280. #define PBS_TRIG_SET_REG 0xE5
  281. #define PBS_TRIG_CLR_REG 0xE6
  282. #define PBS_TRIG_SET_VAL 0x1
  283. #define PBS_TRIG_CLR_VAL 0x1
  284. /* constant parameters */
  285. #define SAMPLES_PER_PATTERN 8
  286. #define BRAKE_SAMPLE_COUNT 8
  287. #define DEFAULT_ERM_PLAY_RATE_US 5000
  288. #define MAX_EFFECT_COUNT 64
  289. #define FIFO_READY_TIMEOUT_MS 1000
  290. #define CHAR_PER_PATTERN_S 48
  291. #define CHAR_PER_SAMPLE 8
  292. #define CHAR_MSG_HEADER 16
  293. #define CHAR_BRAKE_MODE 24
  294. #define HW_BRAKE_MAX_CYCLES 16
  295. #define F_LRA_VARIATION_HZ 5
  296. #define NON_HBOOST_MAX_VMAX_MV 4000
  297. /* below definitions are only for HAP525_HV */
  298. #define MMAP_NUM_BYTES 2048
  299. #define MMAP_FIFO_MIN_SIZE 640
  300. #define FIFO_PRGM_INIT_SIZE 320
  301. #define is_between(val, min, max) \
  302. (((min) <= (max)) && ((min) <= (val)) && ((val) <= (max)))
  303. enum hap_status_sel {
  304. CAL_TLRA_CL_STS = 0x00,
  305. T_WIND_STS,
  306. T_WIND_STS_PREV,
  307. LAST_GOOD_TLRA_CL_STS,
  308. TLRA_CL_ERR_STS,
  309. HAP_DRV_STS,
  310. RNAT_RCAL_INT,
  311. BRAKE_CAL_SCALAR = 0x07,
  312. CLAMPED_DUTY_CYCLE_STS = 0x8003,
  313. FIFO_REAL_TIME_STS = 0x8005,
  314. };
  315. enum drv_sig_shape {
  316. WF_SQUARE,
  317. WF_SINE,
  318. WF_NO_MODULATION,
  319. WF_RESERVED,
  320. };
  321. enum brake_mode {
  322. OL_BRAKE,
  323. CL_BRAKE,
  324. PREDICT_BRAKE,
  325. AUTO_BRAKE,
  326. };
  327. enum brake_sine_gain {
  328. BRAKE_SINE_GAIN_X1,
  329. BRAKE_SINE_GAIN_X2,
  330. BRAKE_SINE_GAIN_X4,
  331. BRAKE_SINE_GAIN_X8,
  332. };
  333. enum pat_mem_sel {
  334. PAT1_MEM,
  335. PAT2_MEM,
  336. PAT3_MEM,
  337. PAT4_MEM,
  338. PAT_MEM_MAX,
  339. };
  340. enum pattern_src {
  341. FIFO,
  342. DIRECT_PLAY,
  343. PATTERN1,
  344. PATTERN2,
  345. SWR,
  346. PATTERN_MEM,
  347. SRC_RESERVED,
  348. };
  349. enum s_period {
  350. T_LRA = 0,
  351. T_LRA_DIV_2,
  352. T_LRA_DIV_4,
  353. T_LRA_DIV_8,
  354. T_LRA_X_2,
  355. T_LRA_X_4,
  356. T_LRA_X_8,
  357. T_RESERVED,
  358. /* F_xKHZ definitions are for FIFO only */
  359. F_8KHZ,
  360. F_16KHZ,
  361. F_24KHZ,
  362. F_32KHZ,
  363. F_44P1KHZ,
  364. F_48KHZ,
  365. F_RESERVED,
  366. };
  367. enum custom_effect_param {
  368. CUSTOM_DATA_EFFECT_IDX,
  369. CUSTOM_DATA_TIMEOUT_SEC_IDX,
  370. CUSTOM_DATA_TIMEOUT_MSEC_IDX,
  371. CUSTOM_DATA_LEN,
  372. };
  373. /*
  374. * HW type of the haptics module, the type value follows the
  375. * revision value of the HAPTICS_CFG/HAPTICS_PATTERN modules
  376. */
  377. enum haptics_hw_type {
  378. HAP520 = 0x2, /* PM8350B */
  379. HAP520_MV = 0x3, /* PM5100 */
  380. HAP525_HV = 0x4, /* PM8550B */
  381. };
  382. enum wa_flags {
  383. TOGGLE_CAL_RC_CLK = BIT(0),
  384. SW_CTRL_HBST = BIT(1),
  385. SLEEP_CLK_32K_SCALE = BIT(2),
  386. TOGGLE_EN_TO_FLUSH_FIFO = BIT(3),
  387. RECOVER_SWR_SLAVE = BIT(4),
  388. };
  389. static const char * const src_str[] = {
  390. "FIFO",
  391. "DIRECT_PLAY",
  392. "PATTERN1",
  393. "PATTERN2",
  394. "SWR",
  395. "reserved",
  396. };
  397. static const char * const brake_str[] = {
  398. "open-loop-brake",
  399. "close-loop-brake",
  400. "predictive-brake",
  401. "auto-brake",
  402. };
  403. static const char * const period_str[] = {
  404. "T_LRA",
  405. "T_LRA_DIV_2",
  406. "T_LRA_DIV_4",
  407. "T_LRA_DIV_8",
  408. "T_LRA_X_2",
  409. "T_LRA_X_4",
  410. "T_LRA_X_8",
  411. "reserved_1",
  412. "F_8KHZ",
  413. "F_16HKZ",
  414. "F_24KHZ",
  415. "F_32KHZ",
  416. "F_44P1KHZ",
  417. "F_48KHZ",
  418. "reserved_2",
  419. };
  420. struct pattern_s {
  421. u16 amplitude;
  422. enum s_period period;
  423. bool f_lra_x2;
  424. };
  425. struct pattern_cfg {
  426. struct pattern_s samples[SAMPLES_PER_PATTERN];
  427. u32 play_rate_us;
  428. u32 play_length_us;
  429. bool preload;
  430. };
  431. struct fifo_cfg {
  432. u8 *samples;
  433. u32 num_s;
  434. enum s_period period_per_s;
  435. u32 play_length_us;
  436. bool preload;
  437. };
  438. struct brake_cfg {
  439. u8 samples[BRAKE_SAMPLE_COUNT];
  440. enum brake_mode mode;
  441. enum drv_sig_shape brake_wf;
  442. enum brake_sine_gain sine_gain;
  443. u32 play_length_us;
  444. bool disabled;
  445. };
  446. struct haptics_effect {
  447. struct pattern_cfg *pattern;
  448. struct fifo_cfg *fifo;
  449. struct brake_cfg *brake;
  450. u32 id;
  451. u32 vmax_mv;
  452. u32 t_lra_us;
  453. enum pattern_src src;
  454. enum pat_mem_sel pat_sel;
  455. bool auto_res_disable;
  456. };
  457. struct mmap_partition {
  458. u32 max_size;
  459. u32 length;
  460. bool in_use;
  461. };
  462. struct haptics_mmap {
  463. struct mmap_partition fifo_mmap;
  464. struct mmap_partition pat_sel_mmap[PAT_MEM_MAX];
  465. enum s_period pat_play_rate;
  466. };
  467. /**
  468. * struct fifo_play_status - Data used for recording the FIFO playing status
  469. *
  470. * @samples_written: The number of the samples that has been written into
  471. * FIFO memory.
  472. * @written_done: The flag to indicate if all of the FIFO samples has
  473. * been written to the FIFO memory.
  474. * @is_busy: The flag to indicate if it's in the middle of FIFO
  475. * playing.
  476. * @cancelled: The flag to indicate if FIFO playing is cancelled due
  477. * to a stopping command arrived in the middle of playing.
  478. */
  479. struct fifo_play_status {
  480. u32 samples_written;
  481. atomic_t written_done;
  482. atomic_t is_busy;
  483. atomic_t cancelled;
  484. };
  485. struct haptics_play_info {
  486. struct haptics_effect *effect;
  487. struct brake_cfg *brake;
  488. struct fifo_play_status fifo_status;
  489. struct mutex lock;
  490. atomic_t gain;
  491. u32 vmax_mv;
  492. u32 length_us;
  493. enum pattern_src pattern_src;
  494. bool in_calibration;
  495. };
  496. struct haptics_hw_config {
  497. struct brake_cfg brake;
  498. u32 vmax_mv;
  499. u32 t_lra_us;
  500. u32 cl_t_lra_us;
  501. u32 lra_min_mohms;
  502. u32 lra_max_mohms;
  503. u32 lra_open_mohms;
  504. u32 lra_measured_mohms;
  505. u32 preload_effect;
  506. u32 fifo_empty_thresh;
  507. u16 rc_clk_cal_count;
  508. enum drv_sig_shape drv_wf;
  509. bool is_erm;
  510. bool measure_lra_impedance;
  511. };
  512. struct custom_fifo_data {
  513. u32 idx;
  514. u32 length;
  515. u32 play_rate_hz;
  516. u8 *data;
  517. };
  518. struct haptics_chip {
  519. struct device *dev;
  520. struct regmap *regmap;
  521. struct input_dev *input_dev;
  522. struct haptics_hw_config config;
  523. struct haptics_effect *effects;
  524. struct haptics_effect *primitives;
  525. struct haptics_effect *custom_effect;
  526. struct haptics_play_info play;
  527. struct haptics_mmap mmap;
  528. struct dentry *debugfs_dir;
  529. struct delayed_work stop_work;
  530. struct regulator_dev *swr_slave_rdev;
  531. struct nvmem_cell *cl_brake_nvmem;
  532. struct nvmem_device *hap_cfg_nvmem;
  533. struct device_node *pbs_node;
  534. struct class hap_class;
  535. struct regulator *hpwr_vreg;
  536. struct hrtimer hbst_off_timer;
  537. struct notifier_block hboost_nb;
  538. struct mutex vmax_lock;
  539. struct work_struct set_gain_work;
  540. int fifo_empty_irq;
  541. u32 hpwr_voltage_mv;
  542. u32 effects_count;
  543. u32 primitives_count;
  544. u32 cfg_addr_base;
  545. u32 ptn_addr_base;
  546. u32 hbst_addr_base;
  547. u32 clamped_vmax_mv;
  548. u32 wa_flags;
  549. u32 primitive_duration;
  550. u8 cfg_revision;
  551. u8 ptn_revision;
  552. u8 hpwr_intf_ctl;
  553. u16 hbst_revision;
  554. u16 max_vmax_mv;
  555. enum haptics_hw_type hw_type;
  556. bool fifo_empty_irq_en;
  557. bool swr_slave_enabled;
  558. bool clamp_at_5v;
  559. bool hpwr_vreg_enabled;
  560. bool is_hv_haptics;
  561. bool hboost_enabled;
  562. };
  563. struct haptics_reg_info {
  564. u8 addr;
  565. u8 val;
  566. };
  567. static inline int get_max_fifo_samples(struct haptics_chip *chip)
  568. {
  569. int val = 0;
  570. switch (chip->hw_type) {
  571. case HAP520:
  572. val = 640;
  573. break;
  574. case HAP520_MV:
  575. val = 1024;
  576. break;
  577. case HAP525_HV:
  578. val = chip->mmap.fifo_mmap.length ?
  579. chip->mmap.fifo_mmap.length : MMAP_FIFO_MIN_SIZE;
  580. break;
  581. default:
  582. pr_err("Invalid HW type\n");
  583. break;
  584. }
  585. return val;
  586. }
  587. static int get_fifo_empty_threshold(struct haptics_chip *chip)
  588. {
  589. int val = 0;
  590. switch (chip->hw_type) {
  591. case HAP520:
  592. val = 280;
  593. break;
  594. case HAP520_MV:
  595. case HAP525_HV:
  596. val = 288;
  597. break;
  598. default:
  599. pr_err("Invalid HW type\n");
  600. break;
  601. }
  602. return val;
  603. }
  604. static int get_fifo_threshold_per_bit(struct haptics_chip *chip)
  605. {
  606. int val = -EINVAL;
  607. switch (chip->hw_type) {
  608. case HAP520:
  609. val = 40;
  610. break;
  611. case HAP520_MV:
  612. case HAP525_HV:
  613. val = 32;
  614. break;
  615. default:
  616. pr_err("Invalid HW type\n");
  617. break;
  618. }
  619. return val;
  620. }
  621. static bool is_haptics_external_powered(struct haptics_chip *chip)
  622. {
  623. /* SW based explicit vote */
  624. if (chip->hpwr_vreg)
  625. return true;
  626. /* Implicit voting by HW */
  627. if (chip->hw_type == HAP520_MV)
  628. return true;
  629. /* Powered by HBOOST */
  630. return false;
  631. }
  632. static int haptics_read(struct haptics_chip *chip,
  633. u16 base, u8 offset, u8 *val, u32 length)
  634. {
  635. int rc = 0;
  636. u16 addr = base + offset;
  637. rc = regmap_bulk_read(chip->regmap, addr, val, length);
  638. if (rc < 0)
  639. dev_err(chip->dev, "read addr %#x failed, rc=%d\n", addr, rc);
  640. return rc;
  641. }
  642. static int haptics_write(struct haptics_chip *chip,
  643. u16 base, u8 offset, u8 *val, u32 length)
  644. {
  645. int rc = 0;
  646. u16 addr = base + offset;
  647. rc = regmap_bulk_write(chip->regmap, addr, val, length);
  648. if (rc < 0)
  649. dev_err(chip->dev, "write addr %#x failed, rc=%d\n", addr, rc);
  650. return rc;
  651. }
  652. static int haptics_masked_write(struct haptics_chip *chip,
  653. u16 base, u8 offset, u8 mask, u8 val)
  654. {
  655. int rc = 0;
  656. u16 addr = base + offset;
  657. regmap_update_bits(chip->regmap, addr, mask, val);
  658. if (rc < 0)
  659. dev_err(chip->dev, "update addr %#x failed, rc=%d\n", addr, rc);
  660. return rc;
  661. }
  662. static void __dump_effects(struct haptics_chip *chip,
  663. struct haptics_effect *effects, int effects_count)
  664. {
  665. struct haptics_effect *effect;
  666. struct pattern_s *sample;
  667. char *str;
  668. u32 size, pos;
  669. int i, j;
  670. for (i = 0; i < effects_count; i++) {
  671. effect = &effects[i];
  672. if (!effect)
  673. return;
  674. dev_dbg(chip->dev, "effect %d\n", effect->id);
  675. dev_dbg(chip->dev, "vmax_mv = %d\n", effect->vmax_mv);
  676. if (effect->pattern) {
  677. for (j = 0; j < SAMPLES_PER_PATTERN; j++) {
  678. sample = &effect->pattern->samples[j];
  679. dev_dbg(chip->dev, "pattern = %d, period = %s, f_lra_x2 = %d\n",
  680. sample->amplitude,
  681. period_str[sample->period],
  682. sample->f_lra_x2);
  683. }
  684. dev_dbg(chip->dev, "pattern play_rate_us = %d\n",
  685. effect->pattern->play_rate_us);
  686. dev_dbg(chip->dev, "pattern play_length_us = %d\n",
  687. effect->pattern->play_length_us);
  688. dev_dbg(chip->dev, "pattern preload = %d\n",
  689. effect->pattern->preload);
  690. }
  691. if (effect->fifo) {
  692. size = effect->fifo->num_s * CHAR_PER_SAMPLE
  693. + CHAR_MSG_HEADER;
  694. str = kzalloc(size, GFP_KERNEL);
  695. if (str == NULL)
  696. return;
  697. pos = 0;
  698. pos += scnprintf(str, size, "%s", "FIFO data: ");
  699. for (j = 0; j < effect->fifo->num_s; j++)
  700. pos += scnprintf(str + pos, size - pos, "%d ",
  701. (s8)effect->fifo->samples[j]);
  702. dev_dbg(chip->dev, "%s\n", str);
  703. kfree(str);
  704. dev_dbg(chip->dev, "FIFO data preload: %d, play rate: %s, play length: %uus\n",
  705. effect->fifo->preload,
  706. period_str[effect->fifo->period_per_s],
  707. effect->fifo->play_length_us);
  708. }
  709. if (effect->brake && !effect->brake->disabled) {
  710. size = BRAKE_SAMPLE_COUNT * CHAR_PER_SAMPLE
  711. + CHAR_MSG_HEADER;
  712. str = kzalloc(size, GFP_KERNEL);
  713. if (str == NULL)
  714. return;
  715. pos = 0;
  716. pos += scnprintf(str, size, "%s", "brake pattern: ");
  717. for (j = 0; j < BRAKE_SAMPLE_COUNT; j++)
  718. pos += scnprintf(str + pos, size - pos, "%#x ",
  719. effect->brake->samples[j]);
  720. dev_dbg(chip->dev, "%s\n", str);
  721. kfree(str);
  722. dev_dbg(chip->dev, "brake mode: %s\n",
  723. brake_str[effect->brake->mode]);
  724. dev_dbg(chip->dev, "brake play length: %dus\n",
  725. effect->brake->play_length_us);
  726. }
  727. dev_dbg(chip->dev, "pattern src: %s\n", src_str[effect->src]);
  728. dev_dbg(chip->dev, "auto resonance %s\n",
  729. effect->auto_res_disable ?
  730. "disabled" : "enabled");
  731. }
  732. }
  733. static void verify_brake_samples(struct brake_cfg *brake)
  734. {
  735. int i;
  736. if (brake->mode == PREDICT_BRAKE || brake->mode == AUTO_BRAKE)
  737. return;
  738. for (i = BRAKE_SAMPLE_COUNT - 1; i > 0; i--) {
  739. if (brake->samples[i] != 0) {
  740. brake->disabled = false;
  741. return;
  742. }
  743. }
  744. brake->disabled = true;
  745. }
  746. static int get_pattern_play_length_us(struct pattern_cfg *pattern)
  747. {
  748. int i = SAMPLES_PER_PATTERN - 1, j;
  749. u32 us_per_sample, total_length_us = 0;
  750. if (!pattern)
  751. return -EINVAL;
  752. for (; i >= 0; i--)
  753. if (pattern->samples[i].amplitude != 0)
  754. break;
  755. for (j = 0; j <= i; j++) {
  756. us_per_sample = pattern->play_rate_us;
  757. switch (pattern->samples[j].period) {
  758. case T_LRA:
  759. break;
  760. case T_LRA_DIV_2:
  761. us_per_sample /= 2;
  762. break;
  763. case T_LRA_DIV_4:
  764. us_per_sample /= 4;
  765. break;
  766. case T_LRA_DIV_8:
  767. us_per_sample /= 8;
  768. break;
  769. case T_LRA_X_2:
  770. us_per_sample *= 2;
  771. break;
  772. case T_LRA_X_4:
  773. us_per_sample *= 4;
  774. break;
  775. case T_LRA_X_8:
  776. us_per_sample *= 8;
  777. break;
  778. default:
  779. return -EINVAL;
  780. }
  781. if (pattern->samples[j].f_lra_x2)
  782. us_per_sample /= 2;
  783. total_length_us += us_per_sample;
  784. }
  785. return total_length_us;
  786. }
  787. static int get_fifo_play_length_us(struct fifo_cfg *fifo, u32 t_lra_us)
  788. {
  789. u32 length_us;
  790. int i;
  791. if (!fifo)
  792. return -EINVAL;
  793. for (i = fifo->num_s - 1; i > 0; i--)
  794. if (fifo->samples[i] != 0)
  795. break;
  796. length_us = (i + 1) * t_lra_us;
  797. switch (fifo->period_per_s) {
  798. case T_LRA:
  799. break;
  800. case T_LRA_DIV_2:
  801. length_us /= 2;
  802. break;
  803. case T_LRA_DIV_4:
  804. length_us /= 4;
  805. break;
  806. case T_LRA_DIV_8:
  807. length_us /= 8;
  808. break;
  809. case F_8KHZ:
  810. length_us = 1000 * fifo->num_s / 8;
  811. break;
  812. case F_16KHZ:
  813. length_us = 1000 * fifo->num_s / 16;
  814. break;
  815. case F_24KHZ:
  816. length_us = 1000 * fifo->num_s / 24;
  817. break;
  818. case F_32KHZ:
  819. length_us = 1000 * fifo->num_s / 32;
  820. break;
  821. case F_44P1KHZ:
  822. length_us = 10000 * fifo->num_s / 441;
  823. break;
  824. case F_48KHZ:
  825. length_us = 1000 * fifo->num_s / 48;
  826. break;
  827. default:
  828. length_us = -EINVAL;
  829. break;
  830. }
  831. return length_us;
  832. }
  833. static int get_brake_play_length_us(struct brake_cfg *brake, u32 t_lra_us)
  834. {
  835. int i = BRAKE_SAMPLE_COUNT - 1;
  836. if (!brake || brake->disabled)
  837. return 0;
  838. if (brake->mode == PREDICT_BRAKE || brake->mode == AUTO_BRAKE)
  839. return HW_BRAKE_MAX_CYCLES * t_lra_us / 2;
  840. for (; i >= 0; i--)
  841. if (brake->samples[i] != 0)
  842. break;
  843. return t_lra_us * (i + 1) / 2;
  844. }
  845. static int haptics_get_status_data(struct haptics_chip *chip,
  846. enum hap_status_sel sel, u8 data[])
  847. {
  848. int rc;
  849. u8 mod_sel_val[2];
  850. const char *hap_status_name[BRAKE_CAL_SCALAR + 1] = {
  851. "CAL_TLRA_CL_STS",
  852. "T_WIND_STS",
  853. "T_WIND_STS_PREV",
  854. "LAST_GOOD_TLRA_CL_STS",
  855. "TLRA_CL_ERR_STS",
  856. "HAP_DRV_STS",
  857. "RNAT_RCAL_INT",
  858. "BRAKE_CAL_SCALAR",
  859. };
  860. const char *name;
  861. mod_sel_val[0] = sel & 0xff;
  862. mod_sel_val[1] = (sel >> 8) & 0xff;
  863. rc = haptics_write(chip, chip->cfg_addr_base,
  864. HAP_CFG_MOD_STATUS_XT_REG, &mod_sel_val[1], 1);
  865. if (rc < 0)
  866. return rc;
  867. rc = haptics_write(chip, chip->cfg_addr_base,
  868. HAP_CFG_MOD_STATUS_SEL_REG, mod_sel_val, 1);
  869. if (rc < 0)
  870. return rc;
  871. rc = haptics_read(chip, chip->cfg_addr_base,
  872. HAP_CFG_STATUS_DATA_MSB_REG, data, 2);
  873. if (rc < 0)
  874. return rc;
  875. if (sel <= BRAKE_CAL_SCALAR)
  876. name = hap_status_name[sel];
  877. else if (sel == CLAMPED_DUTY_CYCLE_STS)
  878. name = "CLAMPED_DUTY_CYCLE_STS";
  879. else if (sel == FIFO_REAL_TIME_STS)
  880. name = "FIFO_REAL_TIME_STS";
  881. dev_dbg(chip->dev, "Get status data[%s] = (%#x, %#x)\n", name, data[0], data[1]);
  882. trace_qcom_haptics_status(name, data[0], data[1]);
  883. return 0;
  884. }
  885. #define AUTO_CAL_CLK_SCALE_DEN 1000
  886. #define AUTO_CAL_CLK_SCALE_NUM 1024
  887. static int haptics_adjust_lra_period(struct haptics_chip *chip, u32 *t_lra_us)
  888. {
  889. int rc;
  890. u8 val;
  891. if (chip->wa_flags & SLEEP_CLK_32K_SCALE) {
  892. rc = haptics_read(chip, chip->cfg_addr_base,
  893. HAP_CFG_CAL_EN_REG, &val, 1);
  894. if (rc < 0)
  895. return rc;
  896. if ((val & CAL_RC_CLK_MASK) ==
  897. (CAL_RC_CLK_AUTO_VAL << CAL_RC_CLK_SHIFT))
  898. *t_lra_us = div_u64((u64)(*t_lra_us) * AUTO_CAL_CLK_SCALE_NUM,
  899. AUTO_CAL_CLK_SCALE_DEN);
  900. }
  901. return 0;
  902. }
  903. /* constant definitions for calculating TLRA */
  904. #define TLRA_AUTO_RES_ERR_NO_CAL_STEP_PSEC 1667000
  905. #define TLRA_AUTO_RES_NO_CAL_STEP_PSEC 3333000
  906. #define TLRA_AUTO_RES_ERR_AUTO_CAL_STEP_PSEC \
  907. ((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 1627700 : 1666667)
  908. #define TLRA_AUTO_RES_AUTO_CAL_STEP_PSEC \
  909. ((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 813850 : 833333)
  910. #define SLEEP_CLK_CAL_DIVIDER \
  911. ((chip->wa_flags & SLEEP_CLK_32K_SCALE) ? 600 : 586)
  912. #define CL_TLRA_ERROR_RANGE_PCT 20
  913. static int haptics_get_closeloop_lra_period(
  914. struct haptics_chip *chip, bool in_boot)
  915. {
  916. struct haptics_hw_config *config = &chip->config;
  917. u16 cal_tlra_cl_sts, tlra_cl_err_sts, tlra_ol, last_good_tlra_cl_sts;
  918. u8 val[2], rc_clk_cal;
  919. bool auto_res_done;
  920. u64 tmp;
  921. int rc;
  922. /* read RC_CLK_CAL enabling mode */
  923. rc = haptics_read(chip, chip->cfg_addr_base,
  924. HAP_CFG_CAL_EN_REG, val, 1);
  925. if (rc < 0)
  926. return rc;
  927. rc_clk_cal = ((val[0] & CAL_RC_CLK_MASK) >> CAL_RC_CLK_SHIFT);
  928. /* read auto resonance calibration result */
  929. if (in_boot && ((chip->hw_type == HAP520) || (chip->hw_type == HAP520_MV))) {
  930. if (chip->hap_cfg_nvmem == NULL) {
  931. dev_dbg(chip->dev, "nvmem device for hap_cfg is not defined\n");
  932. return -EINVAL;
  933. }
  934. rc = nvmem_device_read(chip->hap_cfg_nvmem,
  935. HAP_STATUS_DATA_MSB_SDAM_OFFSET, 2, val);
  936. if (rc < 0) {
  937. dev_err(chip->dev, "read SDAM %#x failed, rc=%d\n",
  938. HAP_STATUS_DATA_MSB_SDAM_OFFSET, rc);
  939. return rc;
  940. }
  941. } else {
  942. rc = haptics_get_status_data(chip, CAL_TLRA_CL_STS, val);
  943. if (rc < 0)
  944. return rc;
  945. }
  946. auto_res_done = !!(val[0] & AUTO_RES_CAL_DONE_BIT);
  947. cal_tlra_cl_sts =
  948. ((val[0] & CAL_TLRA_CL_STS_MSB_MASK) << 8) | val[1];
  949. /* read auto resonance calibration error status */
  950. rc = haptics_get_status_data(chip, TLRA_CL_ERR_STS, val);
  951. if (rc < 0)
  952. return rc;
  953. tlra_cl_err_sts =
  954. ((val[0] & TLRA_CL_ERR_MSB_MASK) << 8) | val[1];
  955. dev_dbg(chip->dev, "rc_clk_cal = %u, auto_res_done = %d\n",
  956. rc_clk_cal, auto_res_done);
  957. if (rc_clk_cal == CAL_RC_CLK_DISABLED_VAL && !auto_res_done) {
  958. /* TLRA_CL_ERR(us) = TLRA_CL_ERR_STS * 1.667 us */
  959. tmp = tlra_cl_err_sts * TLRA_AUTO_RES_ERR_NO_CAL_STEP_PSEC;
  960. dev_dbg(chip->dev, "tlra_cl_err_sts = %#x\n", tlra_cl_err_sts);
  961. config->cl_t_lra_us = div_u64(tmp, 1000000);
  962. } else if (rc_clk_cal == CAL_RC_CLK_DISABLED_VAL && auto_res_done) {
  963. /*
  964. * CAL_TLRA_CL_STS_NO_CAL = CAL_TLRA_CL_STS
  965. * TLRA_AUTO_RES(us) = CAL_TLRA_CL_STS_NO_CAL * 3.333 us
  966. */
  967. tmp = cal_tlra_cl_sts * TLRA_AUTO_RES_NO_CAL_STEP_PSEC;
  968. dev_dbg(chip->dev, "cal_tlra_cl_sts = %#x\n", cal_tlra_cl_sts);
  969. config->cl_t_lra_us = div_u64(tmp, 1000000);
  970. } else if (rc_clk_cal == CAL_RC_CLK_AUTO_VAL && !auto_res_done) {
  971. /*
  972. * CAL_TLRA_OL = CAL_TLRA_CL_STS;
  973. * TLRA_CL_ERR(us) = TLRA_CL_ERR_STS *
  974. * (TLRA_OL / CAL_TLRA_OL) * TLRA_AUTO_RES_ERR_AUTO_CAL_STEP_US
  975. */
  976. /* read the TLRA_OL setting */
  977. rc = haptics_read(chip, chip->cfg_addr_base,
  978. HAP_CFG_TLRA_OL_HIGH_REG, val, 2);
  979. if (rc < 0)
  980. return rc;
  981. tlra_ol = (val[0] & TLRA_OL_MSB_MASK) << 8 | val[1];
  982. dev_dbg(chip->dev, "tlra_ol = %#x, tlra_cl_err_sts = %#x, cal_tlra_cl_sts = %#x\n",
  983. tlra_ol, tlra_cl_err_sts, cal_tlra_cl_sts);
  984. tmp = tlra_cl_err_sts * tlra_ol;
  985. tmp *= TLRA_AUTO_RES_ERR_AUTO_CAL_STEP_PSEC;
  986. tmp = div_u64(tmp, cal_tlra_cl_sts);
  987. config->cl_t_lra_us = div_u64(tmp, 1000000);
  988. /* calculate RC_CLK_CAL_COUNT */
  989. if (!config->t_lra_us || !config->cl_t_lra_us)
  990. return -EINVAL;
  991. /*
  992. * RC_CLK_CAL_COUNT = SLEEP_CLK_CAL_DIVIDER * (CAL_TLRA_OL / TLRA_OL)
  993. * * (SLEEP_CLK_CAL_DIVIDER / 586) * (CL_T_TLRA_US / OL_T_LRA_US)
  994. */
  995. tmp = SLEEP_CLK_CAL_DIVIDER * SLEEP_CLK_CAL_DIVIDER;
  996. tmp *= cal_tlra_cl_sts * config->cl_t_lra_us;
  997. tmp = div_u64(tmp, tlra_ol);
  998. tmp = div_u64(tmp, 586);
  999. config->rc_clk_cal_count = div_u64(tmp, config->t_lra_us);
  1000. } else if (rc_clk_cal == CAL_RC_CLK_AUTO_VAL && auto_res_done) {
  1001. /*
  1002. * CAL_TLRA_CL_STS_W_CAL = CAL_TLRA_CL_STS;
  1003. * TLRA_AUTO_RES(us) = LAST_GOOD_TLRA_CL_STS *
  1004. * TLRA_AUTO_RES_AUTO_CAL_STEP_US *
  1005. * (LAST_GOOD_TLRA_CL_STS / CAL_TLRA_CL_STS_AUTO_CAL)
  1006. */
  1007. /* read LAST_GOOD_TLRA_CL_STS */
  1008. rc = haptics_get_status_data(chip, LAST_GOOD_TLRA_CL_STS, val);
  1009. if (rc < 0)
  1010. return rc;
  1011. last_good_tlra_cl_sts =
  1012. ((val[0] & LAST_GOOD_TLRA_CL_MSB_MASK) << 8) | val[1];
  1013. dev_dbg(chip->dev, "last_good_tlra_cl_sts = %#x, cal_tlra_cl_sts = %#x\n",
  1014. last_good_tlra_cl_sts, cal_tlra_cl_sts);
  1015. tmp = last_good_tlra_cl_sts * last_good_tlra_cl_sts;
  1016. tmp *= TLRA_AUTO_RES_AUTO_CAL_STEP_PSEC;
  1017. tmp = div_u64(tmp, cal_tlra_cl_sts);
  1018. config->cl_t_lra_us = div_u64(tmp, 1000000);
  1019. /* calculate RC_CLK_CAL_COUNT */
  1020. if (!config->t_lra_us || !config->cl_t_lra_us)
  1021. return -EINVAL;
  1022. /*
  1023. * RC_CLK_CAL_COUNT =
  1024. * SLEEP_CLK_CAL_DIVIDER * (CAL_TLRA_CL_STS_AUTO_CAL / LAST_GOOD_TLRA_CL_STS)
  1025. * * (SLEEP_CLK_CAL_DIVIDER / 293) * (CL_T_TLRA_US / OL_T_LRA_US)
  1026. */
  1027. tmp = SLEEP_CLK_CAL_DIVIDER * SLEEP_CLK_CAL_DIVIDER;
  1028. tmp *= cal_tlra_cl_sts * config->cl_t_lra_us;
  1029. tmp = div_u64(tmp, last_good_tlra_cl_sts);
  1030. tmp = div_u64(tmp, 293);
  1031. config->rc_clk_cal_count = div_u64(tmp, config->t_lra_us);
  1032. } else {
  1033. dev_err(chip->dev, "Can't get close-loop LRA period in rc_clk_cal mode %u\n",
  1034. rc_clk_cal);
  1035. return -EINVAL;
  1036. }
  1037. if ((abs(config->t_lra_us - config->cl_t_lra_us) * 100 / config->t_lra_us) >
  1038. CL_TLRA_ERROR_RANGE_PCT) {
  1039. dev_warn(chip->dev, "The calibrated period (%d us) has large variation, use open-loop LRA period (%d us) instead\n",
  1040. config->cl_t_lra_us, config->t_lra_us);
  1041. config->cl_t_lra_us = config->t_lra_us;
  1042. chip->config.rc_clk_cal_count = 0;
  1043. }
  1044. dev_dbg(chip->dev, "OL_TLRA %u us, CL_TLRA %u us, RC_CLK_CAL_COUNT %#x\n",
  1045. chip->config.t_lra_us, chip->config.cl_t_lra_us,
  1046. chip->config.rc_clk_cal_count);
  1047. return 0;
  1048. }
  1049. static int haptics_module_enable(struct haptics_chip *chip, bool enable)
  1050. {
  1051. u8 val;
  1052. int rc;
  1053. val = enable ? HAPTICS_EN_BIT : 0;
  1054. rc = haptics_write(chip, chip->cfg_addr_base,
  1055. HAP_CFG_EN_CTL_REG, &val, 1);
  1056. if (rc < 0)
  1057. return rc;
  1058. dev_dbg(chip->dev, "haptics module %s\n",
  1059. enable ? "enabled" : "disabled");
  1060. return 0;
  1061. }
  1062. static int haptics_toggle_module_enable(struct haptics_chip *chip)
  1063. {
  1064. int rc;
  1065. /*
  1066. * Updating HAPTICS_EN would vote hBoost enable status. Add 100us
  1067. * delay before updating HAPTICS_EN for hBoost to have enough time
  1068. * to handle its power transition.
  1069. */
  1070. usleep_range(100, 101);
  1071. rc = haptics_module_enable(chip, false);
  1072. if (rc < 0)
  1073. return rc;
  1074. usleep_range(100, 101);
  1075. return haptics_module_enable(chip, true);
  1076. }
  1077. #define VMAX_SETTLE_COUNT 10
  1078. static int haptics_check_hpwr_status(struct haptics_chip *chip)
  1079. {
  1080. int i, rc = 0;
  1081. u8 val;
  1082. if (chip->hw_type != HAP525_HV)
  1083. return 0;
  1084. for (i = 0; i < VMAX_SETTLE_COUNT; i++) {
  1085. rc = haptics_read(chip, chip->cfg_addr_base, HAP_CFG_HPWR_INTF_REG, &val, 1);
  1086. if (rc < 0)
  1087. break;
  1088. val &= HPWR_INTF_STATUS_MASK;
  1089. if ((val == HPWR_DISABLED) || (val == HPWR_READY))
  1090. break;
  1091. usleep_range(1000, 1001);
  1092. }
  1093. if (!rc && i == VMAX_SETTLE_COUNT) {
  1094. haptics_toggle_module_enable(chip);
  1095. dev_err(chip->dev, "set Vmax failed, toggle HAPTICS_EN to restore HW status\n");
  1096. rc = -EBUSY;
  1097. }
  1098. return rc;
  1099. }
  1100. static int haptics_get_lra_nominal_impedance(struct haptics_chip *chip, u32 *nominal_ohm)
  1101. {
  1102. u8 val;
  1103. int rc;
  1104. if (!chip->hap_cfg_nvmem) {
  1105. dev_dbg(chip->dev, "nvmem is not defined, couldn't get defined LRA nominal impedance\n");
  1106. return -EINVAL;
  1107. }
  1108. rc = nvmem_device_read(chip->hap_cfg_nvmem,
  1109. HAP_LRA_NOMINAL_OHM_SDAM_OFFSET, 1, &val);
  1110. if (rc > 0) {
  1111. *nominal_ohm = (val * LRA_IMPEDANCE_MOHMS_LSB) / 1000;
  1112. dev_dbg(chip->dev, "LRA nominal impedance is %d ohm\n", *nominal_ohm);
  1113. }
  1114. return rc > 0 ? 0 : rc;
  1115. }
  1116. static int haptics_set_vmax_headroom_mv(struct haptics_chip *chip, u32 hdrm_mv)
  1117. {
  1118. int rc = 0;
  1119. u8 val;
  1120. if (hdrm_mv > VMAX_HDRM_MAX_MV) {
  1121. dev_err(chip->dev, "headroom (%d) exceed the max value: %d\n",
  1122. hdrm_mv, VMAX_HDRM_MAX_MV);
  1123. return -EINVAL;
  1124. }
  1125. val = hdrm_mv / VMAX_HDRM_STEP_MV;
  1126. rc = haptics_write(chip, chip->cfg_addr_base,
  1127. HAP_CFG_VMAX_HDRM_REG, &val, 1);
  1128. if (rc < 0)
  1129. dev_err(chip->dev, "config VMAX_HDRM failed, rc=%d\n", rc);
  1130. return rc;
  1131. }
  1132. static int haptics_get_vmax_headroom_mv(struct haptics_chip *chip, u32 *hdrm_mv)
  1133. {
  1134. int rc;
  1135. u8 val;
  1136. rc = haptics_read(chip, chip->cfg_addr_base,
  1137. HAP_CFG_VMAX_HDRM_REG, &val, 1);
  1138. if (rc < 0) {
  1139. dev_err(chip->dev, "Get Vmax HDRM failed, rc=%d\n",
  1140. rc);
  1141. return rc;
  1142. }
  1143. *hdrm_mv = (val & VMAX_HDRM_MASK) * VMAX_HDRM_STEP_MV;
  1144. return 0;
  1145. }
  1146. static int haptics_set_vmax_mv(struct haptics_chip *chip, u32 vmax_mv)
  1147. {
  1148. int rc = 0;
  1149. u8 val, vmax_step;
  1150. u32 nominal_ohm, vmax_hdrm_mv;
  1151. mutex_lock(&chip->vmax_lock);
  1152. if (vmax_mv > chip->max_vmax_mv) {
  1153. dev_dbg(chip->dev, "vmax (%d) exceed the max value: %d\n",
  1154. vmax_mv, chip->max_vmax_mv);
  1155. vmax_mv = chip->max_vmax_mv;
  1156. }
  1157. if (vmax_mv > chip->clamped_vmax_mv)
  1158. vmax_mv = chip->clamped_vmax_mv;
  1159. if (chip->clamp_at_5v && (vmax_mv > CLAMPED_VMAX_MV))
  1160. vmax_mv = CLAMPED_VMAX_MV;
  1161. rc = haptics_get_lra_nominal_impedance(chip, &nominal_ohm);
  1162. if (!rc && (chip->hw_type >= HAP525_HV)) {
  1163. if ((nominal_ohm >= 15) && (vmax_mv > 4500))
  1164. vmax_hdrm_mv = 1000;
  1165. else if ((nominal_ohm < 15) && (vmax_mv > 7000))
  1166. vmax_hdrm_mv = 1500;
  1167. else if ((nominal_ohm < 15) && (vmax_mv > 3500))
  1168. vmax_hdrm_mv = 1000;
  1169. else
  1170. vmax_hdrm_mv = 500;
  1171. if ((vmax_mv + vmax_hdrm_mv) > MAX_VMAX_MV)
  1172. vmax_mv = MAX_VMAX_MV - vmax_hdrm_mv;
  1173. rc = haptics_set_vmax_headroom_mv(chip, vmax_hdrm_mv);
  1174. if (rc < 0) {
  1175. mutex_unlock(&chip->vmax_lock);
  1176. return rc;
  1177. }
  1178. dev_dbg(chip->dev, "update VMAX_HDRM to %d mv\n", vmax_hdrm_mv);
  1179. }
  1180. vmax_step = (chip->is_hv_haptics) ?
  1181. VMAX_HV_STEP_MV : VMAX_MV_STEP_MV;
  1182. val = vmax_mv / vmax_step;
  1183. rc = haptics_write(chip, chip->cfg_addr_base,
  1184. HAP_CFG_VMAX_REG, &val, 1);
  1185. if (rc < 0) {
  1186. dev_err(chip->dev, "config VMAX failed, rc=%d\n", rc);
  1187. mutex_unlock(&chip->vmax_lock);
  1188. return rc;
  1189. }
  1190. dev_dbg(chip->dev, "Set Vmax to %u mV\n", vmax_mv);
  1191. rc = haptics_check_hpwr_status(chip);
  1192. if (rc < 0)
  1193. dev_err(chip->dev, "check hpwr_status failed, rc=%d\n", rc);
  1194. mutex_unlock(&chip->vmax_lock);
  1195. return rc;
  1196. }
  1197. static int haptics_enable_autores(struct haptics_chip *chip, bool en)
  1198. {
  1199. int rc;
  1200. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  1201. HAP_CFG_AUTORES_CFG_REG, AUTORES_EN_BIT,
  1202. en ? AUTORES_EN_BIT : 0);
  1203. if (rc < 0)
  1204. dev_err(chip->dev, "%s auto resonance failed, rc=%d\n",
  1205. en ? "enable" : "disable", rc);
  1206. return rc;
  1207. }
  1208. static int haptics_set_direct_play(struct haptics_chip *chip, u8 amplitude)
  1209. {
  1210. int rc;
  1211. rc = haptics_write(chip, chip->ptn_addr_base,
  1212. HAP_PTN_DIRECT_PLAY_REG, &amplitude, 1);
  1213. if (rc < 0)
  1214. dev_err(chip->dev, "config DIRECT_PLAY failed, rc=%d\n", rc);
  1215. return rc;
  1216. }
  1217. static bool is_boost_vreg_enabled_in_open_loop(struct haptics_chip *chip)
  1218. {
  1219. int rc;
  1220. u8 val;
  1221. if (is_haptics_external_powered(chip))
  1222. return false;
  1223. rc = haptics_read(chip, chip->hbst_addr_base, HAP_BOOST_VREG_EN_REG, &val, 1);
  1224. if (rc < 0)
  1225. return false;
  1226. chip->hboost_enabled = (val & VREG_EN_BIT);
  1227. rc = haptics_read(chip, chip->hbst_addr_base, HAP_BOOST_HW_CTRL_FOLLOW_REG, &val, 1);
  1228. if (rc < 0)
  1229. return false;
  1230. if (!(val & FOLLOW_HW_EN_BIT) && chip->hboost_enabled) {
  1231. dev_dbg(chip->dev, "HBoost is enabled in open loop condition\n");
  1232. return true;
  1233. }
  1234. return false;
  1235. }
  1236. static int haptics_boost_vreg_enable(struct haptics_chip *chip, bool en)
  1237. {
  1238. int rc;
  1239. u8 val;
  1240. if (is_haptics_external_powered(chip))
  1241. return 0;
  1242. if (!(chip->wa_flags & SW_CTRL_HBST))
  1243. return 0;
  1244. if (chip->hap_cfg_nvmem == NULL) {
  1245. dev_dbg(chip->dev, "nvmem device for hap_cfg is not defined\n");
  1246. return 0;
  1247. }
  1248. if (is_boost_vreg_enabled_in_open_loop(chip)) {
  1249. dev_dbg(chip->dev, "Ignore %s hBoost while it's enabled in open-loop mode\n",
  1250. en ? "enabling" : "disabling");
  1251. return 0;
  1252. }
  1253. if (chip->hboost_enabled == en)
  1254. return 0;
  1255. val = en ? HAP_VREG_ON_VAL : HAP_VREG_OFF_VAL;
  1256. rc = nvmem_device_write(chip->hap_cfg_nvmem,
  1257. PBS_ARG_REG, 1, &val);
  1258. if (rc < 0) {
  1259. dev_err(chip->dev, "write SDAM %#x failed, rc=%d\n",
  1260. PBS_ARG_REG, rc);
  1261. return rc;
  1262. }
  1263. val = PBS_TRIG_SET_VAL;
  1264. rc = nvmem_device_write(chip->hap_cfg_nvmem,
  1265. PBS_TRIG_SET_REG, 1, &val);
  1266. if (rc < 0) {
  1267. dev_err(chip->dev, "Write SDAM %#x failed, rc=%d\n",
  1268. PBS_TRIG_SET_REG, rc);
  1269. return rc;
  1270. }
  1271. chip->hboost_enabled = en;
  1272. return 0;
  1273. }
  1274. static bool is_swr_play_enabled(struct haptics_chip *chip)
  1275. {
  1276. int rc;
  1277. u8 val[2];
  1278. rc = haptics_get_status_data(chip, HAP_DRV_STS, val);
  1279. if (rc < 0)
  1280. return false;
  1281. if ((val[1] & HAP_DRV_PATTERN_SRC_STATUS_MASK) == SWR)
  1282. return true;
  1283. return false;
  1284. }
  1285. #define HBOOST_WAIT_READY_COUNT 100
  1286. #define HBOOST_WAIT_READY_INTERVAL_US 200
  1287. static int haptics_wait_hboost_ready(struct haptics_chip *chip)
  1288. {
  1289. int i, rc;
  1290. u8 val;
  1291. if (is_haptics_external_powered(chip))
  1292. return 0;
  1293. if (!(chip->wa_flags & SW_CTRL_HBST))
  1294. return 0;
  1295. if ((hrtimer_get_remaining(&chip->hbst_off_timer) > 0) ||
  1296. hrtimer_active(&chip->hbst_off_timer)) {
  1297. hrtimer_cancel(&chip->hbst_off_timer);
  1298. dev_dbg(chip->dev, "hboost is still on, ignore\n");
  1299. return 0;
  1300. }
  1301. /*
  1302. * Wait ~20ms until hBoost is ready, otherwise
  1303. * bail out and return -EBUSY
  1304. */
  1305. for (i = 0; i < HBOOST_WAIT_READY_COUNT; i++) {
  1306. /* HBoost is always ready when working in open loop mode */
  1307. if (is_boost_vreg_enabled_in_open_loop(chip))
  1308. return 0;
  1309. /*
  1310. * If there is already a SWR play in the background, then HBoost
  1311. * will be kept as on hence no need to wait its ready.
  1312. */
  1313. mutex_lock(&chip->play.lock);
  1314. if (is_swr_play_enabled(chip)) {
  1315. dev_dbg(chip->dev, "Ignore waiting hBoost when SWR play is in progress\n");
  1316. mutex_unlock(&chip->play.lock);
  1317. return 0;
  1318. }
  1319. mutex_unlock(&chip->play.lock);
  1320. /* Check if HBoost is in standby (disabled) state */
  1321. rc = haptics_read(chip, chip->hbst_addr_base,
  1322. HAP_BOOST_VREG_EN_REG, &val, 1);
  1323. if (!rc && !(val & VREG_EN_BIT)) {
  1324. rc = haptics_read(chip, chip->hbst_addr_base,
  1325. HAP_BOOST_STATUS4_REG, &val, 1);
  1326. if (!rc && !(val & BOOST_DTEST1_STATUS_BIT))
  1327. return 0;
  1328. }
  1329. dev_dbg(chip->dev, "hBoost is busy, wait %d\n", i);
  1330. usleep_range(HBOOST_WAIT_READY_INTERVAL_US,
  1331. HBOOST_WAIT_READY_INTERVAL_US + 1);
  1332. }
  1333. if (i == HBOOST_WAIT_READY_COUNT) {
  1334. dev_err(chip->dev, "hboost is not ready for haptics play\n");
  1335. return -EBUSY;
  1336. }
  1337. return 0;
  1338. }
  1339. static int haptics_enable_hpwr_vreg(struct haptics_chip *chip, bool en)
  1340. {
  1341. int rc;
  1342. if (chip->hpwr_vreg == NULL || chip->hpwr_vreg_enabled == en)
  1343. return 0;
  1344. if (en) {
  1345. rc = regulator_set_voltage(chip->hpwr_vreg,
  1346. chip->hpwr_voltage_mv * 1000, INT_MAX);
  1347. if (rc < 0) {
  1348. dev_err(chip->dev, "Set hpwr voltage failed, rc=%d\n",
  1349. rc);
  1350. return rc;
  1351. }
  1352. rc = regulator_enable(chip->hpwr_vreg);
  1353. if (rc < 0) {
  1354. dev_err(chip->dev, "Enable hpwr failed, rc=%d\n",
  1355. rc);
  1356. regulator_set_voltage(chip->hpwr_vreg, 0, INT_MAX);
  1357. return rc;
  1358. }
  1359. } else {
  1360. rc = regulator_disable(chip->hpwr_vreg);
  1361. if (rc < 0) {
  1362. dev_err(chip->dev, "Disable hpwr failed, rc=%d\n",
  1363. rc);
  1364. return rc;
  1365. }
  1366. rc = regulator_set_voltage(chip->hpwr_vreg, 0, INT_MAX);
  1367. if (rc < 0) {
  1368. dev_err(chip->dev, "Set hpwr voltage failed, rc=%d\n",
  1369. rc);
  1370. return rc;
  1371. }
  1372. }
  1373. dev_dbg(chip->dev, "%s hpwr vreg\n", en ? "enabled" : "disabled");
  1374. chip->hpwr_vreg_enabled = en;
  1375. return 0;
  1376. }
  1377. static int haptics_force_vreg_ready(struct haptics_chip *chip, bool ready)
  1378. {
  1379. u8 mask;
  1380. mask = FORCE_VREG_RDY_BIT;
  1381. if (chip->hw_type == HAP525_HV)
  1382. mask |= FORCE_VSET_ACK_BIT;
  1383. return haptics_masked_write(chip, chip->cfg_addr_base,
  1384. HAP_CFG_VSET_CFG_REG, mask, ready ? mask : 0);
  1385. }
  1386. static int haptics_open_loop_drive_config(struct haptics_chip *chip, bool en)
  1387. {
  1388. int rc = 0;
  1389. u8 val;
  1390. if ((is_boost_vreg_enabled_in_open_loop(chip) ||
  1391. chip->hboost_enabled || is_haptics_external_powered(chip)) && en) {
  1392. /*
  1393. * Only set force-VREG-ready here if hBoost is not used by charger firmware.
  1394. * In the case of charger firmware enabling hBoost, force-VREG-ready will be
  1395. * set/reset based on the VMAX_CLAMP notification.
  1396. */
  1397. if (chip->clamped_vmax_mv == MAX_HV_VMAX_MV) {
  1398. rc = haptics_force_vreg_ready(chip, true);
  1399. if (rc < 0)
  1400. return rc;
  1401. }
  1402. /* Toggle RC_CLK_CAL_EN if it's in auto mode */
  1403. rc = haptics_read(chip, chip->cfg_addr_base,
  1404. HAP_CFG_CAL_EN_REG, &val, 1);
  1405. if (rc < 0)
  1406. return rc;
  1407. if ((chip->wa_flags & TOGGLE_CAL_RC_CLK) &&
  1408. ((val & CAL_RC_CLK_MASK) ==
  1409. CAL_RC_CLK_AUTO_VAL << CAL_RC_CLK_SHIFT)) {
  1410. val = CAL_RC_CLK_DISABLED_VAL << CAL_RC_CLK_SHIFT;
  1411. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  1412. HAP_CFG_CAL_EN_REG, CAL_RC_CLK_MASK,
  1413. val);
  1414. if (rc < 0)
  1415. return rc;
  1416. val = CAL_RC_CLK_AUTO_VAL << CAL_RC_CLK_SHIFT;
  1417. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  1418. HAP_CFG_CAL_EN_REG, CAL_RC_CLK_MASK,
  1419. val);
  1420. if (rc < 0)
  1421. return rc;
  1422. dev_dbg(chip->dev, "Toggle CAL_EN in open-loop-VREG playing\n");
  1423. }
  1424. } else if (!is_haptics_external_powered(chip) &&
  1425. (chip->clamped_vmax_mv == MAX_HV_VMAX_MV)) {
  1426. /*
  1427. * Reset force-VREG-ready only when hBoost is not
  1428. * used by charger firmware.
  1429. */
  1430. rc = haptics_force_vreg_ready(chip, false);
  1431. if (rc < 0)
  1432. return rc;
  1433. }
  1434. return 0;
  1435. }
  1436. static int haptics_clear_fault(struct haptics_chip *chip)
  1437. {
  1438. u8 val;
  1439. val = SC_CLR_BIT | AUTO_RES_ERR_CLR_BIT |
  1440. HPWR_RDY_FAULT_CLR_BIT;
  1441. return haptics_write(chip, chip->cfg_addr_base,
  1442. HAP_CFG_FAULT_CLR_REG, &val, 1);
  1443. }
  1444. static int haptics_wait_brake_complete(struct haptics_chip *chip)
  1445. {
  1446. struct haptics_play_info *play = &chip->play;
  1447. u32 brake_length_us, t_lra_us, timeout, delay_us;
  1448. int rc;
  1449. u8 val;
  1450. if (chip->hw_type != HAP525_HV)
  1451. return 0;
  1452. t_lra_us = (chip->config.cl_t_lra_us) ?
  1453. chip->config.cl_t_lra_us : chip->config.t_lra_us;
  1454. brake_length_us = get_brake_play_length_us(play->brake, t_lra_us);
  1455. /* add a cycle to give some margin for brake synchronization */
  1456. brake_length_us += t_lra_us;
  1457. delay_us = t_lra_us / 2;
  1458. timeout = brake_length_us / delay_us + 1;
  1459. dev_dbg(chip->dev, "wait %d us for brake pattern to complete\n", brake_length_us);
  1460. /* poll HPWR_DISABLED to guarantee the brake pattern has been played completely */
  1461. do {
  1462. usleep_range(delay_us, delay_us + 1);
  1463. rc = haptics_read(chip, chip->cfg_addr_base, HAP_CFG_HPWR_INTF_REG, &val, 1);
  1464. if (rc < 0) {
  1465. dev_err(chip->dev, "read HPWR_INTF failed, rc=%d\n", rc);
  1466. return rc;
  1467. }
  1468. if ((val & HPWR_INTF_STATUS_MASK) == HPWR_DISABLED) {
  1469. dev_dbg(chip->dev, "stopped play completely");
  1470. break;
  1471. }
  1472. dev_dbg(chip->dev, "polling HPWR_INTF timeout %d, value = %d\n",
  1473. timeout, val);
  1474. } while (--timeout);
  1475. if (timeout == 0) {
  1476. dev_warn(chip->dev, "poll HPWR_DISABLED failed after stopped play\n");
  1477. return haptics_toggle_module_enable(chip);
  1478. }
  1479. return 0;
  1480. }
  1481. #define BOOST_VREG_OFF_DELAY_SECONDS 2
  1482. static int haptics_enable_play(struct haptics_chip *chip, bool en)
  1483. {
  1484. struct haptics_play_info *play = &chip->play;
  1485. int rc;
  1486. u8 val;
  1487. if (en) {
  1488. rc = haptics_clear_fault(chip);
  1489. if (rc < 0)
  1490. return rc;
  1491. }
  1492. rc = haptics_open_loop_drive_config(chip, en);
  1493. if (rc < 0)
  1494. return rc;
  1495. val = play->pattern_src;
  1496. if (chip->hw_type == HAP525_HV && play->pattern_src == PATTERN_MEM)
  1497. val |= FIELD_PREP(PATX_MEM_SEL_MASK, play->effect->pat_sel);
  1498. if (play->brake && !play->brake->disabled)
  1499. val |= BRAKE_EN_BIT;
  1500. if (en)
  1501. val |= PLAY_EN_BIT;
  1502. rc = haptics_write(chip, chip->cfg_addr_base,
  1503. HAP_CFG_SPMI_PLAY_REG, &val, 1);
  1504. if (rc < 0) {
  1505. dev_err(chip->dev, "Write SPMI_PLAY failed, rc=%d\n", rc);
  1506. return rc;
  1507. }
  1508. if (!en)
  1509. haptics_wait_brake_complete(chip);
  1510. if (chip->wa_flags & SW_CTRL_HBST) {
  1511. if (en) {
  1512. rc = haptics_boost_vreg_enable(chip, true);
  1513. if (rc < 0) {
  1514. dev_err(chip->dev, "Keep boost vreg on failed, rc=%d\n",
  1515. rc);
  1516. return rc;
  1517. }
  1518. } else {
  1519. hrtimer_start(&chip->hbst_off_timer,
  1520. ktime_set(BOOST_VREG_OFF_DELAY_SECONDS, 0),
  1521. HRTIMER_MODE_REL);
  1522. }
  1523. }
  1524. trace_qcom_haptics_play(en);
  1525. return rc;
  1526. }
  1527. static int haptics_set_brake(struct haptics_chip *chip, struct brake_cfg *brake)
  1528. {
  1529. int rc = 0;
  1530. u8 val;
  1531. if (brake->disabled)
  1532. return 0;
  1533. val = brake->mode << BRAKE_MODE_SHIFT |
  1534. brake->sine_gain << BRAKE_SINE_GAIN_SHIFT;
  1535. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  1536. HAP_CFG_BRAKE_MODE_CFG_REG,
  1537. BRAKE_MODE_MASK | BRAKE_SINE_GAIN_MASK, val);
  1538. if (rc < 0) {
  1539. dev_err(chip->dev, "set brake CFG failed, rc=%d\n", rc);
  1540. return rc;
  1541. }
  1542. rc = haptics_write(chip, chip->ptn_addr_base, HAP_PTN_BRAKE_AMP_REG,
  1543. brake->samples, BRAKE_SAMPLE_COUNT);
  1544. if (rc < 0) {
  1545. dev_err(chip->dev, "set brake pattern failed, rc=%d\n", rc);
  1546. return rc;
  1547. }
  1548. return 0;
  1549. }
  1550. static int haptics_set_pattern(struct haptics_chip *chip,
  1551. struct pattern_cfg *pattern,
  1552. enum pattern_src src)
  1553. {
  1554. struct pattern_s *sample;
  1555. u8 values[SAMPLES_PER_PATTERN * 3] = { 0 };
  1556. u8 ptn_tlra_addr, ptn_cfg_addr;
  1557. int i, rc, tmp;
  1558. u32 play_rate_us;
  1559. if (src != PATTERN1 && src != PATTERN2) {
  1560. dev_err(chip->dev, "no pattern src specified!\n");
  1561. return -EINVAL;
  1562. }
  1563. ptn_tlra_addr = HAP_PTN_PTRN1_TLRA_MSB_REG;
  1564. ptn_cfg_addr = HAP_PTN_PTRN1_CFG_REG;
  1565. if (src == PATTERN2) {
  1566. ptn_tlra_addr = HAP_PTN_PTRN2_TLRA_MSB_REG;
  1567. ptn_cfg_addr = HAP_PTN_PTRN2_CFG_REG;
  1568. }
  1569. /* Adjust T_LRA before programming it into HW */
  1570. play_rate_us = pattern->play_rate_us;
  1571. rc = haptics_adjust_lra_period(chip, &play_rate_us);
  1572. if (rc < 0)
  1573. return rc;
  1574. /* Configure T_LRA for this pattern */
  1575. tmp = play_rate_us / TLRA_STEP_US;
  1576. values[0] = (tmp >> 8) & TLRA_OL_MSB_MASK;
  1577. values[1] = tmp & TLRA_OL_LSB_MASK;
  1578. rc = haptics_write(chip, chip->ptn_addr_base, ptn_tlra_addr,
  1579. values, 2);
  1580. if (rc < 0) {
  1581. dev_err(chip->dev, "update pattern TLRA failed, rc=%d\n", rc);
  1582. return rc;
  1583. }
  1584. /* Configure pattern registers */
  1585. for (i = 0; i < SAMPLES_PER_PATTERN; i++) {
  1586. sample = &pattern->samples[i];
  1587. values[i * 3] = sample->f_lra_x2 << PTRN_FLRA2X_SHIFT;
  1588. values[i * 3] |= sample->period & PTRN_SAMPLE_PER_MASK;
  1589. values[i * 3 + 1] =
  1590. (sample->amplitude >> 8) & PTRN_AMP_MSB_MASK;
  1591. values[i * 3 + 2] = sample->amplitude & PTRN_AMP_LSB_MASK;
  1592. }
  1593. rc = haptics_write(chip, chip->ptn_addr_base, ptn_cfg_addr,
  1594. values, SAMPLES_PER_PATTERN * 3);
  1595. if (rc < 0) {
  1596. dev_err(chip->dev, "write pattern data failed, rc=%d\n", rc);
  1597. return rc;
  1598. }
  1599. return 0;
  1600. }
  1601. static int haptics_update_memory_data(struct haptics_chip *chip,
  1602. u8 *data, u32 length)
  1603. {
  1604. int rc, count, i;
  1605. u32 left;
  1606. u8 tmp[HAP_PTN_FIFO_DIN_NUM] = {0};
  1607. if (!length)
  1608. return 0;
  1609. count = length / HAP_PTN_FIFO_DIN_NUM;
  1610. for (i = 0; i < count; i++) {
  1611. rc = haptics_write(chip, chip->ptn_addr_base,
  1612. HAP_PTN_FIFO_DIN_0_REG, data,
  1613. HAP_PTN_FIFO_DIN_NUM);
  1614. if (rc < 0) {
  1615. dev_err(chip->dev, "bulk write FIFO_DIN failed, rc=%d\n",
  1616. rc);
  1617. return rc;
  1618. }
  1619. data += HAP_PTN_FIFO_DIN_NUM;
  1620. }
  1621. left = length % HAP_PTN_FIFO_DIN_NUM;
  1622. if (left) {
  1623. /*
  1624. * In HAP520 module, when 1-byte FIFO write clashes
  1625. * with the HW FIFO read operation, the HW will only read
  1626. * 1 valid byte in every 4 bytes FIFO samples. So avoid
  1627. * this by keeping the samples 4-byte aligned and always
  1628. * use 4-byte write for HAP520 module.
  1629. */
  1630. if (chip->hw_type == HAP520) {
  1631. memcpy(tmp, data, left);
  1632. rc = haptics_write(chip, chip->ptn_addr_base,
  1633. HAP_PTN_FIFO_DIN_0_REG, tmp,
  1634. HAP_PTN_FIFO_DIN_NUM);
  1635. if (rc < 0)
  1636. dev_err(chip->dev, "write FIFO_DIN failed, rc=%d\n", rc);
  1637. return rc;
  1638. }
  1639. for (i = 0; i < left; i++) {
  1640. rc = haptics_write(chip, chip->ptn_addr_base,
  1641. HAP_PTN_FIFO_DIN_1B_REG,
  1642. (data + i), 1);
  1643. if (rc < 0) {
  1644. dev_err(chip->dev, "write FIFO_DIN_1B failed, rc=%d\n",
  1645. rc);
  1646. return rc;
  1647. }
  1648. }
  1649. }
  1650. return 0;
  1651. }
  1652. static int haptics_update_fifo_samples(struct haptics_chip *chip,
  1653. u8 *samples, u32 length, bool refill)
  1654. {
  1655. int rc;
  1656. u8 val;
  1657. if (!samples) {
  1658. dev_err(chip->dev, "no data available to update FIFO\n");
  1659. return -EINVAL;
  1660. }
  1661. if (chip->hw_type == HAP525_HV && !refill) {
  1662. val = MEM_FLUSH_RELOAD_BIT;
  1663. rc = haptics_write(chip, chip->ptn_addr_base,
  1664. HAP_PTN_MEM_OP_ACCESS_REG, &val, 1);
  1665. if (rc < 0)
  1666. return rc;
  1667. val = 0;
  1668. rc = haptics_write(chip, chip->ptn_addr_base,
  1669. HAP_PTN_MEM_OP_ACCESS_REG, &val, 1);
  1670. if (rc < 0)
  1671. return rc;
  1672. }
  1673. return haptics_update_memory_data(chip, samples, length);
  1674. }
  1675. static int haptics_update_pat_mem_samples(struct haptics_chip *chip,
  1676. enum pat_mem_sel pat_sel, u8 *samples, u32 length)
  1677. {
  1678. int rc;
  1679. u8 val;
  1680. if (!samples) {
  1681. dev_err(chip->dev, "no data available to update PAT_MEM\n");
  1682. return -EINVAL;
  1683. }
  1684. /* only HAP525_HV supports PATx_MEM pattern source */
  1685. if (chip->hw_type != HAP525_HV) {
  1686. dev_dbg(chip->dev, "HW type %d doesn't support PATx_MEM pattern source\n",
  1687. chip->hw_type);
  1688. return 0;
  1689. }
  1690. val = FIELD_PREP(MEM_PAT_RW_SEL_MASK, pat_sel);
  1691. val |= MEM_PAT_ACCESS_BIT | MEM_FLUSH_RELOAD_BIT;
  1692. rc = haptics_write(chip, chip->ptn_addr_base,
  1693. HAP_PTN_MEM_OP_ACCESS_REG, &val, 1);
  1694. if (rc < 0)
  1695. return rc;
  1696. val &= ~MEM_FLUSH_RELOAD_BIT;
  1697. rc = haptics_write(chip, chip->ptn_addr_base,
  1698. HAP_PTN_MEM_OP_ACCESS_REG, &val, 1);
  1699. if (rc < 0)
  1700. return rc;
  1701. rc = haptics_update_memory_data(chip, samples, length);
  1702. rc |= haptics_masked_write(chip, chip->ptn_addr_base,
  1703. HAP_PTN_MEM_OP_ACCESS_REG, MEM_PAT_ACCESS_BIT, 0);
  1704. return rc;
  1705. }
  1706. static int haptics_get_fifo_fill_status(struct haptics_chip *chip, u32 *fill)
  1707. {
  1708. int rc;
  1709. u8 val[2], fill_status_mask;
  1710. u32 filled, available;
  1711. bool empty = false, full = false;
  1712. rc = haptics_get_status_data(chip, FIFO_REAL_TIME_STS, val);
  1713. if (rc < 0)
  1714. return rc;
  1715. switch (chip->hw_type) {
  1716. case HAP520:
  1717. fill_status_mask = FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V2;
  1718. break;
  1719. case HAP520_MV:
  1720. fill_status_mask = FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V3;
  1721. break;
  1722. case HAP525_HV:
  1723. fill_status_mask = FIFO_REAL_TIME_FILL_STATUS_MSB_MASK_V4;
  1724. break;
  1725. default:
  1726. dev_err(chip->dev, "HW type %d is not supported\n",
  1727. chip->hw_type);
  1728. return -EINVAL;
  1729. }
  1730. filled = ((val[0] & fill_status_mask) << 8) | val[1];
  1731. empty = !!(val[0] & FIFO_EMPTY_FLAG_BIT);
  1732. full = !!(val[0] & FIFO_FULL_FLAG_BIT);
  1733. available = get_max_fifo_samples(chip) - filled;
  1734. dev_dbg(chip->dev, "filled=%u, available=%u, full=%d, empty=%d\n",
  1735. filled, available, full, empty);
  1736. trace_qcom_haptics_fifo_hw_status(filled, available, full, empty);
  1737. *fill = filled;
  1738. return 0;
  1739. }
  1740. static int haptics_get_available_fifo_memory(struct haptics_chip *chip)
  1741. {
  1742. int rc;
  1743. u32 fill, available;
  1744. rc = haptics_get_fifo_fill_status(chip, &fill);
  1745. if (rc < 0)
  1746. return rc;
  1747. if (fill > get_max_fifo_samples(chip)) {
  1748. dev_err(chip->dev, "Filled FIFO number %d exceed the max %d\n",
  1749. fill, get_max_fifo_samples(chip));
  1750. return -EINVAL;
  1751. } else if (fill == get_max_fifo_samples(chip)) {
  1752. dev_err(chip->dev, "no FIFO space available\n");
  1753. return -EBUSY;
  1754. }
  1755. available = get_max_fifo_samples(chip) - fill;
  1756. return available;
  1757. }
  1758. static int haptics_set_manual_rc_clk_cal(struct haptics_chip *chip)
  1759. {
  1760. int rc;
  1761. u16 cal_count = chip->config.rc_clk_cal_count;
  1762. u8 val[2];
  1763. if (cal_count == 0) {
  1764. dev_dbg(chip->dev, "Ignore setting RC_CLK_CAL_COUNT\n");
  1765. return 0;
  1766. }
  1767. val[0] = (cal_count >> 8) & RC_CLK_CAL_COUNT_MSB_MASK;
  1768. val[1] = cal_count & RC_CLK_CAL_COUNT_LSB_MASK;
  1769. rc = haptics_write(chip, chip->cfg_addr_base,
  1770. HAP_CFG_RC_CLK_CAL_COUNT_MSB_REG, val, 2);
  1771. if (rc < 0)
  1772. return rc;
  1773. val[0] = CAL_RC_CLK_MANUAL_VAL << CAL_RC_CLK_SHIFT;
  1774. return haptics_masked_write(chip, chip->cfg_addr_base,
  1775. HAP_CFG_CAL_EN_REG, CAL_RC_CLK_MASK,
  1776. val[0]);
  1777. }
  1778. static int haptics_set_fifo_playrate(struct haptics_chip *chip,
  1779. enum s_period period_per_s)
  1780. {
  1781. int rc;
  1782. rc = haptics_masked_write(chip, chip->ptn_addr_base,
  1783. HAP_PTN_FIFO_PLAY_RATE_REG,
  1784. FIFO_PLAY_RATE_MASK, period_per_s);
  1785. if (rc < 0)
  1786. dev_err(chip->dev, "Set FIFO play rate failed, rc=%d\n", rc);
  1787. return rc;
  1788. }
  1789. static int haptics_set_fifo_empty_threshold(struct haptics_chip *chip,
  1790. u32 thresh)
  1791. {
  1792. u8 thresh_per_bit;
  1793. int rc;
  1794. rc = get_fifo_threshold_per_bit(chip);
  1795. if (rc < 0)
  1796. return rc;
  1797. thresh_per_bit = rc;
  1798. rc = haptics_masked_write(chip, chip->ptn_addr_base,
  1799. HAP_PTN_FIFO_EMPTY_CFG_REG,
  1800. EMPTY_THRESH_MASK, (thresh / thresh_per_bit));
  1801. if (rc < 0)
  1802. dev_err(chip->dev, "Set FIFO empty threshold failed, rc=%d\n",
  1803. rc);
  1804. return rc;
  1805. }
  1806. static void haptics_fifo_empty_irq_config(struct haptics_chip *chip,
  1807. bool enable)
  1808. {
  1809. if (!chip->fifo_empty_irq_en && enable) {
  1810. enable_irq(chip->fifo_empty_irq);
  1811. chip->fifo_empty_irq_en = true;
  1812. } else if (chip->fifo_empty_irq_en && !enable) {
  1813. disable_irq_nosync(chip->fifo_empty_irq);
  1814. chip->fifo_empty_irq_en = false;
  1815. }
  1816. }
  1817. static int haptics_set_fifo(struct haptics_chip *chip, struct fifo_cfg *fifo)
  1818. {
  1819. struct fifo_play_status *status = &chip->play.fifo_status;
  1820. u32 num, fifo_thresh;
  1821. int rc, available;
  1822. if (atomic_read(&status->is_busy) == 1) {
  1823. dev_err(chip->dev, "FIFO is busy\n");
  1824. return -EBUSY;
  1825. }
  1826. /* Configure FIFO play rate */
  1827. rc = haptics_set_fifo_playrate(chip, fifo->period_per_s);
  1828. if (rc < 0)
  1829. return rc;
  1830. if (fifo->period_per_s >= F_8KHZ) {
  1831. /* Set manual RC CLK CAL when playing FIFO */
  1832. rc = haptics_set_manual_rc_clk_cal(chip);
  1833. if (rc < 0)
  1834. return rc;
  1835. }
  1836. atomic_set(&status->written_done, 0);
  1837. atomic_set(&status->cancelled, 0);
  1838. status->samples_written = 0;
  1839. /*
  1840. * Write the 1st set of the data into FIFO if there are
  1841. * more than MAX_FIFO_SAMPLES samples, the rest will be
  1842. * written if any FIFO memory is available after playing.
  1843. */
  1844. num = min_t(u32, fifo->num_s, get_max_fifo_samples(chip));
  1845. available = haptics_get_available_fifo_memory(chip);
  1846. if (available < 0)
  1847. return available;
  1848. num = min_t(u32, available, num);
  1849. num = min_t(u32, num, FIFO_PRGM_INIT_SIZE);
  1850. /* Keep the FIFO programming 4-byte aligned if FIFO refilling is needed */
  1851. if ((num < fifo->num_s) && (num % HAP_PTN_FIFO_DIN_NUM))
  1852. num = round_down(num, HAP_PTN_FIFO_DIN_NUM);
  1853. rc = haptics_update_fifo_samples(chip, fifo->samples, num, false);
  1854. if (rc < 0) {
  1855. dev_err(chip->dev, "write FIFO samples failed, rc=%d\n", rc);
  1856. return rc;
  1857. }
  1858. atomic_set(&status->is_busy, 1);
  1859. status->samples_written = num;
  1860. trace_qcom_haptics_fifo_prgm_status(fifo->num_s, status->samples_written, num);
  1861. if (num == fifo->num_s) {
  1862. fifo_thresh = 0;
  1863. atomic_set(&status->written_done, 1);
  1864. } else {
  1865. fifo_thresh = chip->config.fifo_empty_thresh;
  1866. }
  1867. /*
  1868. * Set FIFO empty threshold here. FIFO empty IRQ will
  1869. * be enabled after playing FIFO samples so that more
  1870. * FIFO samples can be written (if available) when
  1871. * FIFO empty IRQ is triggered.
  1872. */
  1873. rc = haptics_set_fifo_empty_threshold(chip, fifo_thresh);
  1874. if (rc < 0)
  1875. return rc;
  1876. haptics_fifo_empty_irq_config(chip, true);
  1877. return 0;
  1878. }
  1879. static int haptics_load_constant_effect(struct haptics_chip *chip, u8 amplitude)
  1880. {
  1881. struct haptics_play_info *play = &chip->play;
  1882. u32 hdrm_mv, vmax_mv = chip->config.vmax_mv;
  1883. int rc = 0;
  1884. mutex_lock(&chip->play.lock);
  1885. if (chip->play.in_calibration) {
  1886. dev_err(chip->dev, "calibration in progress, ignore playing constant effect\n");
  1887. rc = -EBUSY;
  1888. goto unlock;
  1889. }
  1890. /* No effect data when playing constant waveform */
  1891. play->effect = NULL;
  1892. /* Fix Vmax to (hpwr_vreg_mv - hdrm_mv) in non-HBOOST regulator case */
  1893. if (is_haptics_external_powered(chip)) {
  1894. rc = haptics_get_vmax_headroom_mv(chip, &hdrm_mv);
  1895. if (rc < 0)
  1896. goto unlock;
  1897. vmax_mv = chip->hpwr_voltage_mv - hdrm_mv;
  1898. }
  1899. /* configure VMAX in case it was changed in previous effect playing */
  1900. rc = haptics_set_vmax_mv(chip, vmax_mv);
  1901. if (rc < 0)
  1902. goto unlock;
  1903. /* Config brake settings if it's necessary */
  1904. play->brake = &chip->config.brake;
  1905. if (play->brake) {
  1906. rc = haptics_set_brake(chip, play->brake);
  1907. if (rc < 0)
  1908. goto unlock;
  1909. }
  1910. rc = haptics_set_direct_play(chip, amplitude);
  1911. if (rc < 0)
  1912. goto unlock;
  1913. /* Always enable LRA auto resonance for DIRECT_PLAY */
  1914. rc = haptics_enable_autores(chip, !chip->config.is_erm);
  1915. if (rc < 0)
  1916. goto unlock;
  1917. play->pattern_src = DIRECT_PLAY;
  1918. unlock:
  1919. mutex_unlock(&chip->play.lock);
  1920. return rc;
  1921. }
  1922. static int haptics_load_predefined_effect(struct haptics_chip *chip,
  1923. struct haptics_effect *effect)
  1924. {
  1925. struct haptics_play_info *play = &chip->play;
  1926. int rc;
  1927. if (effect == NULL)
  1928. return -EINVAL;
  1929. play->effect = effect;
  1930. /* Clamp VMAX for different vibration strength */
  1931. rc = haptics_set_vmax_mv(chip, play->vmax_mv);
  1932. if (rc < 0)
  1933. return rc;
  1934. play->pattern_src = play->effect->src;
  1935. if (play->pattern_src == DIRECT_PLAY ||
  1936. play->pattern_src == SWR) {
  1937. dev_err(chip->dev, "pattern src %d can't be used for predefined effect\n",
  1938. play->pattern_src);
  1939. return -EINVAL;
  1940. }
  1941. if ((play->pattern_src == FIFO) && (chip->wa_flags & TOGGLE_EN_TO_FLUSH_FIFO)) {
  1942. /* Toggle HAPTICS_EN for a clear start point of FIFO playing */
  1943. rc = haptics_toggle_module_enable(chip);
  1944. if (rc < 0)
  1945. return rc;
  1946. }
  1947. rc = haptics_enable_autores(chip, !play->effect->auto_res_disable);
  1948. if (rc < 0)
  1949. return rc;
  1950. play->brake = play->effect->brake;
  1951. /* Config brake settings if it's necessary */
  1952. if (play->brake) {
  1953. rc = haptics_set_brake(chip, play->brake);
  1954. if (rc < 0)
  1955. return rc;
  1956. }
  1957. if (play->pattern_src == PATTERN1 || play->pattern_src == PATTERN2) {
  1958. if (play->effect->pattern->preload) {
  1959. dev_dbg(chip->dev, "Ignore preloaded effect: %d\n",
  1960. play->effect->id);
  1961. return 0;
  1962. }
  1963. rc = haptics_set_pattern(chip, play->effect->pattern,
  1964. play->pattern_src);
  1965. if (rc < 0)
  1966. return rc;
  1967. }
  1968. if (play->pattern_src == FIFO) {
  1969. rc = haptics_set_fifo(chip, play->effect->fifo);
  1970. if (rc < 0)
  1971. return rc;
  1972. }
  1973. /*
  1974. * PATTERN_MEM sources (PATx_MEM) introduced in HAP525_HV haptics
  1975. * module are used for preload effects. The pattern for the preload
  1976. * effect should have been programmed during boot up and it will be
  1977. * retained until device is powered off, so it doesn't need to be
  1978. * programmed at runtime.
  1979. */
  1980. if (chip->hw_type == HAP525_HV &&
  1981. play->pattern_src == PATTERN_MEM) {
  1982. if (!play->effect->fifo->preload) {
  1983. dev_err(chip->dev, "effect %d has PAT_MEM src but not preloaded\n",
  1984. play->effect->id);
  1985. return -EINVAL;
  1986. }
  1987. /* disable auto resonance for PATx_MEM mode */
  1988. rc = haptics_enable_autores(chip, false);
  1989. if (rc < 0)
  1990. return rc;
  1991. dev_dbg(chip->dev, "Ignore loading data for preload FIFO effect: %d\n",
  1992. play->effect->id);
  1993. }
  1994. return 0;
  1995. }
  1996. static int haptics_init_custom_effect(struct haptics_chip *chip)
  1997. {
  1998. chip->custom_effect = devm_kzalloc(chip->dev,
  1999. sizeof(*chip->custom_effect), GFP_KERNEL);
  2000. if (!chip->custom_effect)
  2001. return -ENOMEM;
  2002. chip->custom_effect->fifo = devm_kzalloc(chip->dev,
  2003. sizeof(*chip->custom_effect->fifo), GFP_KERNEL);
  2004. if (!chip->custom_effect->fifo)
  2005. return -ENOMEM;
  2006. /* custom effect will be played in FIFO mode without brake */
  2007. chip->custom_effect->pattern = NULL;
  2008. chip->custom_effect->brake = NULL;
  2009. chip->custom_effect->id = UINT_MAX;
  2010. chip->custom_effect->vmax_mv = chip->config.vmax_mv;
  2011. chip->custom_effect->t_lra_us = chip->config.t_lra_us;
  2012. chip->custom_effect->src = FIFO;
  2013. chip->custom_effect->auto_res_disable = true;
  2014. return 0;
  2015. }
  2016. static int haptics_convert_sample_period(struct haptics_chip *chip,
  2017. u32 play_rate_hz)
  2018. {
  2019. enum s_period period;
  2020. u32 f_lra, f_lra_min, f_lra_max;
  2021. if (chip->config.t_lra_us == 0)
  2022. return -EINVAL;
  2023. f_lra = USEC_PER_SEC / chip->config.t_lra_us;
  2024. if (f_lra == 0 || f_lra < F_LRA_VARIATION_HZ)
  2025. return -EINVAL;
  2026. f_lra_min = f_lra - F_LRA_VARIATION_HZ;
  2027. f_lra_max = f_lra + F_LRA_VARIATION_HZ;
  2028. if (play_rate_hz == 8000)
  2029. period = F_8KHZ;
  2030. else if (play_rate_hz == 16000)
  2031. period = F_16KHZ;
  2032. else if (play_rate_hz == 24000)
  2033. period = F_24KHZ;
  2034. else if (play_rate_hz == 32000)
  2035. period = F_32KHZ;
  2036. else if (play_rate_hz == 44100)
  2037. period = F_44P1KHZ;
  2038. else if (play_rate_hz == 48000)
  2039. period = F_48KHZ;
  2040. else if (is_between(play_rate_hz, f_lra_min, f_lra_max))
  2041. period = T_LRA;
  2042. else if (is_between(play_rate_hz / 2, f_lra_min, f_lra_max))
  2043. period = T_LRA_DIV_2;
  2044. else if (is_between(play_rate_hz / 4, f_lra_min, f_lra_max))
  2045. period = T_LRA_DIV_4;
  2046. else if (is_between(play_rate_hz / 8, f_lra_min, f_lra_max))
  2047. period = T_LRA_DIV_8;
  2048. else if (is_between(play_rate_hz * 2, f_lra_min, f_lra_max))
  2049. period = T_LRA_X_2;
  2050. else if (is_between(play_rate_hz * 4, f_lra_min, f_lra_max))
  2051. period = T_LRA_X_4;
  2052. else if (is_between(play_rate_hz * 8, f_lra_min, f_lra_max))
  2053. period = T_LRA_X_8;
  2054. else
  2055. return -EINVAL;
  2056. return period;
  2057. }
  2058. static int haptics_load_custom_effect(struct haptics_chip *chip,
  2059. s16 __user *data, u32 length, s16 magnitude)
  2060. {
  2061. struct haptics_play_info *play = &chip->play;
  2062. struct custom_fifo_data custom_data = {};
  2063. struct fifo_cfg *fifo;
  2064. int rc;
  2065. if (!chip->custom_effect || !chip->custom_effect->fifo)
  2066. return -ENOMEM;
  2067. fifo = chip->custom_effect->fifo;
  2068. if (copy_from_user(&custom_data, data, sizeof(custom_data)))
  2069. return -EFAULT;
  2070. dev_dbg(chip->dev, "custom data length %d with play-rate %d Hz\n",
  2071. custom_data.length, custom_data.play_rate_hz);
  2072. rc = haptics_convert_sample_period(chip, custom_data.play_rate_hz);
  2073. if (rc < 0) {
  2074. dev_err(chip->dev, "Can't support play rate: %d Hz\n",
  2075. custom_data.play_rate_hz);
  2076. return rc;
  2077. }
  2078. mutex_lock(&chip->play.lock);
  2079. fifo->period_per_s = rc;
  2080. /*
  2081. * Before allocating samples buffer, free the old sample
  2082. * buffer first if it's not been freed.
  2083. */
  2084. kvfree(fifo->samples);
  2085. fifo->samples = kcalloc(custom_data.length, sizeof(u8), GFP_KERNEL);
  2086. if (!fifo->samples) {
  2087. fifo->samples = vmalloc(custom_data.length);
  2088. if (!fifo->samples) {
  2089. rc = -ENOMEM;
  2090. goto unlock;
  2091. }
  2092. }
  2093. if (copy_from_user(fifo->samples,
  2094. (u8 __user *)custom_data.data,
  2095. custom_data.length)) {
  2096. rc = -EFAULT;
  2097. goto cleanup;
  2098. }
  2099. dev_dbg(chip->dev, "Copy custom FIFO samples successfully\n");
  2100. fifo->num_s = custom_data.length;
  2101. fifo->play_length_us = get_fifo_play_length_us(fifo,
  2102. chip->custom_effect->t_lra_us);
  2103. if (chip->play.in_calibration) {
  2104. dev_err(chip->dev, "calibration in progress, ignore playing custom effect\n");
  2105. rc = -EBUSY;
  2106. goto cleanup;
  2107. }
  2108. play->effect = chip->custom_effect;
  2109. play->brake = NULL;
  2110. play->vmax_mv = (magnitude * chip->custom_effect->vmax_mv) / 0x7fff;
  2111. rc = haptics_set_vmax_mv(chip, play->vmax_mv);
  2112. if (rc < 0)
  2113. goto cleanup;
  2114. /* Toggle HAPTICS_EN for a clear start point of FIFO playing */
  2115. if (chip->wa_flags & TOGGLE_EN_TO_FLUSH_FIFO) {
  2116. rc = haptics_toggle_module_enable(chip);
  2117. if (rc < 0)
  2118. goto cleanup;
  2119. }
  2120. rc = haptics_enable_autores(chip, !play->effect->auto_res_disable);
  2121. if (rc < 0)
  2122. goto cleanup;
  2123. play->pattern_src = FIFO;
  2124. rc = haptics_set_fifo(chip, play->effect->fifo);
  2125. if (rc < 0)
  2126. goto cleanup;
  2127. mutex_unlock(&chip->play.lock);
  2128. return 0;
  2129. cleanup:
  2130. kvfree(fifo->samples);
  2131. fifo->samples = NULL;
  2132. unlock:
  2133. mutex_unlock(&chip->play.lock);
  2134. return rc;
  2135. }
  2136. static u32 get_play_length_effect_us(struct haptics_effect *effect)
  2137. {
  2138. u32 length_us = 0;
  2139. if (effect->brake)
  2140. length_us = effect->brake->play_length_us;
  2141. if ((effect->src == PATTERN1 || effect->src == PATTERN2)
  2142. && effect->pattern)
  2143. length_us += effect->pattern->play_length_us;
  2144. else if (effect->src == FIFO && effect->fifo)
  2145. length_us += effect->fifo->play_length_us;
  2146. return length_us;
  2147. }
  2148. static inline u32 get_play_length_us(struct haptics_play_info *play)
  2149. {
  2150. return get_play_length_effect_us(play->effect);
  2151. }
  2152. #define PRIMITIVE_EFFECT_ID_BIT BIT(15)
  2153. #define PRIMITIVE_EFFECT_ID_MASK GENMASK(14, 0)
  2154. static int haptics_load_periodic_effect(struct haptics_chip *chip,
  2155. s16 __user *data, u32 length, s16 magnitude)
  2156. {
  2157. struct haptics_play_info *play = &chip->play;
  2158. s16 custom_data[CUSTOM_DATA_LEN] = { 0 };
  2159. struct haptics_effect *effects = NULL;
  2160. s16 custom_id = 0;
  2161. int effects_count = 0;
  2162. int rc, i;
  2163. bool primitive;
  2164. if (copy_from_user(custom_data, data, sizeof(custom_data)))
  2165. return -EFAULT;
  2166. primitive = !!(custom_data[CUSTOM_DATA_EFFECT_IDX] & PRIMITIVE_EFFECT_ID_BIT);
  2167. if (primitive) {
  2168. if (chip->primitives_count == 0)
  2169. return -EINVAL;
  2170. custom_id = custom_data[CUSTOM_DATA_EFFECT_IDX] & PRIMITIVE_EFFECT_ID_MASK;
  2171. effects = chip->primitives;
  2172. effects_count = chip->primitives_count;
  2173. } else {
  2174. if (chip->effects_count == 0)
  2175. return -EINVAL;
  2176. custom_id = custom_data[CUSTOM_DATA_EFFECT_IDX];
  2177. effects = chip->effects;
  2178. effects_count = chip->effects_count;
  2179. }
  2180. for (i = 0; i < effects_count; i++)
  2181. if (effects[i].id == custom_id)
  2182. break;
  2183. if (i == effects_count) {
  2184. dev_err(chip->dev, "effect%d is not supported!\n",
  2185. custom_data[CUSTOM_DATA_EFFECT_IDX]);
  2186. return -EINVAL;
  2187. }
  2188. mutex_lock(&chip->play.lock);
  2189. if (chip->play.in_calibration) {
  2190. dev_err(chip->dev, "calibration in progress, ignore playing predefined effect\n");
  2191. rc = -EBUSY;
  2192. goto unlock;
  2193. }
  2194. play->vmax_mv = (magnitude * effects[i].vmax_mv) / 0x7fff;
  2195. dev_dbg(chip->dev, "upload %s effect %d, vmax=%d\n", primitive ? "primitive" : "predefined",
  2196. effects[i].id, play->vmax_mv);
  2197. rc = haptics_load_predefined_effect(chip, &effects[i]);
  2198. if (rc < 0) {
  2199. dev_err(chip->dev, "Play predefined effect%d failed, rc=%d\n",
  2200. effects[i].id, rc);
  2201. goto unlock;
  2202. }
  2203. mutex_unlock(&chip->play.lock);
  2204. play->length_us = get_play_length_us(play);
  2205. custom_data[CUSTOM_DATA_TIMEOUT_SEC_IDX] =
  2206. play->length_us / USEC_PER_SEC;
  2207. custom_data[CUSTOM_DATA_TIMEOUT_MSEC_IDX] =
  2208. (play->length_us % USEC_PER_SEC) / USEC_PER_MSEC;
  2209. if (copy_to_user(data, custom_data, length))
  2210. return -EFAULT;
  2211. return 0;
  2212. unlock:
  2213. mutex_unlock(&chip->play.lock);
  2214. return rc;
  2215. }
  2216. static u8 get_direct_play_max_amplitude(struct haptics_chip *chip)
  2217. {
  2218. u32 amplitude = DIRECT_PLAY_MAX_AMPLITUDE, hdrm_mv;
  2219. int rc;
  2220. if (is_haptics_external_powered(chip)) {
  2221. rc = haptics_get_vmax_headroom_mv(chip, &hdrm_mv);
  2222. if (rc < 0)
  2223. return 0;
  2224. amplitude *= chip->config.vmax_mv;
  2225. amplitude /= (chip->hpwr_voltage_mv - hdrm_mv);
  2226. if (amplitude > DIRECT_PLAY_MAX_AMPLITUDE)
  2227. amplitude = DIRECT_PLAY_MAX_AMPLITUDE;
  2228. }
  2229. dev_dbg(chip->dev, "max amplitude for direct play: %#x\n", amplitude);
  2230. return (u8)amplitude;
  2231. }
  2232. static int haptics_stop_fifo_play(struct haptics_chip *chip)
  2233. {
  2234. int rc;
  2235. u8 val;
  2236. if (atomic_read(&chip->play.fifo_status.is_busy) == 0) {
  2237. dev_dbg(chip->dev, "FIFO playing is not in progress\n");
  2238. return 0;
  2239. }
  2240. rc = haptics_enable_play(chip, false);
  2241. if (rc < 0)
  2242. return rc;
  2243. /* restore FIFO play rate back to T_LRA */
  2244. rc = haptics_set_fifo_playrate(chip, T_LRA);
  2245. if (rc < 0)
  2246. return rc;
  2247. haptics_fifo_empty_irq_config(chip, false);
  2248. kvfree(chip->custom_effect->fifo->samples);
  2249. chip->custom_effect->fifo->samples = NULL;
  2250. atomic_set(&chip->play.fifo_status.is_busy, 0);
  2251. /*
  2252. * All other playing modes would use AUTO mode RC
  2253. * calibration except FIFO streaming mode, so restore
  2254. * back to AUTO RC calibration after FIFO playing.
  2255. */
  2256. val = CAL_RC_CLK_AUTO_VAL << CAL_RC_CLK_SHIFT;
  2257. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  2258. HAP_CFG_CAL_EN_REG, CAL_RC_CLK_MASK, val);
  2259. if (rc < 0)
  2260. return rc;
  2261. dev_dbg(chip->dev, "stopped FIFO playing successfully\n");
  2262. return 0;
  2263. }
  2264. static void haptics_stop_constant_effect_play(struct work_struct *work)
  2265. {
  2266. struct haptics_chip *chip = container_of(work, struct haptics_chip, stop_work.work);
  2267. int rc = 0;
  2268. rc = haptics_enable_play(chip, false);
  2269. if (rc < 0)
  2270. dev_err(chip->dev, "stop constant effect play failed\n");
  2271. rc = haptics_enable_hpwr_vreg(chip, false);
  2272. if (rc < 0)
  2273. dev_err(chip->dev, "disable hpwr_vreg failed\n");
  2274. }
  2275. static int haptics_upload_effect(struct input_dev *dev,
  2276. struct ff_effect *effect, struct ff_effect *old)
  2277. {
  2278. struct haptics_chip *chip = input_get_drvdata(dev);
  2279. u32 length_ms, tmp;
  2280. s16 level;
  2281. u8 amplitude;
  2282. int rc = 0;
  2283. switch (effect->type) {
  2284. case FF_CONSTANT:
  2285. length_ms = effect->replay.length;
  2286. level = effect->u.constant.level;
  2287. tmp = get_direct_play_max_amplitude(chip);
  2288. tmp *= level;
  2289. amplitude = tmp / 0x7fff;
  2290. dev_dbg(chip->dev, "upload constant effect, length = %dms, amplitude = %#x\n",
  2291. length_ms, amplitude);
  2292. schedule_delayed_work(&chip->stop_work, msecs_to_jiffies(length_ms));
  2293. haptics_load_constant_effect(chip, amplitude);
  2294. if (rc < 0) {
  2295. dev_err(chip->dev, "set direct play failed, rc=%d\n",
  2296. rc);
  2297. return rc;
  2298. }
  2299. break;
  2300. case FF_PERIODIC:
  2301. if (effect->u.periodic.waveform != FF_CUSTOM) {
  2302. dev_err(chip->dev, "Only support custom waveforms\n");
  2303. return -EINVAL;
  2304. }
  2305. if (effect->u.periodic.custom_len ==
  2306. sizeof(struct custom_fifo_data)) {
  2307. rc = haptics_load_custom_effect(chip,
  2308. effect->u.periodic.custom_data,
  2309. effect->u.periodic.custom_len,
  2310. effect->u.periodic.magnitude);
  2311. if (rc < 0) {
  2312. dev_err(chip->dev, "Upload custom FIFO data failed rc=%d\n",
  2313. rc);
  2314. return rc;
  2315. }
  2316. } else if (effect->u.periodic.custom_len ==
  2317. sizeof(s16) * CUSTOM_DATA_LEN) {
  2318. rc = haptics_load_periodic_effect(chip,
  2319. effect->u.periodic.custom_data,
  2320. effect->u.periodic.custom_len,
  2321. effect->u.periodic.magnitude);
  2322. if (rc < 0) {
  2323. dev_err(chip->dev, "Upload periodic effect failed rc=%d\n",
  2324. rc);
  2325. return rc;
  2326. }
  2327. }
  2328. break;
  2329. default:
  2330. dev_err(chip->dev, "%d effect is not supported\n",
  2331. effect->type);
  2332. return -EINVAL;
  2333. }
  2334. rc = haptics_enable_hpwr_vreg(chip, true);
  2335. if (rc < 0) {
  2336. dev_err(chip->dev, "enable hpwr_vreg failed, rc=%d\n", rc);
  2337. return rc;
  2338. }
  2339. rc = haptics_wait_hboost_ready(chip);
  2340. if (rc < 0 && chip->play.pattern_src == FIFO) {
  2341. /*
  2342. * Call haptics_stop_fifo_play(chip) explicitly if hBoost is
  2343. * not ready for the FIFO play. This drops current FIFO play
  2344. * but it restores the SW back to initial status so that the
  2345. * following FIFO play requests can still be served.
  2346. */
  2347. dev_dbg(chip->dev, "stop FIFO play explicitly to restore SW status\n");
  2348. mutex_lock(&chip->play.lock);
  2349. haptics_stop_fifo_play(chip);
  2350. mutex_unlock(&chip->play.lock);
  2351. return rc;
  2352. }
  2353. return 0;
  2354. }
  2355. static int haptics_playback(struct input_dev *dev, int effect_id, int val)
  2356. {
  2357. struct haptics_chip *chip = input_get_drvdata(dev);
  2358. dev_dbg(chip->dev, "playback val = %d\n", val);
  2359. if (!!val)
  2360. return haptics_enable_play(chip, true);
  2361. return 0;
  2362. }
  2363. static int haptics_erase(struct input_dev *dev, int effect_id)
  2364. {
  2365. struct haptics_chip *chip = input_get_drvdata(dev);
  2366. struct haptics_play_info *play = &chip->play;
  2367. int rc;
  2368. dev_dbg(chip->dev, "erase effect, really stop play\n");
  2369. cancel_work_sync(&chip->set_gain_work);
  2370. mutex_lock(&play->lock);
  2371. cancel_delayed_work_sync(&chip->stop_work);
  2372. if ((play->pattern_src == FIFO) &&
  2373. atomic_read(&play->fifo_status.is_busy)) {
  2374. if (atomic_read(&play->fifo_status.written_done) == 0) {
  2375. dev_dbg(chip->dev, "cancelling FIFO playing\n");
  2376. atomic_set(&play->fifo_status.cancelled, 1);
  2377. }
  2378. rc = haptics_stop_fifo_play(chip);
  2379. if (rc < 0) {
  2380. dev_err(chip->dev, "stop FIFO playing failed, rc=%d\n",
  2381. rc);
  2382. mutex_unlock(&play->lock);
  2383. return rc;
  2384. }
  2385. } else {
  2386. rc = haptics_enable_play(chip, false);
  2387. if (rc < 0) {
  2388. dev_err(chip->dev, "stop play failed, rc=%d\n", rc);
  2389. mutex_unlock(&play->lock);
  2390. return rc;
  2391. }
  2392. }
  2393. mutex_unlock(&play->lock);
  2394. rc = haptics_enable_hpwr_vreg(chip, false);
  2395. if (rc < 0)
  2396. dev_err(chip->dev, "disable hpwr_vreg failed, rc=%d\n", rc);
  2397. return rc;
  2398. }
  2399. static void haptics_set_gain_work(struct work_struct *work)
  2400. {
  2401. struct haptics_chip *chip =
  2402. container_of(work, struct haptics_chip, set_gain_work);
  2403. struct haptics_hw_config *config = &chip->config;
  2404. struct haptics_play_info *play = &chip->play;
  2405. u32 vmax_mv, amplitude;
  2406. u16 gain;
  2407. mutex_lock(&play->lock);
  2408. gain = atomic_read(&play->gain);
  2409. /* scale amplitude when playing in DIRECT_PLAY mode */
  2410. if (chip->play.pattern_src == DIRECT_PLAY) {
  2411. amplitude = get_direct_play_max_amplitude(chip);
  2412. amplitude *= gain;
  2413. amplitude /= 0x7fff;
  2414. dev_dbg(chip->dev, "Set amplitude: %#x\n", amplitude);
  2415. haptics_set_direct_play(chip, (u8)amplitude);
  2416. mutex_unlock(&play->lock);
  2417. return;
  2418. }
  2419. /* scale Vmax when playing in other modes */
  2420. vmax_mv = config->vmax_mv;
  2421. if (play->effect)
  2422. vmax_mv = play->effect->vmax_mv;
  2423. if (chip->clamp_at_5v && (vmax_mv > CLAMPED_VMAX_MV))
  2424. vmax_mv = CLAMPED_VMAX_MV;
  2425. play->vmax_mv = ((u32)(gain * vmax_mv)) / 0x7fff;
  2426. haptics_set_vmax_mv(chip, play->vmax_mv);
  2427. mutex_unlock(&play->lock);
  2428. }
  2429. static void haptics_set_gain(struct input_dev *dev, u16 gain)
  2430. {
  2431. struct haptics_chip *chip = input_get_drvdata(dev);
  2432. struct haptics_play_info *play = &chip->play;
  2433. if (gain == 0)
  2434. return;
  2435. if (gain > 0x7fff)
  2436. gain = 0x7fff;
  2437. atomic_set(&play->gain, gain);
  2438. schedule_work(&chip->set_gain_work);
  2439. dev_dbg(chip->dev, "Set gain: %#x\n", gain);
  2440. }
  2441. static int haptics_store_cl_brake_settings(struct haptics_chip *chip)
  2442. {
  2443. int rc = 0;
  2444. u8 val[2];
  2445. if (!chip->cl_brake_nvmem)
  2446. return 0;
  2447. rc = haptics_get_status_data(chip, RNAT_RCAL_INT, val);
  2448. if (rc < 0)
  2449. return rc;
  2450. rc = nvmem_cell_write(chip->cl_brake_nvmem, &val[1], 1);
  2451. if (rc < 0)
  2452. dev_err(chip->dev, "store RNAT/RCAL to SDAM failed, rc=%d\n", rc);
  2453. return rc;
  2454. }
  2455. static int haptics_config_openloop_lra_period(struct haptics_chip *chip,
  2456. u32 t_lra_us)
  2457. {
  2458. u32 tmp;
  2459. u8 val[2];
  2460. int rc;
  2461. rc = haptics_adjust_lra_period(chip, &t_lra_us);
  2462. if (rc < 0)
  2463. return rc;
  2464. tmp = t_lra_us / TLRA_STEP_US;
  2465. val[0] = (tmp >> 8) & TLRA_OL_MSB_MASK;
  2466. val[1] = tmp & TLRA_OL_LSB_MASK;
  2467. return haptics_write(chip, chip->cfg_addr_base,
  2468. HAP_CFG_TLRA_OL_HIGH_REG, val, 2);
  2469. }
  2470. static int haptics_config_preload_fifo_effect(struct haptics_chip *chip,
  2471. struct haptics_effect *effect)
  2472. {
  2473. int rc;
  2474. if (!effect->fifo->preload) {
  2475. dev_err(chip->dev, "effect %d doesn't support preload\n",
  2476. effect->id);
  2477. return -EINVAL;
  2478. }
  2479. if (effect->src != PATTERN_MEM) {
  2480. dev_err(chip->dev, "effect %d pattern_src is not PATTERN_MEM\n",
  2481. effect->id);
  2482. return -EINVAL;
  2483. }
  2484. rc = haptics_update_pat_mem_samples(chip, effect->pat_sel,
  2485. effect->fifo->samples, effect->fifo->num_s);
  2486. if (!rc)
  2487. dev_dbg(chip->dev, "effect %d is preloaded in PAT_MEM %d\n",
  2488. effect->id, effect->pat_sel);
  2489. return rc;
  2490. }
  2491. static int haptics_mmap_config(struct haptics_chip *chip)
  2492. {
  2493. int rc, i, left;
  2494. u8 val[4];
  2495. /*
  2496. * Make the FIFO memory size 128-byte aligned, and append
  2497. * the leftover memory bytes to PAT1_MEM.
  2498. */
  2499. left = chip->mmap.fifo_mmap.length % MMAP_FIFO_LEN_PER_LSB;
  2500. if (left) {
  2501. chip->mmap.fifo_mmap.length -= left;
  2502. chip->mmap.pat_sel_mmap[PAT1_MEM].length += left;
  2503. }
  2504. /* config MMAP_FIFO */
  2505. val[0] = chip->mmap.fifo_mmap.length / MMAP_FIFO_LEN_PER_LSB;
  2506. if (val[0]-- == 0) {
  2507. dev_err(chip->dev, "fifo length %d is less than %d\n",
  2508. chip->mmap.fifo_mmap.length,
  2509. MMAP_FIFO_LEN_PER_LSB);
  2510. return -EINVAL;
  2511. }
  2512. val[0] &= MMAP_FIFO_LEN_MASK;
  2513. val[0] |= MMAP_FIFO_EXIST_BIT;
  2514. rc = haptics_write(chip, chip->ptn_addr_base,
  2515. HAP_PTN_MMAP_FIFO_REG, val, 1);
  2516. if (rc < 0)
  2517. return rc;
  2518. /* config MMAP_PAT1/2/3/4 */
  2519. for (i = PAT1_MEM; i <= PAT4_MEM; i++)
  2520. val[i] = min(chip->mmap.pat_sel_mmap[i].length, chip->mmap.pat_sel_mmap[i].max_size)
  2521. / MMAP_PAT_LEN_PER_LSB;
  2522. rc = haptics_write(chip, chip->ptn_addr_base,
  2523. HAP_PTN_MMAP_PAT1_REG, val, 4);
  2524. if (rc < 0)
  2525. return rc;
  2526. /* config PATx_PLAY_RATE */
  2527. rc = haptics_masked_write(chip, chip->ptn_addr_base,
  2528. HAP_PTN_FIFO_PLAY_RATE_REG, PAT_MEM_PLAY_RATE_MASK,
  2529. FIELD_PREP(PAT_MEM_PLAY_RATE_MASK, chip->mmap.pat_play_rate));
  2530. if (rc < 0) {
  2531. dev_err(chip->dev, "Set pat_mem play rate failed, rc=%d\n", rc);
  2532. return rc;
  2533. }
  2534. dev_dbg(chip->dev, "haptics memory map configured with FIFO: %d, PAT1:%d, PAT2: %d, PAT3: %d, PAT4: %d\n",
  2535. chip->mmap.fifo_mmap.length,
  2536. chip->mmap.pat_sel_mmap[PAT1_MEM].length,
  2537. chip->mmap.pat_sel_mmap[PAT2_MEM].length,
  2538. chip->mmap.pat_sel_mmap[PAT3_MEM].length,
  2539. chip->mmap.pat_sel_mmap[PAT4_MEM].length);
  2540. return 0;
  2541. }
  2542. static int haptics_mmap_preload_fifo_effect(struct haptics_chip *chip,
  2543. struct haptics_effect *effect)
  2544. {
  2545. int i;
  2546. u32 length, fifo_length;
  2547. if (!effect->fifo->preload) {
  2548. dev_err(chip->dev, "effect %d doesn't support preload\n",
  2549. effect->id);
  2550. return -EINVAL;
  2551. }
  2552. if (chip->mmap.pat_play_rate == F_RESERVED) {
  2553. chip->mmap.pat_play_rate = effect->fifo->period_per_s;
  2554. } else if (chip->mmap.pat_play_rate != effect->fifo->period_per_s) {
  2555. dev_warn(chip->dev, "PATx_MEM sources only support one play rate\n");
  2556. goto mmap_failed;
  2557. }
  2558. length = effect->fifo->num_s;
  2559. if (length % MMAP_PAT_LEN_PER_LSB)
  2560. length = (length / MMAP_PAT_LEN_PER_LSB + 1) * MMAP_PAT_LEN_PER_LSB;
  2561. fifo_length = chip->mmap.fifo_mmap.length - length;
  2562. if (fifo_length < MMAP_FIFO_MIN_SIZE) {
  2563. dev_warn(chip->dev, "not enough space for preload FIFO effect\n");
  2564. goto mmap_failed;
  2565. }
  2566. for (i = PAT4_MEM; i >= PAT1_MEM; i--) {
  2567. if (!chip->mmap.pat_sel_mmap[i].in_use &&
  2568. (length <= chip->mmap.pat_sel_mmap[i].max_size))
  2569. break;
  2570. }
  2571. if (i < PAT1_MEM) {
  2572. dev_warn(chip->dev, "no PAT_MEM source available\n");
  2573. effect->fifo->preload = false;
  2574. goto mmap_failed;
  2575. }
  2576. /* update the mmap configuration */
  2577. chip->mmap.pat_sel_mmap[i].in_use = true;
  2578. chip->mmap.pat_sel_mmap[i].length = length;
  2579. chip->mmap.fifo_mmap.length = fifo_length;
  2580. /* Update the effect pattern_src and pat_sel for the preload effect */
  2581. effect->src = PATTERN_MEM;
  2582. effect->pat_sel = i;
  2583. return 0;
  2584. /* if mmap is failed then the effect couldn't be preloaded */
  2585. mmap_failed:
  2586. effect->fifo->preload = false;
  2587. return -ENOSPC;
  2588. }
  2589. static void haptics_mmap_init(struct haptics_chip *chip)
  2590. {
  2591. u32 max_pat_mem_size = MMAP_NUM_BYTES - MMAP_FIFO_MIN_SIZE;
  2592. /* Assume that all memory space is used for FIFO mode by default */
  2593. chip->mmap.fifo_mmap.in_use = true;
  2594. chip->mmap.fifo_mmap.length = MMAP_NUM_BYTES;
  2595. chip->mmap.fifo_mmap.max_size = MMAP_NUM_BYTES;
  2596. /* different PATx_MEM partition has different maximum size */
  2597. chip->mmap.pat_sel_mmap[PAT1_MEM].max_size = min(max_pat_mem_size,
  2598. (u32)MMAP_PAT1_LEN_MASK * MMAP_PAT_LEN_PER_LSB);
  2599. chip->mmap.pat_sel_mmap[PAT2_MEM].max_size = min(max_pat_mem_size,
  2600. (u32)MMAP_PAT2_LEN_MASK * MMAP_PAT_LEN_PER_LSB);
  2601. chip->mmap.pat_sel_mmap[PAT3_MEM].max_size = min(max_pat_mem_size,
  2602. (u32)MMAP_PAT3_PAT4_LEN_MASK * MMAP_PAT_LEN_PER_LSB);
  2603. chip->mmap.pat_sel_mmap[PAT4_MEM].max_size = min(max_pat_mem_size,
  2604. (u32)MMAP_PAT3_PAT4_LEN_MASK * MMAP_PAT_LEN_PER_LSB);
  2605. chip->mmap.pat_play_rate = F_RESERVED;
  2606. }
  2607. static int haptics_init_fifo_memory(struct haptics_chip *chip)
  2608. {
  2609. struct haptics_effect *effect;
  2610. int rc, i;
  2611. if (chip->hw_type != HAP525_HV) {
  2612. dev_dbg(chip->dev, "HW type %d doesn't support mmap\n",
  2613. chip->hw_type);
  2614. return 0;
  2615. }
  2616. haptics_mmap_init(chip);
  2617. for (i = 0; i < chip->effects_count; i++) {
  2618. effect = &chip->effects[i];
  2619. if (!effect->fifo || !effect->fifo->preload)
  2620. continue;
  2621. rc = haptics_mmap_preload_fifo_effect(chip, effect);
  2622. if (rc < 0 && rc != -ENOSPC)
  2623. return rc;
  2624. }
  2625. rc = haptics_mmap_config(chip);
  2626. if (rc < 0)
  2627. return rc;
  2628. for (i = 0; i < chip->effects_count; i++) {
  2629. effect = &chip->effects[i];
  2630. if (!effect->fifo || !effect->fifo->preload)
  2631. continue;
  2632. rc = haptics_config_preload_fifo_effect(chip, effect);
  2633. if (rc < 0)
  2634. return rc;
  2635. }
  2636. return 0;
  2637. }
  2638. static int haptics_init_preload_pattern_effect(struct haptics_chip *chip)
  2639. {
  2640. struct haptics_hw_config *config = &chip->config;
  2641. struct haptics_effect *effect;
  2642. int i;
  2643. if (config->preload_effect == -EINVAL)
  2644. return 0;
  2645. for (i = 0; i < chip->effects_count; i++)
  2646. if (chip->effects[i].id == config->preload_effect)
  2647. break;
  2648. if (i == chip->effects_count) {
  2649. dev_err(chip->dev, "preload effect %d is not found\n",
  2650. config->preload_effect);
  2651. return -EINVAL;
  2652. }
  2653. effect = &chip->effects[i];
  2654. return haptics_set_pattern(chip, effect->pattern, effect->src);
  2655. }
  2656. static int haptics_init_lra_period_config(struct haptics_chip *chip)
  2657. {
  2658. int rc = 0;
  2659. u8 val;
  2660. u32 t_lra_us;
  2661. /* set AUTO_mode RC CLK calibration by default */
  2662. val = FIELD_PREP(CAL_RC_CLK_MASK, CAL_RC_CLK_AUTO_VAL);
  2663. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  2664. HAP_CFG_CAL_EN_REG, CAL_RC_CLK_MASK, val);
  2665. if (rc < 0)
  2666. return rc;
  2667. /* get calibrated close loop period */
  2668. t_lra_us = chip->config.t_lra_us;
  2669. rc = haptics_get_closeloop_lra_period(chip, true);
  2670. if (!rc && chip->config.cl_t_lra_us != 0)
  2671. t_lra_us = chip->config.cl_t_lra_us;
  2672. else
  2673. dev_warn(chip->dev, "get closeloop LRA period failed, rc=%d\n", rc);
  2674. /* Config T_LRA */
  2675. return haptics_config_openloop_lra_period(chip, t_lra_us);
  2676. }
  2677. static int haptics_init_hpwr_config(struct haptics_chip *chip)
  2678. {
  2679. int rc;
  2680. u8 val;
  2681. if ((chip->hw_type == HAP520_MV) && !chip->hpwr_vreg) {
  2682. /* Indicates if HPWR is BOB or Bharger */
  2683. rc = haptics_read(chip, chip->cfg_addr_base,
  2684. HAP_CFG_HPWR_INTF_CTL_REG, &val, 1);
  2685. if (rc < 0)
  2686. return rc;
  2687. chip->hpwr_intf_ctl = val & INTF_CTL_MASK;
  2688. /* Read HPWR voltage to adjust the VMAX */
  2689. if (chip->hpwr_voltage_mv == 0 &&
  2690. chip->hpwr_intf_ctl == INTF_CTL_BOB) {
  2691. rc = haptics_read(chip, chip->cfg_addr_base,
  2692. HAP_CFG_VHPWR_REG, &val, 1);
  2693. if (rc < 0)
  2694. return rc;
  2695. chip->hpwr_voltage_mv = val * VHPWR_STEP_MV;
  2696. }
  2697. }
  2698. /* Force VREG_RDY if non-HBoost is used for powering haptics */
  2699. if (is_haptics_external_powered(chip))
  2700. return haptics_masked_write(chip, chip->cfg_addr_base,
  2701. HAP_CFG_VSET_CFG_REG, FORCE_VREG_RDY_BIT,
  2702. FORCE_VREG_RDY_BIT);
  2703. return 0;
  2704. }
  2705. static int haptics_init_drive_config(struct haptics_chip *chip)
  2706. {
  2707. struct haptics_hw_config *config = &chip->config;
  2708. int rc;
  2709. u8 val;
  2710. /* Config driver waveform shape and use 2's complement data format */
  2711. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  2712. HAP_CFG_DRV_WF_SEL_REG,
  2713. DRV_WF_SEL_MASK | DRV_WF_FMT_BIT, config->drv_wf);
  2714. if (rc < 0)
  2715. return rc;
  2716. /* Config brake mode and waveform shape */
  2717. val = FIELD_PREP(BRAKE_MODE_MASK, config->brake.mode);
  2718. val |= FIELD_PREP(BRAKE_SINE_GAIN_MASK, config->brake.sine_gain);
  2719. val |= FIELD_PREP(BRAKE_WF_SEL_MASK, config->brake.brake_wf);
  2720. return haptics_masked_write(chip, chip->cfg_addr_base,
  2721. HAP_CFG_BRAKE_MODE_CFG_REG,
  2722. BRAKE_MODE_MASK | BRAKE_SINE_GAIN_MASK
  2723. | BRAKE_WF_SEL_MASK, val);
  2724. }
  2725. static int haptics_init_vmax_config(struct haptics_chip *chip)
  2726. {
  2727. int rc;
  2728. u8 val;
  2729. if (!is_haptics_external_powered(chip)) {
  2730. rc = haptics_read(chip, chip->hbst_addr_base,
  2731. HAP_BOOST_CLAMP_REG, &val, 1);
  2732. if (rc < 0)
  2733. return rc;
  2734. chip->clamp_at_5v = val & CLAMP_5V_BIT;
  2735. }
  2736. chip->is_hv_haptics = true;
  2737. chip->max_vmax_mv = MAX_VMAX_MV;
  2738. if (chip->hw_type == HAP520_MV || chip->hw_type == HAP525_HV) {
  2739. rc = haptics_read(chip, chip->cfg_addr_base,
  2740. HAP_CFG_HW_CONFIG_REG, &val, 1);
  2741. if (rc < 0)
  2742. return rc;
  2743. chip->is_hv_haptics = val & HV_HAP_DRIVER_BIT;
  2744. chip->max_vmax_mv = (chip->is_hv_haptics) ?
  2745. MAX_HV_VMAX_MV : MAX_MV_VMAX_MV;
  2746. }
  2747. /* Set the initial clamped vmax value when hBoost is used by charger firmware */
  2748. chip->clamped_vmax_mv = MAX_HV_VMAX_MV;
  2749. /* Config VMAX */
  2750. return haptics_set_vmax_mv(chip, chip->config.vmax_mv);
  2751. }
  2752. static int haptics_config_wa(struct haptics_chip *chip)
  2753. {
  2754. switch (chip->hw_type) {
  2755. case HAP520:
  2756. chip->wa_flags |= TOGGLE_CAL_RC_CLK | SW_CTRL_HBST | SLEEP_CLK_32K_SCALE |
  2757. TOGGLE_EN_TO_FLUSH_FIFO | RECOVER_SWR_SLAVE;
  2758. break;
  2759. case HAP520_MV:
  2760. break;
  2761. case HAP525_HV:
  2762. if (chip->hbst_revision == HAP_BOOST_V0P1)
  2763. chip->wa_flags |= SW_CTRL_HBST;
  2764. break;
  2765. default:
  2766. dev_err(chip->dev, "HW type %d does not match\n",
  2767. chip->hw_type);
  2768. return -EINVAL;
  2769. }
  2770. return 0;
  2771. }
  2772. static int haptics_hw_init(struct haptics_chip *chip)
  2773. {
  2774. int rc;
  2775. rc = haptics_config_wa(chip);
  2776. if (rc < 0)
  2777. return rc;
  2778. rc = haptics_store_cl_brake_settings(chip);
  2779. if (rc < 0)
  2780. return rc;
  2781. rc = haptics_init_vmax_config(chip);
  2782. if (rc < 0)
  2783. return rc;
  2784. rc = haptics_init_drive_config(chip);
  2785. if (rc < 0)
  2786. return rc;
  2787. rc = haptics_init_hpwr_config(chip);
  2788. if (rc < 0)
  2789. return rc;
  2790. if (chip->config.is_erm)
  2791. return 0;
  2792. rc = haptics_init_lra_period_config(chip);
  2793. if (rc < 0)
  2794. return rc;
  2795. rc = haptics_init_preload_pattern_effect(chip);
  2796. if (rc < 0)
  2797. return rc;
  2798. return haptics_init_fifo_memory(chip);
  2799. }
  2800. static irqreturn_t fifo_empty_irq_handler(int irq, void *data)
  2801. {
  2802. struct haptics_chip *chip = data;
  2803. struct fifo_cfg *fifo;
  2804. struct fifo_play_status *status;
  2805. u32 samples_left;
  2806. u8 *samples, val;
  2807. int rc, num;
  2808. rc = haptics_read(chip, chip->cfg_addr_base,
  2809. HAP_CFG_INT_RT_STS_REG, &val, 1);
  2810. if (rc < 0)
  2811. return IRQ_HANDLED;
  2812. if (!(val & FIFO_EMPTY_BIT))
  2813. return IRQ_HANDLED;
  2814. mutex_lock(&chip->play.lock);
  2815. status = &chip->play.fifo_status;
  2816. if (atomic_read(&status->written_done) == 1) {
  2817. /*
  2818. * Check the FIFO real time fill status before stopping
  2819. * play to make sure that all FIFO samples can be played
  2820. * successfully. If there are still samples left in FIFO
  2821. * memory, defer the stop into erase() function.
  2822. */
  2823. num = haptics_get_available_fifo_memory(chip);
  2824. if (num != get_max_fifo_samples(chip)) {
  2825. dev_dbg(chip->dev, "%d FIFO samples still in playing\n",
  2826. get_max_fifo_samples(chip) - num);
  2827. goto unlock;
  2828. }
  2829. rc = haptics_stop_fifo_play(chip);
  2830. if (rc < 0)
  2831. goto unlock;
  2832. dev_dbg(chip->dev, "FIFO playing is done\n");
  2833. } else {
  2834. if (atomic_read(&status->cancelled) == 1) {
  2835. dev_dbg(chip->dev, "FIFO programming got cancelled\n");
  2836. goto unlock;
  2837. }
  2838. if (!chip->play.effect)
  2839. goto unlock;
  2840. fifo = chip->play.effect->fifo;
  2841. if (!fifo || !fifo->samples) {
  2842. dev_err(chip->dev, "no FIFO samples available\n");
  2843. goto unlock;
  2844. }
  2845. samples_left = fifo->num_s - status->samples_written;
  2846. num = haptics_get_available_fifo_memory(chip);
  2847. if (num < 0)
  2848. goto unlock;
  2849. samples = fifo->samples + status->samples_written;
  2850. /*
  2851. * Always use 4-byte burst write in the middle of FIFO programming to
  2852. * avoid HW padding zeros during 1-byte write which would cause the HW
  2853. * stop driving for the unexpected padding zeros.
  2854. */
  2855. if (num < samples_left)
  2856. num = round_down(num, HAP_PTN_FIFO_DIN_NUM);
  2857. else
  2858. num = samples_left;
  2859. rc = haptics_update_fifo_samples(chip, samples, num, true);
  2860. if (rc < 0) {
  2861. dev_err(chip->dev, "Update FIFO samples failed, rc=%d\n",
  2862. rc);
  2863. goto unlock;
  2864. }
  2865. status->samples_written += num;
  2866. trace_qcom_haptics_fifo_prgm_status(fifo->num_s, status->samples_written, num);
  2867. if (status->samples_written == fifo->num_s) {
  2868. dev_dbg(chip->dev, "FIFO programming is done\n");
  2869. atomic_set(&chip->play.fifo_status.written_done, 1);
  2870. haptics_set_fifo_empty_threshold(chip, 0);
  2871. }
  2872. }
  2873. unlock:
  2874. mutex_unlock(&chip->play.lock);
  2875. return IRQ_HANDLED;
  2876. }
  2877. static int haptics_parse_effect_pattern_data(struct haptics_chip *chip,
  2878. struct device_node *node, struct haptics_effect *effect)
  2879. {
  2880. struct haptics_hw_config *config = &chip->config;
  2881. u32 data[SAMPLES_PER_PATTERN * 3];
  2882. int rc, tmp, i;
  2883. effect->t_lra_us = config->t_lra_us;
  2884. tmp = of_property_count_elems_of_size(node,
  2885. "qcom,wf-pattern-data", sizeof(u32));
  2886. if (tmp <= 0) {
  2887. dev_dbg(chip->dev, "qcom,wf-pattern-data is not defined properly for effect %d\n",
  2888. effect->id);
  2889. return 0;
  2890. }
  2891. if (tmp > SAMPLES_PER_PATTERN * 3) {
  2892. dev_err(chip->dev, "Pattern src can only play 8 samples at max\n");
  2893. return -EINVAL;
  2894. }
  2895. effect->pattern = devm_kzalloc(chip->dev,
  2896. sizeof(*effect->pattern), GFP_KERNEL);
  2897. if (!effect->pattern)
  2898. return -ENOMEM;
  2899. rc = of_property_read_u32_array(node,
  2900. "qcom,wf-pattern-data", data, tmp);
  2901. if (rc < 0) {
  2902. dev_err(chip->dev, "Read wf-pattern-data failed, rc=%d\n",
  2903. rc);
  2904. return rc;
  2905. }
  2906. for (i = 0; i < tmp / 3; i++) {
  2907. if (data[3 * i] > 0x1ff || data[3 * i + 1] > T_LRA_X_8
  2908. || data[3 * i + 2] > 1) {
  2909. dev_err(chip->dev, "allowed tuples: [amplitude(<= 0x1ff) period(<=6(T_LRA_X_8)) f_lra_x2(0,1)]\n");
  2910. return -EINVAL;
  2911. }
  2912. effect->pattern->samples[i].amplitude =
  2913. (u16)data[3 * i];
  2914. effect->pattern->samples[i].period =
  2915. (enum s_period)data[3 * i + 1];
  2916. effect->pattern->samples[i].f_lra_x2 =
  2917. (bool)data[3 * i + 2];
  2918. }
  2919. effect->pattern->preload = of_property_read_bool(node,
  2920. "qcom,wf-pattern-preload");
  2921. /*
  2922. * Use PATTERN1 src by default, effect with preloaded
  2923. * pattern will use PATTERN2 by default and only the
  2924. * 1st preloaded pattern will be served.
  2925. */
  2926. effect->src = PATTERN1;
  2927. if (effect->pattern->preload) {
  2928. if (config->preload_effect != -EINVAL) {
  2929. dev_err(chip->dev, "effect %d has been defined as preloaded\n",
  2930. config->preload_effect);
  2931. effect->pattern->preload = false;
  2932. } else {
  2933. config->preload_effect = effect->id;
  2934. effect->src = PATTERN2;
  2935. }
  2936. }
  2937. if (config->is_erm)
  2938. effect->pattern->play_rate_us = DEFAULT_ERM_PLAY_RATE_US;
  2939. else
  2940. effect->pattern->play_rate_us = config->t_lra_us;
  2941. rc = of_property_read_u32(node, "qcom,wf-pattern-period-us", &tmp);
  2942. if (rc < 0)
  2943. dev_dbg(chip->dev, "Read qcom,wf-pattern-period-us failed, rc=%d\n",
  2944. rc);
  2945. else
  2946. effect->pattern->play_rate_us = tmp;
  2947. if (effect->pattern->play_rate_us > TLRA_MAX_US) {
  2948. dev_err(chip->dev, "qcom,wf-pattern-period-us (%d) exceed the max value: %d\n",
  2949. effect->pattern->play_rate_us,
  2950. TLRA_MAX_US);
  2951. return -EINVAL;
  2952. }
  2953. effect->pattern->play_length_us = get_pattern_play_length_us(effect->pattern);
  2954. if (effect->pattern->play_length_us == -EINVAL) {
  2955. dev_err(chip->dev, "get pattern play length failed\n");
  2956. return -EINVAL;
  2957. }
  2958. return 0;
  2959. }
  2960. static int haptics_parse_effect_fifo_data(struct haptics_chip *chip,
  2961. struct device_node *node, struct haptics_effect *effect)
  2962. {
  2963. struct haptics_hw_config *config = &chip->config;
  2964. int rc, tmp;
  2965. if (effect->pattern) {
  2966. dev_dbg(chip->dev, "ignore parsing FIFO effect when pattern effect is present\n");
  2967. return 0;
  2968. }
  2969. tmp = of_property_count_u8_elems(node, "qcom,wf-fifo-data");
  2970. if (tmp <= 0) {
  2971. dev_dbg(chip->dev, "qcom,wf-fifo-data is not defined properly for effect %d\n",
  2972. effect->id);
  2973. return 0;
  2974. }
  2975. effect->fifo = devm_kzalloc(chip->dev,
  2976. sizeof(*effect->fifo), GFP_KERNEL);
  2977. if (!effect->fifo)
  2978. return -ENOMEM;
  2979. effect->fifo->samples = devm_kcalloc(chip->dev,
  2980. tmp, sizeof(u8), GFP_KERNEL);
  2981. if (!effect->fifo->samples)
  2982. return -ENOMEM;
  2983. rc = of_property_read_u8_array(node, "qcom,wf-fifo-data",
  2984. effect->fifo->samples, tmp);
  2985. if (rc < 0) {
  2986. dev_err(chip->dev, "Read wf-fifo-data failed, rc=%d\n",
  2987. rc);
  2988. return rc;
  2989. }
  2990. effect->fifo->num_s = tmp;
  2991. effect->fifo->period_per_s = T_LRA;
  2992. rc = of_property_read_u32(node, "qcom,wf-fifo-period", &tmp);
  2993. if (rc < 0) {
  2994. dev_err(chip->dev, "Get qcom,wf-fifo-period failed, rc=%d\n", rc);
  2995. return rc;
  2996. } else if (tmp > F_48KHZ) {
  2997. dev_err(chip->dev, "FIFO playing period %d is not supported\n",
  2998. tmp);
  2999. return -EINVAL;
  3000. }
  3001. effect->fifo->period_per_s = tmp;
  3002. effect->fifo->play_length_us =
  3003. get_fifo_play_length_us(effect->fifo, config->t_lra_us);
  3004. if (effect->fifo->play_length_us == -EINVAL) {
  3005. dev_err(chip->dev, "get fifo play length failed\n");
  3006. return -EINVAL;
  3007. }
  3008. effect->src = FIFO;
  3009. effect->fifo->preload = of_property_read_bool(node,
  3010. "qcom,wf-fifo-preload");
  3011. return 0;
  3012. }
  3013. static int haptics_parse_effect_brake_data(struct haptics_chip *chip,
  3014. struct device_node *node, struct haptics_effect *effect)
  3015. {
  3016. struct haptics_hw_config *config = &chip->config;
  3017. int rc, tmp;
  3018. effect->brake = devm_kzalloc(chip->dev,
  3019. sizeof(*effect->brake), GFP_KERNEL);
  3020. if (!effect->brake)
  3021. return -ENOMEM;
  3022. memcpy(effect->brake, &config->brake, sizeof(*effect->brake));
  3023. of_property_read_u32(node, "qcom,wf-brake-mode", &effect->brake->mode);
  3024. if (effect->brake->mode > AUTO_BRAKE) {
  3025. dev_err(chip->dev, "can't support brake mode: %d\n",
  3026. effect->brake->mode);
  3027. return -EINVAL;
  3028. }
  3029. if (effect->brake->brake_wf == WF_SINE) {
  3030. of_property_read_u32(node, "qcom,wf-brake-sine-gain",
  3031. &effect->brake->sine_gain);
  3032. if (effect->brake->sine_gain > BRAKE_SINE_GAIN_X8) {
  3033. dev_err(chip->dev, "can't support brake sine gain: %d\n",
  3034. effect->brake->sine_gain);
  3035. return -EINVAL;
  3036. }
  3037. }
  3038. effect->brake->disabled =
  3039. of_property_read_bool(node, "qcom,wf-brake-disable");
  3040. tmp = of_property_count_u8_elems(node, "qcom,wf-brake-pattern");
  3041. if (tmp > BRAKE_SAMPLE_COUNT) {
  3042. dev_err(chip->dev, "more than %d brake samples\n",
  3043. BRAKE_SAMPLE_COUNT);
  3044. return -EINVAL;
  3045. }
  3046. if (tmp > 0) {
  3047. memset(effect->brake->samples, 0,
  3048. sizeof(u8) * BRAKE_SAMPLE_COUNT);
  3049. rc = of_property_read_u8_array(node, "qcom,wf-brake-pattern",
  3050. effect->brake->samples, tmp);
  3051. if (rc < 0) {
  3052. dev_err(chip->dev, "Read wf-brake-pattern failed, rc=%d\n",
  3053. rc);
  3054. return rc;
  3055. }
  3056. verify_brake_samples(effect->brake);
  3057. } else {
  3058. if (effect->brake->mode == OL_BRAKE ||
  3059. effect->brake->mode == CL_BRAKE)
  3060. effect->brake->disabled = true;
  3061. }
  3062. effect->brake->play_length_us =
  3063. get_brake_play_length_us(effect->brake, config->t_lra_us);
  3064. return 0;
  3065. }
  3066. static int haptics_parse_per_effect_dt(struct haptics_chip *chip,
  3067. struct device_node *node, struct haptics_effect *effect)
  3068. {
  3069. struct haptics_hw_config *config = &chip->config;
  3070. int rc, tmp;
  3071. if (!effect)
  3072. return -EINVAL;
  3073. effect->vmax_mv = config->vmax_mv;
  3074. rc = of_property_read_u32(node, "qcom,wf-vmax-mv", &tmp);
  3075. if (rc < 0)
  3076. dev_dbg(chip->dev, "read qcom,wf-vmax-mv failed, rc=%d\n",
  3077. rc);
  3078. else
  3079. effect->vmax_mv = tmp;
  3080. if (effect->vmax_mv > MAX_VMAX_MV) {
  3081. dev_err(chip->dev, "qcom,wf-vmax-mv (%d) exceed the max value: %d\n",
  3082. effect->vmax_mv, MAX_VMAX_MV);
  3083. return -EINVAL;
  3084. }
  3085. rc = haptics_parse_effect_pattern_data(chip, node, effect);
  3086. if (rc < 0) {
  3087. dev_err(chip->dev, "parse effect PATTERN data failed, rc=%d\n", rc);
  3088. return rc;
  3089. }
  3090. rc = haptics_parse_effect_fifo_data(chip, node, effect);
  3091. if (rc < 0) {
  3092. dev_err(chip->dev, "parse effect FIFO data failed, rc=%d\n", rc);
  3093. return rc;
  3094. }
  3095. if (!effect->pattern && !effect->fifo) {
  3096. dev_err(chip->dev, "no pattern specified for effect %d\n",
  3097. effect->id);
  3098. return -EINVAL;
  3099. }
  3100. rc = haptics_parse_effect_brake_data(chip, node, effect);
  3101. if (rc < 0) {
  3102. dev_err(chip->dev, "parse effect brake data failed, rc=%d\n", rc);
  3103. return rc;
  3104. }
  3105. if (!config->is_erm)
  3106. effect->auto_res_disable = of_property_read_bool(node,
  3107. "qcom,wf-auto-res-disable");
  3108. return 0;
  3109. }
  3110. static int haptics_parse_primitives_dt(struct haptics_chip *chip)
  3111. {
  3112. struct device_node *node = chip->dev->of_node;
  3113. struct device_node *child;
  3114. int rc, i = 0, num = 0;
  3115. for_each_available_child_of_node(node, child) {
  3116. if (of_find_property(child, "qcom,primitive-id", NULL))
  3117. num++;
  3118. }
  3119. if (!num)
  3120. return 0;
  3121. chip->primitives = devm_kcalloc(chip->dev, num,
  3122. sizeof(*chip->effects), GFP_KERNEL);
  3123. if (!chip->primitives)
  3124. return -ENOMEM;
  3125. for_each_available_child_of_node(node, child) {
  3126. if (!of_find_property(child, "qcom,primitive-id", NULL))
  3127. continue;
  3128. rc = of_property_read_u32(child, "qcom,primitive-id", &(chip->primitives[i].id));
  3129. if (rc < 0) {
  3130. dev_err(chip->dev, "Read qcom,primitive-id failed, rc=%d\n",
  3131. rc);
  3132. of_node_put(child);
  3133. return rc;
  3134. }
  3135. rc = haptics_parse_per_effect_dt(chip, child,
  3136. &chip->primitives[i]);
  3137. if (rc < 0) {
  3138. dev_err(chip->dev, "parse primitive %d failed, rc=%d\n",
  3139. i, rc);
  3140. of_node_put(child);
  3141. return rc;
  3142. }
  3143. i++;
  3144. }
  3145. chip->primitives_count = i;
  3146. dev_dbg(chip->dev, "Dump primitive effect settings as following\n");
  3147. __dump_effects(chip, chip->primitives, chip->primitives_count);
  3148. return 0;
  3149. }
  3150. static int haptics_parse_effects_dt(struct haptics_chip *chip)
  3151. {
  3152. struct device_node *node = chip->dev->of_node;
  3153. struct device_node *child;
  3154. int rc, i = 0, num = 0;
  3155. for_each_available_child_of_node(node, child) {
  3156. if (of_find_property(child, "qcom,effect-id", NULL))
  3157. num++;
  3158. }
  3159. if (num == 0)
  3160. return 0;
  3161. chip->effects = devm_kcalloc(chip->dev, num,
  3162. sizeof(*chip->effects), GFP_KERNEL);
  3163. if (!chip->effects)
  3164. return -ENOMEM;
  3165. for_each_available_child_of_node(node, child) {
  3166. if (!of_find_property(child, "qcom,effect-id", NULL))
  3167. continue;
  3168. rc = of_property_read_u32(child, "qcom,effect-id", &(chip->effects[i].id));
  3169. if (rc < 0) {
  3170. dev_err(chip->dev, "Read qcom,effect-id failed, rc=%d\n",
  3171. rc);
  3172. of_node_put(child);
  3173. return rc;
  3174. }
  3175. rc = haptics_parse_per_effect_dt(chip, child,
  3176. &chip->effects[i]);
  3177. if (rc < 0) {
  3178. dev_err(chip->dev, "parse effect %d failed, rc=%d\n",
  3179. i, rc);
  3180. of_node_put(child);
  3181. return rc;
  3182. }
  3183. i++;
  3184. }
  3185. chip->effects_count = i;
  3186. dev_dbg(chip->dev, "Dump predefined effect settings as following\n");
  3187. __dump_effects(chip, chip->effects, chip->effects_count);
  3188. return 0;
  3189. }
  3190. static int haptics_parse_lra_dt(struct haptics_chip *chip)
  3191. {
  3192. struct haptics_hw_config *config = &chip->config;
  3193. struct device_node *node = chip->dev->of_node;
  3194. int rc;
  3195. rc = of_property_read_u32(node, "qcom,lra-period-us",
  3196. &config->t_lra_us);
  3197. if (rc < 0) {
  3198. dev_err(chip->dev, "Read T-LRA failed, rc=%d\n", rc);
  3199. return rc;
  3200. }
  3201. if (config->t_lra_us > TLRA_MAX_US) {
  3202. dev_err(chip->dev, "qcom,lra-period-us (%d) exceed the max value: %d\n",
  3203. config->t_lra_us, TLRA_MAX_US);
  3204. return -EINVAL;
  3205. }
  3206. config->drv_wf = WF_SINE;
  3207. of_property_read_u32(node, "qcom,drv-sig-shape", &config->drv_wf);
  3208. if (config->drv_wf >= WF_RESERVED) {
  3209. dev_err(chip->dev, "Can't support drive shape: %d\n",
  3210. config->drv_wf);
  3211. return -EINVAL;
  3212. }
  3213. config->brake.brake_wf = WF_SINE;
  3214. of_property_read_u32(node, "qcom,brake-sig-shape",
  3215. &config->brake.brake_wf);
  3216. if (config->brake.brake_wf >= WF_RESERVED) {
  3217. dev_err(chip->dev, "Can't support brake shape: %d\n",
  3218. config->brake.brake_wf);
  3219. return -EINVAL;
  3220. }
  3221. if (config->brake.brake_wf == WF_SINE) {
  3222. config->brake.sine_gain = BRAKE_SINE_GAIN_X1;
  3223. of_property_read_u32(node, "qcom,brake-sine-gain",
  3224. &config->brake.sine_gain);
  3225. if (config->brake.sine_gain > BRAKE_SINE_GAIN_X8) {
  3226. dev_err(chip->dev, "Can't support brake sine gain: %d\n",
  3227. config->brake.sine_gain);
  3228. return -EINVAL;
  3229. }
  3230. }
  3231. if (chip->hw_type == HAP525_HV)
  3232. config->measure_lra_impedance = of_property_read_bool(node,
  3233. "qcom,rt-imp-detect");
  3234. return 0;
  3235. }
  3236. static int haptics_get_revision(struct haptics_chip *chip)
  3237. {
  3238. int rc;
  3239. u8 val[2];
  3240. rc = haptics_read(chip, chip->cfg_addr_base,
  3241. HAP_CFG_REVISION2_REG, val, 1);
  3242. if (rc < 0)
  3243. return rc;
  3244. chip->cfg_revision = val[0];
  3245. rc = haptics_read(chip, chip->ptn_addr_base,
  3246. HAP_PTN_REVISION2_REG, val, 1);
  3247. if (rc < 0)
  3248. return rc;
  3249. chip->ptn_revision = val[0];
  3250. if (is_haptics_external_powered(chip)) {
  3251. dev_info(chip->dev, "haptics revision: HAP_CFG %#x, HAP_PTN %#x\n",
  3252. chip->cfg_revision, chip->ptn_revision);
  3253. } else {
  3254. rc = haptics_read(chip, chip->hbst_addr_base,
  3255. HAP_BOOST_REVISION1, val, 2);
  3256. if (rc < 0)
  3257. return rc;
  3258. chip->hbst_revision = (val[1] << 8) | val[0];
  3259. dev_info(chip->dev, "haptics revision: HAP_CFG %#x, HAP_PTN %#x, HAP_HBST %#x\n",
  3260. chip->cfg_revision, chip->ptn_revision, chip->hbst_revision);
  3261. }
  3262. if ((chip->cfg_revision == HAP_CFG_V2) &&
  3263. (chip->ptn_revision == HAP_PTN_V2)) {
  3264. chip->hw_type = HAP520;
  3265. } else if ((chip->cfg_revision == HAP_CFG_V3) &&
  3266. (chip->ptn_revision == HAP_PTN_V3)) {
  3267. chip->hw_type = HAP520_MV;
  3268. } else if ((chip->cfg_revision == HAP_CFG_V4) &&
  3269. (chip->ptn_revision == HAP_PTN_V4)) {
  3270. chip->hw_type = HAP525_HV;
  3271. } else {
  3272. dev_err(chip->dev, "haptics revision is not supported\n");
  3273. return -EOPNOTSUPP;
  3274. }
  3275. return 0;
  3276. }
  3277. static int haptics_parse_hpwr_vreg_dt(struct haptics_chip *chip)
  3278. {
  3279. struct device_node *node = chip->dev->of_node;
  3280. int rc;
  3281. if (!of_find_property(node, "qcom,hpwr-supply", NULL))
  3282. return 0;
  3283. chip->hpwr_vreg = devm_regulator_get(chip->dev, "qcom,hpwr");
  3284. if (IS_ERR(chip->hpwr_vreg)) {
  3285. rc = PTR_ERR(chip->hpwr_vreg);
  3286. if (rc != -EPROBE_DEFER)
  3287. dev_err(chip->dev, "Failed to get qcom,hpwr-supply, rc=%d\n",
  3288. rc);
  3289. return rc;
  3290. }
  3291. rc = of_property_read_u32(node, "qcom,hpwr-voltage-mv",
  3292. &chip->hpwr_voltage_mv);
  3293. if (rc < 0) {
  3294. dev_err(chip->dev, "Failed to read qcom,hpwr-voltage-mv, rc=%d\n",
  3295. rc);
  3296. return rc;
  3297. }
  3298. if (chip->hpwr_voltage_mv == 0 ||
  3299. chip->hpwr_voltage_mv > NON_HBOOST_MAX_VMAX_MV)
  3300. return -EINVAL;
  3301. return 0;
  3302. }
  3303. static int haptics_parse_dt(struct haptics_chip *chip)
  3304. {
  3305. struct haptics_hw_config *config = &chip->config;
  3306. struct device_node *node = chip->dev->of_node;
  3307. struct platform_device *pdev = to_platform_device(chip->dev);
  3308. const __be32 *addr;
  3309. int rc = 0, tmp;
  3310. rc = haptics_parse_hpwr_vreg_dt(chip);
  3311. if (rc < 0)
  3312. return rc;
  3313. if (of_find_property(node, "nvmem-cells", NULL)) {
  3314. chip->cl_brake_nvmem = devm_nvmem_cell_get(chip->dev,
  3315. "hap_cl_brake");
  3316. if (IS_ERR(chip->cl_brake_nvmem)) {
  3317. rc = PTR_ERR(chip->cl_brake_nvmem);
  3318. if (rc != -EPROBE_DEFER)
  3319. dev_err(chip->dev, "Failed to get nvmem-cells, rc=%d\n",
  3320. rc);
  3321. return rc;
  3322. }
  3323. }
  3324. if (of_find_property(node, "nvmem", NULL)) {
  3325. chip->hap_cfg_nvmem =
  3326. devm_nvmem_device_get(chip->dev, "hap_cfg_sdam");
  3327. if (IS_ERR(chip->hap_cfg_nvmem)) {
  3328. rc = PTR_ERR(chip->hap_cfg_nvmem);
  3329. if (rc != -EPROBE_DEFER)
  3330. dev_err(chip->dev, "Failed to get hap_cfg nvmem device, rc=%d\n",
  3331. rc);
  3332. return rc;
  3333. }
  3334. }
  3335. if (of_find_property(node, "qcom,pbs-client", NULL)) {
  3336. chip->pbs_node = of_parse_phandle(node, "qcom,pbs-client", 0);
  3337. if (!chip->pbs_node) {
  3338. dev_err(chip->dev, "Failed to get PBS client\n");
  3339. return -ENODEV;
  3340. }
  3341. }
  3342. addr = of_get_address(node, 0, NULL, NULL);
  3343. if (!addr) {
  3344. dev_err(chip->dev, "Read HAPTICS_CFG address failed\n");
  3345. rc = -EINVAL;
  3346. goto free_pbs;
  3347. }
  3348. chip->cfg_addr_base = be32_to_cpu(*addr);
  3349. addr = of_get_address(node, 1, NULL, NULL);
  3350. if (!addr) {
  3351. dev_err(chip->dev, "Read HAPTICS_PATTERN address failed\n");
  3352. rc = -EINVAL;
  3353. goto free_pbs;
  3354. }
  3355. chip->ptn_addr_base = be32_to_cpu(*addr);
  3356. addr = of_get_address(node, 2, NULL, NULL);
  3357. if (!addr && !is_haptics_external_powered(chip)) {
  3358. dev_err(chip->dev, "Read HAPTICS_HBOOST address failed\n");
  3359. rc = -EINVAL;
  3360. goto free_pbs;
  3361. } else if (addr != NULL) {
  3362. chip->hbst_addr_base = be32_to_cpu(*addr);
  3363. }
  3364. rc = haptics_get_revision(chip);
  3365. if (rc < 0) {
  3366. dev_err(chip->dev, "Get revision failed, rc=%d\n", rc);
  3367. goto free_pbs;
  3368. }
  3369. chip->fifo_empty_irq = platform_get_irq_byname(pdev, "fifo-empty");
  3370. if (!chip->fifo_empty_irq) {
  3371. dev_err(chip->dev, "Get fifo-empty IRQ failed\n");
  3372. rc = -EINVAL;
  3373. goto free_pbs;
  3374. }
  3375. config->vmax_mv = DEFAULT_VMAX_MV;
  3376. of_property_read_u32(node, "qcom,vmax-mv", &config->vmax_mv);
  3377. if (config->vmax_mv >= MAX_VMAX_MV) {
  3378. dev_err(chip->dev, "qcom,vmax-mv (%d) exceed the max value: %d\n",
  3379. config->vmax_mv, MAX_VMAX_MV);
  3380. rc = -EINVAL;
  3381. goto free_pbs;
  3382. }
  3383. config->fifo_empty_thresh = get_fifo_empty_threshold(chip);
  3384. of_property_read_u32(node, "qcom,fifo-empty-threshold",
  3385. &config->fifo_empty_thresh);
  3386. if (config->fifo_empty_thresh >= get_max_fifo_samples(chip)) {
  3387. dev_err(chip->dev, "FIFO empty threshold (%d) should be less than %d\n",
  3388. config->fifo_empty_thresh, get_max_fifo_samples(chip));
  3389. rc = -EINVAL;
  3390. goto free_pbs;
  3391. }
  3392. config->brake.mode = AUTO_BRAKE;
  3393. of_property_read_u32(node, "qcom,brake-mode", &config->brake.mode);
  3394. if (config->brake.mode > AUTO_BRAKE) {
  3395. dev_err(chip->dev, "Can't support brake mode: %d\n",
  3396. config->brake.mode);
  3397. rc = -EINVAL;
  3398. goto free_pbs;
  3399. }
  3400. config->brake.disabled =
  3401. of_property_read_bool(node, "qcom,brake-disable");
  3402. tmp = of_property_count_u8_elems(node, "qcom,brake-pattern");
  3403. if (tmp > BRAKE_SAMPLE_COUNT) {
  3404. dev_err(chip->dev, "more than %d brake samples\n",
  3405. BRAKE_SAMPLE_COUNT);
  3406. rc = -EINVAL;
  3407. goto free_pbs;
  3408. }
  3409. if (tmp > 0) {
  3410. rc = of_property_read_u8_array(node, "qcom,brake-pattern",
  3411. config->brake.samples, tmp);
  3412. if (rc < 0) {
  3413. dev_err(chip->dev, "Read brake-pattern failed, rc=%d\n",
  3414. rc);
  3415. goto free_pbs;
  3416. }
  3417. verify_brake_samples(&config->brake);
  3418. } else {
  3419. if (config->brake.mode == OL_BRAKE ||
  3420. config->brake.mode == CL_BRAKE)
  3421. config->brake.disabled = true;
  3422. }
  3423. config->is_erm = of_property_read_bool(node, "qcom,use-erm");
  3424. if (config->is_erm) {
  3425. config->drv_wf = WF_NO_MODULATION;
  3426. config->brake.brake_wf = WF_NO_MODULATION;
  3427. } else {
  3428. rc = haptics_parse_lra_dt(chip);
  3429. if (rc < 0) {
  3430. dev_err(chip->dev, "Parse device-tree for LRA failed, rc=%d\n",
  3431. rc);
  3432. goto free_pbs;
  3433. }
  3434. }
  3435. config->preload_effect = -EINVAL;
  3436. rc = haptics_parse_effects_dt(chip);
  3437. if (rc < 0) {
  3438. dev_err(chip->dev, "Parse device-tree for effects failed, rc=%d\n",
  3439. rc);
  3440. goto free_pbs;
  3441. }
  3442. rc = haptics_parse_primitives_dt(chip);
  3443. if (rc < 0) {
  3444. dev_err(chip->dev, "Parse device-tree for primitives failed, rc=%d\n",
  3445. rc);
  3446. goto free_pbs;
  3447. }
  3448. return 0;
  3449. free_pbs:
  3450. if (chip->pbs_node) {
  3451. of_node_put(chip->pbs_node);
  3452. chip->pbs_node = NULL;
  3453. }
  3454. return rc;
  3455. }
  3456. static int swr_slave_reg_enable(struct regulator_dev *rdev)
  3457. {
  3458. struct haptics_chip *chip = rdev_get_drvdata(rdev);
  3459. int rc;
  3460. u8 mask = SWR_PAT_INPUT_EN_BIT | SWR_PAT_RES_N_BIT | SWR_PAT_CFG_EN_BIT;
  3461. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3462. HAP_CFG_SWR_ACCESS_REG, mask, mask);
  3463. if (rc < 0) {
  3464. dev_err(chip->dev, "Failed to enable SWR_PAT, rc=%d\n",
  3465. rc);
  3466. return rc;
  3467. }
  3468. if (!(chip->wa_flags & RECOVER_SWR_SLAVE))
  3469. goto done;
  3470. /*
  3471. * If haptics has already been in SWR mode when enabling the SWR
  3472. * slave, it means that the haptics module was stuck in prevous
  3473. * SWR play. Then toggle HAPTICS_EN to reset haptics module and
  3474. * ignore SWR mode until next SWR slave enable request is coming.
  3475. */
  3476. if (is_swr_play_enabled(chip)) {
  3477. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3478. HAP_CFG_TRIG_PRIORITY_REG,
  3479. SWR_IGNORE_BIT, SWR_IGNORE_BIT);
  3480. if (rc < 0) {
  3481. dev_err(chip->dev, "Failed to enable SWR_IGNORE, rc=%d\n", rc);
  3482. return rc;
  3483. }
  3484. rc = haptics_toggle_module_enable(chip);
  3485. if (rc < 0)
  3486. return rc;
  3487. } else {
  3488. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3489. HAP_CFG_TRIG_PRIORITY_REG,
  3490. SWR_IGNORE_BIT, 0);
  3491. if (rc < 0) {
  3492. dev_err(chip->dev, "Failed to disable SWR_IGNORE, rc=%d\n", rc);
  3493. return rc;
  3494. }
  3495. }
  3496. done:
  3497. chip->swr_slave_enabled = true;
  3498. return 0;
  3499. }
  3500. static int swr_slave_reg_disable(struct regulator_dev *rdev)
  3501. {
  3502. struct haptics_chip *chip = rdev_get_drvdata(rdev);
  3503. int rc;
  3504. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3505. HAP_CFG_SWR_ACCESS_REG,
  3506. SWR_PAT_INPUT_EN_BIT | SWR_PAT_RES_N_BIT |
  3507. SWR_PAT_CFG_EN_BIT, 0);
  3508. if (rc < 0) {
  3509. dev_err(chip->dev, "Failed to disable SWR_PAT, rc=%d\n", rc);
  3510. return rc;
  3511. }
  3512. chip->swr_slave_enabled = false;
  3513. return 0;
  3514. }
  3515. static int swr_slave_reg_is_enabled(struct regulator_dev *rdev)
  3516. {
  3517. struct haptics_chip *chip = rdev_get_drvdata(rdev);
  3518. return chip->swr_slave_enabled;
  3519. }
  3520. static const struct regulator_ops swr_slave_reg_ops = {
  3521. .enable = swr_slave_reg_enable,
  3522. .disable = swr_slave_reg_disable,
  3523. .is_enabled = swr_slave_reg_is_enabled,
  3524. };
  3525. static struct regulator_desc swr_slave_reg_rdesc = {
  3526. .owner = THIS_MODULE,
  3527. .of_match = "qcom,hap-swr-slave-reg",
  3528. .name = "hap-swr-slave-reg",
  3529. .type = REGULATOR_VOLTAGE,
  3530. .ops = &swr_slave_reg_ops,
  3531. };
  3532. static int haptics_init_swr_slave_regulator(struct haptics_chip *chip)
  3533. {
  3534. struct regulator_config cfg = {};
  3535. u8 val, mask;
  3536. int rc = 0;
  3537. rc = haptics_read(chip, chip->cfg_addr_base,
  3538. HAP_CFG_SWR_ACCESS_REG, &val, 1);
  3539. if (rc < 0) {
  3540. dev_err(chip->dev, "Failed to read SWR_ACCESS, rc=%d\n",
  3541. rc);
  3542. return rc;
  3543. }
  3544. mask = SWR_PAT_INPUT_EN_BIT | SWR_PAT_RES_N_BIT | SWR_PAT_CFG_EN_BIT;
  3545. val &= mask;
  3546. chip->swr_slave_enabled = ((val == mask) ? true : false);
  3547. cfg.dev = chip->dev;
  3548. cfg.driver_data = chip;
  3549. chip->swr_slave_rdev = devm_regulator_register(chip->dev,
  3550. &swr_slave_reg_rdesc, &cfg);
  3551. if (IS_ERR(chip->swr_slave_rdev)) {
  3552. rc = PTR_ERR(chip->swr_slave_rdev);
  3553. chip->swr_slave_rdev = NULL;
  3554. if (rc != -EPROBE_DEFER)
  3555. dev_err(chip->dev, "register swr-slave-reg regulator failed, rc=%d\n",
  3556. rc);
  3557. }
  3558. return rc;
  3559. }
  3560. static int haptics_pbs_trigger_isc_config(struct haptics_chip *chip)
  3561. {
  3562. int rc;
  3563. if (chip->pbs_node == NULL) {
  3564. dev_err(chip->dev, "PBS device is not defined\n");
  3565. return -ENODEV;
  3566. }
  3567. rc = qpnp_pbs_trigger_single_event(chip->pbs_node);
  3568. if (rc < 0)
  3569. dev_err(chip->dev, "Trigger PBS to config ISC failed, rc=%d\n",
  3570. rc);
  3571. return rc;
  3572. }
  3573. #define MAX_SWEEP_STEPS 5
  3574. #define MIN_DUTY_MILLI_PCT 0
  3575. #define MAX_DUTY_MILLI_PCT 100000
  3576. #define LRA_CONFIG_REGS 3
  3577. static u32 get_lra_impedance_capable_max(struct haptics_chip *chip)
  3578. {
  3579. u32 mohms;
  3580. u32 max_vmax_mv, min_isc_ma;
  3581. switch (chip->hw_type) {
  3582. case HAP520:
  3583. min_isc_ma = 250;
  3584. if (chip->clamp_at_5v)
  3585. max_vmax_mv = 5000;
  3586. else
  3587. max_vmax_mv = 10000;
  3588. break;
  3589. case HAP520_MV:
  3590. max_vmax_mv = 5000;
  3591. min_isc_ma = 140;
  3592. break;
  3593. case HAP525_HV:
  3594. if (chip->clamp_at_5v) {
  3595. max_vmax_mv = 5000;
  3596. min_isc_ma = 125;
  3597. } else {
  3598. max_vmax_mv = 10000;
  3599. min_isc_ma = 250;
  3600. }
  3601. break;
  3602. default:
  3603. return 0;
  3604. }
  3605. mohms = (max_vmax_mv * 1000) / min_isc_ma;
  3606. if (is_haptics_external_powered(chip))
  3607. mohms = (chip->hpwr_voltage_mv * 1000) / min_isc_ma;
  3608. dev_dbg(chip->dev, "LRA impedance capable max: %u mohms\n", mohms);
  3609. return mohms;
  3610. }
  3611. #define RT_IMPD_DET_VMAX_DEFAULT_MV 4500
  3612. static int haptics_measure_realtime_lra_impedance(struct haptics_chip *chip)
  3613. {
  3614. int rc;
  3615. u8 val, current_sel;
  3616. u32 vmax_mv, nominal_ohm, current_ma, vmax_margin_mv;
  3617. struct pattern_cfg pattern = {
  3618. .samples = {
  3619. {0xff, T_LRA, false},
  3620. {0, 0, 0},
  3621. {0, 0, 0},
  3622. {0, 0, 0},
  3623. {0, 0, 0},
  3624. {0, 0, 0},
  3625. {0, 0, 0},
  3626. {0, 0, 0},
  3627. },
  3628. .play_rate_us = chip->config.t_lra_us + 2000, /* drive off resonance of the LRA */
  3629. .play_length_us = chip->config.t_lra_us + 2000, /* drive it at least 1 cycle */
  3630. .preload = false,
  3631. };
  3632. /* calculate Vmax according to nominal resistance */
  3633. vmax_mv = RT_IMPD_DET_VMAX_DEFAULT_MV;
  3634. current_sel = chip->clamp_at_5v ? CURRENT_SEL_VAL_125MA : CURRENT_SEL_VAL_250MA;
  3635. if (chip->hap_cfg_nvmem != NULL) {
  3636. rc = haptics_get_lra_nominal_impedance(chip, &nominal_ohm);
  3637. if (!rc) {
  3638. /*
  3639. * use 250mA current_sel when nominal impedance is lower than 15 Ohms
  3640. * and use 125mA detection when nominal impedance is higher than 40 Ohms
  3641. */
  3642. if (nominal_ohm < 15)
  3643. current_sel = CURRENT_SEL_VAL_250MA;
  3644. else if (nominal_ohm > 40)
  3645. current_sel = CURRENT_SEL_VAL_125MA;
  3646. /*
  3647. * give 8 Ohms margin (1000mV / 125mA, or 2000mV / 250mA) for wider
  3648. * detectability
  3649. */
  3650. if (current_sel == CURRENT_SEL_VAL_125MA) {
  3651. current_ma = 125;
  3652. vmax_margin_mv = 1000;
  3653. } else {
  3654. current_ma = 250;
  3655. vmax_margin_mv = 2000;
  3656. }
  3657. vmax_mv = max(vmax_mv, nominal_ohm * current_ma + vmax_margin_mv);
  3658. }
  3659. }
  3660. dev_dbg(chip->dev, "Set %u mV Vmax for impedance detection\n", vmax_mv);
  3661. rc = haptics_set_vmax_mv(chip, vmax_mv);
  3662. if (rc < 0)
  3663. return rc;
  3664. /* set current for imp_det comparator and enable it */
  3665. val = LRA_IMPEDANCE_MEAS_EN_BIT | current_sel;
  3666. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3667. HAP_CFG_RT_LRA_IMPD_MEAS_CFG_REG,
  3668. LRA_IMPEDANCE_MEAS_EN_BIT |
  3669. LRA_IMPEDANCE_MEAS_CURRENT_SEL_BIT, val);
  3670. if (rc < 0)
  3671. return rc;
  3672. /* disconnect imp_det comparator to avoid it impact SC behavior */
  3673. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3674. HAP_CFG_ISC_CFG_REG, EN_IMP_DET_HAP525_HV_BIT, 0);
  3675. if (rc < 0)
  3676. goto restore;
  3677. /* play 1 drive cycle using PATTERN1 source */
  3678. rc = haptics_set_pattern(chip, &pattern, PATTERN1);
  3679. if (rc < 0)
  3680. goto restore;
  3681. chip->play.pattern_src = PATTERN1;
  3682. rc = haptics_enable_play(chip, true);
  3683. if (rc < 0)
  3684. goto restore;
  3685. usleep_range(pattern.play_length_us, pattern.play_length_us + 1);
  3686. rc = haptics_enable_play(chip, false);
  3687. if (rc < 0)
  3688. goto restore;
  3689. /* read the measured LRA impedance */
  3690. rc = haptics_read(chip, chip->cfg_addr_base,
  3691. HAP_CFG_REAL_TIME_LRA_IMPEDANCE_REG, &val, 1);
  3692. if (rc < 0)
  3693. goto restore;
  3694. chip->config.lra_measured_mohms = val * LRA_IMPEDANCE_MOHMS_LSB;
  3695. dev_dbg(chip->dev, "measured LRA impedance: %u mohm",
  3696. chip->config.lra_measured_mohms);
  3697. /* store the detected LRA impedance into SDAM for future usage */
  3698. if (chip->hap_cfg_nvmem != NULL) {
  3699. rc = nvmem_device_write(chip->hap_cfg_nvmem,
  3700. HAP_LRA_DETECTED_OHM_SDAM_OFFSET, 1, &val);
  3701. if (rc < 0)
  3702. dev_err(chip->dev, "write measured impedance value into SDAM failed, rc=%d\n",
  3703. rc);
  3704. }
  3705. restore:
  3706. if (rc < 0)
  3707. dev_err(chip->dev, "measure LRA impedance failed, rc=%d\n", rc);
  3708. return haptics_masked_write(chip, chip->cfg_addr_base,
  3709. HAP_CFG_RT_LRA_IMPD_MEAS_CFG_REG,
  3710. LRA_IMPEDANCE_MEAS_EN_BIT, 0);
  3711. }
  3712. static int haptics_detect_lra_impedance(struct haptics_chip *chip)
  3713. {
  3714. int rc, i;
  3715. struct haptics_reg_info lra_config[LRA_CONFIG_REGS] = {
  3716. { HAP_CFG_DRV_WF_SEL_REG, 0x10 },
  3717. { HAP_CFG_VMAX_REG, 0xC8 },
  3718. { HAP_CFG_VMAX_HDRM_REG, 0x00 },
  3719. };
  3720. struct haptics_reg_info backup[LRA_CONFIG_REGS];
  3721. u8 val, cfg1, cfg2, reg1, reg2, mask1, mask2, val1, val2;
  3722. u32 duty_milli_pct, low_milli_pct, high_milli_pct;
  3723. u32 amplitude, lra_min_mohms, lra_max_mohms, capability_mohms;
  3724. /* Backup default register values */
  3725. memcpy(backup, lra_config, sizeof(backup));
  3726. for (i = 0; i < LRA_CONFIG_REGS; i++) {
  3727. rc = haptics_read(chip, chip->cfg_addr_base,
  3728. backup[i].addr, &backup[i].val, 1);
  3729. if (rc < 0)
  3730. return rc;
  3731. }
  3732. if (chip->hw_type == HAP520) {
  3733. /* Trigger PBS to config 250mA ISC setting */
  3734. rc = haptics_pbs_trigger_isc_config(chip);
  3735. if (rc < 0)
  3736. return rc;
  3737. } else {
  3738. /* Config ISC_CFG settings for LRA impedance_detection */
  3739. switch (chip->hw_type) {
  3740. case HAP520_MV:
  3741. reg1 = HAP_CFG_ISC_CFG_REG;
  3742. mask1 = ILIM_CC_EN_BIT;
  3743. val1 = ILIM_CC_EN_BIT;
  3744. reg2 = HAP_CFG_ISC_CFG2_REG;
  3745. mask2 = EN_SC_DET_P_HAP520_MV_BIT |
  3746. EN_SC_DET_N_HAP520_MV_BIT |
  3747. ISC_THRESH_HAP520_MV_MASK;
  3748. val2 = EN_SC_DET_P_HAP520_MV_BIT|
  3749. EN_SC_DET_N_HAP520_MV_BIT|
  3750. ISC_THRESH_HAP520_MV_140MA;
  3751. break;
  3752. case HAP525_HV:
  3753. reg1 = HAP_CFG_ISC_CFG_REG;
  3754. mask1 = EN_SC_DET_P_HAP525_HV_BIT | EN_SC_DET_N_HAP525_HV_BIT |
  3755. EN_IMP_DET_HAP525_HV_BIT | ILIM_PULSE_DENSITY_MASK;
  3756. val1 = EN_IMP_DET_HAP525_HV_BIT |
  3757. FIELD_PREP(ILIM_PULSE_DENSITY_MASK, ILIM_DENSITY_8_OVER_64_CYCLES);
  3758. reg2 = HAP_CFG_RT_LRA_IMPD_MEAS_CFG_REG;
  3759. mask2 = LRA_IMPEDANCE_MEAS_EN_BIT | LRA_IMPEDANCE_MEAS_CURRENT_SEL_BIT;
  3760. val2 = chip->clamp_at_5v ? CURRENT_SEL_VAL_125MA : CURRENT_SEL_VAL_250MA;
  3761. val2 |= LRA_IMPEDANCE_MEAS_EN_BIT;
  3762. break;
  3763. default:
  3764. dev_err(chip->dev, "unsupported HW type: %d\n",
  3765. chip->hw_type);
  3766. return -EOPNOTSUPP;
  3767. }
  3768. /* save ISC_CFG default settings */
  3769. rc = haptics_read(chip, chip->cfg_addr_base, reg1, &cfg1, 1);
  3770. if (rc < 0)
  3771. return rc;
  3772. rc = haptics_read(chip, chip->cfg_addr_base, reg2, &cfg2, 1);
  3773. if (rc < 0)
  3774. return rc;
  3775. /* update ISC_CFG settings for the detection */
  3776. rc = haptics_masked_write(chip, chip->cfg_addr_base, reg1, mask1, val1);
  3777. if (rc < 0)
  3778. return rc;
  3779. rc = haptics_masked_write(chip, chip->cfg_addr_base, reg2, mask2, val2);
  3780. if (rc < 0)
  3781. goto restore;
  3782. }
  3783. /* Set square drive waveform, 10V Vmax, no HDRM */
  3784. for (i = 0; i < LRA_CONFIG_REGS; i++) {
  3785. rc = haptics_write(chip, chip->cfg_addr_base,
  3786. lra_config[i].addr, &lra_config[i].val, 1);
  3787. if (rc < 0)
  3788. goto restore;
  3789. }
  3790. rc = haptics_enable_hpwr_vreg(chip, true);
  3791. if (rc < 0)
  3792. goto restore;
  3793. low_milli_pct = MIN_DUTY_MILLI_PCT;
  3794. high_milli_pct = MAX_DUTY_MILLI_PCT;
  3795. /* Sweep duty cycle using binary approach */
  3796. for (i = 0; i < MAX_SWEEP_STEPS; i++) {
  3797. /* Set direct play amplitude */
  3798. duty_milli_pct = (low_milli_pct + high_milli_pct) / 2;
  3799. amplitude = (duty_milli_pct * DIRECT_PLAY_MAX_AMPLITUDE)
  3800. / 100000;
  3801. rc = haptics_set_direct_play(chip, (u8)amplitude);
  3802. if (rc < 0)
  3803. goto restore;
  3804. dev_dbg(chip->dev, "sweeping milli_pct %u, amplitude %#x\n",
  3805. duty_milli_pct, amplitude);
  3806. /* Enable play */
  3807. chip->play.pattern_src = DIRECT_PLAY;
  3808. rc = haptics_enable_play(chip, true);
  3809. if (rc < 0)
  3810. goto restore;
  3811. /* Play a cycle then read SC fault status */
  3812. usleep_range(chip->config.t_lra_us,
  3813. chip->config.t_lra_us + 1000);
  3814. rc = haptics_read(chip, chip->cfg_addr_base,
  3815. HAP_CFG_FAULT_STATUS_REG, &val, 1);
  3816. if (rc < 0)
  3817. goto restore;
  3818. if (val & SC_FLAG_BIT)
  3819. high_milli_pct = duty_milli_pct;
  3820. else
  3821. low_milli_pct = duty_milli_pct;
  3822. /* Disable play */
  3823. rc = haptics_enable_play(chip, false);
  3824. if (rc < 0)
  3825. goto restore;
  3826. /* Sleep 4ms */
  3827. usleep_range(4000, 5000);
  3828. }
  3829. capability_mohms = get_lra_impedance_capable_max(chip);
  3830. lra_min_mohms = low_milli_pct * capability_mohms / 100000;
  3831. lra_max_mohms = high_milli_pct * capability_mohms / 100000;
  3832. if (lra_min_mohms == 0)
  3833. dev_warn(chip->dev, "Short circuit detected!\n");
  3834. else if (lra_max_mohms >= capability_mohms)
  3835. dev_warn(chip->dev, "Open circuit detected!\n");
  3836. else
  3837. dev_dbg(chip->dev, "LRA impedance is between %u - %u mohms\n",
  3838. lra_min_mohms, lra_max_mohms);
  3839. chip->config.lra_min_mohms = lra_min_mohms;
  3840. chip->config.lra_max_mohms = lra_max_mohms;
  3841. chip->config.lra_open_mohms = capability_mohms;
  3842. restore:
  3843. /* Disable play in case it's not been disabled */
  3844. haptics_enable_play(chip, false);
  3845. rc = haptics_enable_hpwr_vreg(chip, false);
  3846. if (rc < 0)
  3847. return rc;
  3848. if (chip->hw_type == HAP520) {
  3849. /* Trigger PBS to restore 1500mA ISC setting */
  3850. rc = haptics_pbs_trigger_isc_config(chip);
  3851. if (rc < 0)
  3852. return rc;
  3853. } else {
  3854. /* restore ISC_CFG settings to default */
  3855. rc = haptics_write(chip, chip->cfg_addr_base, reg1, &cfg1, 1);
  3856. if (rc < 0)
  3857. return rc;
  3858. rc = haptics_write(chip, chip->cfg_addr_base, reg2, &cfg2, 1);
  3859. if (rc < 0)
  3860. return rc;
  3861. }
  3862. /* Restore driver waveform, Vmax, HDRM settings */
  3863. for (i = 0; i < LRA_CONFIG_REGS; i++) {
  3864. rc = haptics_write(chip, chip->cfg_addr_base,
  3865. backup[i].addr, &backup[i].val, 1);
  3866. if (rc < 0)
  3867. break;
  3868. }
  3869. return rc;
  3870. }
  3871. #define LRA_CALIBRATION_VMAX_HDRM_MV 500
  3872. static int haptics_detect_lra_frequency(struct haptics_chip *chip)
  3873. {
  3874. int rc;
  3875. u8 autores_cfg, drv_duty_cfg, amplitude, mask, val;
  3876. u32 vmax_mv = chip->config.vmax_mv;
  3877. rc = haptics_read(chip, chip->cfg_addr_base,
  3878. HAP_CFG_AUTORES_CFG_REG, &autores_cfg, 1);
  3879. if (rc < 0) {
  3880. dev_err(chip->dev, "Read AUTORES_CFG failed, rc=%d\n", rc);
  3881. return rc;
  3882. }
  3883. rc = haptics_read(chip, chip->cfg_addr_base,
  3884. HAP_CFG_DRV_DUTY_CFG_REG, &drv_duty_cfg, 1);
  3885. if (rc < 0) {
  3886. dev_err(chip->dev, "Read DRV_DUTY_CFG failed, rc=%d\n", rc);
  3887. return rc;
  3888. }
  3889. if (chip->hw_type == HAP525_HV)
  3890. val = AUTORES_EN_DLY_7_CYCLES << AUTORES_EN_DLY_SHIFT|
  3891. AUTORES_ERR_WINDOW_25_PERCENT | AUTORES_EN_BIT;
  3892. else
  3893. val = AUTORES_EN_DLY_6_CYCLES << AUTORES_EN_DLY_SHIFT|
  3894. AUTORES_ERR_WINDOW_50_PERCENT | AUTORES_EN_BIT;
  3895. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3896. HAP_CFG_AUTORES_CFG_REG, AUTORES_EN_BIT |
  3897. AUTORES_EN_DLY_MASK | AUTORES_ERR_WINDOW_MASK,
  3898. val);
  3899. if (rc < 0)
  3900. return rc;
  3901. if (chip->hw_type == HAP525_HV) {
  3902. mask = ADT_DRV_DUTY_EN_BIT | ADT_BRK_DUTY_EN_BIT |
  3903. DRV_DUTY_MASK | BRK_DUTY_MASK;
  3904. val = DRV_DUTY_62P5_PCT << DRV_DUTY_SHIFT | BRK_DUTY_75_PCT;
  3905. } else {
  3906. mask = ADT_DRV_DUTY_EN_BIT;
  3907. val = 0;
  3908. }
  3909. rc = haptics_masked_write(chip, chip->cfg_addr_base,
  3910. HAP_CFG_DRV_DUTY_CFG_REG, mask, val);
  3911. if (rc < 0)
  3912. goto restore;
  3913. rc = haptics_config_openloop_lra_period(chip, chip->config.t_lra_us);
  3914. if (rc < 0)
  3915. goto restore;
  3916. rc = haptics_set_vmax_headroom_mv(chip, LRA_CALIBRATION_VMAX_HDRM_MV);
  3917. if (rc < 0)
  3918. goto restore;
  3919. /* Fix Vmax to (hpwr_vreg_mv - hdrm_mv) in non-HBOOST regulator case */
  3920. if (is_haptics_external_powered(chip))
  3921. vmax_mv = chip->hpwr_voltage_mv - LRA_CALIBRATION_VMAX_HDRM_MV;
  3922. rc = haptics_set_vmax_mv(chip, vmax_mv);
  3923. if (rc < 0)
  3924. goto restore;
  3925. amplitude = get_direct_play_max_amplitude(chip);
  3926. rc = haptics_set_direct_play(chip, amplitude);
  3927. if (rc < 0)
  3928. goto restore;
  3929. rc = haptics_enable_hpwr_vreg(chip, true);
  3930. if (rc < 0)
  3931. goto restore;
  3932. chip->play.pattern_src = DIRECT_PLAY;
  3933. rc = haptics_enable_play(chip, true);
  3934. if (rc < 0)
  3935. goto restore;
  3936. /* wait for ~150ms to get the LRA calibration result */
  3937. usleep_range(150000, 155000);
  3938. rc = haptics_get_closeloop_lra_period(chip, false);
  3939. if (rc < 0)
  3940. goto restore;
  3941. rc = haptics_enable_play(chip, false);
  3942. if (rc < 0)
  3943. goto restore;
  3944. haptics_config_openloop_lra_period(chip, chip->config.cl_t_lra_us);
  3945. restore:
  3946. /* Disable play in case it's not been disabled */
  3947. haptics_enable_play(chip, false);
  3948. rc = haptics_enable_hpwr_vreg(chip, false);
  3949. if (rc < 0)
  3950. return rc;
  3951. rc = haptics_write(chip, chip->cfg_addr_base,
  3952. HAP_CFG_AUTORES_CFG_REG, &autores_cfg, 1);
  3953. if (rc < 0)
  3954. return rc;
  3955. rc = haptics_write(chip, chip->cfg_addr_base,
  3956. HAP_CFG_DRV_DUTY_CFG_REG, &drv_duty_cfg, 1);
  3957. return rc;
  3958. }
  3959. #define AUTO_BRAKE_CAL_POLLING_COUNT 10
  3960. #define AUTO_BRAKE_CAL_POLLING_STEP_US 20000
  3961. #define AUTO_BRAKE_CAL_WAIT_MS 800
  3962. #define AUTO_BRAKE_CAL_DRIVE_CYCLES 6
  3963. static int haptics_start_auto_brake_calibration(struct haptics_chip *chip)
  3964. {
  3965. struct haptics_reg_info lra_config[4] = {
  3966. { HAP_CFG_DRV_DUTY_CFG_REG, 0x55 },
  3967. { HAP_CFG_BRAKE_MODE_CFG_REG, 0xC1 },
  3968. { HAP_CFG_CL_BRAKE_CFG_REG, 0xE1 },
  3969. { HAP_CFG_ADT_DRV_DUTY_CFG_REG, 0x3B },
  3970. };
  3971. struct haptics_reg_info backup[4];
  3972. u32 retry_count = AUTO_BRAKE_CAL_POLLING_COUNT;
  3973. u32 t_lra_us, tmp;
  3974. u8 val[AUTO_BRAKE_CAL_DRIVE_CYCLES] = {};
  3975. int rc, i;
  3976. /* Ignore calibration if nvmem is not assigned */
  3977. if (!chip->hap_cfg_nvmem || chip->hw_type != HAP525_HV)
  3978. return -EOPNOTSUPP;
  3979. t_lra_us = chip->config.t_lra_us;
  3980. /* Update T_LRA into SDAM */
  3981. if (chip->config.cl_t_lra_us != 0)
  3982. t_lra_us = chip->config.cl_t_lra_us;
  3983. tmp = t_lra_us / TLRA_STEP_US;
  3984. val[0] = tmp & TLRA_OL_LSB_MASK;
  3985. val[1] = (tmp >> 8) & TLRA_OL_MSB_MASK;
  3986. rc = nvmem_device_write(chip->hap_cfg_nvmem, HAP_LRA_PTRN1_TLRA_LSB_OFFSET, 2, val);
  3987. if (rc < 0) {
  3988. dev_err(chip->dev, "set T_LRA for auto brake cal failed,rc=%d\n", rc);
  3989. return rc;
  3990. }
  3991. /* Set Vmax to 4.5V with 50mV per step */
  3992. val[0] = 0x5A;
  3993. rc = nvmem_device_write(chip->hap_cfg_nvmem, HAP_AUTO_BRAKE_CAL_VMAX_OFFSET, 1, val);
  3994. if (rc < 0) {
  3995. dev_err(chip->dev, "set Vmax for auto brake cal failed,rc=%d\n", rc);
  3996. return rc;
  3997. }
  3998. /* Set PTRN1_CFGx for each cycle in the 6-cycle drive calibration */
  3999. memset(val, 0, sizeof(val));
  4000. rc = nvmem_device_write(chip->hap_cfg_nvmem, HAP_AUTO_BRAKE_CAL_PTRN1_CFG0_OFFSET,
  4001. AUTO_BRAKE_CAL_DRIVE_CYCLES, val);
  4002. if (rc < 0) {
  4003. dev_err(chip->dev, "set PTRN1_CFGx for auto brake cal failed, rc=%d\n", rc);
  4004. return rc;
  4005. }
  4006. /*
  4007. * Set amplitude for 6-cycle drive calibration
  4008. * 1 cycle over-drive with 4.5V VMAX + 0.5V VMAX_HDRM
  4009. * 2 cycles intermediate drive with VMAX close to 3.5V
  4010. * 3 cycles steady drive with VMAX close to Vrms
  4011. */
  4012. val[0] = 0xFF;
  4013. val[1] = val[2] = 0xC9;
  4014. val[3] = val[4] = val[5] = chip->config.vmax_mv * 0xFF / 4500;
  4015. rc = nvmem_device_write(chip->hap_cfg_nvmem, HAP_AUTO_BRAKE_CAL_PTRN1_LSB0_OFFSET,
  4016. AUTO_BRAKE_CAL_DRIVE_CYCLES, val);
  4017. if (rc < 0) {
  4018. dev_err(chip->dev, "set PTRN1_LSBx for auto brake cal failed, rc=%d\n", rc);
  4019. return rc;
  4020. }
  4021. /* cache several registers setting before configure them for auto brake calibration */
  4022. memcpy(backup, lra_config, sizeof(backup));
  4023. for (i = 0; i < 4; i++) {
  4024. rc = haptics_read(chip, chip->cfg_addr_base,
  4025. backup[i].addr, &backup[i].val, 1);
  4026. if (rc < 0)
  4027. return rc;
  4028. }
  4029. /* Set 62.5% BRK_DUTY, enable AUTO brake, etc */
  4030. for (i = 0; i < 4; i++) {
  4031. rc = haptics_write(chip, chip->cfg_addr_base,
  4032. lra_config[i].addr, &lra_config[i].val, 1);
  4033. if (rc < 0)
  4034. goto restore;
  4035. }
  4036. /* Clear calibration done flag 1st */
  4037. val[0] = 0;
  4038. rc = nvmem_device_write(chip->hap_cfg_nvmem, HAP_AUTO_BRAKE_CAL_DONE_OFFSET, 1, val);
  4039. if (rc < 0) {
  4040. dev_err(chip->dev, "clear auto brake cal done flag failed, rc=%d\n", rc);
  4041. goto restore;
  4042. }
  4043. rc = haptics_clear_fault(chip);
  4044. if (rc < 0)
  4045. goto restore;
  4046. /* Trigger PBS to start calibration */
  4047. val[0] = HAP_AUTO_BRAKE_CAL_VAL;
  4048. rc = nvmem_device_write(chip->hap_cfg_nvmem, PBS_ARG_REG, 1, val);
  4049. if (rc < 0) {
  4050. dev_err(chip->dev, "set PBS_ARG for auto brake cal failed, rc=%d\n", rc);
  4051. goto restore;
  4052. }
  4053. val[0] = PBS_TRIG_CLR_VAL;
  4054. rc = nvmem_device_write(chip->hap_cfg_nvmem, PBS_TRIG_CLR_REG, 1, val);
  4055. if (rc < 0) {
  4056. dev_err(chip->dev, "clear PBS_TRIG for auto brake cal failed, rc=%d\n", rc);
  4057. goto restore;
  4058. }
  4059. val[0] = PBS_TRIG_SET_VAL;
  4060. rc = nvmem_device_write(chip->hap_cfg_nvmem, PBS_TRIG_SET_REG, 1, val);
  4061. if (rc < 0) {
  4062. dev_err(chip->dev, "set PBS_TRIG for auto brake cal failed, rc=%d\n", rc);
  4063. goto restore;
  4064. }
  4065. /* wait for ~800ms and then poll auto brake cal done flag with ~200ms timeout */
  4066. msleep(AUTO_BRAKE_CAL_WAIT_MS);
  4067. while (retry_count--) {
  4068. rc = nvmem_device_read(chip->hap_cfg_nvmem,
  4069. HAP_AUTO_BRAKE_CAL_DONE_OFFSET, 1, val);
  4070. if (rc < 0) {
  4071. dev_err(chip->dev, "read auto brake cal done flag failed, rc=%d\n", rc);
  4072. goto restore;
  4073. }
  4074. if (val[0] & AUTO_BRAKE_CAL_DONE) {
  4075. dev_info(chip->dev, "auto brake calibration is done\n");
  4076. break;
  4077. }
  4078. usleep_range(AUTO_BRAKE_CAL_POLLING_STEP_US, AUTO_BRAKE_CAL_POLLING_STEP_US + 1);
  4079. }
  4080. restore:
  4081. /* restore haptics settings after auto brake calibration */
  4082. for (i = 0; i < 4; i++)
  4083. haptics_write(chip, chip->cfg_addr_base,
  4084. backup[i].addr, &backup[i].val, 1);
  4085. return rc;
  4086. }
  4087. static int haptics_start_lra_calibrate(struct haptics_chip *chip)
  4088. {
  4089. int rc;
  4090. mutex_lock(&chip->play.lock);
  4091. /*
  4092. * Ignore calibration if it's in FIFO playing to avoid
  4093. * messing up the FIFO playing status
  4094. */
  4095. if ((chip->play.pattern_src == FIFO) &&
  4096. atomic_read(&chip->play.fifo_status.is_busy)) {
  4097. dev_err(chip->dev, "In FIFO playing, ignore calibration\n");
  4098. rc = -EBUSY;
  4099. goto unlock;
  4100. }
  4101. /* Stop other mode playing if there is any */
  4102. rc = haptics_enable_play(chip, false);
  4103. if (rc < 0) {
  4104. dev_err(chip->dev, "Stop playing failed, rc=%d\n", rc);
  4105. goto unlock;
  4106. }
  4107. chip->play.in_calibration = true;
  4108. rc = haptics_detect_lra_frequency(chip);
  4109. if (rc < 0) {
  4110. dev_err(chip->dev, "Detect LRA frequency failed, rc=%d\n", rc);
  4111. goto unlock;
  4112. }
  4113. /* Sleep at least 4ms to stabilize the LRA from frequency detection */
  4114. usleep_range(4000, 5000);
  4115. if (chip->config.measure_lra_impedance)
  4116. rc = haptics_measure_realtime_lra_impedance(chip);
  4117. else
  4118. rc = haptics_detect_lra_impedance(chip);
  4119. if (rc < 0) {
  4120. dev_err(chip->dev, "Detect LRA impedance failed, rc=%d\n", rc);
  4121. goto unlock;
  4122. }
  4123. /* Sleep 50ms to stabilize the LRA from impedance detection */
  4124. msleep(50);
  4125. rc = haptics_start_auto_brake_calibration(chip);
  4126. if (rc < 0) {
  4127. dev_err(chip->dev, "Run auto brake calibration failed, rc=%d\n", rc);
  4128. goto unlock;
  4129. }
  4130. unlock:
  4131. haptics_clear_fault(chip);
  4132. chip->play.in_calibration = false;
  4133. mutex_unlock(&chip->play.lock);
  4134. return rc;
  4135. }
  4136. static ssize_t lra_calibration_store(struct class *c,
  4137. struct class_attribute *attr, const char *buf, size_t count)
  4138. {
  4139. struct haptics_chip *chip = container_of(c,
  4140. struct haptics_chip, hap_class);
  4141. bool val;
  4142. int rc;
  4143. if (kstrtobool(buf, &val))
  4144. return -EINVAL;
  4145. if (val) {
  4146. rc = haptics_start_lra_calibrate(chip);
  4147. if (rc < 0)
  4148. return rc;
  4149. }
  4150. return count;
  4151. }
  4152. static CLASS_ATTR_WO(lra_calibration);
  4153. static ssize_t lra_frequency_hz_show(struct class *c,
  4154. struct class_attribute *attr, char *buf)
  4155. {
  4156. struct haptics_chip *chip = container_of(c,
  4157. struct haptics_chip, hap_class);
  4158. u32 cl_f_lra;
  4159. if (chip->config.cl_t_lra_us == 0)
  4160. return -EINVAL;
  4161. cl_f_lra = USEC_PER_SEC / chip->config.cl_t_lra_us;
  4162. return scnprintf(buf, PAGE_SIZE, "%d Hz\n", cl_f_lra);
  4163. }
  4164. static CLASS_ATTR_RO(lra_frequency_hz);
  4165. static ssize_t lra_impedance_show(struct class *c,
  4166. struct class_attribute *attr, char *buf)
  4167. {
  4168. struct haptics_chip *chip = container_of(c,
  4169. struct haptics_chip, hap_class);
  4170. if (chip->config.measure_lra_impedance)
  4171. return scnprintf(buf, PAGE_SIZE, "measured %u mohms\n",
  4172. chip->config.lra_measured_mohms);
  4173. if (chip->config.lra_min_mohms == 0 && chip->config.lra_max_mohms == 0)
  4174. return -EINVAL;
  4175. else if (chip->config.lra_min_mohms == 0)
  4176. return scnprintf(buf, PAGE_SIZE, "%s\n", "Short circuit");
  4177. else if (chip->config.lra_max_mohms >= chip->config.lra_open_mohms)
  4178. return scnprintf(buf, PAGE_SIZE, "%s\n", "Open circuit");
  4179. else
  4180. return scnprintf(buf, PAGE_SIZE, "%u ~ %u mohms\n",
  4181. chip->config.lra_min_mohms,
  4182. chip->config.lra_max_mohms);
  4183. }
  4184. static CLASS_ATTR_RO(lra_impedance);
  4185. static ssize_t primitive_duration_show(struct class *c,
  4186. struct class_attribute *attr, char *buf)
  4187. {
  4188. struct haptics_chip *chip = container_of(c,
  4189. struct haptics_chip, hap_class);
  4190. return scnprintf(buf, PAGE_SIZE, "%d\n", chip->primitive_duration);
  4191. }
  4192. static ssize_t primitive_duration_store(struct class *c,
  4193. struct class_attribute *attr, const char *buf, size_t count)
  4194. {
  4195. struct haptics_chip *chip = container_of(c,
  4196. struct haptics_chip, hap_class);
  4197. u16 primitive_id = 0;
  4198. int i = 0;
  4199. if (kstrtou16(buf, 0, &primitive_id))
  4200. return -EINVAL;
  4201. for (i = 0; i < chip->primitives_count; i++) {
  4202. if (chip->primitives[i].id == primitive_id)
  4203. break;
  4204. }
  4205. if (i == chip->primitives_count) {
  4206. pr_err("Primitive id specified is incorrect\n");
  4207. return -EINVAL;
  4208. }
  4209. chip->primitive_duration = get_play_length_effect_us(&chip->primitives[i]);
  4210. return count;
  4211. }
  4212. static CLASS_ATTR_RW(primitive_duration);
  4213. static struct attribute *hap_class_attrs[] = {
  4214. &class_attr_lra_calibration.attr,
  4215. &class_attr_lra_frequency_hz.attr,
  4216. &class_attr_lra_impedance.attr,
  4217. &class_attr_primitive_duration.attr,
  4218. NULL,
  4219. };
  4220. ATTRIBUTE_GROUPS(hap_class);
  4221. static bool is_swr_supported(struct haptics_chip *chip)
  4222. {
  4223. /* HAP520_MV does not support soundwire */
  4224. if (chip->hw_type == HAP520_MV)
  4225. return false;
  4226. return true;
  4227. }
  4228. static enum hrtimer_restart haptics_disable_hbst_timer(struct hrtimer *timer)
  4229. {
  4230. struct haptics_chip *chip = container_of(timer,
  4231. struct haptics_chip, hbst_off_timer);
  4232. int rc;
  4233. rc = haptics_boost_vreg_enable(chip, false);
  4234. if (rc < 0)
  4235. dev_err(chip->dev, "disable boost vreg failed, rc=%d\n", rc);
  4236. else
  4237. dev_dbg(chip->dev, "boost vreg is disabled\n");
  4238. return HRTIMER_NORESTART;
  4239. }
  4240. static int haptics_boost_notifier(struct notifier_block *nb, unsigned long event, void *val)
  4241. {
  4242. struct haptics_chip *chip = container_of(nb, struct haptics_chip, hboost_nb);
  4243. u32 vmax_mv;
  4244. int rc;
  4245. switch (event) {
  4246. case VMAX_CLAMP:
  4247. vmax_mv = *(u32 *)val;
  4248. if (vmax_mv > MAX_HV_VMAX_MV) {
  4249. dev_err(chip->dev, "voted Vmax (%u mV) is higher than maximum (%u mV)\n",
  4250. vmax_mv, MAX_HV_VMAX_MV);
  4251. return -EINVAL;
  4252. }
  4253. chip->clamped_vmax_mv = vmax_mv;
  4254. dev_dbg(chip->dev, "Vmax is clamped at %u mV to support hBoost concurrency\n",
  4255. vmax_mv);
  4256. rc = haptics_force_vreg_ready(chip, vmax_mv == MAX_HV_VMAX_MV ? false : true);
  4257. if (rc < 0)
  4258. return rc;
  4259. break;
  4260. default:
  4261. break;
  4262. }
  4263. return 0;
  4264. }
  4265. #include "qcom-hv-haptics-debugfs.c"
  4266. static int haptics_probe(struct platform_device *pdev)
  4267. {
  4268. struct haptics_chip *chip;
  4269. struct input_dev *input_dev;
  4270. struct ff_device *ff_dev;
  4271. int rc, count;
  4272. chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
  4273. if (!chip)
  4274. return -ENOMEM;
  4275. input_dev = devm_input_allocate_device(&pdev->dev);
  4276. if (!input_dev)
  4277. return -ENOMEM;
  4278. chip->dev = &pdev->dev;
  4279. chip->regmap = dev_get_regmap(chip->dev->parent, NULL);
  4280. if (!chip->regmap) {
  4281. dev_err(chip->dev, "Get regmap failed\n");
  4282. return -ENXIO;
  4283. }
  4284. rc = haptics_parse_dt(chip);
  4285. if (rc < 0) {
  4286. dev_err(chip->dev, "Parse device-tree failed, rc = %d\n", rc);
  4287. return rc;
  4288. }
  4289. rc = haptics_init_custom_effect(chip);
  4290. if (rc < 0) {
  4291. dev_err(chip->dev, "Init custom effect failed, rc=%d\n", rc);
  4292. return rc;
  4293. }
  4294. mutex_init(&chip->vmax_lock);
  4295. rc = haptics_hw_init(chip);
  4296. if (rc < 0) {
  4297. dev_err(chip->dev, "Initialize HW failed, rc = %d\n", rc);
  4298. return rc;
  4299. }
  4300. if (is_swr_supported(chip)) {
  4301. rc = haptics_init_swr_slave_regulator(chip);
  4302. if (rc < 0) {
  4303. dev_err(chip->dev, "Initialize swr slave regulator failed, rc = %d\n",
  4304. rc);
  4305. return rc;
  4306. }
  4307. }
  4308. rc = devm_request_threaded_irq(chip->dev, chip->fifo_empty_irq,
  4309. NULL, fifo_empty_irq_handler,
  4310. IRQF_ONESHOT, "fifo-empty", chip);
  4311. if (rc < 0) {
  4312. dev_err(chip->dev, "request fifo-empty IRQ failed, rc=%d\n",
  4313. rc);
  4314. return rc;
  4315. }
  4316. mutex_init(&chip->play.lock);
  4317. disable_irq_nosync(chip->fifo_empty_irq);
  4318. chip->fifo_empty_irq_en = false;
  4319. hrtimer_init(&chip->hbst_off_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  4320. chip->hbst_off_timer.function = haptics_disable_hbst_timer;
  4321. INIT_DELAYED_WORK(&chip->stop_work, haptics_stop_constant_effect_play);
  4322. INIT_WORK(&chip->set_gain_work, haptics_set_gain_work);
  4323. atomic_set(&chip->play.fifo_status.is_busy, 0);
  4324. atomic_set(&chip->play.fifo_status.written_done, 0);
  4325. atomic_set(&chip->play.fifo_status.cancelled, 0);
  4326. input_dev->name = "qcom-hv-haptics";
  4327. input_set_drvdata(input_dev, chip);
  4328. chip->input_dev = input_dev;
  4329. input_set_capability(input_dev, EV_FF, FF_CONSTANT);
  4330. input_set_capability(input_dev, EV_FF, FF_GAIN);
  4331. if ((chip->effects_count != 0) || (chip->primitives_count != 0)) {
  4332. input_set_capability(input_dev, EV_FF, FF_PERIODIC);
  4333. input_set_capability(input_dev, EV_FF, FF_CUSTOM);
  4334. }
  4335. if (chip->effects_count + chip->primitives_count > MAX_EFFECT_COUNT)
  4336. dev_err(chip->dev, "Effects count cannot be more than %d\n", MAX_EFFECT_COUNT);
  4337. count = min_t(u32, chip->effects_count + chip->primitives_count + 1, MAX_EFFECT_COUNT);
  4338. rc = input_ff_create(input_dev, count);
  4339. if (rc < 0) {
  4340. dev_err(chip->dev, "create input FF device failed, rc=%d\n",
  4341. rc);
  4342. return rc;
  4343. }
  4344. ff_dev = input_dev->ff;
  4345. ff_dev->upload = haptics_upload_effect;
  4346. ff_dev->playback = haptics_playback;
  4347. ff_dev->erase = haptics_erase;
  4348. ff_dev->set_gain = haptics_set_gain;
  4349. rc = input_register_device(input_dev);
  4350. if (rc < 0) {
  4351. dev_err(chip->dev, "register input device failed, rc=%d\n",
  4352. rc);
  4353. goto destroy_ff;
  4354. }
  4355. dev_set_drvdata(chip->dev, chip);
  4356. chip->hap_class.name = "qcom-haptics";
  4357. chip->hap_class.class_groups = hap_class_groups;
  4358. rc = class_register(&chip->hap_class);
  4359. if (rc < 0) {
  4360. dev_err(chip->dev, "register hap_class failed, rc=%d\n", rc);
  4361. goto destroy_ff;
  4362. }
  4363. chip->hboost_nb.notifier_call = haptics_boost_notifier;
  4364. register_hboost_event_notifier(&chip->hboost_nb);
  4365. rc = haptics_create_debugfs(chip);
  4366. if (rc < 0)
  4367. dev_err(chip->dev, "Creating debugfs failed, rc=%d\n", rc);
  4368. return 0;
  4369. destroy_ff:
  4370. input_ff_destroy(chip->input_dev);
  4371. return rc;
  4372. }
  4373. static int haptics_remove(struct platform_device *pdev)
  4374. {
  4375. struct haptics_chip *chip = dev_get_drvdata(&pdev->dev);
  4376. if (chip->pbs_node)
  4377. of_node_put(chip->pbs_node);
  4378. unregister_hboost_event_notifier(&chip->hboost_nb);
  4379. class_unregister(&chip->hap_class);
  4380. haptics_remove_debugfs(chip);
  4381. input_unregister_device(chip->input_dev);
  4382. dev_set_drvdata(chip->dev, NULL);
  4383. return 0;
  4384. }
  4385. static void haptics_ds_suspend_config(struct device *dev)
  4386. {
  4387. struct haptics_chip *chip = dev_get_drvdata(dev);
  4388. if (chip->fifo_empty_irq > 0)
  4389. devm_free_irq(dev, chip->fifo_empty_irq, chip);
  4390. }
  4391. static int haptics_ds_resume_config(struct device *dev)
  4392. {
  4393. struct haptics_chip *chip = dev_get_drvdata(dev);
  4394. int rc = 0;
  4395. rc = haptics_hw_init(chip);
  4396. if (rc < 0) {
  4397. dev_err(chip->dev, "Initialize HW failed, rc = %d\n", rc);
  4398. return rc;
  4399. }
  4400. if (chip->fifo_empty_irq > 0) {
  4401. rc = devm_request_threaded_irq(chip->dev, chip->fifo_empty_irq,
  4402. NULL, fifo_empty_irq_handler,
  4403. IRQF_ONESHOT, "fifo-empty", chip);
  4404. if (rc < 0) {
  4405. dev_err(chip->dev, "request fifo-empty IRQ failed, rc=%d\n",
  4406. rc);
  4407. return rc;
  4408. }
  4409. disable_irq_nosync(chip->fifo_empty_irq);
  4410. chip->fifo_empty_irq_en = false;
  4411. }
  4412. return rc;
  4413. }
  4414. #ifdef CONFIG_PM_SLEEP
  4415. static int haptics_suspend_config(struct device *dev)
  4416. {
  4417. struct haptics_chip *chip = dev_get_drvdata(dev);
  4418. struct haptics_play_info *play = &chip->play;
  4419. int rc;
  4420. mutex_lock(&play->lock);
  4421. if ((play->pattern_src == FIFO) &&
  4422. atomic_read(&play->fifo_status.is_busy)) {
  4423. if (atomic_read(&play->fifo_status.written_done) == 0) {
  4424. dev_dbg(chip->dev, "cancelling FIFO playing\n");
  4425. atomic_set(&play->fifo_status.cancelled, 1);
  4426. }
  4427. rc = haptics_stop_fifo_play(chip);
  4428. if (rc < 0) {
  4429. dev_err(chip->dev, "stop FIFO playing failed, rc=%d\n", rc);
  4430. mutex_unlock(&play->lock);
  4431. return rc;
  4432. }
  4433. } else {
  4434. rc = haptics_enable_play(chip, false);
  4435. if (rc < 0) {
  4436. mutex_unlock(&play->lock);
  4437. return rc;
  4438. }
  4439. }
  4440. mutex_unlock(&play->lock);
  4441. /*
  4442. * Cancel the hBoost turning off timer and disable
  4443. * hBoost if it's still enabled
  4444. */
  4445. if (chip->wa_flags & SW_CTRL_HBST) {
  4446. hrtimer_cancel(&chip->hbst_off_timer);
  4447. haptics_boost_vreg_enable(chip, false);
  4448. }
  4449. rc = haptics_enable_hpwr_vreg(chip, false);
  4450. if (rc < 0)
  4451. return rc;
  4452. return haptics_module_enable(chip, false);
  4453. }
  4454. static int haptics_suspend(struct device *dev)
  4455. {
  4456. struct haptics_chip *chip = dev_get_drvdata(dev);
  4457. int rc = 0;
  4458. if (chip->cfg_revision == HAP_CFG_V1)
  4459. return 0;
  4460. rc = haptics_suspend_config(dev);
  4461. if (rc < 0)
  4462. return rc;
  4463. #ifdef CONFIG_DEEPSLEEP
  4464. if (mem_sleep_current == PM_SUSPEND_MEM)
  4465. haptics_ds_suspend_config(dev);
  4466. #endif
  4467. return 0;
  4468. }
  4469. static int haptics_resume(struct device *dev)
  4470. {
  4471. struct haptics_chip *chip = dev_get_drvdata(dev);
  4472. #ifdef CONFIG_DEEPSLEEP
  4473. if (mem_sleep_current == PM_SUSPEND_MEM) {
  4474. int rc = 0;
  4475. rc = haptics_ds_resume_config(dev);
  4476. if (rc < 0)
  4477. return rc;
  4478. }
  4479. #endif
  4480. return haptics_module_enable(chip, true);
  4481. }
  4482. #endif
  4483. static int haptics_freeze(struct device *dev)
  4484. {
  4485. int rc = 0;
  4486. rc = haptics_suspend_config(dev);
  4487. if (rc < 0)
  4488. return rc;
  4489. haptics_ds_suspend_config(dev);
  4490. return 0;
  4491. }
  4492. static int haptics_restore(struct device *dev)
  4493. {
  4494. struct haptics_chip *chip = dev_get_drvdata(dev);
  4495. int rc = 0;
  4496. rc = haptics_ds_resume_config(dev);
  4497. if (rc < 0)
  4498. return rc;
  4499. return haptics_module_enable(chip, true);
  4500. }
  4501. static void haptics_shutdown(struct platform_device *pdev)
  4502. {
  4503. struct haptics_chip *chip = platform_get_drvdata(pdev);
  4504. haptics_suspend_config(chip->dev);
  4505. haptics_ds_suspend_config(chip->dev);
  4506. }
  4507. static const struct dev_pm_ops haptics_pm_ops = {
  4508. .suspend = haptics_suspend,
  4509. .resume = haptics_resume,
  4510. .freeze = haptics_freeze,
  4511. .restore = haptics_restore,
  4512. };
  4513. static const struct of_device_id haptics_match_table[] = {
  4514. {
  4515. .compatible = "qcom,hv-haptics",
  4516. },
  4517. {
  4518. .compatible = "qcom,pm8350b-haptics",
  4519. },
  4520. {
  4521. .compatible = "qcom,pm5100-haptics",
  4522. },
  4523. {},
  4524. };
  4525. static struct platform_driver haptics_driver = {
  4526. .driver = {
  4527. .name = "qcom-hv-haptics",
  4528. .of_match_table = haptics_match_table,
  4529. .pm = &haptics_pm_ops,
  4530. },
  4531. .probe = haptics_probe,
  4532. .shutdown = haptics_shutdown,
  4533. .remove = haptics_remove,
  4534. };
  4535. module_platform_driver(haptics_driver);
  4536. MODULE_DESCRIPTION("Qualcomm Technologies, Inc. High-Voltage Haptics driver");
  4537. MODULE_LICENSE("GPL v2");