bma150.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) 2011 Bosch Sensortec GmbH
  4. * Copyright (c) 2011 Unixphere
  5. *
  6. * This driver adds support for Bosch Sensortec's digital acceleration
  7. * sensors BMA150 and SMB380.
  8. * The SMB380 is fully compatible with BMA150 and only differs in packaging.
  9. *
  10. * The datasheet for the BMA150 chip can be found here:
  11. * http://www.bosch-sensortec.com/content/language1/downloads/BST-BMA150-DS000-07.pdf
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/input.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/delay.h>
  19. #include <linux/slab.h>
  20. #include <linux/pm.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/bma150.h>
  23. #define ABSMAX_ACC_VAL 0x01FF
  24. #define ABSMIN_ACC_VAL -(ABSMAX_ACC_VAL)
  25. /* Each axis is represented by a 2-byte data word */
  26. #define BMA150_XYZ_DATA_SIZE 6
  27. /* Input poll interval in milliseconds */
  28. #define BMA150_POLL_INTERVAL 10
  29. #define BMA150_POLL_MAX 200
  30. #define BMA150_POLL_MIN 0
  31. #define BMA150_MODE_NORMAL 0
  32. #define BMA150_MODE_SLEEP 2
  33. #define BMA150_MODE_WAKE_UP 3
  34. /* Data register addresses */
  35. #define BMA150_DATA_0_REG 0x00
  36. #define BMA150_DATA_1_REG 0x01
  37. #define BMA150_DATA_2_REG 0x02
  38. /* Control register addresses */
  39. #define BMA150_CTRL_0_REG 0x0A
  40. #define BMA150_CTRL_1_REG 0x0B
  41. #define BMA150_CTRL_2_REG 0x14
  42. #define BMA150_CTRL_3_REG 0x15
  43. /* Configuration/Setting register addresses */
  44. #define BMA150_CFG_0_REG 0x0C
  45. #define BMA150_CFG_1_REG 0x0D
  46. #define BMA150_CFG_2_REG 0x0E
  47. #define BMA150_CFG_3_REG 0x0F
  48. #define BMA150_CFG_4_REG 0x10
  49. #define BMA150_CFG_5_REG 0x11
  50. #define BMA150_CHIP_ID 2
  51. #define BMA150_CHIP_ID_REG BMA150_DATA_0_REG
  52. #define BMA150_ACC_X_LSB_REG BMA150_DATA_2_REG
  53. #define BMA150_SLEEP_POS 0
  54. #define BMA150_SLEEP_MSK 0x01
  55. #define BMA150_SLEEP_REG BMA150_CTRL_0_REG
  56. #define BMA150_BANDWIDTH_POS 0
  57. #define BMA150_BANDWIDTH_MSK 0x07
  58. #define BMA150_BANDWIDTH_REG BMA150_CTRL_2_REG
  59. #define BMA150_RANGE_POS 3
  60. #define BMA150_RANGE_MSK 0x18
  61. #define BMA150_RANGE_REG BMA150_CTRL_2_REG
  62. #define BMA150_WAKE_UP_POS 0
  63. #define BMA150_WAKE_UP_MSK 0x01
  64. #define BMA150_WAKE_UP_REG BMA150_CTRL_3_REG
  65. #define BMA150_SW_RES_POS 1
  66. #define BMA150_SW_RES_MSK 0x02
  67. #define BMA150_SW_RES_REG BMA150_CTRL_0_REG
  68. /* Any-motion interrupt register fields */
  69. #define BMA150_ANY_MOTION_EN_POS 6
  70. #define BMA150_ANY_MOTION_EN_MSK 0x40
  71. #define BMA150_ANY_MOTION_EN_REG BMA150_CTRL_1_REG
  72. #define BMA150_ANY_MOTION_DUR_POS 6
  73. #define BMA150_ANY_MOTION_DUR_MSK 0xC0
  74. #define BMA150_ANY_MOTION_DUR_REG BMA150_CFG_5_REG
  75. #define BMA150_ANY_MOTION_THRES_REG BMA150_CFG_4_REG
  76. /* Advanced interrupt register fields */
  77. #define BMA150_ADV_INT_EN_POS 6
  78. #define BMA150_ADV_INT_EN_MSK 0x40
  79. #define BMA150_ADV_INT_EN_REG BMA150_CTRL_3_REG
  80. /* High-G interrupt register fields */
  81. #define BMA150_HIGH_G_EN_POS 1
  82. #define BMA150_HIGH_G_EN_MSK 0x02
  83. #define BMA150_HIGH_G_EN_REG BMA150_CTRL_1_REG
  84. #define BMA150_HIGH_G_HYST_POS 3
  85. #define BMA150_HIGH_G_HYST_MSK 0x38
  86. #define BMA150_HIGH_G_HYST_REG BMA150_CFG_5_REG
  87. #define BMA150_HIGH_G_DUR_REG BMA150_CFG_3_REG
  88. #define BMA150_HIGH_G_THRES_REG BMA150_CFG_2_REG
  89. /* Low-G interrupt register fields */
  90. #define BMA150_LOW_G_EN_POS 0
  91. #define BMA150_LOW_G_EN_MSK 0x01
  92. #define BMA150_LOW_G_EN_REG BMA150_CTRL_1_REG
  93. #define BMA150_LOW_G_HYST_POS 0
  94. #define BMA150_LOW_G_HYST_MSK 0x07
  95. #define BMA150_LOW_G_HYST_REG BMA150_CFG_5_REG
  96. #define BMA150_LOW_G_DUR_REG BMA150_CFG_1_REG
  97. #define BMA150_LOW_G_THRES_REG BMA150_CFG_0_REG
  98. struct bma150_data {
  99. struct i2c_client *client;
  100. struct input_dev *input;
  101. u8 mode;
  102. };
  103. /*
  104. * The settings for the given range, bandwidth and interrupt features
  105. * are stated and verified by Bosch Sensortec where they are configured
  106. * to provide a generic sensitivity performance.
  107. */
  108. static const struct bma150_cfg default_cfg = {
  109. .any_motion_int = 1,
  110. .hg_int = 1,
  111. .lg_int = 1,
  112. .any_motion_dur = 0,
  113. .any_motion_thres = 0,
  114. .hg_hyst = 0,
  115. .hg_dur = 150,
  116. .hg_thres = 160,
  117. .lg_hyst = 0,
  118. .lg_dur = 150,
  119. .lg_thres = 20,
  120. .range = BMA150_RANGE_2G,
  121. .bandwidth = BMA150_BW_50HZ
  122. };
  123. static int bma150_write_byte(struct i2c_client *client, u8 reg, u8 val)
  124. {
  125. s32 ret;
  126. /* As per specification, disable irq in between register writes */
  127. if (client->irq)
  128. disable_irq_nosync(client->irq);
  129. ret = i2c_smbus_write_byte_data(client, reg, val);
  130. if (client->irq)
  131. enable_irq(client->irq);
  132. return ret;
  133. }
  134. static int bma150_set_reg_bits(struct i2c_client *client,
  135. int val, int shift, u8 mask, u8 reg)
  136. {
  137. int data;
  138. data = i2c_smbus_read_byte_data(client, reg);
  139. if (data < 0)
  140. return data;
  141. data = (data & ~mask) | ((val << shift) & mask);
  142. return bma150_write_byte(client, reg, data);
  143. }
  144. static int bma150_set_mode(struct bma150_data *bma150, u8 mode)
  145. {
  146. int error;
  147. error = bma150_set_reg_bits(bma150->client, mode, BMA150_WAKE_UP_POS,
  148. BMA150_WAKE_UP_MSK, BMA150_WAKE_UP_REG);
  149. if (error)
  150. return error;
  151. error = bma150_set_reg_bits(bma150->client, mode, BMA150_SLEEP_POS,
  152. BMA150_SLEEP_MSK, BMA150_SLEEP_REG);
  153. if (error)
  154. return error;
  155. if (mode == BMA150_MODE_NORMAL)
  156. usleep_range(2000, 2100);
  157. bma150->mode = mode;
  158. return 0;
  159. }
  160. static int bma150_soft_reset(struct bma150_data *bma150)
  161. {
  162. int error;
  163. error = bma150_set_reg_bits(bma150->client, 1, BMA150_SW_RES_POS,
  164. BMA150_SW_RES_MSK, BMA150_SW_RES_REG);
  165. if (error)
  166. return error;
  167. usleep_range(2000, 2100);
  168. return 0;
  169. }
  170. static int bma150_set_range(struct bma150_data *bma150, u8 range)
  171. {
  172. return bma150_set_reg_bits(bma150->client, range, BMA150_RANGE_POS,
  173. BMA150_RANGE_MSK, BMA150_RANGE_REG);
  174. }
  175. static int bma150_set_bandwidth(struct bma150_data *bma150, u8 bw)
  176. {
  177. return bma150_set_reg_bits(bma150->client, bw, BMA150_BANDWIDTH_POS,
  178. BMA150_BANDWIDTH_MSK, BMA150_BANDWIDTH_REG);
  179. }
  180. static int bma150_set_low_g_interrupt(struct bma150_data *bma150,
  181. u8 enable, u8 hyst, u8 dur, u8 thres)
  182. {
  183. int error;
  184. error = bma150_set_reg_bits(bma150->client, hyst,
  185. BMA150_LOW_G_HYST_POS, BMA150_LOW_G_HYST_MSK,
  186. BMA150_LOW_G_HYST_REG);
  187. if (error)
  188. return error;
  189. error = bma150_write_byte(bma150->client, BMA150_LOW_G_DUR_REG, dur);
  190. if (error)
  191. return error;
  192. error = bma150_write_byte(bma150->client, BMA150_LOW_G_THRES_REG, thres);
  193. if (error)
  194. return error;
  195. return bma150_set_reg_bits(bma150->client, !!enable,
  196. BMA150_LOW_G_EN_POS, BMA150_LOW_G_EN_MSK,
  197. BMA150_LOW_G_EN_REG);
  198. }
  199. static int bma150_set_high_g_interrupt(struct bma150_data *bma150,
  200. u8 enable, u8 hyst, u8 dur, u8 thres)
  201. {
  202. int error;
  203. error = bma150_set_reg_bits(bma150->client, hyst,
  204. BMA150_HIGH_G_HYST_POS, BMA150_HIGH_G_HYST_MSK,
  205. BMA150_HIGH_G_HYST_REG);
  206. if (error)
  207. return error;
  208. error = bma150_write_byte(bma150->client,
  209. BMA150_HIGH_G_DUR_REG, dur);
  210. if (error)
  211. return error;
  212. error = bma150_write_byte(bma150->client,
  213. BMA150_HIGH_G_THRES_REG, thres);
  214. if (error)
  215. return error;
  216. return bma150_set_reg_bits(bma150->client, !!enable,
  217. BMA150_HIGH_G_EN_POS, BMA150_HIGH_G_EN_MSK,
  218. BMA150_HIGH_G_EN_REG);
  219. }
  220. static int bma150_set_any_motion_interrupt(struct bma150_data *bma150,
  221. u8 enable, u8 dur, u8 thres)
  222. {
  223. int error;
  224. error = bma150_set_reg_bits(bma150->client, dur,
  225. BMA150_ANY_MOTION_DUR_POS,
  226. BMA150_ANY_MOTION_DUR_MSK,
  227. BMA150_ANY_MOTION_DUR_REG);
  228. if (error)
  229. return error;
  230. error = bma150_write_byte(bma150->client,
  231. BMA150_ANY_MOTION_THRES_REG, thres);
  232. if (error)
  233. return error;
  234. error = bma150_set_reg_bits(bma150->client, !!enable,
  235. BMA150_ADV_INT_EN_POS, BMA150_ADV_INT_EN_MSK,
  236. BMA150_ADV_INT_EN_REG);
  237. if (error)
  238. return error;
  239. return bma150_set_reg_bits(bma150->client, !!enable,
  240. BMA150_ANY_MOTION_EN_POS,
  241. BMA150_ANY_MOTION_EN_MSK,
  242. BMA150_ANY_MOTION_EN_REG);
  243. }
  244. static void bma150_report_xyz(struct bma150_data *bma150)
  245. {
  246. u8 data[BMA150_XYZ_DATA_SIZE];
  247. s16 x, y, z;
  248. s32 ret;
  249. ret = i2c_smbus_read_i2c_block_data(bma150->client,
  250. BMA150_ACC_X_LSB_REG, BMA150_XYZ_DATA_SIZE, data);
  251. if (ret != BMA150_XYZ_DATA_SIZE)
  252. return;
  253. x = ((0xc0 & data[0]) >> 6) | (data[1] << 2);
  254. y = ((0xc0 & data[2]) >> 6) | (data[3] << 2);
  255. z = ((0xc0 & data[4]) >> 6) | (data[5] << 2);
  256. x = sign_extend32(x, 9);
  257. y = sign_extend32(y, 9);
  258. z = sign_extend32(z, 9);
  259. input_report_abs(bma150->input, ABS_X, x);
  260. input_report_abs(bma150->input, ABS_Y, y);
  261. input_report_abs(bma150->input, ABS_Z, z);
  262. input_sync(bma150->input);
  263. }
  264. static irqreturn_t bma150_irq_thread(int irq, void *dev)
  265. {
  266. bma150_report_xyz(dev);
  267. return IRQ_HANDLED;
  268. }
  269. static void bma150_poll(struct input_dev *input)
  270. {
  271. struct bma150_data *bma150 = input_get_drvdata(input);
  272. bma150_report_xyz(bma150);
  273. }
  274. static int bma150_open(struct input_dev *input)
  275. {
  276. struct bma150_data *bma150 = input_get_drvdata(input);
  277. int error;
  278. error = pm_runtime_get_sync(&bma150->client->dev);
  279. if (error < 0 && error != -ENOSYS)
  280. return error;
  281. /*
  282. * See if runtime PM woke up the device. If runtime PM
  283. * is disabled we need to do it ourselves.
  284. */
  285. if (bma150->mode != BMA150_MODE_NORMAL) {
  286. error = bma150_set_mode(bma150, BMA150_MODE_NORMAL);
  287. if (error)
  288. return error;
  289. }
  290. return 0;
  291. }
  292. static void bma150_close(struct input_dev *input)
  293. {
  294. struct bma150_data *bma150 = input_get_drvdata(input);
  295. pm_runtime_put_sync(&bma150->client->dev);
  296. if (bma150->mode != BMA150_MODE_SLEEP)
  297. bma150_set_mode(bma150, BMA150_MODE_SLEEP);
  298. }
  299. static int bma150_initialize(struct bma150_data *bma150,
  300. const struct bma150_cfg *cfg)
  301. {
  302. int error;
  303. error = bma150_soft_reset(bma150);
  304. if (error)
  305. return error;
  306. error = bma150_set_bandwidth(bma150, cfg->bandwidth);
  307. if (error)
  308. return error;
  309. error = bma150_set_range(bma150, cfg->range);
  310. if (error)
  311. return error;
  312. if (bma150->client->irq) {
  313. error = bma150_set_any_motion_interrupt(bma150,
  314. cfg->any_motion_int,
  315. cfg->any_motion_dur,
  316. cfg->any_motion_thres);
  317. if (error)
  318. return error;
  319. error = bma150_set_high_g_interrupt(bma150,
  320. cfg->hg_int, cfg->hg_hyst,
  321. cfg->hg_dur, cfg->hg_thres);
  322. if (error)
  323. return error;
  324. error = bma150_set_low_g_interrupt(bma150,
  325. cfg->lg_int, cfg->lg_hyst,
  326. cfg->lg_dur, cfg->lg_thres);
  327. if (error)
  328. return error;
  329. }
  330. return bma150_set_mode(bma150, BMA150_MODE_SLEEP);
  331. }
  332. static int bma150_probe(struct i2c_client *client,
  333. const struct i2c_device_id *id)
  334. {
  335. const struct bma150_platform_data *pdata =
  336. dev_get_platdata(&client->dev);
  337. const struct bma150_cfg *cfg;
  338. struct bma150_data *bma150;
  339. struct input_dev *idev;
  340. int chip_id;
  341. int error;
  342. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  343. dev_err(&client->dev, "i2c_check_functionality error\n");
  344. return -EIO;
  345. }
  346. chip_id = i2c_smbus_read_byte_data(client, BMA150_CHIP_ID_REG);
  347. if (chip_id != BMA150_CHIP_ID) {
  348. dev_err(&client->dev, "BMA150 chip id error: %d\n", chip_id);
  349. return -EINVAL;
  350. }
  351. bma150 = devm_kzalloc(&client->dev, sizeof(*bma150), GFP_KERNEL);
  352. if (!bma150)
  353. return -ENOMEM;
  354. bma150->client = client;
  355. if (pdata) {
  356. if (pdata->irq_gpio_cfg) {
  357. error = pdata->irq_gpio_cfg();
  358. if (error) {
  359. dev_err(&client->dev,
  360. "IRQ GPIO conf. error %d, error %d\n",
  361. client->irq, error);
  362. return error;
  363. }
  364. }
  365. cfg = &pdata->cfg;
  366. } else {
  367. cfg = &default_cfg;
  368. }
  369. error = bma150_initialize(bma150, cfg);
  370. if (error)
  371. return error;
  372. idev = devm_input_allocate_device(&bma150->client->dev);
  373. if (!idev)
  374. return -ENOMEM;
  375. input_set_drvdata(idev, bma150);
  376. bma150->input = idev;
  377. idev->name = BMA150_DRIVER;
  378. idev->phys = BMA150_DRIVER "/input0";
  379. idev->id.bustype = BUS_I2C;
  380. idev->open = bma150_open;
  381. idev->close = bma150_close;
  382. input_set_abs_params(idev, ABS_X, ABSMIN_ACC_VAL, ABSMAX_ACC_VAL, 0, 0);
  383. input_set_abs_params(idev, ABS_Y, ABSMIN_ACC_VAL, ABSMAX_ACC_VAL, 0, 0);
  384. input_set_abs_params(idev, ABS_Z, ABSMIN_ACC_VAL, ABSMAX_ACC_VAL, 0, 0);
  385. if (client->irq <= 0) {
  386. error = input_setup_polling(idev, bma150_poll);
  387. if (error)
  388. return error;
  389. input_set_poll_interval(idev, BMA150_POLL_INTERVAL);
  390. input_set_min_poll_interval(idev, BMA150_POLL_MIN);
  391. input_set_max_poll_interval(idev, BMA150_POLL_MAX);
  392. }
  393. error = input_register_device(idev);
  394. if (error)
  395. return error;
  396. if (client->irq > 0) {
  397. error = devm_request_threaded_irq(&client->dev, client->irq,
  398. NULL, bma150_irq_thread,
  399. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  400. BMA150_DRIVER, bma150);
  401. if (error) {
  402. dev_err(&client->dev,
  403. "irq request failed %d, error %d\n",
  404. client->irq, error);
  405. return error;
  406. }
  407. }
  408. i2c_set_clientdata(client, bma150);
  409. pm_runtime_enable(&client->dev);
  410. return 0;
  411. }
  412. static void bma150_remove(struct i2c_client *client)
  413. {
  414. pm_runtime_disable(&client->dev);
  415. }
  416. static int __maybe_unused bma150_suspend(struct device *dev)
  417. {
  418. struct i2c_client *client = to_i2c_client(dev);
  419. struct bma150_data *bma150 = i2c_get_clientdata(client);
  420. return bma150_set_mode(bma150, BMA150_MODE_SLEEP);
  421. }
  422. static int __maybe_unused bma150_resume(struct device *dev)
  423. {
  424. struct i2c_client *client = to_i2c_client(dev);
  425. struct bma150_data *bma150 = i2c_get_clientdata(client);
  426. return bma150_set_mode(bma150, BMA150_MODE_NORMAL);
  427. }
  428. static UNIVERSAL_DEV_PM_OPS(bma150_pm, bma150_suspend, bma150_resume, NULL);
  429. static const struct i2c_device_id bma150_id[] = {
  430. { "bma150", 0 },
  431. { "smb380", 0 },
  432. { "bma023", 0 },
  433. { }
  434. };
  435. MODULE_DEVICE_TABLE(i2c, bma150_id);
  436. static struct i2c_driver bma150_driver = {
  437. .driver = {
  438. .name = BMA150_DRIVER,
  439. .pm = &bma150_pm,
  440. },
  441. .class = I2C_CLASS_HWMON,
  442. .id_table = bma150_id,
  443. .probe = bma150_probe,
  444. .remove = bma150_remove,
  445. };
  446. module_i2c_driver(bma150_driver);
  447. MODULE_AUTHOR("Albert Zhang <[email protected]>");
  448. MODULE_DESCRIPTION("BMA150 driver");
  449. MODULE_LICENSE("GPL");