tcs3472.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * tcs3472.c - Support for TAOS TCS3472 color light-to-digital converter
  4. *
  5. * Copyright (c) 2013 Peter Meerwald <[email protected]>
  6. *
  7. * Color light sensor with 16-bit channels for red, green, blue, clear);
  8. * 7-bit I2C slave address 0x39 (TCS34721, TCS34723) or 0x29 (TCS34725,
  9. * TCS34727)
  10. *
  11. * Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
  12. *
  13. * TODO: wait time
  14. */
  15. #include <linux/module.h>
  16. #include <linux/i2c.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #include <linux/iio/events.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include <linux/iio/buffer.h>
  24. #include <linux/iio/triggered_buffer.h>
  25. #define TCS3472_DRV_NAME "tcs3472"
  26. #define TCS3472_COMMAND BIT(7)
  27. #define TCS3472_AUTO_INCR BIT(5)
  28. #define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6))
  29. #define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06)
  30. #define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
  31. #define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
  32. #define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
  33. #define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04)
  34. #define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06)
  35. #define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
  36. #define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
  37. #define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
  38. #define TCS3472_ID (TCS3472_COMMAND | 0x12)
  39. #define TCS3472_STATUS (TCS3472_COMMAND | 0x13)
  40. #define TCS3472_CDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x14)
  41. #define TCS3472_RDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x16)
  42. #define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
  43. #define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
  44. #define TCS3472_STATUS_AINT BIT(4)
  45. #define TCS3472_STATUS_AVALID BIT(0)
  46. #define TCS3472_ENABLE_AIEN BIT(4)
  47. #define TCS3472_ENABLE_AEN BIT(1)
  48. #define TCS3472_ENABLE_PON BIT(0)
  49. #define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
  50. struct tcs3472_data {
  51. struct i2c_client *client;
  52. struct mutex lock;
  53. u16 low_thresh;
  54. u16 high_thresh;
  55. u8 enable;
  56. u8 control;
  57. u8 atime;
  58. u8 apers;
  59. /* Ensure timestamp is naturally aligned */
  60. struct {
  61. u16 chans[4];
  62. s64 timestamp __aligned(8);
  63. } scan;
  64. };
  65. static const struct iio_event_spec tcs3472_events[] = {
  66. {
  67. .type = IIO_EV_TYPE_THRESH,
  68. .dir = IIO_EV_DIR_RISING,
  69. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  70. }, {
  71. .type = IIO_EV_TYPE_THRESH,
  72. .dir = IIO_EV_DIR_FALLING,
  73. .mask_separate = BIT(IIO_EV_INFO_VALUE),
  74. }, {
  75. .type = IIO_EV_TYPE_THRESH,
  76. .dir = IIO_EV_DIR_EITHER,
  77. .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
  78. BIT(IIO_EV_INFO_PERIOD),
  79. },
  80. };
  81. #define TCS3472_CHANNEL(_color, _si, _addr) { \
  82. .type = IIO_INTENSITY, \
  83. .modified = 1, \
  84. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  85. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
  86. BIT(IIO_CHAN_INFO_INT_TIME), \
  87. .channel2 = IIO_MOD_LIGHT_##_color, \
  88. .address = _addr, \
  89. .scan_index = _si, \
  90. .scan_type = { \
  91. .sign = 'u', \
  92. .realbits = 16, \
  93. .storagebits = 16, \
  94. .endianness = IIO_CPU, \
  95. }, \
  96. .event_spec = _si ? NULL : tcs3472_events, \
  97. .num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \
  98. }
  99. static const int tcs3472_agains[] = { 1, 4, 16, 60 };
  100. static const struct iio_chan_spec tcs3472_channels[] = {
  101. TCS3472_CHANNEL(CLEAR, 0, TCS3472_CDATA),
  102. TCS3472_CHANNEL(RED, 1, TCS3472_RDATA),
  103. TCS3472_CHANNEL(GREEN, 2, TCS3472_GDATA),
  104. TCS3472_CHANNEL(BLUE, 3, TCS3472_BDATA),
  105. IIO_CHAN_SOFT_TIMESTAMP(4),
  106. };
  107. static int tcs3472_req_data(struct tcs3472_data *data)
  108. {
  109. int tries = 50;
  110. int ret;
  111. while (tries--) {
  112. ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
  113. if (ret < 0)
  114. return ret;
  115. if (ret & TCS3472_STATUS_AVALID)
  116. break;
  117. msleep(20);
  118. }
  119. if (tries < 0) {
  120. dev_err(&data->client->dev, "data not ready\n");
  121. return -EIO;
  122. }
  123. return 0;
  124. }
  125. static int tcs3472_read_raw(struct iio_dev *indio_dev,
  126. struct iio_chan_spec const *chan,
  127. int *val, int *val2, long mask)
  128. {
  129. struct tcs3472_data *data = iio_priv(indio_dev);
  130. int ret;
  131. switch (mask) {
  132. case IIO_CHAN_INFO_RAW:
  133. ret = iio_device_claim_direct_mode(indio_dev);
  134. if (ret)
  135. return ret;
  136. ret = tcs3472_req_data(data);
  137. if (ret < 0) {
  138. iio_device_release_direct_mode(indio_dev);
  139. return ret;
  140. }
  141. ret = i2c_smbus_read_word_data(data->client, chan->address);
  142. iio_device_release_direct_mode(indio_dev);
  143. if (ret < 0)
  144. return ret;
  145. *val = ret;
  146. return IIO_VAL_INT;
  147. case IIO_CHAN_INFO_CALIBSCALE:
  148. *val = tcs3472_agains[data->control &
  149. TCS3472_CONTROL_AGAIN_MASK];
  150. return IIO_VAL_INT;
  151. case IIO_CHAN_INFO_INT_TIME:
  152. *val = 0;
  153. *val2 = (256 - data->atime) * 2400;
  154. return IIO_VAL_INT_PLUS_MICRO;
  155. }
  156. return -EINVAL;
  157. }
  158. static int tcs3472_write_raw(struct iio_dev *indio_dev,
  159. struct iio_chan_spec const *chan,
  160. int val, int val2, long mask)
  161. {
  162. struct tcs3472_data *data = iio_priv(indio_dev);
  163. int i;
  164. switch (mask) {
  165. case IIO_CHAN_INFO_CALIBSCALE:
  166. if (val2 != 0)
  167. return -EINVAL;
  168. for (i = 0; i < ARRAY_SIZE(tcs3472_agains); i++) {
  169. if (val == tcs3472_agains[i]) {
  170. data->control &= ~TCS3472_CONTROL_AGAIN_MASK;
  171. data->control |= i;
  172. return i2c_smbus_write_byte_data(
  173. data->client, TCS3472_CONTROL,
  174. data->control);
  175. }
  176. }
  177. return -EINVAL;
  178. case IIO_CHAN_INFO_INT_TIME:
  179. if (val != 0)
  180. return -EINVAL;
  181. for (i = 0; i < 256; i++) {
  182. if (val2 == (256 - i) * 2400) {
  183. data->atime = i;
  184. return i2c_smbus_write_byte_data(
  185. data->client, TCS3472_ATIME,
  186. data->atime);
  187. }
  188. }
  189. return -EINVAL;
  190. }
  191. return -EINVAL;
  192. }
  193. /*
  194. * Translation from APERS field value to the number of consecutive out-of-range
  195. * clear channel values before an interrupt is generated
  196. */
  197. static const int tcs3472_intr_pers[] = {
  198. 0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60
  199. };
  200. static int tcs3472_read_event(struct iio_dev *indio_dev,
  201. const struct iio_chan_spec *chan, enum iio_event_type type,
  202. enum iio_event_direction dir, enum iio_event_info info, int *val,
  203. int *val2)
  204. {
  205. struct tcs3472_data *data = iio_priv(indio_dev);
  206. int ret;
  207. unsigned int period;
  208. mutex_lock(&data->lock);
  209. switch (info) {
  210. case IIO_EV_INFO_VALUE:
  211. *val = (dir == IIO_EV_DIR_RISING) ?
  212. data->high_thresh : data->low_thresh;
  213. ret = IIO_VAL_INT;
  214. break;
  215. case IIO_EV_INFO_PERIOD:
  216. period = (256 - data->atime) * 2400 *
  217. tcs3472_intr_pers[data->apers];
  218. *val = period / USEC_PER_SEC;
  219. *val2 = period % USEC_PER_SEC;
  220. ret = IIO_VAL_INT_PLUS_MICRO;
  221. break;
  222. default:
  223. ret = -EINVAL;
  224. break;
  225. }
  226. mutex_unlock(&data->lock);
  227. return ret;
  228. }
  229. static int tcs3472_write_event(struct iio_dev *indio_dev,
  230. const struct iio_chan_spec *chan, enum iio_event_type type,
  231. enum iio_event_direction dir, enum iio_event_info info, int val,
  232. int val2)
  233. {
  234. struct tcs3472_data *data = iio_priv(indio_dev);
  235. int ret;
  236. u8 command;
  237. int period;
  238. int i;
  239. mutex_lock(&data->lock);
  240. switch (info) {
  241. case IIO_EV_INFO_VALUE:
  242. switch (dir) {
  243. case IIO_EV_DIR_RISING:
  244. command = TCS3472_AIHT;
  245. break;
  246. case IIO_EV_DIR_FALLING:
  247. command = TCS3472_AILT;
  248. break;
  249. default:
  250. ret = -EINVAL;
  251. goto error;
  252. }
  253. ret = i2c_smbus_write_word_data(data->client, command, val);
  254. if (ret)
  255. goto error;
  256. if (dir == IIO_EV_DIR_RISING)
  257. data->high_thresh = val;
  258. else
  259. data->low_thresh = val;
  260. break;
  261. case IIO_EV_INFO_PERIOD:
  262. period = val * USEC_PER_SEC + val2;
  263. for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) {
  264. if (period <= (256 - data->atime) * 2400 *
  265. tcs3472_intr_pers[i])
  266. break;
  267. }
  268. ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i);
  269. if (ret)
  270. goto error;
  271. data->apers = i;
  272. break;
  273. default:
  274. ret = -EINVAL;
  275. break;
  276. }
  277. error:
  278. mutex_unlock(&data->lock);
  279. return ret;
  280. }
  281. static int tcs3472_read_event_config(struct iio_dev *indio_dev,
  282. const struct iio_chan_spec *chan, enum iio_event_type type,
  283. enum iio_event_direction dir)
  284. {
  285. struct tcs3472_data *data = iio_priv(indio_dev);
  286. int ret;
  287. mutex_lock(&data->lock);
  288. ret = !!(data->enable & TCS3472_ENABLE_AIEN);
  289. mutex_unlock(&data->lock);
  290. return ret;
  291. }
  292. static int tcs3472_write_event_config(struct iio_dev *indio_dev,
  293. const struct iio_chan_spec *chan, enum iio_event_type type,
  294. enum iio_event_direction dir, int state)
  295. {
  296. struct tcs3472_data *data = iio_priv(indio_dev);
  297. int ret = 0;
  298. u8 enable_old;
  299. mutex_lock(&data->lock);
  300. enable_old = data->enable;
  301. if (state)
  302. data->enable |= TCS3472_ENABLE_AIEN;
  303. else
  304. data->enable &= ~TCS3472_ENABLE_AIEN;
  305. if (enable_old != data->enable) {
  306. ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
  307. data->enable);
  308. if (ret)
  309. data->enable = enable_old;
  310. }
  311. mutex_unlock(&data->lock);
  312. return ret;
  313. }
  314. static irqreturn_t tcs3472_event_handler(int irq, void *priv)
  315. {
  316. struct iio_dev *indio_dev = priv;
  317. struct tcs3472_data *data = iio_priv(indio_dev);
  318. int ret;
  319. ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
  320. if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) {
  321. iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
  322. IIO_EV_TYPE_THRESH,
  323. IIO_EV_DIR_EITHER),
  324. iio_get_time_ns(indio_dev));
  325. i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR);
  326. }
  327. return IRQ_HANDLED;
  328. }
  329. static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
  330. {
  331. struct iio_poll_func *pf = p;
  332. struct iio_dev *indio_dev = pf->indio_dev;
  333. struct tcs3472_data *data = iio_priv(indio_dev);
  334. int i, j = 0;
  335. int ret = tcs3472_req_data(data);
  336. if (ret < 0)
  337. goto done;
  338. for_each_set_bit(i, indio_dev->active_scan_mask,
  339. indio_dev->masklength) {
  340. ret = i2c_smbus_read_word_data(data->client,
  341. TCS3472_CDATA + 2*i);
  342. if (ret < 0)
  343. goto done;
  344. data->scan.chans[j++] = ret;
  345. }
  346. iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
  347. iio_get_time_ns(indio_dev));
  348. done:
  349. iio_trigger_notify_done(indio_dev->trig);
  350. return IRQ_HANDLED;
  351. }
  352. static ssize_t tcs3472_show_int_time_available(struct device *dev,
  353. struct device_attribute *attr,
  354. char *buf)
  355. {
  356. size_t len = 0;
  357. int i;
  358. for (i = 1; i <= 256; i++)
  359. len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06d ",
  360. 2400 * i);
  361. /* replace trailing space by newline */
  362. buf[len - 1] = '\n';
  363. return len;
  364. }
  365. static IIO_CONST_ATTR(calibscale_available, "1 4 16 60");
  366. static IIO_DEV_ATTR_INT_TIME_AVAIL(tcs3472_show_int_time_available);
  367. static struct attribute *tcs3472_attributes[] = {
  368. &iio_const_attr_calibscale_available.dev_attr.attr,
  369. &iio_dev_attr_integration_time_available.dev_attr.attr,
  370. NULL
  371. };
  372. static const struct attribute_group tcs3472_attribute_group = {
  373. .attrs = tcs3472_attributes,
  374. };
  375. static const struct iio_info tcs3472_info = {
  376. .read_raw = tcs3472_read_raw,
  377. .write_raw = tcs3472_write_raw,
  378. .read_event_value = tcs3472_read_event,
  379. .write_event_value = tcs3472_write_event,
  380. .read_event_config = tcs3472_read_event_config,
  381. .write_event_config = tcs3472_write_event_config,
  382. .attrs = &tcs3472_attribute_group,
  383. };
  384. static int tcs3472_probe(struct i2c_client *client,
  385. const struct i2c_device_id *id)
  386. {
  387. struct tcs3472_data *data;
  388. struct iio_dev *indio_dev;
  389. int ret;
  390. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  391. if (indio_dev == NULL)
  392. return -ENOMEM;
  393. data = iio_priv(indio_dev);
  394. i2c_set_clientdata(client, indio_dev);
  395. data->client = client;
  396. mutex_init(&data->lock);
  397. indio_dev->info = &tcs3472_info;
  398. indio_dev->name = TCS3472_DRV_NAME;
  399. indio_dev->channels = tcs3472_channels;
  400. indio_dev->num_channels = ARRAY_SIZE(tcs3472_channels);
  401. indio_dev->modes = INDIO_DIRECT_MODE;
  402. ret = i2c_smbus_read_byte_data(data->client, TCS3472_ID);
  403. if (ret < 0)
  404. return ret;
  405. if (ret == 0x44)
  406. dev_info(&client->dev, "TCS34721/34725 found\n");
  407. else if (ret == 0x4d)
  408. dev_info(&client->dev, "TCS34723/34727 found\n");
  409. else
  410. return -ENODEV;
  411. ret = i2c_smbus_read_byte_data(data->client, TCS3472_CONTROL);
  412. if (ret < 0)
  413. return ret;
  414. data->control = ret;
  415. ret = i2c_smbus_read_byte_data(data->client, TCS3472_ATIME);
  416. if (ret < 0)
  417. return ret;
  418. data->atime = ret;
  419. ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT);
  420. if (ret < 0)
  421. return ret;
  422. data->low_thresh = ret;
  423. ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT);
  424. if (ret < 0)
  425. return ret;
  426. data->high_thresh = ret;
  427. data->apers = 1;
  428. ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS,
  429. data->apers);
  430. if (ret < 0)
  431. return ret;
  432. ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
  433. if (ret < 0)
  434. return ret;
  435. /* enable device */
  436. data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
  437. data->enable &= ~TCS3472_ENABLE_AIEN;
  438. ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
  439. data->enable);
  440. if (ret < 0)
  441. return ret;
  442. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  443. tcs3472_trigger_handler, NULL);
  444. if (ret < 0)
  445. return ret;
  446. if (client->irq) {
  447. ret = request_threaded_irq(client->irq, NULL,
  448. tcs3472_event_handler,
  449. IRQF_TRIGGER_FALLING | IRQF_SHARED |
  450. IRQF_ONESHOT,
  451. client->name, indio_dev);
  452. if (ret)
  453. goto buffer_cleanup;
  454. }
  455. ret = iio_device_register(indio_dev);
  456. if (ret < 0)
  457. goto free_irq;
  458. return 0;
  459. free_irq:
  460. if (client->irq)
  461. free_irq(client->irq, indio_dev);
  462. buffer_cleanup:
  463. iio_triggered_buffer_cleanup(indio_dev);
  464. return ret;
  465. }
  466. static int tcs3472_powerdown(struct tcs3472_data *data)
  467. {
  468. int ret;
  469. u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
  470. mutex_lock(&data->lock);
  471. ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
  472. data->enable & ~enable_mask);
  473. if (!ret)
  474. data->enable &= ~enable_mask;
  475. mutex_unlock(&data->lock);
  476. return ret;
  477. }
  478. static void tcs3472_remove(struct i2c_client *client)
  479. {
  480. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  481. iio_device_unregister(indio_dev);
  482. if (client->irq)
  483. free_irq(client->irq, indio_dev);
  484. iio_triggered_buffer_cleanup(indio_dev);
  485. tcs3472_powerdown(iio_priv(indio_dev));
  486. }
  487. static int tcs3472_suspend(struct device *dev)
  488. {
  489. struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
  490. to_i2c_client(dev)));
  491. return tcs3472_powerdown(data);
  492. }
  493. static int tcs3472_resume(struct device *dev)
  494. {
  495. struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
  496. to_i2c_client(dev)));
  497. int ret;
  498. u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
  499. mutex_lock(&data->lock);
  500. ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
  501. data->enable | enable_mask);
  502. if (!ret)
  503. data->enable |= enable_mask;
  504. mutex_unlock(&data->lock);
  505. return ret;
  506. }
  507. static DEFINE_SIMPLE_DEV_PM_OPS(tcs3472_pm_ops, tcs3472_suspend,
  508. tcs3472_resume);
  509. static const struct i2c_device_id tcs3472_id[] = {
  510. { "tcs3472", 0 },
  511. { }
  512. };
  513. MODULE_DEVICE_TABLE(i2c, tcs3472_id);
  514. static struct i2c_driver tcs3472_driver = {
  515. .driver = {
  516. .name = TCS3472_DRV_NAME,
  517. .pm = pm_sleep_ptr(&tcs3472_pm_ops),
  518. },
  519. .probe = tcs3472_probe,
  520. .remove = tcs3472_remove,
  521. .id_table = tcs3472_id,
  522. };
  523. module_i2c_driver(tcs3472_driver);
  524. MODULE_AUTHOR("Peter Meerwald <[email protected]>");
  525. MODULE_DESCRIPTION("TCS3472 color light sensors driver");
  526. MODULE_LICENSE("GPL");