si1133.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * si1133.c - Support for Silabs SI1133 combined ambient
  4. * light and UV index sensors
  5. *
  6. * Copyright 2018 Maxime Roussin-Belanger <[email protected]>
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/module.h>
  12. #include <linux/regmap.h>
  13. #include <linux/iio/iio.h>
  14. #include <linux/iio/sysfs.h>
  15. #include <linux/util_macros.h>
  16. #include <asm/unaligned.h>
  17. #define SI1133_REG_PART_ID 0x00
  18. #define SI1133_REG_REV_ID 0x01
  19. #define SI1133_REG_MFR_ID 0x02
  20. #define SI1133_REG_INFO0 0x03
  21. #define SI1133_REG_INFO1 0x04
  22. #define SI1133_PART_ID 0x33
  23. #define SI1133_REG_HOSTIN0 0x0A
  24. #define SI1133_REG_COMMAND 0x0B
  25. #define SI1133_REG_IRQ_ENABLE 0x0F
  26. #define SI1133_REG_RESPONSE1 0x10
  27. #define SI1133_REG_RESPONSE0 0x11
  28. #define SI1133_REG_IRQ_STATUS 0x12
  29. #define SI1133_REG_MEAS_RATE 0x1A
  30. #define SI1133_IRQ_CHANNEL_ENABLE 0xF
  31. #define SI1133_CMD_RESET_CTR 0x00
  32. #define SI1133_CMD_RESET_SW 0x01
  33. #define SI1133_CMD_FORCE 0x11
  34. #define SI1133_CMD_START_AUTONOMOUS 0x13
  35. #define SI1133_CMD_PARAM_SET 0x80
  36. #define SI1133_CMD_PARAM_QUERY 0x40
  37. #define SI1133_CMD_PARAM_MASK 0x3F
  38. #define SI1133_CMD_ERR_MASK BIT(4)
  39. #define SI1133_CMD_SEQ_MASK 0xF
  40. #define SI1133_MAX_CMD_CTR 0xF
  41. #define SI1133_PARAM_REG_CHAN_LIST 0x01
  42. #define SI1133_PARAM_REG_ADCCONFIG(x) ((x) * 4) + 2
  43. #define SI1133_PARAM_REG_ADCSENS(x) ((x) * 4) + 3
  44. #define SI1133_PARAM_REG_ADCPOST(x) ((x) * 4) + 4
  45. #define SI1133_ADCMUX_MASK 0x1F
  46. #define SI1133_ADCCONFIG_DECIM_RATE(x) (x) << 5
  47. #define SI1133_ADCSENS_SCALE_MASK 0x70
  48. #define SI1133_ADCSENS_SCALE_SHIFT 4
  49. #define SI1133_ADCSENS_HSIG_MASK BIT(7)
  50. #define SI1133_ADCSENS_HSIG_SHIFT 7
  51. #define SI1133_ADCSENS_HW_GAIN_MASK 0xF
  52. #define SI1133_ADCSENS_NB_MEAS(x) fls(x) << SI1133_ADCSENS_SCALE_SHIFT
  53. #define SI1133_ADCPOST_24BIT_EN BIT(6)
  54. #define SI1133_ADCPOST_POSTSHIFT_BITQTY(x) (x & GENMASK(2, 0)) << 3
  55. #define SI1133_PARAM_ADCMUX_SMALL_IR 0x0
  56. #define SI1133_PARAM_ADCMUX_MED_IR 0x1
  57. #define SI1133_PARAM_ADCMUX_LARGE_IR 0x2
  58. #define SI1133_PARAM_ADCMUX_WHITE 0xB
  59. #define SI1133_PARAM_ADCMUX_LARGE_WHITE 0xD
  60. #define SI1133_PARAM_ADCMUX_UV 0x18
  61. #define SI1133_PARAM_ADCMUX_UV_DEEP 0x19
  62. #define SI1133_ERR_INVALID_CMD 0x0
  63. #define SI1133_ERR_INVALID_LOCATION_CMD 0x1
  64. #define SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION 0x2
  65. #define SI1133_ERR_OUTPUT_BUFFER_OVERFLOW 0x3
  66. #define SI1133_COMPLETION_TIMEOUT_MS 500
  67. #define SI1133_CMD_MINSLEEP_US_LOW 5000
  68. #define SI1133_CMD_MINSLEEP_US_HIGH 7500
  69. #define SI1133_CMD_TIMEOUT_MS 25
  70. #define SI1133_CMD_LUX_TIMEOUT_MS 5000
  71. #define SI1133_CMD_TIMEOUT_US SI1133_CMD_TIMEOUT_MS * 1000
  72. #define SI1133_REG_HOSTOUT(x) (x) + 0x13
  73. #define SI1133_MEASUREMENT_FREQUENCY 1250
  74. #define SI1133_X_ORDER_MASK 0x0070
  75. #define SI1133_Y_ORDER_MASK 0x0007
  76. #define si1133_get_x_order(m) ((m) & SI1133_X_ORDER_MASK) >> 4
  77. #define si1133_get_y_order(m) ((m) & SI1133_Y_ORDER_MASK)
  78. #define SI1133_LUX_ADC_MASK 0xE
  79. #define SI1133_ADC_THRESHOLD 16000
  80. #define SI1133_INPUT_FRACTION_HIGH 7
  81. #define SI1133_INPUT_FRACTION_LOW 15
  82. #define SI1133_LUX_OUTPUT_FRACTION 12
  83. #define SI1133_LUX_BUFFER_SIZE 9
  84. #define SI1133_MEASURE_BUFFER_SIZE 3
  85. static const int si1133_scale_available[] = {
  86. 1, 2, 4, 8, 16, 32, 64, 128};
  87. static IIO_CONST_ATTR(scale_available, "1 2 4 8 16 32 64 128");
  88. static IIO_CONST_ATTR_INT_TIME_AVAIL("0.0244 0.0488 0.0975 0.195 0.390 0.780 "
  89. "1.560 3.120 6.24 12.48 25.0 50.0");
  90. /* A.K.A. HW_GAIN in datasheet */
  91. enum si1133_int_time {
  92. _24_4_us = 0,
  93. _48_8_us = 1,
  94. _97_5_us = 2,
  95. _195_0_us = 3,
  96. _390_0_us = 4,
  97. _780_0_us = 5,
  98. _1_560_0_us = 6,
  99. _3_120_0_us = 7,
  100. _6_240_0_us = 8,
  101. _12_480_0_us = 9,
  102. _25_ms = 10,
  103. _50_ms = 11,
  104. };
  105. /* Integration time in milliseconds, nanoseconds */
  106. static const int si1133_int_time_table[][2] = {
  107. [_24_4_us] = {0, 24400},
  108. [_48_8_us] = {0, 48800},
  109. [_97_5_us] = {0, 97500},
  110. [_195_0_us] = {0, 195000},
  111. [_390_0_us] = {0, 390000},
  112. [_780_0_us] = {0, 780000},
  113. [_1_560_0_us] = {1, 560000},
  114. [_3_120_0_us] = {3, 120000},
  115. [_6_240_0_us] = {6, 240000},
  116. [_12_480_0_us] = {12, 480000},
  117. [_25_ms] = {25, 000000},
  118. [_50_ms] = {50, 000000},
  119. };
  120. static const struct regmap_range si1133_reg_ranges[] = {
  121. regmap_reg_range(0x00, 0x02),
  122. regmap_reg_range(0x0A, 0x0B),
  123. regmap_reg_range(0x0F, 0x0F),
  124. regmap_reg_range(0x10, 0x12),
  125. regmap_reg_range(0x13, 0x2C),
  126. };
  127. static const struct regmap_range si1133_reg_ro_ranges[] = {
  128. regmap_reg_range(0x00, 0x02),
  129. regmap_reg_range(0x10, 0x2C),
  130. };
  131. static const struct regmap_range si1133_precious_ranges[] = {
  132. regmap_reg_range(0x12, 0x12),
  133. };
  134. static const struct regmap_access_table si1133_write_ranges_table = {
  135. .yes_ranges = si1133_reg_ranges,
  136. .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges),
  137. .no_ranges = si1133_reg_ro_ranges,
  138. .n_no_ranges = ARRAY_SIZE(si1133_reg_ro_ranges),
  139. };
  140. static const struct regmap_access_table si1133_read_ranges_table = {
  141. .yes_ranges = si1133_reg_ranges,
  142. .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges),
  143. };
  144. static const struct regmap_access_table si1133_precious_table = {
  145. .yes_ranges = si1133_precious_ranges,
  146. .n_yes_ranges = ARRAY_SIZE(si1133_precious_ranges),
  147. };
  148. static const struct regmap_config si1133_regmap_config = {
  149. .reg_bits = 8,
  150. .val_bits = 8,
  151. .max_register = 0x2C,
  152. .wr_table = &si1133_write_ranges_table,
  153. .rd_table = &si1133_read_ranges_table,
  154. .precious_table = &si1133_precious_table,
  155. };
  156. struct si1133_data {
  157. struct regmap *regmap;
  158. struct i2c_client *client;
  159. /* Lock protecting one command at a time can be processed */
  160. struct mutex mutex;
  161. int rsp_seq;
  162. u8 scan_mask;
  163. u8 adc_sens[6];
  164. u8 adc_config[6];
  165. struct completion completion;
  166. };
  167. struct si1133_coeff {
  168. s16 info;
  169. u16 mag;
  170. };
  171. struct si1133_lux_coeff {
  172. struct si1133_coeff coeff_high[4];
  173. struct si1133_coeff coeff_low[9];
  174. };
  175. static const struct si1133_lux_coeff lux_coeff = {
  176. {
  177. { 0, 209},
  178. { 1665, 93},
  179. { 2064, 65},
  180. {-2671, 234}
  181. },
  182. {
  183. { 0, 0},
  184. { 1921, 29053},
  185. {-1022, 36363},
  186. { 2320, 20789},
  187. { -367, 57909},
  188. {-1774, 38240},
  189. { -608, 46775},
  190. {-1503, 51831},
  191. {-1886, 58928}
  192. }
  193. };
  194. static int si1133_calculate_polynomial_inner(s32 input, u8 fraction, u16 mag,
  195. s8 shift)
  196. {
  197. return ((input << fraction) / mag) << shift;
  198. }
  199. static int si1133_calculate_output(s32 x, s32 y, u8 x_order, u8 y_order,
  200. u8 input_fraction, s8 sign,
  201. const struct si1133_coeff *coeffs)
  202. {
  203. s8 shift;
  204. int x1 = 1;
  205. int x2 = 1;
  206. int y1 = 1;
  207. int y2 = 1;
  208. shift = ((u16)coeffs->info & 0xFF00) >> 8;
  209. shift ^= 0xFF;
  210. shift += 1;
  211. shift = -shift;
  212. if (x_order > 0) {
  213. x1 = si1133_calculate_polynomial_inner(x, input_fraction,
  214. coeffs->mag, shift);
  215. if (x_order > 1)
  216. x2 = x1;
  217. }
  218. if (y_order > 0) {
  219. y1 = si1133_calculate_polynomial_inner(y, input_fraction,
  220. coeffs->mag, shift);
  221. if (y_order > 1)
  222. y2 = y1;
  223. }
  224. return sign * x1 * x2 * y1 * y2;
  225. }
  226. /*
  227. * The algorithm is from:
  228. * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00716
  229. */
  230. static int si1133_calc_polynomial(s32 x, s32 y, u8 input_fraction, u8 num_coeff,
  231. const struct si1133_coeff *coeffs)
  232. {
  233. u8 x_order, y_order;
  234. u8 counter;
  235. s8 sign;
  236. int output = 0;
  237. for (counter = 0; counter < num_coeff; counter++) {
  238. if (coeffs->info < 0)
  239. sign = -1;
  240. else
  241. sign = 1;
  242. x_order = si1133_get_x_order(coeffs->info);
  243. y_order = si1133_get_y_order(coeffs->info);
  244. if ((x_order == 0) && (y_order == 0))
  245. output +=
  246. sign * coeffs->mag << SI1133_LUX_OUTPUT_FRACTION;
  247. else
  248. output += si1133_calculate_output(x, y, x_order,
  249. y_order,
  250. input_fraction, sign,
  251. coeffs);
  252. coeffs++;
  253. }
  254. return abs(output);
  255. }
  256. static int si1133_cmd_reset_sw(struct si1133_data *data)
  257. {
  258. struct device *dev = &data->client->dev;
  259. unsigned int resp;
  260. unsigned long timeout;
  261. int err;
  262. err = regmap_write(data->regmap, SI1133_REG_COMMAND,
  263. SI1133_CMD_RESET_SW);
  264. if (err)
  265. return err;
  266. timeout = jiffies + msecs_to_jiffies(SI1133_CMD_TIMEOUT_MS);
  267. while (true) {
  268. err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp);
  269. if (err == -ENXIO) {
  270. usleep_range(SI1133_CMD_MINSLEEP_US_LOW,
  271. SI1133_CMD_MINSLEEP_US_HIGH);
  272. continue;
  273. }
  274. if ((resp & SI1133_MAX_CMD_CTR) == SI1133_MAX_CMD_CTR)
  275. break;
  276. if (time_after(jiffies, timeout)) {
  277. dev_warn(dev, "Timeout on reset ctr resp: %d\n", resp);
  278. return -ETIMEDOUT;
  279. }
  280. }
  281. if (!err)
  282. data->rsp_seq = SI1133_MAX_CMD_CTR;
  283. return err;
  284. }
  285. static int si1133_parse_response_err(struct device *dev, u32 resp, u8 cmd)
  286. {
  287. resp &= 0xF;
  288. switch (resp) {
  289. case SI1133_ERR_OUTPUT_BUFFER_OVERFLOW:
  290. dev_warn(dev, "Output buffer overflow: 0x%02x\n", cmd);
  291. return -EOVERFLOW;
  292. case SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION:
  293. dev_warn(dev, "Saturation of the ADC or overflow of accumulation: 0x%02x\n",
  294. cmd);
  295. return -EOVERFLOW;
  296. case SI1133_ERR_INVALID_LOCATION_CMD:
  297. dev_warn(dev,
  298. "Parameter access to an invalid location: 0x%02x\n",
  299. cmd);
  300. return -EINVAL;
  301. case SI1133_ERR_INVALID_CMD:
  302. dev_warn(dev, "Invalid command 0x%02x\n", cmd);
  303. return -EINVAL;
  304. default:
  305. dev_warn(dev, "Unknown error 0x%02x\n", cmd);
  306. return -EINVAL;
  307. }
  308. }
  309. static int si1133_cmd_reset_counter(struct si1133_data *data)
  310. {
  311. int err = regmap_write(data->regmap, SI1133_REG_COMMAND,
  312. SI1133_CMD_RESET_CTR);
  313. if (err)
  314. return err;
  315. data->rsp_seq = 0;
  316. return 0;
  317. }
  318. static int si1133_command(struct si1133_data *data, u8 cmd)
  319. {
  320. struct device *dev = &data->client->dev;
  321. u32 resp;
  322. int err;
  323. int expected_seq;
  324. mutex_lock(&data->mutex);
  325. expected_seq = (data->rsp_seq + 1) & SI1133_MAX_CMD_CTR;
  326. if (cmd == SI1133_CMD_FORCE)
  327. reinit_completion(&data->completion);
  328. err = regmap_write(data->regmap, SI1133_REG_COMMAND, cmd);
  329. if (err) {
  330. dev_warn(dev, "Failed to write command 0x%02x, ret=%d\n", cmd,
  331. err);
  332. goto out;
  333. }
  334. if (cmd == SI1133_CMD_FORCE) {
  335. /* wait for irq */
  336. if (!wait_for_completion_timeout(&data->completion,
  337. msecs_to_jiffies(SI1133_COMPLETION_TIMEOUT_MS))) {
  338. err = -ETIMEDOUT;
  339. goto out;
  340. }
  341. err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp);
  342. if (err)
  343. goto out;
  344. } else {
  345. err = regmap_read_poll_timeout(data->regmap,
  346. SI1133_REG_RESPONSE0, resp,
  347. (resp & SI1133_CMD_SEQ_MASK) ==
  348. expected_seq ||
  349. (resp & SI1133_CMD_ERR_MASK),
  350. SI1133_CMD_MINSLEEP_US_LOW,
  351. SI1133_CMD_TIMEOUT_MS * 1000);
  352. if (err) {
  353. dev_warn(dev,
  354. "Failed to read command 0x%02x, ret=%d\n",
  355. cmd, err);
  356. goto out;
  357. }
  358. }
  359. if (resp & SI1133_CMD_ERR_MASK) {
  360. err = si1133_parse_response_err(dev, resp, cmd);
  361. si1133_cmd_reset_counter(data);
  362. } else {
  363. data->rsp_seq = expected_seq;
  364. }
  365. out:
  366. mutex_unlock(&data->mutex);
  367. return err;
  368. }
  369. static int si1133_param_set(struct si1133_data *data, u8 param, u32 value)
  370. {
  371. int err = regmap_write(data->regmap, SI1133_REG_HOSTIN0, value);
  372. if (err)
  373. return err;
  374. return si1133_command(data, SI1133_CMD_PARAM_SET |
  375. (param & SI1133_CMD_PARAM_MASK));
  376. }
  377. static int si1133_param_query(struct si1133_data *data, u8 param, u32 *result)
  378. {
  379. int err = si1133_command(data, SI1133_CMD_PARAM_QUERY |
  380. (param & SI1133_CMD_PARAM_MASK));
  381. if (err)
  382. return err;
  383. return regmap_read(data->regmap, SI1133_REG_RESPONSE1, result);
  384. }
  385. #define SI1133_CHANNEL(_ch, _type) \
  386. .type = _type, \
  387. .channel = _ch, \
  388. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  389. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | \
  390. BIT(IIO_CHAN_INFO_SCALE) | \
  391. BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
  392. static const struct iio_chan_spec si1133_channels[] = {
  393. {
  394. .type = IIO_LIGHT,
  395. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
  396. .channel = 0,
  397. },
  398. {
  399. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_WHITE, IIO_INTENSITY)
  400. .channel2 = IIO_MOD_LIGHT_BOTH,
  401. },
  402. {
  403. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_WHITE, IIO_INTENSITY)
  404. .channel2 = IIO_MOD_LIGHT_BOTH,
  405. .extend_name = "large",
  406. },
  407. {
  408. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_SMALL_IR, IIO_INTENSITY)
  409. .extend_name = "small",
  410. .modified = 1,
  411. .channel2 = IIO_MOD_LIGHT_IR,
  412. },
  413. {
  414. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_MED_IR, IIO_INTENSITY)
  415. .modified = 1,
  416. .channel2 = IIO_MOD_LIGHT_IR,
  417. },
  418. {
  419. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_IR, IIO_INTENSITY)
  420. .extend_name = "large",
  421. .modified = 1,
  422. .channel2 = IIO_MOD_LIGHT_IR,
  423. },
  424. {
  425. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV, IIO_UVINDEX)
  426. },
  427. {
  428. SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV_DEEP, IIO_UVINDEX)
  429. .modified = 1,
  430. .channel2 = IIO_MOD_LIGHT_DUV,
  431. }
  432. };
  433. static int si1133_get_int_time_index(int milliseconds, int nanoseconds)
  434. {
  435. int i;
  436. for (i = 0; i < ARRAY_SIZE(si1133_int_time_table); i++) {
  437. if (milliseconds == si1133_int_time_table[i][0] &&
  438. nanoseconds == si1133_int_time_table[i][1])
  439. return i;
  440. }
  441. return -EINVAL;
  442. }
  443. static int si1133_set_integration_time(struct si1133_data *data, u8 adc,
  444. int milliseconds, int nanoseconds)
  445. {
  446. int index;
  447. index = si1133_get_int_time_index(milliseconds, nanoseconds);
  448. if (index < 0)
  449. return index;
  450. data->adc_sens[adc] &= 0xF0;
  451. data->adc_sens[adc] |= index;
  452. return si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(0),
  453. data->adc_sens[adc]);
  454. }
  455. static int si1133_set_chlist(struct si1133_data *data, u8 scan_mask)
  456. {
  457. /* channel list already set, no need to reprogram */
  458. if (data->scan_mask == scan_mask)
  459. return 0;
  460. data->scan_mask = scan_mask;
  461. return si1133_param_set(data, SI1133_PARAM_REG_CHAN_LIST, scan_mask);
  462. }
  463. static int si1133_chan_set_adcconfig(struct si1133_data *data, u8 adc,
  464. u8 adc_config)
  465. {
  466. int err;
  467. err = si1133_param_set(data, SI1133_PARAM_REG_ADCCONFIG(adc),
  468. adc_config);
  469. if (err)
  470. return err;
  471. data->adc_config[adc] = adc_config;
  472. return 0;
  473. }
  474. static int si1133_update_adcconfig(struct si1133_data *data, uint8_t adc,
  475. u8 mask, u8 shift, u8 value)
  476. {
  477. u32 adc_config;
  478. int err;
  479. err = si1133_param_query(data, SI1133_PARAM_REG_ADCCONFIG(adc),
  480. &adc_config);
  481. if (err)
  482. return err;
  483. adc_config &= ~mask;
  484. adc_config |= (value << shift);
  485. return si1133_chan_set_adcconfig(data, adc, adc_config);
  486. }
  487. static int si1133_set_adcmux(struct si1133_data *data, u8 adc, u8 mux)
  488. {
  489. if ((mux & data->adc_config[adc]) == mux)
  490. return 0; /* mux already set to correct value */
  491. return si1133_update_adcconfig(data, adc, SI1133_ADCMUX_MASK, 0, mux);
  492. }
  493. static int si1133_force_measurement(struct si1133_data *data)
  494. {
  495. return si1133_command(data, SI1133_CMD_FORCE);
  496. }
  497. static int si1133_bulk_read(struct si1133_data *data, u8 start_reg, u8 length,
  498. u8 *buffer)
  499. {
  500. int err;
  501. err = si1133_force_measurement(data);
  502. if (err)
  503. return err;
  504. return regmap_bulk_read(data->regmap, start_reg, buffer, length);
  505. }
  506. static int si1133_measure(struct si1133_data *data,
  507. struct iio_chan_spec const *chan,
  508. int *val)
  509. {
  510. int err;
  511. u8 buffer[SI1133_MEASURE_BUFFER_SIZE];
  512. err = si1133_set_adcmux(data, 0, chan->channel);
  513. if (err)
  514. return err;
  515. /* Deactivate lux measurements if they were active */
  516. err = si1133_set_chlist(data, BIT(0));
  517. if (err)
  518. return err;
  519. err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0), sizeof(buffer),
  520. buffer);
  521. if (err)
  522. return err;
  523. *val = sign_extend32(get_unaligned_be24(&buffer[0]), 23);
  524. return err;
  525. }
  526. static irqreturn_t si1133_threaded_irq_handler(int irq, void *private)
  527. {
  528. struct iio_dev *iio_dev = private;
  529. struct si1133_data *data = iio_priv(iio_dev);
  530. u32 irq_status;
  531. int err;
  532. err = regmap_read(data->regmap, SI1133_REG_IRQ_STATUS, &irq_status);
  533. if (err) {
  534. dev_err_ratelimited(&iio_dev->dev, "Error reading IRQ\n");
  535. goto out;
  536. }
  537. if (irq_status != data->scan_mask)
  538. return IRQ_NONE;
  539. out:
  540. complete(&data->completion);
  541. return IRQ_HANDLED;
  542. }
  543. static int si1133_scale_to_swgain(int scale_integer, int scale_fractional)
  544. {
  545. scale_integer = find_closest(scale_integer, si1133_scale_available,
  546. ARRAY_SIZE(si1133_scale_available));
  547. if (scale_integer < 0 ||
  548. scale_integer > ARRAY_SIZE(si1133_scale_available) ||
  549. scale_fractional != 0)
  550. return -EINVAL;
  551. return scale_integer;
  552. }
  553. static int si1133_chan_set_adcsens(struct si1133_data *data, u8 adc,
  554. u8 adc_sens)
  555. {
  556. int err;
  557. err = si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(adc), adc_sens);
  558. if (err)
  559. return err;
  560. data->adc_sens[adc] = adc_sens;
  561. return 0;
  562. }
  563. static int si1133_update_adcsens(struct si1133_data *data, u8 mask,
  564. u8 shift, u8 value)
  565. {
  566. int err;
  567. u32 adc_sens;
  568. err = si1133_param_query(data, SI1133_PARAM_REG_ADCSENS(0),
  569. &adc_sens);
  570. if (err)
  571. return err;
  572. adc_sens &= ~mask;
  573. adc_sens |= (value << shift);
  574. return si1133_chan_set_adcsens(data, 0, adc_sens);
  575. }
  576. static int si1133_get_lux(struct si1133_data *data, int *val)
  577. {
  578. int err;
  579. int lux;
  580. s32 high_vis;
  581. s32 low_vis;
  582. s32 ir;
  583. u8 buffer[SI1133_LUX_BUFFER_SIZE];
  584. /* Activate lux channels */
  585. err = si1133_set_chlist(data, SI1133_LUX_ADC_MASK);
  586. if (err)
  587. return err;
  588. err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0),
  589. SI1133_LUX_BUFFER_SIZE, buffer);
  590. if (err)
  591. return err;
  592. high_vis = sign_extend32(get_unaligned_be24(&buffer[0]), 23);
  593. low_vis = sign_extend32(get_unaligned_be24(&buffer[3]), 23);
  594. ir = sign_extend32(get_unaligned_be24(&buffer[6]), 23);
  595. if (high_vis > SI1133_ADC_THRESHOLD || ir > SI1133_ADC_THRESHOLD)
  596. lux = si1133_calc_polynomial(high_vis, ir,
  597. SI1133_INPUT_FRACTION_HIGH,
  598. ARRAY_SIZE(lux_coeff.coeff_high),
  599. &lux_coeff.coeff_high[0]);
  600. else
  601. lux = si1133_calc_polynomial(low_vis, ir,
  602. SI1133_INPUT_FRACTION_LOW,
  603. ARRAY_SIZE(lux_coeff.coeff_low),
  604. &lux_coeff.coeff_low[0]);
  605. *val = lux >> SI1133_LUX_OUTPUT_FRACTION;
  606. return err;
  607. }
  608. static int si1133_read_raw(struct iio_dev *iio_dev,
  609. struct iio_chan_spec const *chan,
  610. int *val, int *val2, long mask)
  611. {
  612. struct si1133_data *data = iio_priv(iio_dev);
  613. u8 adc_sens = data->adc_sens[0];
  614. int err;
  615. switch (mask) {
  616. case IIO_CHAN_INFO_PROCESSED:
  617. switch (chan->type) {
  618. case IIO_LIGHT:
  619. err = si1133_get_lux(data, val);
  620. if (err)
  621. return err;
  622. return IIO_VAL_INT;
  623. default:
  624. return -EINVAL;
  625. }
  626. case IIO_CHAN_INFO_RAW:
  627. switch (chan->type) {
  628. case IIO_INTENSITY:
  629. case IIO_UVINDEX:
  630. err = si1133_measure(data, chan, val);
  631. if (err)
  632. return err;
  633. return IIO_VAL_INT;
  634. default:
  635. return -EINVAL;
  636. }
  637. case IIO_CHAN_INFO_INT_TIME:
  638. switch (chan->type) {
  639. case IIO_INTENSITY:
  640. case IIO_UVINDEX:
  641. adc_sens &= SI1133_ADCSENS_HW_GAIN_MASK;
  642. *val = si1133_int_time_table[adc_sens][0];
  643. *val2 = si1133_int_time_table[adc_sens][1];
  644. return IIO_VAL_INT_PLUS_MICRO;
  645. default:
  646. return -EINVAL;
  647. }
  648. case IIO_CHAN_INFO_SCALE:
  649. switch (chan->type) {
  650. case IIO_INTENSITY:
  651. case IIO_UVINDEX:
  652. adc_sens &= SI1133_ADCSENS_SCALE_MASK;
  653. adc_sens >>= SI1133_ADCSENS_SCALE_SHIFT;
  654. *val = BIT(adc_sens);
  655. return IIO_VAL_INT;
  656. default:
  657. return -EINVAL;
  658. }
  659. case IIO_CHAN_INFO_HARDWAREGAIN:
  660. switch (chan->type) {
  661. case IIO_INTENSITY:
  662. case IIO_UVINDEX:
  663. adc_sens >>= SI1133_ADCSENS_HSIG_SHIFT;
  664. *val = adc_sens;
  665. return IIO_VAL_INT;
  666. default:
  667. return -EINVAL;
  668. }
  669. default:
  670. return -EINVAL;
  671. }
  672. }
  673. static int si1133_write_raw(struct iio_dev *iio_dev,
  674. struct iio_chan_spec const *chan,
  675. int val, int val2, long mask)
  676. {
  677. struct si1133_data *data = iio_priv(iio_dev);
  678. switch (mask) {
  679. case IIO_CHAN_INFO_SCALE:
  680. switch (chan->type) {
  681. case IIO_INTENSITY:
  682. case IIO_UVINDEX:
  683. val = si1133_scale_to_swgain(val, val2);
  684. if (val < 0)
  685. return val;
  686. return si1133_update_adcsens(data,
  687. SI1133_ADCSENS_SCALE_MASK,
  688. SI1133_ADCSENS_SCALE_SHIFT,
  689. val);
  690. default:
  691. return -EINVAL;
  692. }
  693. case IIO_CHAN_INFO_INT_TIME:
  694. return si1133_set_integration_time(data, 0, val, val2);
  695. case IIO_CHAN_INFO_HARDWAREGAIN:
  696. switch (chan->type) {
  697. case IIO_INTENSITY:
  698. case IIO_UVINDEX:
  699. if (val != 0 && val != 1)
  700. return -EINVAL;
  701. return si1133_update_adcsens(data,
  702. SI1133_ADCSENS_HSIG_MASK,
  703. SI1133_ADCSENS_HSIG_SHIFT,
  704. val);
  705. default:
  706. return -EINVAL;
  707. }
  708. default:
  709. return -EINVAL;
  710. }
  711. }
  712. static struct attribute *si1133_attributes[] = {
  713. &iio_const_attr_integration_time_available.dev_attr.attr,
  714. &iio_const_attr_scale_available.dev_attr.attr,
  715. NULL,
  716. };
  717. static const struct attribute_group si1133_attribute_group = {
  718. .attrs = si1133_attributes,
  719. };
  720. static const struct iio_info si1133_info = {
  721. .read_raw = si1133_read_raw,
  722. .write_raw = si1133_write_raw,
  723. .attrs = &si1133_attribute_group,
  724. };
  725. /*
  726. * si1133_init_lux_channels - Configure 3 different channels(adc) (1,2 and 3)
  727. * The channel configuration for the lux measurement was taken from :
  728. * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00578
  729. *
  730. * Reserved the channel 0 for the other raw measurements
  731. */
  732. static int si1133_init_lux_channels(struct si1133_data *data)
  733. {
  734. int err;
  735. err = si1133_chan_set_adcconfig(data, 1,
  736. SI1133_ADCCONFIG_DECIM_RATE(1) |
  737. SI1133_PARAM_ADCMUX_LARGE_WHITE);
  738. if (err)
  739. return err;
  740. err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(1),
  741. SI1133_ADCPOST_24BIT_EN |
  742. SI1133_ADCPOST_POSTSHIFT_BITQTY(0));
  743. if (err)
  744. return err;
  745. err = si1133_chan_set_adcsens(data, 1, SI1133_ADCSENS_HSIG_MASK |
  746. SI1133_ADCSENS_NB_MEAS(64) | _48_8_us);
  747. if (err)
  748. return err;
  749. err = si1133_chan_set_adcconfig(data, 2,
  750. SI1133_ADCCONFIG_DECIM_RATE(1) |
  751. SI1133_PARAM_ADCMUX_LARGE_WHITE);
  752. if (err)
  753. return err;
  754. err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(2),
  755. SI1133_ADCPOST_24BIT_EN |
  756. SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
  757. if (err)
  758. return err;
  759. err = si1133_chan_set_adcsens(data, 2, SI1133_ADCSENS_HSIG_MASK |
  760. SI1133_ADCSENS_NB_MEAS(1) | _3_120_0_us);
  761. if (err)
  762. return err;
  763. err = si1133_chan_set_adcconfig(data, 3,
  764. SI1133_ADCCONFIG_DECIM_RATE(1) |
  765. SI1133_PARAM_ADCMUX_MED_IR);
  766. if (err)
  767. return err;
  768. err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(3),
  769. SI1133_ADCPOST_24BIT_EN |
  770. SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
  771. if (err)
  772. return err;
  773. return si1133_chan_set_adcsens(data, 3, SI1133_ADCSENS_HSIG_MASK |
  774. SI1133_ADCSENS_NB_MEAS(64) | _48_8_us);
  775. }
  776. static int si1133_initialize(struct si1133_data *data)
  777. {
  778. int err;
  779. err = si1133_cmd_reset_sw(data);
  780. if (err)
  781. return err;
  782. /* Turn off autonomous mode */
  783. err = si1133_param_set(data, SI1133_REG_MEAS_RATE, 0);
  784. if (err)
  785. return err;
  786. err = si1133_init_lux_channels(data);
  787. if (err)
  788. return err;
  789. return regmap_write(data->regmap, SI1133_REG_IRQ_ENABLE,
  790. SI1133_IRQ_CHANNEL_ENABLE);
  791. }
  792. static int si1133_validate_ids(struct iio_dev *iio_dev)
  793. {
  794. struct si1133_data *data = iio_priv(iio_dev);
  795. unsigned int part_id, rev_id, mfr_id;
  796. int err;
  797. err = regmap_read(data->regmap, SI1133_REG_PART_ID, &part_id);
  798. if (err)
  799. return err;
  800. err = regmap_read(data->regmap, SI1133_REG_REV_ID, &rev_id);
  801. if (err)
  802. return err;
  803. err = regmap_read(data->regmap, SI1133_REG_MFR_ID, &mfr_id);
  804. if (err)
  805. return err;
  806. dev_info(&iio_dev->dev,
  807. "Device ID part 0x%02x rev 0x%02x mfr 0x%02x\n",
  808. part_id, rev_id, mfr_id);
  809. if (part_id != SI1133_PART_ID) {
  810. dev_err(&iio_dev->dev,
  811. "Part ID mismatch got 0x%02x, expected 0x%02x\n",
  812. part_id, SI1133_PART_ID);
  813. return -ENODEV;
  814. }
  815. return 0;
  816. }
  817. static int si1133_probe(struct i2c_client *client,
  818. const struct i2c_device_id *id)
  819. {
  820. struct si1133_data *data;
  821. struct iio_dev *iio_dev;
  822. int err;
  823. iio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  824. if (!iio_dev)
  825. return -ENOMEM;
  826. data = iio_priv(iio_dev);
  827. init_completion(&data->completion);
  828. data->regmap = devm_regmap_init_i2c(client, &si1133_regmap_config);
  829. if (IS_ERR(data->regmap)) {
  830. err = PTR_ERR(data->regmap);
  831. dev_err(&client->dev, "Failed to initialise regmap: %d\n", err);
  832. return err;
  833. }
  834. i2c_set_clientdata(client, iio_dev);
  835. data->client = client;
  836. iio_dev->name = id->name;
  837. iio_dev->channels = si1133_channels;
  838. iio_dev->num_channels = ARRAY_SIZE(si1133_channels);
  839. iio_dev->info = &si1133_info;
  840. iio_dev->modes = INDIO_DIRECT_MODE;
  841. mutex_init(&data->mutex);
  842. err = si1133_validate_ids(iio_dev);
  843. if (err)
  844. return err;
  845. err = si1133_initialize(data);
  846. if (err) {
  847. dev_err(&client->dev,
  848. "Error when initializing chip: %d\n", err);
  849. return err;
  850. }
  851. if (!client->irq) {
  852. dev_err(&client->dev,
  853. "Required interrupt not provided, cannot proceed\n");
  854. return -EINVAL;
  855. }
  856. err = devm_request_threaded_irq(&client->dev, client->irq,
  857. NULL,
  858. si1133_threaded_irq_handler,
  859. IRQF_ONESHOT | IRQF_SHARED,
  860. client->name, iio_dev);
  861. if (err) {
  862. dev_warn(&client->dev, "Request irq %d failed: %i\n",
  863. client->irq, err);
  864. return err;
  865. }
  866. return devm_iio_device_register(&client->dev, iio_dev);
  867. }
  868. static const struct i2c_device_id si1133_ids[] = {
  869. { "si1133", 0 },
  870. { }
  871. };
  872. MODULE_DEVICE_TABLE(i2c, si1133_ids);
  873. static struct i2c_driver si1133_driver = {
  874. .driver = {
  875. .name = "si1133",
  876. },
  877. .probe = si1133_probe,
  878. .id_table = si1133_ids,
  879. };
  880. module_i2c_driver(si1133_driver);
  881. MODULE_AUTHOR("Maxime Roussin-Belanger <[email protected]>");
  882. MODULE_DESCRIPTION("Silabs SI1133, UV index sensor and ambient light sensor driver");
  883. MODULE_LICENSE("GPL");