gp2ap020a00f.c 45 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  4. * Author: Jacek Anaszewski <[email protected]>
  5. *
  6. * IIO features supported by the driver:
  7. *
  8. * Read-only raw channels:
  9. * - illuminance_clear [lux]
  10. * - illuminance_ir
  11. * - proximity
  12. *
  13. * Triggered buffer:
  14. * - illuminance_clear
  15. * - illuminance_ir
  16. * - proximity
  17. *
  18. * Events:
  19. * - illuminance_clear (rising and falling)
  20. * - proximity (rising and falling)
  21. * - both falling and rising thresholds for the proximity events
  22. * must be set to the values greater than 0.
  23. *
  24. * The driver supports triggered buffers for all the three
  25. * channels as well as high and low threshold events for the
  26. * illuminance_clear and proxmimity channels. Triggers
  27. * can be enabled simultaneously with both illuminance_clear
  28. * events. Proximity events cannot be enabled simultaneously
  29. * with any triggers or illuminance events. Enabling/disabling
  30. * one of the proximity events automatically enables/disables
  31. * the other one.
  32. */
  33. #include <linux/debugfs.h>
  34. #include <linux/delay.h>
  35. #include <linux/i2c.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/irq.h>
  38. #include <linux/irq_work.h>
  39. #include <linux/module.h>
  40. #include <linux/mod_devicetable.h>
  41. #include <linux/mutex.h>
  42. #include <linux/regmap.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/slab.h>
  45. #include <asm/unaligned.h>
  46. #include <linux/iio/buffer.h>
  47. #include <linux/iio/events.h>
  48. #include <linux/iio/iio.h>
  49. #include <linux/iio/sysfs.h>
  50. #include <linux/iio/trigger.h>
  51. #include <linux/iio/trigger_consumer.h>
  52. #include <linux/iio/triggered_buffer.h>
  53. #define GP2A_I2C_NAME "gp2ap020a00f"
  54. /* Registers */
  55. #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
  56. #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
  57. #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
  58. #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
  59. #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
  60. #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
  61. #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
  62. #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
  63. #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
  64. #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
  65. #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
  66. #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
  67. #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
  68. #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
  69. #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
  70. #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
  71. #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
  72. #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
  73. #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
  74. /* OP_REG bits */
  75. #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
  76. #define GP2AP020A00F_OP3_SHUTDOWN 0x00
  77. #define GP2AP020A00F_OP3_OPERATION 0x80
  78. #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
  79. #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
  80. #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
  81. #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
  82. #define GP2AP020A00F_OP_ALS_AND_PS 0x00
  83. #define GP2AP020A00F_OP_ALS 0x10
  84. #define GP2AP020A00F_OP_PS 0x20
  85. #define GP2AP020A00F_OP_DEBUG 0x30
  86. #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
  87. #define GP2AP020A00F_PROX_NON_DETECT 0x00
  88. #define GP2AP020A00F_PROX_DETECT 0x08
  89. #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
  90. #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
  91. #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
  92. #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
  93. #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
  94. /* ALS_REG bits */
  95. #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
  96. #define GP2AP020A00F_PRST_ONCE 0x00
  97. #define GP2AP020A00F_PRST_4_CYCLES 0x40
  98. #define GP2AP020A00F_PRST_8_CYCLES 0x80
  99. #define GP2AP020A00F_PRST_16_CYCLES 0xc0
  100. #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
  101. #define GP2AP020A00F_RES_A_800ms 0x00
  102. #define GP2AP020A00F_RES_A_400ms 0x08
  103. #define GP2AP020A00F_RES_A_200ms 0x10
  104. #define GP2AP020A00F_RES_A_100ms 0x18
  105. #define GP2AP020A00F_RES_A_25ms 0x20
  106. #define GP2AP020A00F_RES_A_6_25ms 0x28
  107. #define GP2AP020A00F_RES_A_1_56ms 0x30
  108. #define GP2AP020A00F_RES_A_0_39ms 0x38
  109. #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
  110. #define GP2AP020A00F_RANGE_A_x1 0x00
  111. #define GP2AP020A00F_RANGE_A_x2 0x01
  112. #define GP2AP020A00F_RANGE_A_x4 0x02
  113. #define GP2AP020A00F_RANGE_A_x8 0x03
  114. #define GP2AP020A00F_RANGE_A_x16 0x04
  115. #define GP2AP020A00F_RANGE_A_x32 0x05
  116. #define GP2AP020A00F_RANGE_A_x64 0x06
  117. #define GP2AP020A00F_RANGE_A_x128 0x07
  118. /* PS_REG bits */
  119. #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
  120. #define GP2AP020A00F_ALC_ON 0x80
  121. #define GP2AP020A00F_ALC_OFF 0x00
  122. #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
  123. #define GP2AP020A00F_INTTYPE_LEVEL 0x00
  124. #define GP2AP020A00F_INTTYPE_PULSE 0x40
  125. #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
  126. #define GP2AP020A00F_RES_P_800ms_x2 0x00
  127. #define GP2AP020A00F_RES_P_400ms_x2 0x08
  128. #define GP2AP020A00F_RES_P_200ms_x2 0x10
  129. #define GP2AP020A00F_RES_P_100ms_x2 0x18
  130. #define GP2AP020A00F_RES_P_25ms_x2 0x20
  131. #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
  132. #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
  133. #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
  134. #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
  135. #define GP2AP020A00F_RANGE_P_x1 0x00
  136. #define GP2AP020A00F_RANGE_P_x2 0x01
  137. #define GP2AP020A00F_RANGE_P_x4 0x02
  138. #define GP2AP020A00F_RANGE_P_x8 0x03
  139. #define GP2AP020A00F_RANGE_P_x16 0x04
  140. #define GP2AP020A00F_RANGE_P_x32 0x05
  141. #define GP2AP020A00F_RANGE_P_x64 0x06
  142. #define GP2AP020A00F_RANGE_P_x128 0x07
  143. /* LED reg bits */
  144. #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
  145. #define GP2AP020A00F_INTVAL_0 0x00
  146. #define GP2AP020A00F_INTVAL_4 0x40
  147. #define GP2AP020A00F_INTVAL_8 0x80
  148. #define GP2AP020A00F_INTVAL_16 0xc0
  149. #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
  150. #define GP2AP020A00F_IS_13_8mA 0x00
  151. #define GP2AP020A00F_IS_27_5mA 0x10
  152. #define GP2AP020A00F_IS_55mA 0x20
  153. #define GP2AP020A00F_IS_110mA 0x30
  154. #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
  155. #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
  156. #define GP2AP020A00F_PIN_ALS 0x04
  157. #define GP2AP020A00F_PIN_PS 0x08
  158. #define GP2AP020A00F_PIN_PS_DETECT 0x0c
  159. #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
  160. #define GP2AP020A00F_FREQ_327_5kHz 0x00
  161. #define GP2AP020A00F_FREQ_81_8kHz 0x02
  162. #define GP2AP020A00F_RST 0x01 /* Software reset */
  163. #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
  164. #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
  165. #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
  166. #define GP2AP020A00F_CHAN_TIMESTAMP 3
  167. #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
  168. #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
  169. (chan) * 2)
  170. #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
  171. (th_val_id) * 2)
  172. #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
  173. #define GP2AP020A00F_SUBTRACT_MODE 0
  174. #define GP2AP020A00F_ADD_MODE 1
  175. #define GP2AP020A00F_MAX_CHANNELS 3
  176. enum gp2ap020a00f_opmode {
  177. GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
  178. GP2AP020A00F_OPMODE_READ_RAW_IR,
  179. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
  180. GP2AP020A00F_OPMODE_ALS,
  181. GP2AP020A00F_OPMODE_PS,
  182. GP2AP020A00F_OPMODE_ALS_AND_PS,
  183. GP2AP020A00F_OPMODE_PROX_DETECT,
  184. GP2AP020A00F_OPMODE_SHUTDOWN,
  185. GP2AP020A00F_NUM_OPMODES,
  186. };
  187. enum gp2ap020a00f_cmd {
  188. GP2AP020A00F_CMD_READ_RAW_CLEAR,
  189. GP2AP020A00F_CMD_READ_RAW_IR,
  190. GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
  191. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
  192. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
  193. GP2AP020A00F_CMD_TRIGGER_IR_EN,
  194. GP2AP020A00F_CMD_TRIGGER_IR_DIS,
  195. GP2AP020A00F_CMD_TRIGGER_PROX_EN,
  196. GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
  197. GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
  198. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
  199. GP2AP020A00F_CMD_ALS_LOW_EV_EN,
  200. GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
  201. GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
  202. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
  203. GP2AP020A00F_CMD_PROX_LOW_EV_EN,
  204. GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
  205. };
  206. enum gp2ap020a00f_flags {
  207. GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
  208. GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
  209. GP2AP020A00F_FLAG_PROX_TRIGGER,
  210. GP2AP020A00F_FLAG_PROX_RISING_EV,
  211. GP2AP020A00F_FLAG_PROX_FALLING_EV,
  212. GP2AP020A00F_FLAG_ALS_RISING_EV,
  213. GP2AP020A00F_FLAG_ALS_FALLING_EV,
  214. GP2AP020A00F_FLAG_LUX_MODE_HI,
  215. GP2AP020A00F_FLAG_DATA_READY,
  216. };
  217. enum gp2ap020a00f_thresh_val_id {
  218. GP2AP020A00F_THRESH_TL,
  219. GP2AP020A00F_THRESH_TH,
  220. GP2AP020A00F_THRESH_PL,
  221. GP2AP020A00F_THRESH_PH,
  222. };
  223. struct gp2ap020a00f_data {
  224. const struct gp2ap020a00f_platform_data *pdata;
  225. struct i2c_client *client;
  226. struct mutex lock;
  227. char *buffer;
  228. struct regulator *vled_reg;
  229. unsigned long flags;
  230. enum gp2ap020a00f_opmode cur_opmode;
  231. struct iio_trigger *trig;
  232. struct regmap *regmap;
  233. unsigned int thresh_val[4];
  234. u8 debug_reg_addr;
  235. struct irq_work work;
  236. wait_queue_head_t data_ready_queue;
  237. };
  238. static const u8 gp2ap020a00f_reg_init_tab[] = {
  239. [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
  240. [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
  241. GP2AP020A00F_RANGE_A_x8,
  242. [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
  243. GP2AP020A00F_RES_P_1_56ms_x2 |
  244. GP2AP020A00F_RANGE_P_x4,
  245. [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
  246. GP2AP020A00F_IS_110mA |
  247. GP2AP020A00F_FREQ_327_5kHz,
  248. [GP2AP020A00F_TL_L_REG] = 0,
  249. [GP2AP020A00F_TL_H_REG] = 0,
  250. [GP2AP020A00F_TH_L_REG] = 0,
  251. [GP2AP020A00F_TH_H_REG] = 0,
  252. [GP2AP020A00F_PL_L_REG] = 0,
  253. [GP2AP020A00F_PL_H_REG] = 0,
  254. [GP2AP020A00F_PH_L_REG] = 0,
  255. [GP2AP020A00F_PH_H_REG] = 0,
  256. };
  257. static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
  258. {
  259. switch (reg) {
  260. case GP2AP020A00F_OP_REG:
  261. case GP2AP020A00F_D0_L_REG:
  262. case GP2AP020A00F_D0_H_REG:
  263. case GP2AP020A00F_D1_L_REG:
  264. case GP2AP020A00F_D1_H_REG:
  265. case GP2AP020A00F_D2_L_REG:
  266. case GP2AP020A00F_D2_H_REG:
  267. return true;
  268. default:
  269. return false;
  270. }
  271. }
  272. static const struct regmap_config gp2ap020a00f_regmap_config = {
  273. .reg_bits = 8,
  274. .val_bits = 8,
  275. .max_register = GP2AP020A00F_D2_H_REG,
  276. .cache_type = REGCACHE_RBTREE,
  277. .volatile_reg = gp2ap020a00f_is_volatile_reg,
  278. };
  279. static const struct gp2ap020a00f_mutable_config_regs {
  280. u8 op_reg;
  281. u8 als_reg;
  282. u8 ps_reg;
  283. u8 led_reg;
  284. } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
  285. [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
  286. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  287. | GP2AP020A00F_OP3_OPERATION
  288. | GP2AP020A00F_TYPE_AUTO_CALC,
  289. GP2AP020A00F_PRST_ONCE,
  290. GP2AP020A00F_INTTYPE_LEVEL,
  291. GP2AP020A00F_PIN_ALS
  292. },
  293. [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
  294. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  295. | GP2AP020A00F_OP3_OPERATION
  296. | GP2AP020A00F_TYPE_MANUAL_CALC,
  297. GP2AP020A00F_PRST_ONCE,
  298. GP2AP020A00F_INTTYPE_LEVEL,
  299. GP2AP020A00F_PIN_ALS
  300. },
  301. [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
  302. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  303. | GP2AP020A00F_OP3_OPERATION
  304. | GP2AP020A00F_TYPE_MANUAL_CALC,
  305. GP2AP020A00F_PRST_ONCE,
  306. GP2AP020A00F_INTTYPE_LEVEL,
  307. GP2AP020A00F_PIN_PS
  308. },
  309. [GP2AP020A00F_OPMODE_PROX_DETECT] = {
  310. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  311. | GP2AP020A00F_OP3_OPERATION
  312. | GP2AP020A00F_TYPE_MANUAL_CALC,
  313. GP2AP020A00F_PRST_4_CYCLES,
  314. GP2AP020A00F_INTTYPE_PULSE,
  315. GP2AP020A00F_PIN_PS_DETECT
  316. },
  317. [GP2AP020A00F_OPMODE_ALS] = {
  318. GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
  319. | GP2AP020A00F_OP3_OPERATION
  320. | GP2AP020A00F_TYPE_AUTO_CALC,
  321. GP2AP020A00F_PRST_ONCE,
  322. GP2AP020A00F_INTTYPE_LEVEL,
  323. GP2AP020A00F_PIN_ALS
  324. },
  325. [GP2AP020A00F_OPMODE_PS] = {
  326. GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
  327. | GP2AP020A00F_OP3_OPERATION
  328. | GP2AP020A00F_TYPE_MANUAL_CALC,
  329. GP2AP020A00F_PRST_4_CYCLES,
  330. GP2AP020A00F_INTTYPE_LEVEL,
  331. GP2AP020A00F_PIN_PS
  332. },
  333. [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
  334. GP2AP020A00F_OP_ALS_AND_PS
  335. | GP2AP020A00F_OP2_CONT_OPERATION
  336. | GP2AP020A00F_OP3_OPERATION
  337. | GP2AP020A00F_TYPE_AUTO_CALC,
  338. GP2AP020A00F_PRST_4_CYCLES,
  339. GP2AP020A00F_INTTYPE_LEVEL,
  340. GP2AP020A00F_PIN_ALS_OR_PS
  341. },
  342. [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
  343. };
  344. static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
  345. enum gp2ap020a00f_opmode op)
  346. {
  347. unsigned int op_reg_val;
  348. int err;
  349. if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
  350. err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
  351. &op_reg_val);
  352. if (err < 0)
  353. return err;
  354. /*
  355. * Shutdown the device if the operation being executed entails
  356. * mode transition.
  357. */
  358. if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
  359. (op_reg_val & GP2AP020A00F_OP_MASK)) {
  360. /* set shutdown mode */
  361. err = regmap_update_bits(data->regmap,
  362. GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
  363. GP2AP020A00F_OP3_SHUTDOWN);
  364. if (err < 0)
  365. return err;
  366. }
  367. err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
  368. GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
  369. .als_reg);
  370. if (err < 0)
  371. return err;
  372. err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
  373. GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
  374. .ps_reg);
  375. if (err < 0)
  376. return err;
  377. err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
  378. GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
  379. .led_reg);
  380. if (err < 0)
  381. return err;
  382. }
  383. /* Set OP_REG and apply operation mode (power on / off) */
  384. err = regmap_update_bits(data->regmap,
  385. GP2AP020A00F_OP_REG,
  386. GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
  387. GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
  388. opmode_regs_settings[op].op_reg);
  389. if (err < 0)
  390. return err;
  391. data->cur_opmode = op;
  392. return 0;
  393. }
  394. static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
  395. {
  396. return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
  397. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
  398. test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
  399. test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  400. }
  401. static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
  402. {
  403. return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
  404. test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  405. }
  406. static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
  407. enum gp2ap020a00f_thresh_val_id th_val_id,
  408. bool enable)
  409. {
  410. __le16 thresh_buf = 0;
  411. unsigned int thresh_reg_val;
  412. if (!enable)
  413. thresh_reg_val = 0;
  414. else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
  415. th_val_id != GP2AP020A00F_THRESH_PL &&
  416. th_val_id != GP2AP020A00F_THRESH_PH)
  417. /*
  418. * For the high lux mode ALS threshold has to be scaled down
  419. * to allow for proper comparison with the output value.
  420. */
  421. thresh_reg_val = data->thresh_val[th_val_id] / 16;
  422. else
  423. thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
  424. 16000 :
  425. data->thresh_val[th_val_id];
  426. thresh_buf = cpu_to_le16(thresh_reg_val);
  427. return regmap_bulk_write(data->regmap,
  428. GP2AP020A00F_THRESH_REG(th_val_id),
  429. (u8 *)&thresh_buf, 2);
  430. }
  431. static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
  432. enum gp2ap020a00f_opmode diff_mode, int add_sub)
  433. {
  434. enum gp2ap020a00f_opmode new_mode;
  435. if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
  436. diff_mode != GP2AP020A00F_OPMODE_PS)
  437. return -EINVAL;
  438. if (add_sub == GP2AP020A00F_ADD_MODE) {
  439. if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
  440. new_mode = diff_mode;
  441. else
  442. new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
  443. } else {
  444. if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
  445. new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
  446. GP2AP020A00F_OPMODE_PS :
  447. GP2AP020A00F_OPMODE_ALS;
  448. else
  449. new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
  450. }
  451. return gp2ap020a00f_set_operation_mode(data, new_mode);
  452. }
  453. static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
  454. enum gp2ap020a00f_cmd cmd)
  455. {
  456. int err = 0;
  457. switch (cmd) {
  458. case GP2AP020A00F_CMD_READ_RAW_CLEAR:
  459. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  460. return -EBUSY;
  461. err = gp2ap020a00f_set_operation_mode(data,
  462. GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
  463. break;
  464. case GP2AP020A00F_CMD_READ_RAW_IR:
  465. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  466. return -EBUSY;
  467. err = gp2ap020a00f_set_operation_mode(data,
  468. GP2AP020A00F_OPMODE_READ_RAW_IR);
  469. break;
  470. case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
  471. if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
  472. return -EBUSY;
  473. err = gp2ap020a00f_set_operation_mode(data,
  474. GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
  475. break;
  476. case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
  477. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  478. return -EBUSY;
  479. if (!gp2ap020a00f_als_enabled(data))
  480. err = gp2ap020a00f_alter_opmode(data,
  481. GP2AP020A00F_OPMODE_ALS,
  482. GP2AP020A00F_ADD_MODE);
  483. set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  484. break;
  485. case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
  486. clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
  487. if (gp2ap020a00f_als_enabled(data))
  488. break;
  489. err = gp2ap020a00f_alter_opmode(data,
  490. GP2AP020A00F_OPMODE_ALS,
  491. GP2AP020A00F_SUBTRACT_MODE);
  492. break;
  493. case GP2AP020A00F_CMD_TRIGGER_IR_EN:
  494. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  495. return -EBUSY;
  496. if (!gp2ap020a00f_als_enabled(data))
  497. err = gp2ap020a00f_alter_opmode(data,
  498. GP2AP020A00F_OPMODE_ALS,
  499. GP2AP020A00F_ADD_MODE);
  500. set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  501. break;
  502. case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
  503. clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
  504. if (gp2ap020a00f_als_enabled(data))
  505. break;
  506. err = gp2ap020a00f_alter_opmode(data,
  507. GP2AP020A00F_OPMODE_ALS,
  508. GP2AP020A00F_SUBTRACT_MODE);
  509. break;
  510. case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
  511. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  512. return -EBUSY;
  513. err = gp2ap020a00f_alter_opmode(data,
  514. GP2AP020A00F_OPMODE_PS,
  515. GP2AP020A00F_ADD_MODE);
  516. set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  517. break;
  518. case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
  519. clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
  520. err = gp2ap020a00f_alter_opmode(data,
  521. GP2AP020A00F_OPMODE_PS,
  522. GP2AP020A00F_SUBTRACT_MODE);
  523. break;
  524. case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
  525. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  526. return 0;
  527. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  528. return -EBUSY;
  529. if (!gp2ap020a00f_als_enabled(data)) {
  530. err = gp2ap020a00f_alter_opmode(data,
  531. GP2AP020A00F_OPMODE_ALS,
  532. GP2AP020A00F_ADD_MODE);
  533. if (err < 0)
  534. return err;
  535. }
  536. set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  537. err = gp2ap020a00f_write_event_threshold(data,
  538. GP2AP020A00F_THRESH_TH, true);
  539. break;
  540. case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
  541. if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
  542. return 0;
  543. clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
  544. if (!gp2ap020a00f_als_enabled(data)) {
  545. err = gp2ap020a00f_alter_opmode(data,
  546. GP2AP020A00F_OPMODE_ALS,
  547. GP2AP020A00F_SUBTRACT_MODE);
  548. if (err < 0)
  549. return err;
  550. }
  551. err = gp2ap020a00f_write_event_threshold(data,
  552. GP2AP020A00F_THRESH_TH, false);
  553. break;
  554. case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
  555. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  556. return 0;
  557. if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
  558. return -EBUSY;
  559. if (!gp2ap020a00f_als_enabled(data)) {
  560. err = gp2ap020a00f_alter_opmode(data,
  561. GP2AP020A00F_OPMODE_ALS,
  562. GP2AP020A00F_ADD_MODE);
  563. if (err < 0)
  564. return err;
  565. }
  566. set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  567. err = gp2ap020a00f_write_event_threshold(data,
  568. GP2AP020A00F_THRESH_TL, true);
  569. break;
  570. case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
  571. if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
  572. return 0;
  573. clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
  574. if (!gp2ap020a00f_als_enabled(data)) {
  575. err = gp2ap020a00f_alter_opmode(data,
  576. GP2AP020A00F_OPMODE_ALS,
  577. GP2AP020A00F_SUBTRACT_MODE);
  578. if (err < 0)
  579. return err;
  580. }
  581. err = gp2ap020a00f_write_event_threshold(data,
  582. GP2AP020A00F_THRESH_TL, false);
  583. break;
  584. case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
  585. if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  586. return 0;
  587. if (gp2ap020a00f_als_enabled(data) ||
  588. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  589. return -EBUSY;
  590. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  591. err = gp2ap020a00f_set_operation_mode(data,
  592. GP2AP020A00F_OPMODE_PROX_DETECT);
  593. if (err < 0)
  594. return err;
  595. }
  596. set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  597. err = gp2ap020a00f_write_event_threshold(data,
  598. GP2AP020A00F_THRESH_PH, true);
  599. break;
  600. case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
  601. if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
  602. return 0;
  603. clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
  604. err = gp2ap020a00f_set_operation_mode(data,
  605. GP2AP020A00F_OPMODE_SHUTDOWN);
  606. if (err < 0)
  607. return err;
  608. err = gp2ap020a00f_write_event_threshold(data,
  609. GP2AP020A00F_THRESH_PH, false);
  610. break;
  611. case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
  612. if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  613. return 0;
  614. if (gp2ap020a00f_als_enabled(data) ||
  615. data->cur_opmode == GP2AP020A00F_OPMODE_PS)
  616. return -EBUSY;
  617. if (!gp2ap020a00f_prox_detect_enabled(data)) {
  618. err = gp2ap020a00f_set_operation_mode(data,
  619. GP2AP020A00F_OPMODE_PROX_DETECT);
  620. if (err < 0)
  621. return err;
  622. }
  623. set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  624. err = gp2ap020a00f_write_event_threshold(data,
  625. GP2AP020A00F_THRESH_PL, true);
  626. break;
  627. case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
  628. if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
  629. return 0;
  630. clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
  631. err = gp2ap020a00f_set_operation_mode(data,
  632. GP2AP020A00F_OPMODE_SHUTDOWN);
  633. if (err < 0)
  634. return err;
  635. err = gp2ap020a00f_write_event_threshold(data,
  636. GP2AP020A00F_THRESH_PL, false);
  637. break;
  638. }
  639. return err;
  640. }
  641. static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
  642. {
  643. int ret;
  644. ret = wait_event_timeout(data->data_ready_queue,
  645. test_bit(GP2AP020A00F_FLAG_DATA_READY,
  646. &data->flags),
  647. GP2AP020A00F_DATA_READY_TIMEOUT);
  648. clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
  649. return ret > 0 ? 0 : -ETIME;
  650. }
  651. static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
  652. unsigned int output_reg, int *val)
  653. {
  654. u8 reg_buf[2];
  655. int err;
  656. err = wait_conversion_complete_irq(data);
  657. if (err < 0)
  658. dev_dbg(&data->client->dev, "data ready timeout\n");
  659. err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
  660. if (err < 0)
  661. return err;
  662. *val = le16_to_cpup((__le16 *)reg_buf);
  663. return err;
  664. }
  665. static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
  666. int output_val)
  667. {
  668. u8 new_range = 0xff;
  669. int err;
  670. if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
  671. if (output_val > 16000) {
  672. set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  673. new_range = GP2AP020A00F_RANGE_A_x128;
  674. }
  675. } else {
  676. if (output_val < 1000) {
  677. clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
  678. new_range = GP2AP020A00F_RANGE_A_x8;
  679. }
  680. }
  681. if (new_range != 0xff) {
  682. /* Clear als threshold registers to avoid spurious
  683. * events caused by lux mode transition.
  684. */
  685. err = gp2ap020a00f_write_event_threshold(data,
  686. GP2AP020A00F_THRESH_TH, false);
  687. if (err < 0) {
  688. dev_err(&data->client->dev,
  689. "Clearing als threshold register failed.\n");
  690. return false;
  691. }
  692. err = gp2ap020a00f_write_event_threshold(data,
  693. GP2AP020A00F_THRESH_TL, false);
  694. if (err < 0) {
  695. dev_err(&data->client->dev,
  696. "Clearing als threshold register failed.\n");
  697. return false;
  698. }
  699. /* Change lux mode */
  700. err = regmap_update_bits(data->regmap,
  701. GP2AP020A00F_OP_REG,
  702. GP2AP020A00F_OP3_MASK,
  703. GP2AP020A00F_OP3_SHUTDOWN);
  704. if (err < 0) {
  705. dev_err(&data->client->dev,
  706. "Shutting down the device failed.\n");
  707. return false;
  708. }
  709. err = regmap_update_bits(data->regmap,
  710. GP2AP020A00F_ALS_REG,
  711. GP2AP020A00F_RANGE_A_MASK,
  712. new_range);
  713. if (err < 0) {
  714. dev_err(&data->client->dev,
  715. "Adjusting device lux mode failed.\n");
  716. return false;
  717. }
  718. err = regmap_update_bits(data->regmap,
  719. GP2AP020A00F_OP_REG,
  720. GP2AP020A00F_OP3_MASK,
  721. GP2AP020A00F_OP3_OPERATION);
  722. if (err < 0) {
  723. dev_err(&data->client->dev,
  724. "Powering up the device failed.\n");
  725. return false;
  726. }
  727. /* Adjust als threshold register values to the new lux mode */
  728. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
  729. err = gp2ap020a00f_write_event_threshold(data,
  730. GP2AP020A00F_THRESH_TH, true);
  731. if (err < 0) {
  732. dev_err(&data->client->dev,
  733. "Adjusting als threshold value failed.\n");
  734. return false;
  735. }
  736. }
  737. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
  738. err = gp2ap020a00f_write_event_threshold(data,
  739. GP2AP020A00F_THRESH_TL, true);
  740. if (err < 0) {
  741. dev_err(&data->client->dev,
  742. "Adjusting als threshold value failed.\n");
  743. return false;
  744. }
  745. }
  746. return true;
  747. }
  748. return false;
  749. }
  750. static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
  751. int *output_val)
  752. {
  753. if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
  754. *output_val *= 16;
  755. }
  756. static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
  757. {
  758. struct gp2ap020a00f_data *data =
  759. container_of(work, struct gp2ap020a00f_data, work);
  760. iio_trigger_poll(data->trig);
  761. }
  762. static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
  763. {
  764. struct iio_dev *indio_dev = data;
  765. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  766. unsigned int op_reg_val;
  767. int ret;
  768. /* Read interrupt flags */
  769. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
  770. if (ret < 0)
  771. return IRQ_HANDLED;
  772. if (gp2ap020a00f_prox_detect_enabled(priv)) {
  773. if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
  774. iio_push_event(indio_dev,
  775. IIO_UNMOD_EVENT_CODE(
  776. IIO_PROXIMITY,
  777. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  778. IIO_EV_TYPE_ROC,
  779. IIO_EV_DIR_RISING),
  780. iio_get_time_ns(indio_dev));
  781. } else {
  782. iio_push_event(indio_dev,
  783. IIO_UNMOD_EVENT_CODE(
  784. IIO_PROXIMITY,
  785. GP2AP020A00F_SCAN_MODE_PROXIMITY,
  786. IIO_EV_TYPE_ROC,
  787. IIO_EV_DIR_FALLING),
  788. iio_get_time_ns(indio_dev));
  789. }
  790. }
  791. return IRQ_HANDLED;
  792. }
  793. static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
  794. {
  795. struct iio_dev *indio_dev = data;
  796. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  797. u8 op_reg_flags, d0_reg_buf[2];
  798. unsigned int output_val, op_reg_val;
  799. int thresh_val_id, ret;
  800. /* Read interrupt flags */
  801. ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
  802. &op_reg_val);
  803. if (ret < 0)
  804. goto done;
  805. op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
  806. | GP2AP020A00F_PROX_DETECT);
  807. op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
  808. & ~GP2AP020A00F_PROX_DETECT);
  809. /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
  810. if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
  811. ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
  812. op_reg_val);
  813. if (ret < 0)
  814. goto done;
  815. }
  816. if (op_reg_flags & GP2AP020A00F_FLAG_A) {
  817. /* Check D0 register to assess if the lux mode
  818. * transition is required.
  819. */
  820. ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
  821. d0_reg_buf, 2);
  822. if (ret < 0)
  823. goto done;
  824. output_val = le16_to_cpup((__le16 *)d0_reg_buf);
  825. if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
  826. goto done;
  827. gp2ap020a00f_output_to_lux(priv, &output_val);
  828. /*
  829. * We need to check output value to distinguish
  830. * between high and low ambient light threshold event.
  831. */
  832. if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
  833. thresh_val_id =
  834. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
  835. if (output_val > priv->thresh_val[thresh_val_id])
  836. iio_push_event(indio_dev,
  837. IIO_MOD_EVENT_CODE(
  838. IIO_LIGHT,
  839. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  840. IIO_MOD_LIGHT_CLEAR,
  841. IIO_EV_TYPE_THRESH,
  842. IIO_EV_DIR_RISING),
  843. iio_get_time_ns(indio_dev));
  844. }
  845. if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
  846. thresh_val_id =
  847. GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
  848. if (output_val < priv->thresh_val[thresh_val_id])
  849. iio_push_event(indio_dev,
  850. IIO_MOD_EVENT_CODE(
  851. IIO_LIGHT,
  852. GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  853. IIO_MOD_LIGHT_CLEAR,
  854. IIO_EV_TYPE_THRESH,
  855. IIO_EV_DIR_FALLING),
  856. iio_get_time_ns(indio_dev));
  857. }
  858. }
  859. if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
  860. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
  861. priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
  862. set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
  863. wake_up(&priv->data_ready_queue);
  864. goto done;
  865. }
  866. if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
  867. test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
  868. test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
  869. /* This fires off the trigger. */
  870. irq_work_queue(&priv->work);
  871. done:
  872. return IRQ_HANDLED;
  873. }
  874. static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
  875. {
  876. struct iio_poll_func *pf = data;
  877. struct iio_dev *indio_dev = pf->indio_dev;
  878. struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
  879. size_t d_size = 0;
  880. int i, out_val, ret;
  881. for_each_set_bit(i, indio_dev->active_scan_mask,
  882. indio_dev->masklength) {
  883. ret = regmap_bulk_read(priv->regmap,
  884. GP2AP020A00F_DATA_REG(i),
  885. &priv->buffer[d_size], 2);
  886. if (ret < 0)
  887. goto done;
  888. if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
  889. i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
  890. out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
  891. gp2ap020a00f_output_to_lux(priv, &out_val);
  892. put_unaligned_le32(out_val, &priv->buffer[d_size]);
  893. d_size += 4;
  894. } else {
  895. d_size += 2;
  896. }
  897. }
  898. iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
  899. pf->timestamp);
  900. done:
  901. iio_trigger_notify_done(indio_dev->trig);
  902. return IRQ_HANDLED;
  903. }
  904. static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
  905. enum iio_event_direction event_dir)
  906. {
  907. switch (chan->type) {
  908. case IIO_PROXIMITY:
  909. if (event_dir == IIO_EV_DIR_RISING)
  910. return GP2AP020A00F_PH_L_REG;
  911. else
  912. return GP2AP020A00F_PL_L_REG;
  913. case IIO_LIGHT:
  914. if (event_dir == IIO_EV_DIR_RISING)
  915. return GP2AP020A00F_TH_L_REG;
  916. else
  917. return GP2AP020A00F_TL_L_REG;
  918. default:
  919. break;
  920. }
  921. return -EINVAL;
  922. }
  923. static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
  924. const struct iio_chan_spec *chan,
  925. enum iio_event_type type,
  926. enum iio_event_direction dir,
  927. enum iio_event_info info,
  928. int val, int val2)
  929. {
  930. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  931. bool event_en = false;
  932. u8 thresh_val_id;
  933. u8 thresh_reg_l;
  934. int err = 0;
  935. mutex_lock(&data->lock);
  936. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  937. thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
  938. if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
  939. err = -EINVAL;
  940. goto error_unlock;
  941. }
  942. switch (thresh_reg_l) {
  943. case GP2AP020A00F_TH_L_REG:
  944. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  945. &data->flags);
  946. break;
  947. case GP2AP020A00F_TL_L_REG:
  948. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  949. &data->flags);
  950. break;
  951. case GP2AP020A00F_PH_L_REG:
  952. if (val == 0) {
  953. err = -EINVAL;
  954. goto error_unlock;
  955. }
  956. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  957. &data->flags);
  958. break;
  959. case GP2AP020A00F_PL_L_REG:
  960. if (val == 0) {
  961. err = -EINVAL;
  962. goto error_unlock;
  963. }
  964. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  965. &data->flags);
  966. break;
  967. }
  968. data->thresh_val[thresh_val_id] = val;
  969. err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
  970. event_en);
  971. error_unlock:
  972. mutex_unlock(&data->lock);
  973. return err;
  974. }
  975. static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
  976. const struct iio_chan_spec *chan,
  977. enum iio_event_type type,
  978. enum iio_event_direction dir,
  979. enum iio_event_info info,
  980. int *val, int *val2)
  981. {
  982. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  983. u8 thresh_reg_l;
  984. int err = IIO_VAL_INT;
  985. mutex_lock(&data->lock);
  986. thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
  987. if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
  988. err = -EINVAL;
  989. goto error_unlock;
  990. }
  991. *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
  992. error_unlock:
  993. mutex_unlock(&data->lock);
  994. return err;
  995. }
  996. static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
  997. int state)
  998. {
  999. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1000. enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
  1001. int err;
  1002. cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
  1003. GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
  1004. cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
  1005. GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
  1006. /*
  1007. * In order to enable proximity detection feature in the device
  1008. * both high and low threshold registers have to be written
  1009. * with different values, greater than zero.
  1010. */
  1011. if (state) {
  1012. if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
  1013. return -EINVAL;
  1014. if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
  1015. return -EINVAL;
  1016. }
  1017. err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
  1018. if (err < 0)
  1019. return err;
  1020. err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
  1021. if (err < 0)
  1022. return err;
  1023. free_irq(data->client->irq, indio_dev);
  1024. if (state)
  1025. err = request_threaded_irq(data->client->irq, NULL,
  1026. &gp2ap020a00f_prox_sensing_handler,
  1027. IRQF_TRIGGER_RISING |
  1028. IRQF_TRIGGER_FALLING |
  1029. IRQF_ONESHOT,
  1030. "gp2ap020a00f_prox_sensing",
  1031. indio_dev);
  1032. else {
  1033. err = request_threaded_irq(data->client->irq, NULL,
  1034. &gp2ap020a00f_thresh_event_handler,
  1035. IRQF_TRIGGER_FALLING |
  1036. IRQF_ONESHOT,
  1037. "gp2ap020a00f_thresh_event",
  1038. indio_dev);
  1039. }
  1040. return err;
  1041. }
  1042. static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
  1043. const struct iio_chan_spec *chan,
  1044. enum iio_event_type type,
  1045. enum iio_event_direction dir,
  1046. int state)
  1047. {
  1048. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1049. enum gp2ap020a00f_cmd cmd;
  1050. int err;
  1051. mutex_lock(&data->lock);
  1052. switch (chan->type) {
  1053. case IIO_PROXIMITY:
  1054. err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
  1055. break;
  1056. case IIO_LIGHT:
  1057. if (dir == IIO_EV_DIR_RISING) {
  1058. cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
  1059. GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
  1060. err = gp2ap020a00f_exec_cmd(data, cmd);
  1061. } else {
  1062. cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
  1063. GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
  1064. err = gp2ap020a00f_exec_cmd(data, cmd);
  1065. }
  1066. break;
  1067. default:
  1068. err = -EINVAL;
  1069. }
  1070. mutex_unlock(&data->lock);
  1071. return err;
  1072. }
  1073. static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
  1074. const struct iio_chan_spec *chan,
  1075. enum iio_event_type type,
  1076. enum iio_event_direction dir)
  1077. {
  1078. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1079. int event_en = 0;
  1080. mutex_lock(&data->lock);
  1081. switch (chan->type) {
  1082. case IIO_PROXIMITY:
  1083. if (dir == IIO_EV_DIR_RISING)
  1084. event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
  1085. &data->flags);
  1086. else
  1087. event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
  1088. &data->flags);
  1089. break;
  1090. case IIO_LIGHT:
  1091. if (dir == IIO_EV_DIR_RISING)
  1092. event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
  1093. &data->flags);
  1094. else
  1095. event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
  1096. &data->flags);
  1097. break;
  1098. default:
  1099. event_en = -EINVAL;
  1100. break;
  1101. }
  1102. mutex_unlock(&data->lock);
  1103. return event_en;
  1104. }
  1105. static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
  1106. struct iio_chan_spec const *chan, int *val)
  1107. {
  1108. enum gp2ap020a00f_cmd cmd;
  1109. int err;
  1110. switch (chan->scan_index) {
  1111. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1112. cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
  1113. break;
  1114. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1115. cmd = GP2AP020A00F_CMD_READ_RAW_IR;
  1116. break;
  1117. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1118. cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
  1119. break;
  1120. default:
  1121. return -EINVAL;
  1122. }
  1123. err = gp2ap020a00f_exec_cmd(data, cmd);
  1124. if (err < 0) {
  1125. dev_err(&data->client->dev,
  1126. "gp2ap020a00f_exec_cmd failed\n");
  1127. goto error_ret;
  1128. }
  1129. err = gp2ap020a00f_read_output(data, chan->address, val);
  1130. if (err < 0)
  1131. dev_err(&data->client->dev,
  1132. "gp2ap020a00f_read_output failed\n");
  1133. err = gp2ap020a00f_set_operation_mode(data,
  1134. GP2AP020A00F_OPMODE_SHUTDOWN);
  1135. if (err < 0)
  1136. dev_err(&data->client->dev,
  1137. "Failed to shut down the device.\n");
  1138. if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
  1139. cmd == GP2AP020A00F_CMD_READ_RAW_IR)
  1140. gp2ap020a00f_output_to_lux(data, val);
  1141. error_ret:
  1142. return err;
  1143. }
  1144. static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
  1145. struct iio_chan_spec const *chan,
  1146. int *val, int *val2,
  1147. long mask)
  1148. {
  1149. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1150. int err = -EINVAL;
  1151. if (mask == IIO_CHAN_INFO_RAW) {
  1152. err = iio_device_claim_direct_mode(indio_dev);
  1153. if (err)
  1154. return err;
  1155. err = gp2ap020a00f_read_channel(data, chan, val);
  1156. iio_device_release_direct_mode(indio_dev);
  1157. }
  1158. return err < 0 ? err : IIO_VAL_INT;
  1159. }
  1160. static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
  1161. {
  1162. .type = IIO_EV_TYPE_THRESH,
  1163. .dir = IIO_EV_DIR_RISING,
  1164. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1165. BIT(IIO_EV_INFO_ENABLE),
  1166. }, {
  1167. .type = IIO_EV_TYPE_THRESH,
  1168. .dir = IIO_EV_DIR_FALLING,
  1169. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1170. BIT(IIO_EV_INFO_ENABLE),
  1171. },
  1172. };
  1173. static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
  1174. {
  1175. .type = IIO_EV_TYPE_ROC,
  1176. .dir = IIO_EV_DIR_RISING,
  1177. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1178. BIT(IIO_EV_INFO_ENABLE),
  1179. }, {
  1180. .type = IIO_EV_TYPE_ROC,
  1181. .dir = IIO_EV_DIR_FALLING,
  1182. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  1183. BIT(IIO_EV_INFO_ENABLE),
  1184. },
  1185. };
  1186. static const struct iio_chan_spec gp2ap020a00f_channels[] = {
  1187. {
  1188. .type = IIO_LIGHT,
  1189. .channel2 = IIO_MOD_LIGHT_CLEAR,
  1190. .modified = 1,
  1191. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1192. .scan_type = {
  1193. .sign = 'u',
  1194. .realbits = 24,
  1195. .shift = 0,
  1196. .storagebits = 32,
  1197. .endianness = IIO_LE,
  1198. },
  1199. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
  1200. .address = GP2AP020A00F_D0_L_REG,
  1201. .event_spec = gp2ap020a00f_event_spec_light,
  1202. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
  1203. },
  1204. {
  1205. .type = IIO_LIGHT,
  1206. .channel2 = IIO_MOD_LIGHT_IR,
  1207. .modified = 1,
  1208. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1209. .scan_type = {
  1210. .sign = 'u',
  1211. .realbits = 24,
  1212. .shift = 0,
  1213. .storagebits = 32,
  1214. .endianness = IIO_LE,
  1215. },
  1216. .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
  1217. .address = GP2AP020A00F_D1_L_REG,
  1218. },
  1219. {
  1220. .type = IIO_PROXIMITY,
  1221. .modified = 0,
  1222. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  1223. .scan_type = {
  1224. .sign = 'u',
  1225. .realbits = 16,
  1226. .shift = 0,
  1227. .storagebits = 16,
  1228. .endianness = IIO_LE,
  1229. },
  1230. .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
  1231. .address = GP2AP020A00F_D2_L_REG,
  1232. .event_spec = gp2ap020a00f_event_spec_prox,
  1233. .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
  1234. },
  1235. IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
  1236. };
  1237. static const struct iio_info gp2ap020a00f_info = {
  1238. .read_raw = &gp2ap020a00f_read_raw,
  1239. .read_event_value = &gp2ap020a00f_read_event_val,
  1240. .read_event_config = &gp2ap020a00f_read_event_config,
  1241. .write_event_value = &gp2ap020a00f_write_event_val,
  1242. .write_event_config = &gp2ap020a00f_write_event_config,
  1243. };
  1244. static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
  1245. {
  1246. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1247. int i, err = 0;
  1248. mutex_lock(&data->lock);
  1249. /*
  1250. * Enable triggers according to the scan_mask. Enabling either
  1251. * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
  1252. * module in the device, which generates samples in both D0 (clear)
  1253. * and D1 (ir) registers. As the two registers are bound to the
  1254. * two separate IIO channels they are treated in the driver logic
  1255. * as if they were controlled independently.
  1256. */
  1257. for_each_set_bit(i, indio_dev->active_scan_mask,
  1258. indio_dev->masklength) {
  1259. switch (i) {
  1260. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1261. err = gp2ap020a00f_exec_cmd(data,
  1262. GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
  1263. break;
  1264. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1265. err = gp2ap020a00f_exec_cmd(data,
  1266. GP2AP020A00F_CMD_TRIGGER_IR_EN);
  1267. break;
  1268. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1269. err = gp2ap020a00f_exec_cmd(data,
  1270. GP2AP020A00F_CMD_TRIGGER_PROX_EN);
  1271. break;
  1272. }
  1273. }
  1274. if (err < 0)
  1275. goto error_unlock;
  1276. data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  1277. if (!data->buffer)
  1278. err = -ENOMEM;
  1279. error_unlock:
  1280. mutex_unlock(&data->lock);
  1281. return err;
  1282. }
  1283. static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
  1284. {
  1285. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1286. int i, err = 0;
  1287. mutex_lock(&data->lock);
  1288. for_each_set_bit(i, indio_dev->active_scan_mask,
  1289. indio_dev->masklength) {
  1290. switch (i) {
  1291. case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
  1292. err = gp2ap020a00f_exec_cmd(data,
  1293. GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
  1294. break;
  1295. case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
  1296. err = gp2ap020a00f_exec_cmd(data,
  1297. GP2AP020A00F_CMD_TRIGGER_IR_DIS);
  1298. break;
  1299. case GP2AP020A00F_SCAN_MODE_PROXIMITY:
  1300. err = gp2ap020a00f_exec_cmd(data,
  1301. GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
  1302. break;
  1303. }
  1304. }
  1305. if (err == 0)
  1306. kfree(data->buffer);
  1307. mutex_unlock(&data->lock);
  1308. return err;
  1309. }
  1310. static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
  1311. .postenable = &gp2ap020a00f_buffer_postenable,
  1312. .predisable = &gp2ap020a00f_buffer_predisable,
  1313. };
  1314. static int gp2ap020a00f_probe(struct i2c_client *client,
  1315. const struct i2c_device_id *id)
  1316. {
  1317. struct gp2ap020a00f_data *data;
  1318. struct iio_dev *indio_dev;
  1319. struct regmap *regmap;
  1320. int err;
  1321. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1322. if (!indio_dev)
  1323. return -ENOMEM;
  1324. data = iio_priv(indio_dev);
  1325. data->vled_reg = devm_regulator_get(&client->dev, "vled");
  1326. if (IS_ERR(data->vled_reg))
  1327. return PTR_ERR(data->vled_reg);
  1328. err = regulator_enable(data->vled_reg);
  1329. if (err)
  1330. return err;
  1331. regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
  1332. if (IS_ERR(regmap)) {
  1333. dev_err(&client->dev, "Regmap initialization failed.\n");
  1334. err = PTR_ERR(regmap);
  1335. goto error_regulator_disable;
  1336. }
  1337. /* Initialize device registers */
  1338. err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
  1339. gp2ap020a00f_reg_init_tab,
  1340. ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
  1341. if (err < 0) {
  1342. dev_err(&client->dev, "Device initialization failed.\n");
  1343. goto error_regulator_disable;
  1344. }
  1345. i2c_set_clientdata(client, indio_dev);
  1346. data->client = client;
  1347. data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
  1348. data->regmap = regmap;
  1349. init_waitqueue_head(&data->data_ready_queue);
  1350. mutex_init(&data->lock);
  1351. indio_dev->channels = gp2ap020a00f_channels;
  1352. indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
  1353. indio_dev->info = &gp2ap020a00f_info;
  1354. indio_dev->name = id->name;
  1355. indio_dev->modes = INDIO_DIRECT_MODE;
  1356. /* Allocate buffer */
  1357. err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  1358. &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
  1359. if (err < 0)
  1360. goto error_regulator_disable;
  1361. /* Allocate trigger */
  1362. data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
  1363. indio_dev->name);
  1364. if (data->trig == NULL) {
  1365. err = -ENOMEM;
  1366. dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
  1367. goto error_uninit_buffer;
  1368. }
  1369. /* This needs to be requested here for read_raw calls to work. */
  1370. err = request_threaded_irq(client->irq, NULL,
  1371. &gp2ap020a00f_thresh_event_handler,
  1372. IRQF_TRIGGER_FALLING |
  1373. IRQF_ONESHOT,
  1374. "gp2ap020a00f_als_event",
  1375. indio_dev);
  1376. if (err < 0) {
  1377. dev_err(&client->dev, "Irq request failed.\n");
  1378. goto error_uninit_buffer;
  1379. }
  1380. init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
  1381. err = iio_trigger_register(data->trig);
  1382. if (err < 0) {
  1383. dev_err(&client->dev, "Failed to register iio trigger.\n");
  1384. goto error_free_irq;
  1385. }
  1386. err = iio_device_register(indio_dev);
  1387. if (err < 0)
  1388. goto error_trigger_unregister;
  1389. return 0;
  1390. error_trigger_unregister:
  1391. iio_trigger_unregister(data->trig);
  1392. error_free_irq:
  1393. free_irq(client->irq, indio_dev);
  1394. error_uninit_buffer:
  1395. iio_triggered_buffer_cleanup(indio_dev);
  1396. error_regulator_disable:
  1397. regulator_disable(data->vled_reg);
  1398. return err;
  1399. }
  1400. static void gp2ap020a00f_remove(struct i2c_client *client)
  1401. {
  1402. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1403. struct gp2ap020a00f_data *data = iio_priv(indio_dev);
  1404. int err;
  1405. err = gp2ap020a00f_set_operation_mode(data,
  1406. GP2AP020A00F_OPMODE_SHUTDOWN);
  1407. if (err < 0)
  1408. dev_err(&indio_dev->dev, "Failed to power off the device.\n");
  1409. iio_device_unregister(indio_dev);
  1410. iio_trigger_unregister(data->trig);
  1411. free_irq(client->irq, indio_dev);
  1412. iio_triggered_buffer_cleanup(indio_dev);
  1413. regulator_disable(data->vled_reg);
  1414. }
  1415. static const struct i2c_device_id gp2ap020a00f_id[] = {
  1416. { GP2A_I2C_NAME, 0 },
  1417. { }
  1418. };
  1419. MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
  1420. static const struct of_device_id gp2ap020a00f_of_match[] = {
  1421. { .compatible = "sharp,gp2ap020a00f" },
  1422. { }
  1423. };
  1424. MODULE_DEVICE_TABLE(of, gp2ap020a00f_of_match);
  1425. static struct i2c_driver gp2ap020a00f_driver = {
  1426. .driver = {
  1427. .name = GP2A_I2C_NAME,
  1428. .of_match_table = gp2ap020a00f_of_match,
  1429. },
  1430. .probe = gp2ap020a00f_probe,
  1431. .remove = gp2ap020a00f_remove,
  1432. .id_table = gp2ap020a00f_id,
  1433. };
  1434. module_i2c_driver(gp2ap020a00f_driver);
  1435. MODULE_AUTHOR("Jacek Anaszewski <[email protected]>");
  1436. MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
  1437. MODULE_LICENSE("GPL v2");