industrialio-buffer-dmaengine.c 8.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2014-2015 Analog Devices Inc.
  4. * Author: Lars-Peter Clausen <[email protected]>
  5. */
  6. #include <linux/slab.h>
  7. #include <linux/kernel.h>
  8. #include <linux/dmaengine.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/err.h>
  12. #include <linux/module.h>
  13. #include <linux/iio/iio.h>
  14. #include <linux/iio/sysfs.h>
  15. #include <linux/iio/buffer.h>
  16. #include <linux/iio/buffer_impl.h>
  17. #include <linux/iio/buffer-dma.h>
  18. #include <linux/iio/buffer-dmaengine.h>
  19. /*
  20. * The IIO DMAengine buffer combines the generic IIO DMA buffer infrastructure
  21. * with the DMAengine framework. The generic IIO DMA buffer infrastructure is
  22. * used to manage the buffer memory and implement the IIO buffer operations
  23. * while the DMAengine framework is used to perform the DMA transfers. Combined
  24. * this results in a device independent fully functional DMA buffer
  25. * implementation that can be used by device drivers for peripherals which are
  26. * connected to a DMA controller which has a DMAengine driver implementation.
  27. */
  28. struct dmaengine_buffer {
  29. struct iio_dma_buffer_queue queue;
  30. struct dma_chan *chan;
  31. struct list_head active;
  32. size_t align;
  33. size_t max_size;
  34. };
  35. static struct dmaengine_buffer *iio_buffer_to_dmaengine_buffer(
  36. struct iio_buffer *buffer)
  37. {
  38. return container_of(buffer, struct dmaengine_buffer, queue.buffer);
  39. }
  40. static void iio_dmaengine_buffer_block_done(void *data,
  41. const struct dmaengine_result *result)
  42. {
  43. struct iio_dma_buffer_block *block = data;
  44. unsigned long flags;
  45. spin_lock_irqsave(&block->queue->list_lock, flags);
  46. list_del(&block->head);
  47. spin_unlock_irqrestore(&block->queue->list_lock, flags);
  48. block->bytes_used -= result->residue;
  49. iio_dma_buffer_block_done(block);
  50. }
  51. static int iio_dmaengine_buffer_submit_block(struct iio_dma_buffer_queue *queue,
  52. struct iio_dma_buffer_block *block)
  53. {
  54. struct dmaengine_buffer *dmaengine_buffer =
  55. iio_buffer_to_dmaengine_buffer(&queue->buffer);
  56. struct dma_async_tx_descriptor *desc;
  57. dma_cookie_t cookie;
  58. block->bytes_used = min(block->size, dmaengine_buffer->max_size);
  59. block->bytes_used = round_down(block->bytes_used,
  60. dmaengine_buffer->align);
  61. desc = dmaengine_prep_slave_single(dmaengine_buffer->chan,
  62. block->phys_addr, block->bytes_used, DMA_DEV_TO_MEM,
  63. DMA_PREP_INTERRUPT);
  64. if (!desc)
  65. return -ENOMEM;
  66. desc->callback_result = iio_dmaengine_buffer_block_done;
  67. desc->callback_param = block;
  68. cookie = dmaengine_submit(desc);
  69. if (dma_submit_error(cookie))
  70. return dma_submit_error(cookie);
  71. spin_lock_irq(&dmaengine_buffer->queue.list_lock);
  72. list_add_tail(&block->head, &dmaengine_buffer->active);
  73. spin_unlock_irq(&dmaengine_buffer->queue.list_lock);
  74. dma_async_issue_pending(dmaengine_buffer->chan);
  75. return 0;
  76. }
  77. static void iio_dmaengine_buffer_abort(struct iio_dma_buffer_queue *queue)
  78. {
  79. struct dmaengine_buffer *dmaengine_buffer =
  80. iio_buffer_to_dmaengine_buffer(&queue->buffer);
  81. dmaengine_terminate_sync(dmaengine_buffer->chan);
  82. iio_dma_buffer_block_list_abort(queue, &dmaengine_buffer->active);
  83. }
  84. static void iio_dmaengine_buffer_release(struct iio_buffer *buf)
  85. {
  86. struct dmaengine_buffer *dmaengine_buffer =
  87. iio_buffer_to_dmaengine_buffer(buf);
  88. iio_dma_buffer_release(&dmaengine_buffer->queue);
  89. kfree(dmaengine_buffer);
  90. }
  91. static const struct iio_buffer_access_funcs iio_dmaengine_buffer_ops = {
  92. .read = iio_dma_buffer_read,
  93. .set_bytes_per_datum = iio_dma_buffer_set_bytes_per_datum,
  94. .set_length = iio_dma_buffer_set_length,
  95. .request_update = iio_dma_buffer_request_update,
  96. .enable = iio_dma_buffer_enable,
  97. .disable = iio_dma_buffer_disable,
  98. .data_available = iio_dma_buffer_data_available,
  99. .release = iio_dmaengine_buffer_release,
  100. .modes = INDIO_BUFFER_HARDWARE,
  101. .flags = INDIO_BUFFER_FLAG_FIXED_WATERMARK,
  102. };
  103. static const struct iio_dma_buffer_ops iio_dmaengine_default_ops = {
  104. .submit = iio_dmaengine_buffer_submit_block,
  105. .abort = iio_dmaengine_buffer_abort,
  106. };
  107. static ssize_t iio_dmaengine_buffer_get_length_align(struct device *dev,
  108. struct device_attribute *attr, char *buf)
  109. {
  110. struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer;
  111. struct dmaengine_buffer *dmaengine_buffer =
  112. iio_buffer_to_dmaengine_buffer(buffer);
  113. return sysfs_emit(buf, "%zu\n", dmaengine_buffer->align);
  114. }
  115. static IIO_DEVICE_ATTR(length_align_bytes, 0444,
  116. iio_dmaengine_buffer_get_length_align, NULL, 0);
  117. static const struct attribute *iio_dmaengine_buffer_attrs[] = {
  118. &iio_dev_attr_length_align_bytes.dev_attr.attr,
  119. NULL,
  120. };
  121. /**
  122. * iio_dmaengine_buffer_alloc() - Allocate new buffer which uses DMAengine
  123. * @dev: Parent device for the buffer
  124. * @channel: DMA channel name, typically "rx".
  125. *
  126. * This allocates a new IIO buffer which internally uses the DMAengine framework
  127. * to perform its transfers. The parent device will be used to request the DMA
  128. * channel.
  129. *
  130. * Once done using the buffer iio_dmaengine_buffer_free() should be used to
  131. * release it.
  132. */
  133. static struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
  134. const char *channel)
  135. {
  136. struct dmaengine_buffer *dmaengine_buffer;
  137. unsigned int width, src_width, dest_width;
  138. struct dma_slave_caps caps;
  139. struct dma_chan *chan;
  140. int ret;
  141. dmaengine_buffer = kzalloc(sizeof(*dmaengine_buffer), GFP_KERNEL);
  142. if (!dmaengine_buffer)
  143. return ERR_PTR(-ENOMEM);
  144. chan = dma_request_chan(dev, channel);
  145. if (IS_ERR(chan)) {
  146. ret = PTR_ERR(chan);
  147. goto err_free;
  148. }
  149. ret = dma_get_slave_caps(chan, &caps);
  150. if (ret < 0)
  151. goto err_free;
  152. /* Needs to be aligned to the maximum of the minimums */
  153. if (caps.src_addr_widths)
  154. src_width = __ffs(caps.src_addr_widths);
  155. else
  156. src_width = 1;
  157. if (caps.dst_addr_widths)
  158. dest_width = __ffs(caps.dst_addr_widths);
  159. else
  160. dest_width = 1;
  161. width = max(src_width, dest_width);
  162. INIT_LIST_HEAD(&dmaengine_buffer->active);
  163. dmaengine_buffer->chan = chan;
  164. dmaengine_buffer->align = width;
  165. dmaengine_buffer->max_size = dma_get_max_seg_size(chan->device->dev);
  166. iio_dma_buffer_init(&dmaengine_buffer->queue, chan->device->dev,
  167. &iio_dmaengine_default_ops);
  168. dmaengine_buffer->queue.buffer.attrs = iio_dmaengine_buffer_attrs;
  169. dmaengine_buffer->queue.buffer.access = &iio_dmaengine_buffer_ops;
  170. return &dmaengine_buffer->queue.buffer;
  171. err_free:
  172. kfree(dmaengine_buffer);
  173. return ERR_PTR(ret);
  174. }
  175. /**
  176. * iio_dmaengine_buffer_free() - Free dmaengine buffer
  177. * @buffer: Buffer to free
  178. *
  179. * Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
  180. */
  181. static void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
  182. {
  183. struct dmaengine_buffer *dmaengine_buffer =
  184. iio_buffer_to_dmaengine_buffer(buffer);
  185. iio_dma_buffer_exit(&dmaengine_buffer->queue);
  186. dma_release_channel(dmaengine_buffer->chan);
  187. iio_buffer_put(buffer);
  188. }
  189. static void __devm_iio_dmaengine_buffer_free(void *buffer)
  190. {
  191. iio_dmaengine_buffer_free(buffer);
  192. }
  193. /**
  194. * devm_iio_dmaengine_buffer_alloc() - Resource-managed iio_dmaengine_buffer_alloc()
  195. * @dev: Parent device for the buffer
  196. * @channel: DMA channel name, typically "rx".
  197. *
  198. * This allocates a new IIO buffer which internally uses the DMAengine framework
  199. * to perform its transfers. The parent device will be used to request the DMA
  200. * channel.
  201. *
  202. * The buffer will be automatically de-allocated once the device gets destroyed.
  203. */
  204. static struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev,
  205. const char *channel)
  206. {
  207. struct iio_buffer *buffer;
  208. int ret;
  209. buffer = iio_dmaengine_buffer_alloc(dev, channel);
  210. if (IS_ERR(buffer))
  211. return buffer;
  212. ret = devm_add_action_or_reset(dev, __devm_iio_dmaengine_buffer_free,
  213. buffer);
  214. if (ret)
  215. return ERR_PTR(ret);
  216. return buffer;
  217. }
  218. /**
  219. * devm_iio_dmaengine_buffer_setup() - Setup a DMA buffer for an IIO device
  220. * @dev: Parent device for the buffer
  221. * @indio_dev: IIO device to which to attach this buffer.
  222. * @channel: DMA channel name, typically "rx".
  223. *
  224. * This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
  225. * and attaches it to an IIO device with iio_device_attach_buffer().
  226. * It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
  227. * IIO device.
  228. */
  229. int devm_iio_dmaengine_buffer_setup(struct device *dev,
  230. struct iio_dev *indio_dev,
  231. const char *channel)
  232. {
  233. struct iio_buffer *buffer;
  234. buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent,
  235. channel);
  236. if (IS_ERR(buffer))
  237. return PTR_ERR(buffer);
  238. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  239. return iio_device_attach_buffer(indio_dev, buffer);
  240. }
  241. EXPORT_SYMBOL_GPL(devm_iio_dmaengine_buffer_setup);
  242. MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");
  243. MODULE_DESCRIPTION("DMA buffer for the IIO framework");
  244. MODULE_LICENSE("GPL");