stx104.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * IIO driver for the Apex Embedded Systems STX104
  4. * Copyright (C) 2016 William Breathitt Gray
  5. */
  6. #include <linux/bitops.h>
  7. #include <linux/device.h>
  8. #include <linux/errno.h>
  9. #include <linux/gpio/driver.h>
  10. #include <linux/iio/iio.h>
  11. #include <linux/iio/types.h>
  12. #include <linux/io.h>
  13. #include <linux/ioport.h>
  14. #include <linux/isa.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/mutex.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/types.h>
  21. #define STX104_OUT_CHAN(chan) { \
  22. .type = IIO_VOLTAGE, \
  23. .channel = chan, \
  24. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  25. .indexed = 1, \
  26. .output = 1 \
  27. }
  28. #define STX104_IN_CHAN(chan, diff) { \
  29. .type = IIO_VOLTAGE, \
  30. .channel = chan, \
  31. .channel2 = chan, \
  32. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_HARDWAREGAIN) | \
  33. BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), \
  34. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  35. .indexed = 1, \
  36. .differential = diff \
  37. }
  38. #define STX104_NUM_OUT_CHAN 2
  39. #define STX104_EXTENT 16
  40. static unsigned int base[max_num_isa_dev(STX104_EXTENT)];
  41. static unsigned int num_stx104;
  42. module_param_hw_array(base, uint, ioport, &num_stx104, 0);
  43. MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
  44. /**
  45. * struct stx104_reg - device register structure
  46. * @ssr_ad: Software Strobe Register and ADC Data
  47. * @achan: ADC Channel
  48. * @dio: Digital I/O
  49. * @dac: DAC Channels
  50. * @cir_asr: Clear Interrupts and ADC Status
  51. * @acr: ADC Control
  52. * @pccr_fsh: Pacer Clock Control and FIFO Status MSB
  53. * @acfg: ADC Configuration
  54. */
  55. struct stx104_reg {
  56. u16 ssr_ad;
  57. u8 achan;
  58. u8 dio;
  59. u16 dac[2];
  60. u8 cir_asr;
  61. u8 acr;
  62. u8 pccr_fsh;
  63. u8 acfg;
  64. };
  65. /**
  66. * struct stx104_iio - IIO device private data structure
  67. * @lock: synchronization lock to prevent I/O race conditions
  68. * @chan_out_states: channels' output states
  69. * @reg: I/O address offset for the device registers
  70. */
  71. struct stx104_iio {
  72. struct mutex lock;
  73. unsigned int chan_out_states[STX104_NUM_OUT_CHAN];
  74. struct stx104_reg __iomem *reg;
  75. };
  76. /**
  77. * struct stx104_gpio - GPIO device private data structure
  78. * @chip: instance of the gpio_chip
  79. * @lock: synchronization lock to prevent I/O race conditions
  80. * @base: base port address of the GPIO device
  81. * @out_state: output bits state
  82. */
  83. struct stx104_gpio {
  84. struct gpio_chip chip;
  85. spinlock_t lock;
  86. u8 __iomem *base;
  87. unsigned int out_state;
  88. };
  89. static int stx104_read_raw(struct iio_dev *indio_dev,
  90. struct iio_chan_spec const *chan, int *val, int *val2, long mask)
  91. {
  92. struct stx104_iio *const priv = iio_priv(indio_dev);
  93. struct stx104_reg __iomem *const reg = priv->reg;
  94. unsigned int adc_config;
  95. int adbu;
  96. int gain;
  97. switch (mask) {
  98. case IIO_CHAN_INFO_HARDWAREGAIN:
  99. /* get gain configuration */
  100. adc_config = ioread8(&reg->acfg);
  101. gain = adc_config & 0x3;
  102. *val = 1 << gain;
  103. return IIO_VAL_INT;
  104. case IIO_CHAN_INFO_RAW:
  105. if (chan->output) {
  106. *val = priv->chan_out_states[chan->channel];
  107. return IIO_VAL_INT;
  108. }
  109. mutex_lock(&priv->lock);
  110. /* select ADC channel */
  111. iowrite8(chan->channel | (chan->channel << 4), &reg->achan);
  112. /* trigger ADC sample capture by writing to the 8-bit
  113. * Software Strobe Register and wait for completion
  114. */
  115. iowrite8(0, &reg->ssr_ad);
  116. while (ioread8(&reg->cir_asr) & BIT(7));
  117. *val = ioread16(&reg->ssr_ad);
  118. mutex_unlock(&priv->lock);
  119. return IIO_VAL_INT;
  120. case IIO_CHAN_INFO_OFFSET:
  121. /* get ADC bipolar/unipolar configuration */
  122. adc_config = ioread8(&reg->acfg);
  123. adbu = !(adc_config & BIT(2));
  124. *val = -32768 * adbu;
  125. return IIO_VAL_INT;
  126. case IIO_CHAN_INFO_SCALE:
  127. /* get ADC bipolar/unipolar and gain configuration */
  128. adc_config = ioread8(&reg->acfg);
  129. adbu = !(adc_config & BIT(2));
  130. gain = adc_config & 0x3;
  131. *val = 5;
  132. *val2 = 15 - adbu + gain;
  133. return IIO_VAL_FRACTIONAL_LOG2;
  134. }
  135. return -EINVAL;
  136. }
  137. static int stx104_write_raw(struct iio_dev *indio_dev,
  138. struct iio_chan_spec const *chan, int val, int val2, long mask)
  139. {
  140. struct stx104_iio *const priv = iio_priv(indio_dev);
  141. switch (mask) {
  142. case IIO_CHAN_INFO_HARDWAREGAIN:
  143. /* Only four gain states (x1, x2, x4, x8) */
  144. switch (val) {
  145. case 1:
  146. iowrite8(0, &priv->reg->acfg);
  147. break;
  148. case 2:
  149. iowrite8(1, &priv->reg->acfg);
  150. break;
  151. case 4:
  152. iowrite8(2, &priv->reg->acfg);
  153. break;
  154. case 8:
  155. iowrite8(3, &priv->reg->acfg);
  156. break;
  157. default:
  158. return -EINVAL;
  159. }
  160. return 0;
  161. case IIO_CHAN_INFO_RAW:
  162. if (chan->output) {
  163. /* DAC can only accept up to a 16-bit value */
  164. if ((unsigned int)val > 65535)
  165. return -EINVAL;
  166. mutex_lock(&priv->lock);
  167. priv->chan_out_states[chan->channel] = val;
  168. iowrite16(val, &priv->reg->dac[chan->channel]);
  169. mutex_unlock(&priv->lock);
  170. return 0;
  171. }
  172. return -EINVAL;
  173. }
  174. return -EINVAL;
  175. }
  176. static const struct iio_info stx104_info = {
  177. .read_raw = stx104_read_raw,
  178. .write_raw = stx104_write_raw
  179. };
  180. /* single-ended input channels configuration */
  181. static const struct iio_chan_spec stx104_channels_sing[] = {
  182. STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
  183. STX104_IN_CHAN(0, 0), STX104_IN_CHAN(1, 0), STX104_IN_CHAN(2, 0),
  184. STX104_IN_CHAN(3, 0), STX104_IN_CHAN(4, 0), STX104_IN_CHAN(5, 0),
  185. STX104_IN_CHAN(6, 0), STX104_IN_CHAN(7, 0), STX104_IN_CHAN(8, 0),
  186. STX104_IN_CHAN(9, 0), STX104_IN_CHAN(10, 0), STX104_IN_CHAN(11, 0),
  187. STX104_IN_CHAN(12, 0), STX104_IN_CHAN(13, 0), STX104_IN_CHAN(14, 0),
  188. STX104_IN_CHAN(15, 0)
  189. };
  190. /* differential input channels configuration */
  191. static const struct iio_chan_spec stx104_channels_diff[] = {
  192. STX104_OUT_CHAN(0), STX104_OUT_CHAN(1),
  193. STX104_IN_CHAN(0, 1), STX104_IN_CHAN(1, 1), STX104_IN_CHAN(2, 1),
  194. STX104_IN_CHAN(3, 1), STX104_IN_CHAN(4, 1), STX104_IN_CHAN(5, 1),
  195. STX104_IN_CHAN(6, 1), STX104_IN_CHAN(7, 1)
  196. };
  197. static int stx104_gpio_get_direction(struct gpio_chip *chip,
  198. unsigned int offset)
  199. {
  200. /* GPIO 0-3 are input only, while the rest are output only */
  201. if (offset < 4)
  202. return 1;
  203. return 0;
  204. }
  205. static int stx104_gpio_direction_input(struct gpio_chip *chip,
  206. unsigned int offset)
  207. {
  208. if (offset >= 4)
  209. return -EINVAL;
  210. return 0;
  211. }
  212. static int stx104_gpio_direction_output(struct gpio_chip *chip,
  213. unsigned int offset, int value)
  214. {
  215. if (offset < 4)
  216. return -EINVAL;
  217. chip->set(chip, offset, value);
  218. return 0;
  219. }
  220. static int stx104_gpio_get(struct gpio_chip *chip, unsigned int offset)
  221. {
  222. struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
  223. if (offset >= 4)
  224. return -EINVAL;
  225. return !!(ioread8(stx104gpio->base) & BIT(offset));
  226. }
  227. static int stx104_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
  228. unsigned long *bits)
  229. {
  230. struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
  231. *bits = ioread8(stx104gpio->base);
  232. return 0;
  233. }
  234. static void stx104_gpio_set(struct gpio_chip *chip, unsigned int offset,
  235. int value)
  236. {
  237. struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
  238. const unsigned int mask = BIT(offset) >> 4;
  239. unsigned long flags;
  240. if (offset < 4)
  241. return;
  242. spin_lock_irqsave(&stx104gpio->lock, flags);
  243. if (value)
  244. stx104gpio->out_state |= mask;
  245. else
  246. stx104gpio->out_state &= ~mask;
  247. iowrite8(stx104gpio->out_state, stx104gpio->base);
  248. spin_unlock_irqrestore(&stx104gpio->lock, flags);
  249. }
  250. #define STX104_NGPIO 8
  251. static const char *stx104_names[STX104_NGPIO] = {
  252. "DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3"
  253. };
  254. static void stx104_gpio_set_multiple(struct gpio_chip *chip,
  255. unsigned long *mask, unsigned long *bits)
  256. {
  257. struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
  258. unsigned long flags;
  259. /* verify masked GPIO are output */
  260. if (!(*mask & 0xF0))
  261. return;
  262. *mask >>= 4;
  263. *bits >>= 4;
  264. spin_lock_irqsave(&stx104gpio->lock, flags);
  265. stx104gpio->out_state &= ~*mask;
  266. stx104gpio->out_state |= *mask & *bits;
  267. iowrite8(stx104gpio->out_state, stx104gpio->base);
  268. spin_unlock_irqrestore(&stx104gpio->lock, flags);
  269. }
  270. static int stx104_probe(struct device *dev, unsigned int id)
  271. {
  272. struct iio_dev *indio_dev;
  273. struct stx104_iio *priv;
  274. struct stx104_gpio *stx104gpio;
  275. int err;
  276. indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
  277. if (!indio_dev)
  278. return -ENOMEM;
  279. stx104gpio = devm_kzalloc(dev, sizeof(*stx104gpio), GFP_KERNEL);
  280. if (!stx104gpio)
  281. return -ENOMEM;
  282. if (!devm_request_region(dev, base[id], STX104_EXTENT,
  283. dev_name(dev))) {
  284. dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
  285. base[id], base[id] + STX104_EXTENT);
  286. return -EBUSY;
  287. }
  288. priv = iio_priv(indio_dev);
  289. priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT);
  290. if (!priv->reg)
  291. return -ENOMEM;
  292. indio_dev->info = &stx104_info;
  293. indio_dev->modes = INDIO_DIRECT_MODE;
  294. /* determine if differential inputs */
  295. if (ioread8(&priv->reg->cir_asr) & BIT(5)) {
  296. indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
  297. indio_dev->channels = stx104_channels_diff;
  298. } else {
  299. indio_dev->num_channels = ARRAY_SIZE(stx104_channels_sing);
  300. indio_dev->channels = stx104_channels_sing;
  301. }
  302. indio_dev->name = dev_name(dev);
  303. mutex_init(&priv->lock);
  304. /* configure device for software trigger operation */
  305. iowrite8(0, &priv->reg->acr);
  306. /* initialize gain setting to x1 */
  307. iowrite8(0, &priv->reg->acfg);
  308. /* initialize DAC output to 0V */
  309. iowrite16(0, &priv->reg->dac[0]);
  310. iowrite16(0, &priv->reg->dac[1]);
  311. stx104gpio->chip.label = dev_name(dev);
  312. stx104gpio->chip.parent = dev;
  313. stx104gpio->chip.owner = THIS_MODULE;
  314. stx104gpio->chip.base = -1;
  315. stx104gpio->chip.ngpio = STX104_NGPIO;
  316. stx104gpio->chip.names = stx104_names;
  317. stx104gpio->chip.get_direction = stx104_gpio_get_direction;
  318. stx104gpio->chip.direction_input = stx104_gpio_direction_input;
  319. stx104gpio->chip.direction_output = stx104_gpio_direction_output;
  320. stx104gpio->chip.get = stx104_gpio_get;
  321. stx104gpio->chip.get_multiple = stx104_gpio_get_multiple;
  322. stx104gpio->chip.set = stx104_gpio_set;
  323. stx104gpio->chip.set_multiple = stx104_gpio_set_multiple;
  324. stx104gpio->base = &priv->reg->dio;
  325. stx104gpio->out_state = 0x0;
  326. spin_lock_init(&stx104gpio->lock);
  327. err = devm_gpiochip_add_data(dev, &stx104gpio->chip, stx104gpio);
  328. if (err) {
  329. dev_err(dev, "GPIO registering failed (%d)\n", err);
  330. return err;
  331. }
  332. return devm_iio_device_register(dev, indio_dev);
  333. }
  334. static struct isa_driver stx104_driver = {
  335. .probe = stx104_probe,
  336. .driver = {
  337. .name = "stx104"
  338. },
  339. };
  340. module_isa_driver(stx104_driver, num_stx104);
  341. MODULE_AUTHOR("William Breathitt Gray <[email protected]>");
  342. MODULE_DESCRIPTION("Apex Embedded Systems STX104 IIO driver");
  343. MODULE_LICENSE("GPL v2");