ti-adc0832.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
  4. *
  5. * Copyright (c) 2016 Akinobu Mita <[email protected]>
  6. *
  7. * Datasheet: https://www.ti.com/lit/ds/symlink/adc0832-n.pdf
  8. */
  9. #include <linux/module.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/iio/iio.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/iio/buffer.h>
  15. #include <linux/iio/trigger.h>
  16. #include <linux/iio/triggered_buffer.h>
  17. #include <linux/iio/trigger_consumer.h>
  18. enum {
  19. adc0831,
  20. adc0832,
  21. adc0834,
  22. adc0838,
  23. };
  24. struct adc0832 {
  25. struct spi_device *spi;
  26. struct regulator *reg;
  27. struct mutex lock;
  28. u8 mux_bits;
  29. /*
  30. * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
  31. * May be shorter if not all channels are enabled subject
  32. * to the timestamp remaining 8 byte aligned.
  33. */
  34. u8 data[24] __aligned(8);
  35. u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
  36. u8 rx_buf[2];
  37. };
  38. #define ADC0832_VOLTAGE_CHANNEL(chan) \
  39. { \
  40. .type = IIO_VOLTAGE, \
  41. .indexed = 1, \
  42. .channel = chan, \
  43. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  44. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  45. .scan_index = chan, \
  46. .scan_type = { \
  47. .sign = 'u', \
  48. .realbits = 8, \
  49. .storagebits = 8, \
  50. }, \
  51. }
  52. #define ADC0832_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
  53. { \
  54. .type = IIO_VOLTAGE, \
  55. .indexed = 1, \
  56. .channel = (chan1), \
  57. .channel2 = (chan2), \
  58. .differential = 1, \
  59. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  60. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  61. .scan_index = si, \
  62. .scan_type = { \
  63. .sign = 'u', \
  64. .realbits = 8, \
  65. .storagebits = 8, \
  66. }, \
  67. }
  68. static const struct iio_chan_spec adc0831_channels[] = {
  69. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 0),
  70. IIO_CHAN_SOFT_TIMESTAMP(1),
  71. };
  72. static const struct iio_chan_spec adc0832_channels[] = {
  73. ADC0832_VOLTAGE_CHANNEL(0),
  74. ADC0832_VOLTAGE_CHANNEL(1),
  75. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
  76. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
  77. IIO_CHAN_SOFT_TIMESTAMP(4),
  78. };
  79. static const struct iio_chan_spec adc0834_channels[] = {
  80. ADC0832_VOLTAGE_CHANNEL(0),
  81. ADC0832_VOLTAGE_CHANNEL(1),
  82. ADC0832_VOLTAGE_CHANNEL(2),
  83. ADC0832_VOLTAGE_CHANNEL(3),
  84. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 4),
  85. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 5),
  86. ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 6),
  87. ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 7),
  88. IIO_CHAN_SOFT_TIMESTAMP(8),
  89. };
  90. static const struct iio_chan_spec adc0838_channels[] = {
  91. ADC0832_VOLTAGE_CHANNEL(0),
  92. ADC0832_VOLTAGE_CHANNEL(1),
  93. ADC0832_VOLTAGE_CHANNEL(2),
  94. ADC0832_VOLTAGE_CHANNEL(3),
  95. ADC0832_VOLTAGE_CHANNEL(4),
  96. ADC0832_VOLTAGE_CHANNEL(5),
  97. ADC0832_VOLTAGE_CHANNEL(6),
  98. ADC0832_VOLTAGE_CHANNEL(7),
  99. ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
  100. ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
  101. ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
  102. ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
  103. ADC0832_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
  104. ADC0832_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
  105. ADC0832_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
  106. ADC0832_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
  107. IIO_CHAN_SOFT_TIMESTAMP(16),
  108. };
  109. static int adc0831_adc_conversion(struct adc0832 *adc)
  110. {
  111. struct spi_device *spi = adc->spi;
  112. int ret;
  113. ret = spi_read(spi, &adc->rx_buf, 2);
  114. if (ret)
  115. return ret;
  116. /*
  117. * Skip TRI-STATE and a leading zero
  118. */
  119. return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6);
  120. }
  121. static int adc0832_adc_conversion(struct adc0832 *adc, int channel,
  122. bool differential)
  123. {
  124. struct spi_device *spi = adc->spi;
  125. struct spi_transfer xfer = {
  126. .tx_buf = adc->tx_buf,
  127. .rx_buf = adc->rx_buf,
  128. .len = 2,
  129. };
  130. int ret;
  131. if (!adc->mux_bits)
  132. return adc0831_adc_conversion(adc);
  133. /* start bit */
  134. adc->tx_buf[0] = 1 << (adc->mux_bits + 1);
  135. /* single-ended or differential */
  136. adc->tx_buf[0] |= differential ? 0 : (1 << adc->mux_bits);
  137. /* odd / sign */
  138. adc->tx_buf[0] |= (channel % 2) << (adc->mux_bits - 1);
  139. /* select */
  140. if (adc->mux_bits > 1)
  141. adc->tx_buf[0] |= channel / 2;
  142. /* align Data output BIT7 (MSB) to 8-bit boundary */
  143. adc->tx_buf[0] <<= 1;
  144. ret = spi_sync_transfer(spi, &xfer, 1);
  145. if (ret)
  146. return ret;
  147. return adc->rx_buf[1];
  148. }
  149. static int adc0832_read_raw(struct iio_dev *iio,
  150. struct iio_chan_spec const *channel, int *value,
  151. int *shift, long mask)
  152. {
  153. struct adc0832 *adc = iio_priv(iio);
  154. switch (mask) {
  155. case IIO_CHAN_INFO_RAW:
  156. mutex_lock(&adc->lock);
  157. *value = adc0832_adc_conversion(adc, channel->channel,
  158. channel->differential);
  159. mutex_unlock(&adc->lock);
  160. if (*value < 0)
  161. return *value;
  162. return IIO_VAL_INT;
  163. case IIO_CHAN_INFO_SCALE:
  164. *value = regulator_get_voltage(adc->reg);
  165. if (*value < 0)
  166. return *value;
  167. /* convert regulator output voltage to mV */
  168. *value /= 1000;
  169. *shift = 8;
  170. return IIO_VAL_FRACTIONAL_LOG2;
  171. }
  172. return -EINVAL;
  173. }
  174. static const struct iio_info adc0832_info = {
  175. .read_raw = adc0832_read_raw,
  176. };
  177. static irqreturn_t adc0832_trigger_handler(int irq, void *p)
  178. {
  179. struct iio_poll_func *pf = p;
  180. struct iio_dev *indio_dev = pf->indio_dev;
  181. struct adc0832 *adc = iio_priv(indio_dev);
  182. int scan_index;
  183. int i = 0;
  184. mutex_lock(&adc->lock);
  185. for_each_set_bit(scan_index, indio_dev->active_scan_mask,
  186. indio_dev->masklength) {
  187. const struct iio_chan_spec *scan_chan =
  188. &indio_dev->channels[scan_index];
  189. int ret = adc0832_adc_conversion(adc, scan_chan->channel,
  190. scan_chan->differential);
  191. if (ret < 0) {
  192. dev_warn(&adc->spi->dev,
  193. "failed to get conversion data\n");
  194. goto out;
  195. }
  196. adc->data[i] = ret;
  197. i++;
  198. }
  199. iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
  200. iio_get_time_ns(indio_dev));
  201. out:
  202. mutex_unlock(&adc->lock);
  203. iio_trigger_notify_done(indio_dev->trig);
  204. return IRQ_HANDLED;
  205. }
  206. static void adc0832_reg_disable(void *reg)
  207. {
  208. regulator_disable(reg);
  209. }
  210. static int adc0832_probe(struct spi_device *spi)
  211. {
  212. struct iio_dev *indio_dev;
  213. struct adc0832 *adc;
  214. int ret;
  215. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
  216. if (!indio_dev)
  217. return -ENOMEM;
  218. adc = iio_priv(indio_dev);
  219. adc->spi = spi;
  220. mutex_init(&adc->lock);
  221. indio_dev->name = spi_get_device_id(spi)->name;
  222. indio_dev->info = &adc0832_info;
  223. indio_dev->modes = INDIO_DIRECT_MODE;
  224. switch (spi_get_device_id(spi)->driver_data) {
  225. case adc0831:
  226. adc->mux_bits = 0;
  227. indio_dev->channels = adc0831_channels;
  228. indio_dev->num_channels = ARRAY_SIZE(adc0831_channels);
  229. break;
  230. case adc0832:
  231. adc->mux_bits = 1;
  232. indio_dev->channels = adc0832_channels;
  233. indio_dev->num_channels = ARRAY_SIZE(adc0832_channels);
  234. break;
  235. case adc0834:
  236. adc->mux_bits = 2;
  237. indio_dev->channels = adc0834_channels;
  238. indio_dev->num_channels = ARRAY_SIZE(adc0834_channels);
  239. break;
  240. case adc0838:
  241. adc->mux_bits = 3;
  242. indio_dev->channels = adc0838_channels;
  243. indio_dev->num_channels = ARRAY_SIZE(adc0838_channels);
  244. break;
  245. default:
  246. return -EINVAL;
  247. }
  248. adc->reg = devm_regulator_get(&spi->dev, "vref");
  249. if (IS_ERR(adc->reg))
  250. return PTR_ERR(adc->reg);
  251. ret = regulator_enable(adc->reg);
  252. if (ret)
  253. return ret;
  254. ret = devm_add_action_or_reset(&spi->dev, adc0832_reg_disable,
  255. adc->reg);
  256. if (ret)
  257. return ret;
  258. ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
  259. adc0832_trigger_handler, NULL);
  260. if (ret)
  261. return ret;
  262. return devm_iio_device_register(&spi->dev, indio_dev);
  263. }
  264. static const struct of_device_id adc0832_dt_ids[] = {
  265. { .compatible = "ti,adc0831", },
  266. { .compatible = "ti,adc0832", },
  267. { .compatible = "ti,adc0834", },
  268. { .compatible = "ti,adc0838", },
  269. {}
  270. };
  271. MODULE_DEVICE_TABLE(of, adc0832_dt_ids);
  272. static const struct spi_device_id adc0832_id[] = {
  273. { "adc0831", adc0831 },
  274. { "adc0832", adc0832 },
  275. { "adc0834", adc0834 },
  276. { "adc0838", adc0838 },
  277. {}
  278. };
  279. MODULE_DEVICE_TABLE(spi, adc0832_id);
  280. static struct spi_driver adc0832_driver = {
  281. .driver = {
  282. .name = "adc0832",
  283. .of_match_table = adc0832_dt_ids,
  284. },
  285. .probe = adc0832_probe,
  286. .id_table = adc0832_id,
  287. };
  288. module_spi_driver(adc0832_driver);
  289. MODULE_AUTHOR("Akinobu Mita <[email protected]>");
  290. MODULE_DESCRIPTION("ADC0831/ADC0832/ADC0834/ADC0838 driver");
  291. MODULE_LICENSE("GPL v2");