rtq6056.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2022 Richtek Technology Corp.
  4. *
  5. * ChiYuan Huang <[email protected]>
  6. */
  7. #include <linux/bitops.h>
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/kernel.h>
  11. #include <linux/mod_devicetable.h>
  12. #include <linux/module.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/property.h>
  15. #include <linux/regmap.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/types.h>
  18. #include <linux/util_macros.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include <linux/iio/triggered_buffer.h>
  24. #define RTQ6056_REG_CONFIG 0x00
  25. #define RTQ6056_REG_SHUNTVOLT 0x01
  26. #define RTQ6056_REG_BUSVOLT 0x02
  27. #define RTQ6056_REG_POWER 0x03
  28. #define RTQ6056_REG_CURRENT 0x04
  29. #define RTQ6056_REG_CALIBRATION 0x05
  30. #define RTQ6056_REG_MASKENABLE 0x06
  31. #define RTQ6056_REG_ALERTLIMIT 0x07
  32. #define RTQ6056_REG_MANUFACTID 0xFE
  33. #define RTQ6056_REG_DIEID 0xFF
  34. #define RTQ6056_VENDOR_ID 0x1214
  35. #define RTQ6056_DEFAULT_CONFIG 0x4127
  36. #define RTQ6056_CONT_ALLON 7
  37. enum {
  38. RTQ6056_CH_VSHUNT = 0,
  39. RTQ6056_CH_VBUS,
  40. RTQ6056_CH_POWER,
  41. RTQ6056_CH_CURRENT,
  42. RTQ6056_MAX_CHANNEL
  43. };
  44. enum {
  45. F_OPMODE = 0,
  46. F_VSHUNTCT,
  47. F_VBUSCT,
  48. F_AVG,
  49. F_RESET,
  50. F_MAX_FIELDS
  51. };
  52. struct rtq6056_priv {
  53. struct device *dev;
  54. struct regmap *regmap;
  55. struct regmap_field *rm_fields[F_MAX_FIELDS];
  56. u32 shunt_resistor_uohm;
  57. int vshuntct_us;
  58. int vbusct_us;
  59. int avg_sample;
  60. };
  61. static const struct reg_field rtq6056_reg_fields[F_MAX_FIELDS] = {
  62. [F_OPMODE] = REG_FIELD(RTQ6056_REG_CONFIG, 0, 2),
  63. [F_VSHUNTCT] = REG_FIELD(RTQ6056_REG_CONFIG, 3, 5),
  64. [F_VBUSCT] = REG_FIELD(RTQ6056_REG_CONFIG, 6, 8),
  65. [F_AVG] = REG_FIELD(RTQ6056_REG_CONFIG, 9, 11),
  66. [F_RESET] = REG_FIELD(RTQ6056_REG_CONFIG, 15, 15),
  67. };
  68. static const struct iio_chan_spec rtq6056_channels[RTQ6056_MAX_CHANNEL + 1] = {
  69. {
  70. .type = IIO_VOLTAGE,
  71. .indexed = 1,
  72. .channel = 0,
  73. .address = RTQ6056_REG_SHUNTVOLT,
  74. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  75. BIT(IIO_CHAN_INFO_SCALE) |
  76. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  77. .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
  78. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  79. .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  80. .scan_index = 0,
  81. .scan_type = {
  82. .sign = 's',
  83. .realbits = 16,
  84. .storagebits = 16,
  85. .endianness = IIO_CPU,
  86. },
  87. },
  88. {
  89. .type = IIO_VOLTAGE,
  90. .indexed = 1,
  91. .channel = 1,
  92. .address = RTQ6056_REG_BUSVOLT,
  93. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  94. BIT(IIO_CHAN_INFO_SCALE) |
  95. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  96. .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
  97. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  98. .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  99. .scan_index = 1,
  100. .scan_type = {
  101. .sign = 'u',
  102. .realbits = 16,
  103. .storagebits = 16,
  104. .endianness = IIO_CPU,
  105. },
  106. },
  107. {
  108. .type = IIO_POWER,
  109. .indexed = 1,
  110. .channel = 2,
  111. .address = RTQ6056_REG_POWER,
  112. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  113. BIT(IIO_CHAN_INFO_SCALE) |
  114. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  115. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  116. .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  117. .scan_index = 2,
  118. .scan_type = {
  119. .sign = 'u',
  120. .realbits = 16,
  121. .storagebits = 16,
  122. .endianness = IIO_CPU,
  123. },
  124. },
  125. {
  126. .type = IIO_CURRENT,
  127. .indexed = 1,
  128. .channel = 3,
  129. .address = RTQ6056_REG_CURRENT,
  130. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  131. BIT(IIO_CHAN_INFO_SAMP_FREQ),
  132. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  133. .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
  134. .scan_index = 3,
  135. .scan_type = {
  136. .sign = 's',
  137. .realbits = 16,
  138. .storagebits = 16,
  139. .endianness = IIO_CPU,
  140. },
  141. },
  142. IIO_CHAN_SOFT_TIMESTAMP(RTQ6056_MAX_CHANNEL),
  143. };
  144. static int rtq6056_adc_read_channel(struct rtq6056_priv *priv,
  145. struct iio_chan_spec const *ch,
  146. int *val)
  147. {
  148. struct device *dev = priv->dev;
  149. unsigned int addr = ch->address;
  150. unsigned int regval;
  151. int ret;
  152. pm_runtime_get_sync(dev);
  153. ret = regmap_read(priv->regmap, addr, &regval);
  154. pm_runtime_mark_last_busy(dev);
  155. pm_runtime_put(dev);
  156. if (ret)
  157. return ret;
  158. /* Power and VBUS is unsigned 16-bit, others are signed 16-bit */
  159. if (addr == RTQ6056_REG_BUSVOLT || addr == RTQ6056_REG_POWER)
  160. *val = regval;
  161. else
  162. *val = sign_extend32(regval, 16);
  163. return IIO_VAL_INT;
  164. }
  165. static int rtq6056_adc_read_scale(struct iio_chan_spec const *ch, int *val,
  166. int *val2)
  167. {
  168. switch (ch->address) {
  169. case RTQ6056_REG_SHUNTVOLT:
  170. /* VSHUNT lsb 2.5uV */
  171. *val = 2500;
  172. *val2 = 1000000;
  173. return IIO_VAL_FRACTIONAL;
  174. case RTQ6056_REG_BUSVOLT:
  175. /* VBUS lsb 1.25mV */
  176. *val = 1250;
  177. *val2 = 1000;
  178. return IIO_VAL_FRACTIONAL;
  179. case RTQ6056_REG_POWER:
  180. /* Power lsb 25mW */
  181. *val = 25;
  182. return IIO_VAL_INT;
  183. default:
  184. return -EINVAL;
  185. }
  186. }
  187. /*
  188. * Sample frequency for channel VSHUNT and VBUS. The indices correspond
  189. * with the bit value expected by the chip. And it can be found at
  190. * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
  191. */
  192. static const int rtq6056_samp_freq_list[] = {
  193. 7194, 4926, 3717, 1904, 964, 485, 243, 122,
  194. };
  195. static int rtq6056_adc_set_samp_freq(struct rtq6056_priv *priv,
  196. struct iio_chan_spec const *ch, int val)
  197. {
  198. struct regmap_field *rm_field;
  199. unsigned int selector;
  200. int *ct, ret;
  201. if (val > 7194 || val < 122)
  202. return -EINVAL;
  203. if (ch->address == RTQ6056_REG_SHUNTVOLT) {
  204. rm_field = priv->rm_fields[F_VSHUNTCT];
  205. ct = &priv->vshuntct_us;
  206. } else if (ch->address == RTQ6056_REG_BUSVOLT) {
  207. rm_field = priv->rm_fields[F_VBUSCT];
  208. ct = &priv->vbusct_us;
  209. } else
  210. return -EINVAL;
  211. selector = find_closest_descending(val, rtq6056_samp_freq_list,
  212. ARRAY_SIZE(rtq6056_samp_freq_list));
  213. ret = regmap_field_write(rm_field, selector);
  214. if (ret)
  215. return ret;
  216. *ct = 1000000 / rtq6056_samp_freq_list[selector];
  217. return 0;
  218. }
  219. /*
  220. * Available averaging rate for rtq6056. The indices correspond with the bit
  221. * value expected by the chip. And it can be found at
  222. * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
  223. */
  224. static const int rtq6056_avg_sample_list[] = {
  225. 1, 4, 16, 64, 128, 256, 512, 1024,
  226. };
  227. static int rtq6056_adc_set_average(struct rtq6056_priv *priv, int val)
  228. {
  229. unsigned int selector;
  230. int ret;
  231. if (val > 1024 || val < 1)
  232. return -EINVAL;
  233. selector = find_closest(val, rtq6056_avg_sample_list,
  234. ARRAY_SIZE(rtq6056_avg_sample_list));
  235. ret = regmap_field_write(priv->rm_fields[F_AVG], selector);
  236. if (ret)
  237. return ret;
  238. priv->avg_sample = rtq6056_avg_sample_list[selector];
  239. return 0;
  240. }
  241. static int rtq6056_adc_get_sample_freq(struct rtq6056_priv *priv,
  242. struct iio_chan_spec const *ch, int *val)
  243. {
  244. int sample_time;
  245. if (ch->address == RTQ6056_REG_SHUNTVOLT)
  246. sample_time = priv->vshuntct_us;
  247. else if (ch->address == RTQ6056_REG_BUSVOLT)
  248. sample_time = priv->vbusct_us;
  249. else {
  250. sample_time = priv->vshuntct_us + priv->vbusct_us;
  251. sample_time *= priv->avg_sample;
  252. }
  253. *val = 1000000 / sample_time;
  254. return IIO_VAL_INT;
  255. }
  256. static int rtq6056_adc_read_raw(struct iio_dev *indio_dev,
  257. struct iio_chan_spec const *chan, int *val,
  258. int *val2, long mask)
  259. {
  260. struct rtq6056_priv *priv = iio_priv(indio_dev);
  261. switch (mask) {
  262. case IIO_CHAN_INFO_RAW:
  263. return rtq6056_adc_read_channel(priv, chan, val);
  264. case IIO_CHAN_INFO_SCALE:
  265. return rtq6056_adc_read_scale(chan, val, val2);
  266. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  267. *val = priv->avg_sample;
  268. return IIO_VAL_INT;
  269. case IIO_CHAN_INFO_SAMP_FREQ:
  270. return rtq6056_adc_get_sample_freq(priv, chan, val);
  271. default:
  272. return -EINVAL;
  273. }
  274. }
  275. static int rtq6056_adc_read_avail(struct iio_dev *indio_dev,
  276. struct iio_chan_spec const *chan,
  277. const int **vals, int *type, int *length,
  278. long mask)
  279. {
  280. switch (mask) {
  281. case IIO_CHAN_INFO_SAMP_FREQ:
  282. *vals = rtq6056_samp_freq_list;
  283. *type = IIO_VAL_INT;
  284. *length = ARRAY_SIZE(rtq6056_samp_freq_list);
  285. return IIO_AVAIL_LIST;
  286. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  287. *vals = rtq6056_avg_sample_list;
  288. *type = IIO_VAL_INT;
  289. *length = ARRAY_SIZE(rtq6056_avg_sample_list);
  290. return IIO_AVAIL_LIST;
  291. default:
  292. return -EINVAL;
  293. }
  294. }
  295. static int rtq6056_adc_write_raw(struct iio_dev *indio_dev,
  296. struct iio_chan_spec const *chan, int val,
  297. int val2, long mask)
  298. {
  299. struct rtq6056_priv *priv = iio_priv(indio_dev);
  300. int ret;
  301. ret = iio_device_claim_direct_mode(indio_dev);
  302. if (ret)
  303. return ret;
  304. switch (mask) {
  305. case IIO_CHAN_INFO_SAMP_FREQ:
  306. ret = rtq6056_adc_set_samp_freq(priv, chan, val);
  307. break;
  308. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  309. ret = rtq6056_adc_set_average(priv, val);
  310. break;
  311. default:
  312. ret = -EINVAL;
  313. break;
  314. }
  315. iio_device_release_direct_mode(indio_dev);
  316. return ret;
  317. }
  318. static const char *rtq6056_channel_labels[RTQ6056_MAX_CHANNEL] = {
  319. [RTQ6056_CH_VSHUNT] = "Vshunt",
  320. [RTQ6056_CH_VBUS] = "Vbus",
  321. [RTQ6056_CH_POWER] = "Power",
  322. [RTQ6056_CH_CURRENT] = "Current",
  323. };
  324. static int rtq6056_adc_read_label(struct iio_dev *indio_dev,
  325. struct iio_chan_spec const *chan,
  326. char *label)
  327. {
  328. return sysfs_emit(label, "%s\n", rtq6056_channel_labels[chan->channel]);
  329. }
  330. static int rtq6056_set_shunt_resistor(struct rtq6056_priv *priv,
  331. int resistor_uohm)
  332. {
  333. unsigned int calib_val;
  334. int ret;
  335. if (resistor_uohm <= 0) {
  336. dev_err(priv->dev, "Invalid resistor [%d]\n", resistor_uohm);
  337. return -EINVAL;
  338. }
  339. /* calibration = 5120000 / (Rshunt (uOhm) * current lsb (1mA)) */
  340. calib_val = 5120000 / resistor_uohm;
  341. ret = regmap_write(priv->regmap, RTQ6056_REG_CALIBRATION, calib_val);
  342. if (ret)
  343. return ret;
  344. priv->shunt_resistor_uohm = resistor_uohm;
  345. return 0;
  346. }
  347. static ssize_t shunt_resistor_show(struct device *dev,
  348. struct device_attribute *attr, char *buf)
  349. {
  350. struct rtq6056_priv *priv = iio_priv(dev_to_iio_dev(dev));
  351. int vals[2] = { priv->shunt_resistor_uohm, 1000000 };
  352. return iio_format_value(buf, IIO_VAL_FRACTIONAL, 1, vals);
  353. }
  354. static ssize_t shunt_resistor_store(struct device *dev,
  355. struct device_attribute *attr,
  356. const char *buf, size_t len)
  357. {
  358. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  359. struct rtq6056_priv *priv = iio_priv(indio_dev);
  360. int val, val_fract, ret;
  361. ret = iio_device_claim_direct_mode(indio_dev);
  362. if (ret)
  363. return ret;
  364. ret = iio_str_to_fixpoint(buf, 100000, &val, &val_fract);
  365. if (ret)
  366. goto out_store;
  367. ret = rtq6056_set_shunt_resistor(priv, val * 1000000 + val_fract);
  368. out_store:
  369. iio_device_release_direct_mode(indio_dev);
  370. return ret ?: len;
  371. }
  372. static IIO_DEVICE_ATTR_RW(shunt_resistor, 0);
  373. static struct attribute *rtq6056_attributes[] = {
  374. &iio_dev_attr_shunt_resistor.dev_attr.attr,
  375. NULL
  376. };
  377. static const struct attribute_group rtq6056_attribute_group = {
  378. .attrs = rtq6056_attributes,
  379. };
  380. static const struct iio_info rtq6056_info = {
  381. .attrs = &rtq6056_attribute_group,
  382. .read_raw = rtq6056_adc_read_raw,
  383. .read_avail = rtq6056_adc_read_avail,
  384. .write_raw = rtq6056_adc_write_raw,
  385. .read_label = rtq6056_adc_read_label,
  386. };
  387. static irqreturn_t rtq6056_buffer_trigger_handler(int irq, void *p)
  388. {
  389. struct iio_poll_func *pf = p;
  390. struct iio_dev *indio_dev = pf->indio_dev;
  391. struct rtq6056_priv *priv = iio_priv(indio_dev);
  392. struct device *dev = priv->dev;
  393. struct {
  394. u16 vals[RTQ6056_MAX_CHANNEL];
  395. s64 timestamp __aligned(8);
  396. } data;
  397. unsigned int raw;
  398. int i = 0, bit, ret;
  399. memset(&data, 0, sizeof(data));
  400. pm_runtime_get_sync(dev);
  401. for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) {
  402. unsigned int addr = rtq6056_channels[bit].address;
  403. ret = regmap_read(priv->regmap, addr, &raw);
  404. if (ret)
  405. goto out;
  406. data.vals[i++] = raw;
  407. }
  408. iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev));
  409. out:
  410. pm_runtime_mark_last_busy(dev);
  411. pm_runtime_put(dev);
  412. iio_trigger_notify_done(indio_dev->trig);
  413. return IRQ_HANDLED;
  414. }
  415. static void rtq6056_enter_shutdown_state(void *dev)
  416. {
  417. struct rtq6056_priv *priv = dev_get_drvdata(dev);
  418. /* Enter shutdown state */
  419. regmap_field_write(priv->rm_fields[F_OPMODE], 0);
  420. }
  421. static bool rtq6056_is_readable_reg(struct device *dev, unsigned int reg)
  422. {
  423. switch (reg) {
  424. case RTQ6056_REG_CONFIG ... RTQ6056_REG_ALERTLIMIT:
  425. case RTQ6056_REG_MANUFACTID ... RTQ6056_REG_DIEID:
  426. return true;
  427. default:
  428. return false;
  429. }
  430. }
  431. static bool rtq6056_is_writeable_reg(struct device *dev, unsigned int reg)
  432. {
  433. switch (reg) {
  434. case RTQ6056_REG_CONFIG:
  435. case RTQ6056_REG_CALIBRATION ... RTQ6056_REG_ALERTLIMIT:
  436. return true;
  437. default:
  438. return false;
  439. }
  440. }
  441. static const struct regmap_config rtq6056_regmap_config = {
  442. .reg_bits = 8,
  443. .val_bits = 16,
  444. .val_format_endian = REGMAP_ENDIAN_BIG,
  445. .max_register = RTQ6056_REG_DIEID,
  446. .readable_reg = rtq6056_is_readable_reg,
  447. .writeable_reg = rtq6056_is_writeable_reg,
  448. };
  449. static int rtq6056_probe(struct i2c_client *i2c)
  450. {
  451. struct iio_dev *indio_dev;
  452. struct rtq6056_priv *priv;
  453. struct device *dev = &i2c->dev;
  454. struct regmap *regmap;
  455. unsigned int vendor_id, shunt_resistor_uohm;
  456. int ret;
  457. if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_WORD_DATA))
  458. return -EOPNOTSUPP;
  459. indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
  460. if (!indio_dev)
  461. return -ENOMEM;
  462. priv = iio_priv(indio_dev);
  463. priv->dev = dev;
  464. priv->vshuntct_us = priv->vbusct_us = 1037;
  465. priv->avg_sample = 1;
  466. i2c_set_clientdata(i2c, priv);
  467. regmap = devm_regmap_init_i2c(i2c, &rtq6056_regmap_config);
  468. if (IS_ERR(regmap))
  469. return dev_err_probe(dev, PTR_ERR(regmap),
  470. "Failed to init regmap\n");
  471. priv->regmap = regmap;
  472. ret = regmap_read(regmap, RTQ6056_REG_MANUFACTID, &vendor_id);
  473. if (ret)
  474. return dev_err_probe(dev, ret,
  475. "Failed to get manufacturer info\n");
  476. if (vendor_id != RTQ6056_VENDOR_ID)
  477. return dev_err_probe(dev, -ENODEV,
  478. "Invalid vendor id 0x%04x\n", vendor_id);
  479. ret = devm_regmap_field_bulk_alloc(dev, regmap, priv->rm_fields,
  480. rtq6056_reg_fields, F_MAX_FIELDS);
  481. if (ret)
  482. return dev_err_probe(dev, ret, "Failed to init regmap field\n");
  483. /*
  484. * By default, configure average sample as 1, bus and shunt conversion
  485. * time as 1037 microsecond, and operating mode to all on.
  486. */
  487. ret = regmap_write(regmap, RTQ6056_REG_CONFIG, RTQ6056_DEFAULT_CONFIG);
  488. if (ret)
  489. return dev_err_probe(dev, ret,
  490. "Failed to enable continuous sensing\n");
  491. ret = devm_add_action_or_reset(dev, rtq6056_enter_shutdown_state, dev);
  492. if (ret)
  493. return ret;
  494. pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
  495. pm_runtime_use_autosuspend(dev);
  496. pm_runtime_set_active(dev);
  497. pm_runtime_mark_last_busy(dev);
  498. ret = devm_pm_runtime_enable(dev);
  499. if (ret)
  500. return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n");
  501. /* By default, use 2000 micro-Ohm resistor */
  502. shunt_resistor_uohm = 2000;
  503. device_property_read_u32(dev, "shunt-resistor-micro-ohms",
  504. &shunt_resistor_uohm);
  505. ret = rtq6056_set_shunt_resistor(priv, shunt_resistor_uohm);
  506. if (ret)
  507. return dev_err_probe(dev, ret,
  508. "Failed to init shunt resistor\n");
  509. indio_dev->name = "rtq6056";
  510. indio_dev->modes = INDIO_DIRECT_MODE;
  511. indio_dev->channels = rtq6056_channels;
  512. indio_dev->num_channels = ARRAY_SIZE(rtq6056_channels);
  513. indio_dev->info = &rtq6056_info;
  514. ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
  515. rtq6056_buffer_trigger_handler,
  516. NULL);
  517. if (ret)
  518. return dev_err_probe(dev, ret,
  519. "Failed to allocate iio trigger buffer\n");
  520. return devm_iio_device_register(dev, indio_dev);
  521. }
  522. static int rtq6056_runtime_suspend(struct device *dev)
  523. {
  524. struct rtq6056_priv *priv = dev_get_drvdata(dev);
  525. /* Configure to shutdown mode */
  526. return regmap_field_write(priv->rm_fields[F_OPMODE], 0);
  527. }
  528. static int rtq6056_runtime_resume(struct device *dev)
  529. {
  530. struct rtq6056_priv *priv = dev_get_drvdata(dev);
  531. int sample_rdy_time_us, ret;
  532. ret = regmap_field_write(priv->rm_fields[F_OPMODE], RTQ6056_CONT_ALLON);
  533. if (ret)
  534. return ret;
  535. sample_rdy_time_us = priv->vbusct_us + priv->vshuntct_us;
  536. sample_rdy_time_us *= priv->avg_sample;
  537. usleep_range(sample_rdy_time_us, sample_rdy_time_us + 100);
  538. return 0;
  539. }
  540. static DEFINE_RUNTIME_DEV_PM_OPS(rtq6056_pm_ops, rtq6056_runtime_suspend,
  541. rtq6056_runtime_resume, NULL);
  542. static const struct of_device_id rtq6056_device_match[] = {
  543. { .compatible = "richtek,rtq6056" },
  544. {}
  545. };
  546. MODULE_DEVICE_TABLE(of, rtq6056_device_match);
  547. static struct i2c_driver rtq6056_driver = {
  548. .driver = {
  549. .name = "rtq6056",
  550. .of_match_table = rtq6056_device_match,
  551. .pm = pm_ptr(&rtq6056_pm_ops),
  552. },
  553. .probe_new = rtq6056_probe,
  554. };
  555. module_i2c_driver(rtq6056_driver);
  556. MODULE_AUTHOR("ChiYuan Huang <[email protected]>");
  557. MODULE_DESCRIPTION("Richtek RTQ6056 Driver");
  558. MODULE_LICENSE("GPL v2");