ad799x.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * iio/adc/ad799x.c
  4. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  5. *
  6. * based on iio/adc/max1363
  7. * Copyright (C) 2008-2010 Jonathan Cameron
  8. *
  9. * based on linux/drivers/i2c/chips/max123x
  10. * Copyright (C) 2002-2004 Stefan Eletzhofer
  11. *
  12. * based on linux/drivers/acron/char/pcf8583.c
  13. * Copyright (C) 2000 Russell King
  14. *
  15. * ad799x.c
  16. *
  17. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  18. * ad7998 and similar chips.
  19. */
  20. #include <linux/interrupt.h>
  21. #include <linux/device.h>
  22. #include <linux/kernel.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/i2c.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <linux/slab.h>
  27. #include <linux/types.h>
  28. #include <linux/err.h>
  29. #include <linux/module.h>
  30. #include <linux/bitops.h>
  31. #include <linux/iio/iio.h>
  32. #include <linux/iio/sysfs.h>
  33. #include <linux/iio/events.h>
  34. #include <linux/iio/buffer.h>
  35. #include <linux/iio/trigger_consumer.h>
  36. #include <linux/iio/triggered_buffer.h>
  37. #define AD799X_CHANNEL_SHIFT 4
  38. /*
  39. * AD7991, AD7995 and AD7999 defines
  40. */
  41. #define AD7991_REF_SEL 0x08
  42. #define AD7991_FLTR 0x04
  43. #define AD7991_BIT_TRIAL_DELAY 0x02
  44. #define AD7991_SAMPLE_DELAY 0x01
  45. /*
  46. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  47. */
  48. #define AD7998_FLTR BIT(3)
  49. #define AD7998_ALERT_EN BIT(2)
  50. #define AD7998_BUSY_ALERT BIT(1)
  51. #define AD7998_BUSY_ALERT_POL BIT(0)
  52. #define AD7998_CONV_RES_REG 0x0
  53. #define AD7998_ALERT_STAT_REG 0x1
  54. #define AD7998_CONF_REG 0x2
  55. #define AD7998_CYCLE_TMR_REG 0x3
  56. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  57. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  58. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  59. #define AD7998_CYC_MASK GENMASK(2, 0)
  60. #define AD7998_CYC_DIS 0x0
  61. #define AD7998_CYC_TCONF_32 0x1
  62. #define AD7998_CYC_TCONF_64 0x2
  63. #define AD7998_CYC_TCONF_128 0x3
  64. #define AD7998_CYC_TCONF_256 0x4
  65. #define AD7998_CYC_TCONF_512 0x5
  66. #define AD7998_CYC_TCONF_1024 0x6
  67. #define AD7998_CYC_TCONF_2048 0x7
  68. #define AD7998_ALERT_STAT_CLEAR 0xFF
  69. /*
  70. * AD7997 and AD7997 defines
  71. */
  72. #define AD7997_8_READ_SINGLE BIT(7)
  73. #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
  74. enum {
  75. ad7991,
  76. ad7995,
  77. ad7999,
  78. ad7992,
  79. ad7993,
  80. ad7994,
  81. ad7997,
  82. ad7998
  83. };
  84. /**
  85. * struct ad799x_chip_config - chip specific information
  86. * @channel: channel specification
  87. * @default_config: device default configuration
  88. * @info: pointer to iio_info struct
  89. */
  90. struct ad799x_chip_config {
  91. const struct iio_chan_spec channel[9];
  92. u16 default_config;
  93. const struct iio_info *info;
  94. };
  95. /**
  96. * struct ad799x_chip_info - chip specific information
  97. * @num_channels: number of channels
  98. * @noirq_config: device configuration w/o IRQ
  99. * @irq_config: device configuration w/IRQ
  100. */
  101. struct ad799x_chip_info {
  102. int num_channels;
  103. const struct ad799x_chip_config noirq_config;
  104. const struct ad799x_chip_config irq_config;
  105. };
  106. struct ad799x_state {
  107. struct i2c_client *client;
  108. const struct ad799x_chip_config *chip_config;
  109. struct regulator *reg;
  110. struct regulator *vref;
  111. unsigned id;
  112. u16 config;
  113. u8 *rx_buf;
  114. unsigned int transfer_size;
  115. };
  116. static int ad799x_write_config(struct ad799x_state *st, u16 val)
  117. {
  118. switch (st->id) {
  119. case ad7997:
  120. case ad7998:
  121. return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
  122. val);
  123. case ad7992:
  124. case ad7993:
  125. case ad7994:
  126. return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
  127. val);
  128. default:
  129. /* Will be written when doing a conversion */
  130. st->config = val;
  131. return 0;
  132. }
  133. }
  134. static int ad799x_read_config(struct ad799x_state *st)
  135. {
  136. switch (st->id) {
  137. case ad7997:
  138. case ad7998:
  139. return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
  140. case ad7992:
  141. case ad7993:
  142. case ad7994:
  143. return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
  144. default:
  145. /* No readback support */
  146. return st->config;
  147. }
  148. }
  149. static int ad799x_update_config(struct ad799x_state *st, u16 config)
  150. {
  151. int ret;
  152. ret = ad799x_write_config(st, config);
  153. if (ret < 0)
  154. return ret;
  155. ret = ad799x_read_config(st);
  156. if (ret < 0)
  157. return ret;
  158. st->config = ret;
  159. return 0;
  160. }
  161. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  162. {
  163. struct iio_poll_func *pf = p;
  164. struct iio_dev *indio_dev = pf->indio_dev;
  165. struct ad799x_state *st = iio_priv(indio_dev);
  166. int b_sent;
  167. u8 cmd;
  168. switch (st->id) {
  169. case ad7991:
  170. case ad7995:
  171. case ad7999:
  172. cmd = st->config |
  173. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  174. break;
  175. case ad7992:
  176. case ad7993:
  177. case ad7994:
  178. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  179. AD7998_CONV_RES_REG;
  180. break;
  181. case ad7997:
  182. case ad7998:
  183. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  184. break;
  185. default:
  186. cmd = 0;
  187. }
  188. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  189. cmd, st->transfer_size, st->rx_buf);
  190. if (b_sent < 0)
  191. goto out;
  192. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  193. iio_get_time_ns(indio_dev));
  194. out:
  195. iio_trigger_notify_done(indio_dev->trig);
  196. return IRQ_HANDLED;
  197. }
  198. static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
  199. const unsigned long *scan_mask)
  200. {
  201. struct ad799x_state *st = iio_priv(indio_dev);
  202. kfree(st->rx_buf);
  203. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  204. if (!st->rx_buf)
  205. return -ENOMEM;
  206. st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
  207. switch (st->id) {
  208. case ad7992:
  209. case ad7993:
  210. case ad7994:
  211. case ad7997:
  212. case ad7998:
  213. st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
  214. st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
  215. return ad799x_write_config(st, st->config);
  216. default:
  217. return 0;
  218. }
  219. }
  220. static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
  221. {
  222. u8 cmd;
  223. switch (st->id) {
  224. case ad7991:
  225. case ad7995:
  226. case ad7999:
  227. cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
  228. break;
  229. case ad7992:
  230. case ad7993:
  231. case ad7994:
  232. cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
  233. break;
  234. case ad7997:
  235. case ad7998:
  236. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  237. break;
  238. default:
  239. return -EINVAL;
  240. }
  241. return i2c_smbus_read_word_swapped(st->client, cmd);
  242. }
  243. static int ad799x_read_raw(struct iio_dev *indio_dev,
  244. struct iio_chan_spec const *chan,
  245. int *val,
  246. int *val2,
  247. long m)
  248. {
  249. int ret;
  250. struct ad799x_state *st = iio_priv(indio_dev);
  251. switch (m) {
  252. case IIO_CHAN_INFO_RAW:
  253. ret = iio_device_claim_direct_mode(indio_dev);
  254. if (ret)
  255. return ret;
  256. ret = ad799x_scan_direct(st, chan->scan_index);
  257. iio_device_release_direct_mode(indio_dev);
  258. if (ret < 0)
  259. return ret;
  260. *val = (ret >> chan->scan_type.shift) &
  261. GENMASK(chan->scan_type.realbits - 1, 0);
  262. return IIO_VAL_INT;
  263. case IIO_CHAN_INFO_SCALE:
  264. if (st->vref)
  265. ret = regulator_get_voltage(st->vref);
  266. else
  267. ret = regulator_get_voltage(st->reg);
  268. if (ret < 0)
  269. return ret;
  270. *val = ret / 1000;
  271. *val2 = chan->scan_type.realbits;
  272. return IIO_VAL_FRACTIONAL_LOG2;
  273. }
  274. return -EINVAL;
  275. }
  276. static const unsigned int ad7998_frequencies[] = {
  277. [AD7998_CYC_DIS] = 0,
  278. [AD7998_CYC_TCONF_32] = 15625,
  279. [AD7998_CYC_TCONF_64] = 7812,
  280. [AD7998_CYC_TCONF_128] = 3906,
  281. [AD7998_CYC_TCONF_512] = 976,
  282. [AD7998_CYC_TCONF_1024] = 488,
  283. [AD7998_CYC_TCONF_2048] = 244,
  284. };
  285. static ssize_t ad799x_read_frequency(struct device *dev,
  286. struct device_attribute *attr,
  287. char *buf)
  288. {
  289. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  290. struct ad799x_state *st = iio_priv(indio_dev);
  291. int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  292. if (ret < 0)
  293. return ret;
  294. return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
  295. }
  296. static ssize_t ad799x_write_frequency(struct device *dev,
  297. struct device_attribute *attr,
  298. const char *buf,
  299. size_t len)
  300. {
  301. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  302. struct ad799x_state *st = iio_priv(indio_dev);
  303. long val;
  304. int ret, i;
  305. ret = kstrtol(buf, 10, &val);
  306. if (ret)
  307. return ret;
  308. mutex_lock(&indio_dev->mlock);
  309. ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  310. if (ret < 0)
  311. goto error_ret_mutex;
  312. /* Wipe the bits clean */
  313. ret &= ~AD7998_CYC_MASK;
  314. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  315. if (val == ad7998_frequencies[i])
  316. break;
  317. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  318. ret = -EINVAL;
  319. goto error_ret_mutex;
  320. }
  321. ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
  322. ret | i);
  323. if (ret < 0)
  324. goto error_ret_mutex;
  325. ret = len;
  326. error_ret_mutex:
  327. mutex_unlock(&indio_dev->mlock);
  328. return ret;
  329. }
  330. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  331. const struct iio_chan_spec *chan,
  332. enum iio_event_type type,
  333. enum iio_event_direction dir)
  334. {
  335. struct ad799x_state *st = iio_priv(indio_dev);
  336. if (!(st->config & AD7998_ALERT_EN))
  337. return 0;
  338. if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
  339. return 1;
  340. return 0;
  341. }
  342. static int ad799x_write_event_config(struct iio_dev *indio_dev,
  343. const struct iio_chan_spec *chan,
  344. enum iio_event_type type,
  345. enum iio_event_direction dir,
  346. int state)
  347. {
  348. struct ad799x_state *st = iio_priv(indio_dev);
  349. int ret;
  350. ret = iio_device_claim_direct_mode(indio_dev);
  351. if (ret)
  352. return ret;
  353. if (state)
  354. st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
  355. else
  356. st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
  357. if (st->config >> AD799X_CHANNEL_SHIFT)
  358. st->config |= AD7998_ALERT_EN;
  359. else
  360. st->config &= ~AD7998_ALERT_EN;
  361. ret = ad799x_write_config(st, st->config);
  362. iio_device_release_direct_mode(indio_dev);
  363. return ret;
  364. }
  365. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  366. enum iio_event_direction dir,
  367. enum iio_event_info info)
  368. {
  369. switch (info) {
  370. case IIO_EV_INFO_VALUE:
  371. if (dir == IIO_EV_DIR_FALLING)
  372. return AD7998_DATALOW_REG(chan->channel);
  373. else
  374. return AD7998_DATAHIGH_REG(chan->channel);
  375. case IIO_EV_INFO_HYSTERESIS:
  376. return AD7998_HYST_REG(chan->channel);
  377. default:
  378. return -EINVAL;
  379. }
  380. return 0;
  381. }
  382. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  383. const struct iio_chan_spec *chan,
  384. enum iio_event_type type,
  385. enum iio_event_direction dir,
  386. enum iio_event_info info,
  387. int val, int val2)
  388. {
  389. int ret;
  390. struct ad799x_state *st = iio_priv(indio_dev);
  391. if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
  392. return -EINVAL;
  393. mutex_lock(&indio_dev->mlock);
  394. ret = i2c_smbus_write_word_swapped(st->client,
  395. ad799x_threshold_reg(chan, dir, info),
  396. val << chan->scan_type.shift);
  397. mutex_unlock(&indio_dev->mlock);
  398. return ret;
  399. }
  400. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  401. const struct iio_chan_spec *chan,
  402. enum iio_event_type type,
  403. enum iio_event_direction dir,
  404. enum iio_event_info info,
  405. int *val, int *val2)
  406. {
  407. int ret;
  408. struct ad799x_state *st = iio_priv(indio_dev);
  409. mutex_lock(&indio_dev->mlock);
  410. ret = i2c_smbus_read_word_swapped(st->client,
  411. ad799x_threshold_reg(chan, dir, info));
  412. mutex_unlock(&indio_dev->mlock);
  413. if (ret < 0)
  414. return ret;
  415. *val = (ret >> chan->scan_type.shift) &
  416. GENMASK(chan->scan_type.realbits - 1, 0);
  417. return IIO_VAL_INT;
  418. }
  419. static irqreturn_t ad799x_event_handler(int irq, void *private)
  420. {
  421. struct iio_dev *indio_dev = private;
  422. struct ad799x_state *st = iio_priv(private);
  423. int i, ret;
  424. ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
  425. if (ret <= 0)
  426. goto done;
  427. if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
  428. AD7998_ALERT_STAT_CLEAR) < 0)
  429. goto done;
  430. for (i = 0; i < 8; i++) {
  431. if (ret & BIT(i))
  432. iio_push_event(indio_dev,
  433. i & 0x1 ?
  434. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  435. (i >> 1),
  436. IIO_EV_TYPE_THRESH,
  437. IIO_EV_DIR_RISING) :
  438. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  439. (i >> 1),
  440. IIO_EV_TYPE_THRESH,
  441. IIO_EV_DIR_FALLING),
  442. iio_get_time_ns(indio_dev));
  443. }
  444. done:
  445. return IRQ_HANDLED;
  446. }
  447. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  448. ad799x_read_frequency,
  449. ad799x_write_frequency);
  450. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  451. static struct attribute *ad799x_event_attributes[] = {
  452. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  453. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  454. NULL,
  455. };
  456. static const struct attribute_group ad799x_event_attrs_group = {
  457. .attrs = ad799x_event_attributes,
  458. };
  459. static const struct iio_info ad7991_info = {
  460. .read_raw = &ad799x_read_raw,
  461. .update_scan_mode = ad799x_update_scan_mode,
  462. };
  463. static const struct iio_info ad7993_4_7_8_noirq_info = {
  464. .read_raw = &ad799x_read_raw,
  465. .update_scan_mode = ad799x_update_scan_mode,
  466. };
  467. static const struct iio_info ad7993_4_7_8_irq_info = {
  468. .read_raw = &ad799x_read_raw,
  469. .event_attrs = &ad799x_event_attrs_group,
  470. .read_event_config = &ad799x_read_event_config,
  471. .write_event_config = &ad799x_write_event_config,
  472. .read_event_value = &ad799x_read_event_value,
  473. .write_event_value = &ad799x_write_event_value,
  474. .update_scan_mode = ad799x_update_scan_mode,
  475. };
  476. static const struct iio_event_spec ad799x_events[] = {
  477. {
  478. .type = IIO_EV_TYPE_THRESH,
  479. .dir = IIO_EV_DIR_RISING,
  480. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  481. BIT(IIO_EV_INFO_ENABLE),
  482. }, {
  483. .type = IIO_EV_TYPE_THRESH,
  484. .dir = IIO_EV_DIR_FALLING,
  485. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  486. BIT(IIO_EV_INFO_ENABLE),
  487. }, {
  488. .type = IIO_EV_TYPE_THRESH,
  489. .dir = IIO_EV_DIR_EITHER,
  490. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  491. },
  492. };
  493. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  494. .type = IIO_VOLTAGE, \
  495. .indexed = 1, \
  496. .channel = (_index), \
  497. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  498. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  499. .scan_index = (_index), \
  500. .scan_type = { \
  501. .sign = 'u', \
  502. .realbits = (_realbits), \
  503. .storagebits = 16, \
  504. .shift = 12 - (_realbits), \
  505. .endianness = IIO_BE, \
  506. }, \
  507. .event_spec = _ev_spec, \
  508. .num_event_specs = _num_ev_spec, \
  509. }
  510. #define AD799X_CHANNEL(_index, _realbits) \
  511. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  512. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  513. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  514. ARRAY_SIZE(ad799x_events))
  515. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  516. [ad7991] = {
  517. .num_channels = 5,
  518. .noirq_config = {
  519. .channel = {
  520. AD799X_CHANNEL(0, 12),
  521. AD799X_CHANNEL(1, 12),
  522. AD799X_CHANNEL(2, 12),
  523. AD799X_CHANNEL(3, 12),
  524. IIO_CHAN_SOFT_TIMESTAMP(4),
  525. },
  526. .info = &ad7991_info,
  527. },
  528. },
  529. [ad7995] = {
  530. .num_channels = 5,
  531. .noirq_config = {
  532. .channel = {
  533. AD799X_CHANNEL(0, 10),
  534. AD799X_CHANNEL(1, 10),
  535. AD799X_CHANNEL(2, 10),
  536. AD799X_CHANNEL(3, 10),
  537. IIO_CHAN_SOFT_TIMESTAMP(4),
  538. },
  539. .info = &ad7991_info,
  540. },
  541. },
  542. [ad7999] = {
  543. .num_channels = 5,
  544. .noirq_config = {
  545. .channel = {
  546. AD799X_CHANNEL(0, 8),
  547. AD799X_CHANNEL(1, 8),
  548. AD799X_CHANNEL(2, 8),
  549. AD799X_CHANNEL(3, 8),
  550. IIO_CHAN_SOFT_TIMESTAMP(4),
  551. },
  552. .info = &ad7991_info,
  553. },
  554. },
  555. [ad7992] = {
  556. .num_channels = 3,
  557. .noirq_config = {
  558. .channel = {
  559. AD799X_CHANNEL(0, 12),
  560. AD799X_CHANNEL(1, 12),
  561. IIO_CHAN_SOFT_TIMESTAMP(3),
  562. },
  563. .info = &ad7993_4_7_8_noirq_info,
  564. },
  565. .irq_config = {
  566. .channel = {
  567. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  568. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  569. IIO_CHAN_SOFT_TIMESTAMP(3),
  570. },
  571. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  572. .info = &ad7993_4_7_8_irq_info,
  573. },
  574. },
  575. [ad7993] = {
  576. .num_channels = 5,
  577. .noirq_config = {
  578. .channel = {
  579. AD799X_CHANNEL(0, 10),
  580. AD799X_CHANNEL(1, 10),
  581. AD799X_CHANNEL(2, 10),
  582. AD799X_CHANNEL(3, 10),
  583. IIO_CHAN_SOFT_TIMESTAMP(4),
  584. },
  585. .info = &ad7993_4_7_8_noirq_info,
  586. },
  587. .irq_config = {
  588. .channel = {
  589. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  590. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  591. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  592. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  593. IIO_CHAN_SOFT_TIMESTAMP(4),
  594. },
  595. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  596. .info = &ad7993_4_7_8_irq_info,
  597. },
  598. },
  599. [ad7994] = {
  600. .num_channels = 5,
  601. .noirq_config = {
  602. .channel = {
  603. AD799X_CHANNEL(0, 12),
  604. AD799X_CHANNEL(1, 12),
  605. AD799X_CHANNEL(2, 12),
  606. AD799X_CHANNEL(3, 12),
  607. IIO_CHAN_SOFT_TIMESTAMP(4),
  608. },
  609. .info = &ad7993_4_7_8_noirq_info,
  610. },
  611. .irq_config = {
  612. .channel = {
  613. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  614. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  615. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  616. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  617. IIO_CHAN_SOFT_TIMESTAMP(4),
  618. },
  619. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  620. .info = &ad7993_4_7_8_irq_info,
  621. },
  622. },
  623. [ad7997] = {
  624. .num_channels = 9,
  625. .noirq_config = {
  626. .channel = {
  627. AD799X_CHANNEL(0, 10),
  628. AD799X_CHANNEL(1, 10),
  629. AD799X_CHANNEL(2, 10),
  630. AD799X_CHANNEL(3, 10),
  631. AD799X_CHANNEL(4, 10),
  632. AD799X_CHANNEL(5, 10),
  633. AD799X_CHANNEL(6, 10),
  634. AD799X_CHANNEL(7, 10),
  635. IIO_CHAN_SOFT_TIMESTAMP(8),
  636. },
  637. .info = &ad7993_4_7_8_noirq_info,
  638. },
  639. .irq_config = {
  640. .channel = {
  641. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  642. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  643. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  644. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  645. AD799X_CHANNEL(4, 10),
  646. AD799X_CHANNEL(5, 10),
  647. AD799X_CHANNEL(6, 10),
  648. AD799X_CHANNEL(7, 10),
  649. IIO_CHAN_SOFT_TIMESTAMP(8),
  650. },
  651. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  652. .info = &ad7993_4_7_8_irq_info,
  653. },
  654. },
  655. [ad7998] = {
  656. .num_channels = 9,
  657. .noirq_config = {
  658. .channel = {
  659. AD799X_CHANNEL(0, 12),
  660. AD799X_CHANNEL(1, 12),
  661. AD799X_CHANNEL(2, 12),
  662. AD799X_CHANNEL(3, 12),
  663. AD799X_CHANNEL(4, 12),
  664. AD799X_CHANNEL(5, 12),
  665. AD799X_CHANNEL(6, 12),
  666. AD799X_CHANNEL(7, 12),
  667. IIO_CHAN_SOFT_TIMESTAMP(8),
  668. },
  669. .info = &ad7993_4_7_8_noirq_info,
  670. },
  671. .irq_config = {
  672. .channel = {
  673. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  674. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  675. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  676. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  677. AD799X_CHANNEL(4, 12),
  678. AD799X_CHANNEL(5, 12),
  679. AD799X_CHANNEL(6, 12),
  680. AD799X_CHANNEL(7, 12),
  681. IIO_CHAN_SOFT_TIMESTAMP(8),
  682. },
  683. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  684. .info = &ad7993_4_7_8_irq_info,
  685. },
  686. },
  687. };
  688. static int ad799x_probe(struct i2c_client *client,
  689. const struct i2c_device_id *id)
  690. {
  691. int ret;
  692. int extra_config = 0;
  693. struct ad799x_state *st;
  694. struct iio_dev *indio_dev;
  695. const struct ad799x_chip_info *chip_info =
  696. &ad799x_chip_info_tbl[id->driver_data];
  697. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  698. if (indio_dev == NULL)
  699. return -ENOMEM;
  700. st = iio_priv(indio_dev);
  701. /* this is only used for device removal purposes */
  702. i2c_set_clientdata(client, indio_dev);
  703. st->id = id->driver_data;
  704. if (client->irq > 0 && chip_info->irq_config.info)
  705. st->chip_config = &chip_info->irq_config;
  706. else
  707. st->chip_config = &chip_info->noirq_config;
  708. /* TODO: Add pdata options for filtering and bit delay */
  709. st->reg = devm_regulator_get(&client->dev, "vcc");
  710. if (IS_ERR(st->reg))
  711. return PTR_ERR(st->reg);
  712. ret = regulator_enable(st->reg);
  713. if (ret)
  714. return ret;
  715. /* check if an external reference is supplied */
  716. st->vref = devm_regulator_get_optional(&client->dev, "vref");
  717. if (IS_ERR(st->vref)) {
  718. if (PTR_ERR(st->vref) == -ENODEV) {
  719. st->vref = NULL;
  720. dev_info(&client->dev, "Using VCC reference voltage\n");
  721. } else {
  722. ret = PTR_ERR(st->vref);
  723. goto error_disable_reg;
  724. }
  725. }
  726. if (st->vref) {
  727. /*
  728. * Use external reference voltage if supported by hardware.
  729. * This is optional if voltage / regulator present, use VCC otherwise.
  730. */
  731. if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
  732. dev_info(&client->dev, "Using external reference voltage\n");
  733. extra_config |= AD7991_REF_SEL;
  734. ret = regulator_enable(st->vref);
  735. if (ret)
  736. goto error_disable_reg;
  737. } else {
  738. st->vref = NULL;
  739. dev_warn(&client->dev, "Supplied reference not supported\n");
  740. }
  741. }
  742. st->client = client;
  743. indio_dev->name = id->name;
  744. indio_dev->info = st->chip_config->info;
  745. indio_dev->modes = INDIO_DIRECT_MODE;
  746. indio_dev->channels = st->chip_config->channel;
  747. indio_dev->num_channels = chip_info->num_channels;
  748. ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
  749. if (ret)
  750. goto error_disable_vref;
  751. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  752. &ad799x_trigger_handler, NULL);
  753. if (ret)
  754. goto error_disable_vref;
  755. if (client->irq > 0) {
  756. ret = devm_request_threaded_irq(&client->dev,
  757. client->irq,
  758. NULL,
  759. ad799x_event_handler,
  760. IRQF_TRIGGER_FALLING |
  761. IRQF_ONESHOT,
  762. client->name,
  763. indio_dev);
  764. if (ret)
  765. goto error_cleanup_ring;
  766. }
  767. ret = iio_device_register(indio_dev);
  768. if (ret)
  769. goto error_cleanup_ring;
  770. return 0;
  771. error_cleanup_ring:
  772. iio_triggered_buffer_cleanup(indio_dev);
  773. error_disable_vref:
  774. if (st->vref)
  775. regulator_disable(st->vref);
  776. error_disable_reg:
  777. regulator_disable(st->reg);
  778. return ret;
  779. }
  780. static void ad799x_remove(struct i2c_client *client)
  781. {
  782. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  783. struct ad799x_state *st = iio_priv(indio_dev);
  784. iio_device_unregister(indio_dev);
  785. iio_triggered_buffer_cleanup(indio_dev);
  786. if (st->vref)
  787. regulator_disable(st->vref);
  788. regulator_disable(st->reg);
  789. kfree(st->rx_buf);
  790. }
  791. static int ad799x_suspend(struct device *dev)
  792. {
  793. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  794. struct ad799x_state *st = iio_priv(indio_dev);
  795. if (st->vref)
  796. regulator_disable(st->vref);
  797. regulator_disable(st->reg);
  798. return 0;
  799. }
  800. static int ad799x_resume(struct device *dev)
  801. {
  802. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  803. struct ad799x_state *st = iio_priv(indio_dev);
  804. int ret;
  805. ret = regulator_enable(st->reg);
  806. if (ret) {
  807. dev_err(dev, "Unable to enable vcc regulator\n");
  808. return ret;
  809. }
  810. if (st->vref) {
  811. ret = regulator_enable(st->vref);
  812. if (ret) {
  813. regulator_disable(st->reg);
  814. dev_err(dev, "Unable to enable vref regulator\n");
  815. return ret;
  816. }
  817. }
  818. /* resync config */
  819. ret = ad799x_update_config(st, st->config);
  820. if (ret) {
  821. if (st->vref)
  822. regulator_disable(st->vref);
  823. regulator_disable(st->reg);
  824. return ret;
  825. }
  826. return 0;
  827. }
  828. static DEFINE_SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
  829. static const struct i2c_device_id ad799x_id[] = {
  830. { "ad7991", ad7991 },
  831. { "ad7995", ad7995 },
  832. { "ad7999", ad7999 },
  833. { "ad7992", ad7992 },
  834. { "ad7993", ad7993 },
  835. { "ad7994", ad7994 },
  836. { "ad7997", ad7997 },
  837. { "ad7998", ad7998 },
  838. {}
  839. };
  840. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  841. static struct i2c_driver ad799x_driver = {
  842. .driver = {
  843. .name = "ad799x",
  844. .pm = pm_sleep_ptr(&ad799x_pm_ops),
  845. },
  846. .probe = ad799x_probe,
  847. .remove = ad799x_remove,
  848. .id_table = ad799x_id,
  849. };
  850. module_i2c_driver(ad799x_driver);
  851. MODULE_AUTHOR("Michael Hennerich <[email protected]>");
  852. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  853. MODULE_LICENSE("GPL v2");