kxcjk-1013.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * KXCJK-1013 3-axis accelerometer driver
  4. * Copyright (c) 2014, Intel Corporation.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/i2c.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/delay.h>
  10. #include <linux/bitops.h>
  11. #include <linux/slab.h>
  12. #include <linux/string.h>
  13. #include <linux/acpi.h>
  14. #include <linux/pm.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/trigger.h>
  21. #include <linux/iio/events.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include <linux/iio/triggered_buffer.h>
  24. #include <linux/iio/accel/kxcjk_1013.h>
  25. #define KXCJK1013_DRV_NAME "kxcjk1013"
  26. #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
  27. #define KXTF9_REG_HP_XOUT_L 0x00
  28. #define KXTF9_REG_HP_XOUT_H 0x01
  29. #define KXTF9_REG_HP_YOUT_L 0x02
  30. #define KXTF9_REG_HP_YOUT_H 0x03
  31. #define KXTF9_REG_HP_ZOUT_L 0x04
  32. #define KXTF9_REG_HP_ZOUT_H 0x05
  33. #define KXCJK1013_REG_XOUT_L 0x06
  34. /*
  35. * From low byte X axis register, all the other addresses of Y and Z can be
  36. * obtained by just applying axis offset. The following axis defines are just
  37. * provide clarity, but not used.
  38. */
  39. #define KXCJK1013_REG_XOUT_H 0x07
  40. #define KXCJK1013_REG_YOUT_L 0x08
  41. #define KXCJK1013_REG_YOUT_H 0x09
  42. #define KXCJK1013_REG_ZOUT_L 0x0A
  43. #define KXCJK1013_REG_ZOUT_H 0x0B
  44. #define KXCJK1013_REG_DCST_RESP 0x0C
  45. #define KXCJK1013_REG_WHO_AM_I 0x0F
  46. #define KXTF9_REG_TILT_POS_CUR 0x10
  47. #define KXTF9_REG_TILT_POS_PREV 0x11
  48. #define KXTF9_REG_INT_SRC1 0x15
  49. #define KXTF9_REG_INT_SRC2 0x16
  50. #define KXCJK1013_REG_INT_SRC1 0x16
  51. #define KXCJK1013_REG_INT_SRC2 0x17
  52. #define KXCJK1013_REG_STATUS_REG 0x18
  53. #define KXCJK1013_REG_INT_REL 0x1A
  54. #define KXCJK1013_REG_CTRL1 0x1B
  55. #define KXTF9_REG_CTRL2 0x1C
  56. #define KXTF9_REG_CTRL3 0x1D
  57. #define KXCJK1013_REG_CTRL2 0x1D
  58. #define KXCJK1013_REG_INT_CTRL1 0x1E
  59. #define KXCJK1013_REG_INT_CTRL2 0x1F
  60. #define KXTF9_REG_INT_CTRL3 0x20
  61. #define KXCJK1013_REG_DATA_CTRL 0x21
  62. #define KXTF9_REG_TILT_TIMER 0x28
  63. #define KXCJK1013_REG_WAKE_TIMER 0x29
  64. #define KXTF9_REG_TDT_TIMER 0x2B
  65. #define KXTF9_REG_TDT_THRESH_H 0x2C
  66. #define KXTF9_REG_TDT_THRESH_L 0x2D
  67. #define KXTF9_REG_TDT_TAP_TIMER 0x2E
  68. #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
  69. #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
  70. #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
  71. #define KXCJK1013_REG_SELF_TEST 0x3A
  72. #define KXTF9_REG_WAKE_THRESH 0x5A
  73. #define KXTF9_REG_TILT_ANGLE 0x5C
  74. #define KXTF9_REG_HYST_SET 0x5F
  75. #define KXCJK1013_REG_WAKE_THRES 0x6A
  76. /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */
  77. #define KX023_REG_INS1 0x12
  78. #define KX023_REG_INS2 0x13
  79. #define KX023_REG_INS3 0x14
  80. #define KX023_REG_STAT 0x15
  81. #define KX023_REG_INT_REL 0x17
  82. #define KX023_REG_CNTL1 0x18
  83. #define KX023_REG_CNTL2 0x19
  84. #define KX023_REG_CNTL3 0x1A
  85. #define KX023_REG_ODCNTL 0x1B
  86. #define KX023_REG_INC1 0x1C
  87. #define KX023_REG_INC2 0x1D
  88. #define KX023_REG_INC3 0x1E
  89. #define KX023_REG_INC4 0x1F
  90. #define KX023_REG_INC5 0x20
  91. #define KX023_REG_INC6 0x21
  92. #define KX023_REG_TILT_TIMER 0x22
  93. #define KX023_REG_WUFC 0x23
  94. #define KX023_REG_TDTRC 0x24
  95. #define KX023_REG_TDTC 0x25
  96. #define KX023_REG_TTH 0x26
  97. #define KX023_REG_TTL 0x27
  98. #define KX023_REG_FTD 0x28
  99. #define KX023_REG_STD 0x29
  100. #define KX023_REG_TLT 0x2A
  101. #define KX023_REG_TWS 0x2B
  102. #define KX023_REG_ATH 0x30
  103. #define KX023_REG_TILT_ANGLE_LL 0x32
  104. #define KX023_REG_TILT_ANGLE_HL 0x33
  105. #define KX023_REG_HYST_SET 0x34
  106. #define KX023_REG_LP_CNTL 0x35
  107. #define KX023_REG_BUF_CNTL1 0x3A
  108. #define KX023_REG_BUF_CNTL2 0x3B
  109. #define KX023_REG_BUF_STATUS_1 0x3C
  110. #define KX023_REG_BUF_STATUS_2 0x3D
  111. #define KX023_REG_BUF_CLEAR 0x3E
  112. #define KX023_REG_BUF_READ 0x3F
  113. #define KX023_REG_SELF_TEST 0x60
  114. #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
  115. #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
  116. #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
  117. #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
  118. #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
  119. #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
  120. #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */
  121. #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
  122. #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
  123. #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
  124. #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
  125. #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
  126. #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
  127. #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
  128. #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
  129. #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
  130. #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
  131. #define KXCJK1013_MAX_STARTUP_TIME_US 100000
  132. #define KXCJK1013_SLEEP_DELAY_MS 2000
  133. #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */
  134. #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
  135. #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */
  136. #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
  137. #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
  138. #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
  139. #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
  140. /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
  141. #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
  142. #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
  143. #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
  144. #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
  145. #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
  146. #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
  147. /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */
  148. #define KX023_REG_INC4_BFI1 BIT(6)
  149. #define KX023_REG_INC4_WMI1 BIT(5)
  150. #define KX023_REG_INC4_DRDY1 BIT(4)
  151. #define KX023_REG_INC4_TDTI1 BIT(2)
  152. #define KX023_REG_INC4_WUFI1 BIT(1)
  153. #define KX023_REG_INC4_TPI1 BIT(0)
  154. #define KXCJK1013_DEFAULT_WAKE_THRES 1
  155. enum kx_chipset {
  156. KXCJK1013,
  157. KXCJ91008,
  158. KXTJ21009,
  159. KXTF9,
  160. KX0231025,
  161. KX_MAX_CHIPS /* this must be last */
  162. };
  163. enum kx_acpi_type {
  164. ACPI_GENERIC,
  165. ACPI_SMO8500,
  166. ACPI_KIOX010A,
  167. };
  168. struct kx_chipset_regs {
  169. u8 int_src1;
  170. u8 int_src2;
  171. u8 int_rel;
  172. u8 ctrl1;
  173. u8 wuf_ctrl;
  174. u8 int_ctrl1;
  175. u8 data_ctrl;
  176. u8 wake_timer;
  177. u8 wake_thres;
  178. };
  179. static const struct kx_chipset_regs kxcjk1013_regs = {
  180. .int_src1 = KXCJK1013_REG_INT_SRC1,
  181. .int_src2 = KXCJK1013_REG_INT_SRC2,
  182. .int_rel = KXCJK1013_REG_INT_REL,
  183. .ctrl1 = KXCJK1013_REG_CTRL1,
  184. .wuf_ctrl = KXCJK1013_REG_CTRL2,
  185. .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
  186. .data_ctrl = KXCJK1013_REG_DATA_CTRL,
  187. .wake_timer = KXCJK1013_REG_WAKE_TIMER,
  188. .wake_thres = KXCJK1013_REG_WAKE_THRES,
  189. };
  190. static const struct kx_chipset_regs kxtf9_regs = {
  191. /* .int_src1 was moved to INT_SRC2 on KXTF9 */
  192. .int_src1 = KXTF9_REG_INT_SRC2,
  193. /* .int_src2 is not available */
  194. .int_rel = KXCJK1013_REG_INT_REL,
  195. .ctrl1 = KXCJK1013_REG_CTRL1,
  196. .wuf_ctrl = KXTF9_REG_CTRL3,
  197. .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
  198. .data_ctrl = KXCJK1013_REG_DATA_CTRL,
  199. .wake_timer = KXCJK1013_REG_WAKE_TIMER,
  200. .wake_thres = KXTF9_REG_WAKE_THRESH,
  201. };
  202. /* The registers have totally different names but the bits are compatible */
  203. static const struct kx_chipset_regs kx0231025_regs = {
  204. .int_src1 = KX023_REG_INS2,
  205. .int_src2 = KX023_REG_INS3,
  206. .int_rel = KX023_REG_INT_REL,
  207. .ctrl1 = KX023_REG_CNTL1,
  208. .wuf_ctrl = KX023_REG_CNTL3,
  209. .int_ctrl1 = KX023_REG_INC1,
  210. .data_ctrl = KX023_REG_ODCNTL,
  211. .wake_timer = KX023_REG_WUFC,
  212. .wake_thres = KX023_REG_ATH,
  213. };
  214. enum kxcjk1013_axis {
  215. AXIS_X,
  216. AXIS_Y,
  217. AXIS_Z,
  218. AXIS_MAX
  219. };
  220. struct kxcjk1013_data {
  221. struct regulator_bulk_data regulators[2];
  222. struct i2c_client *client;
  223. struct iio_trigger *dready_trig;
  224. struct iio_trigger *motion_trig;
  225. struct iio_mount_matrix orientation;
  226. struct mutex mutex;
  227. /* Ensure timestamp naturally aligned */
  228. struct {
  229. s16 chans[AXIS_MAX];
  230. s64 timestamp __aligned(8);
  231. } scan;
  232. u8 odr_bits;
  233. u8 range;
  234. int wake_thres;
  235. int wake_dur;
  236. bool active_high_intr;
  237. bool dready_trigger_on;
  238. int ev_enable_state;
  239. bool motion_trigger_on;
  240. int64_t timestamp;
  241. enum kx_chipset chipset;
  242. enum kx_acpi_type acpi_type;
  243. const struct kx_chipset_regs *regs;
  244. };
  245. enum kxcjk1013_mode {
  246. STANDBY,
  247. OPERATION,
  248. };
  249. enum kxcjk1013_range {
  250. KXCJK1013_RANGE_2G,
  251. KXCJK1013_RANGE_4G,
  252. KXCJK1013_RANGE_8G,
  253. };
  254. struct kx_odr_map {
  255. int val;
  256. int val2;
  257. int odr_bits;
  258. int wuf_bits;
  259. };
  260. static const struct kx_odr_map samp_freq_table[] = {
  261. { 0, 781000, 0x08, 0x00 },
  262. { 1, 563000, 0x09, 0x01 },
  263. { 3, 125000, 0x0A, 0x02 },
  264. { 6, 250000, 0x0B, 0x03 },
  265. { 12, 500000, 0x00, 0x04 },
  266. { 25, 0, 0x01, 0x05 },
  267. { 50, 0, 0x02, 0x06 },
  268. { 100, 0, 0x03, 0x06 },
  269. { 200, 0, 0x04, 0x06 },
  270. { 400, 0, 0x05, 0x06 },
  271. { 800, 0, 0x06, 0x06 },
  272. { 1600, 0, 0x07, 0x06 },
  273. };
  274. static const char *const kxcjk1013_samp_freq_avail =
  275. "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
  276. static const struct kx_odr_map kxtf9_samp_freq_table[] = {
  277. { 25, 0, 0x01, 0x00 },
  278. { 50, 0, 0x02, 0x01 },
  279. { 100, 0, 0x03, 0x01 },
  280. { 200, 0, 0x04, 0x01 },
  281. { 400, 0, 0x05, 0x01 },
  282. { 800, 0, 0x06, 0x01 },
  283. };
  284. static const char *const kxtf9_samp_freq_avail =
  285. "25 50 100 200 400 800";
  286. /* Refer to section 4 of the specification */
  287. static __maybe_unused const struct {
  288. int odr_bits;
  289. int usec;
  290. } odr_start_up_times[KX_MAX_CHIPS][12] = {
  291. /* KXCJK-1013 */
  292. {
  293. {0x08, 100000},
  294. {0x09, 100000},
  295. {0x0A, 100000},
  296. {0x0B, 100000},
  297. {0, 80000},
  298. {0x01, 41000},
  299. {0x02, 21000},
  300. {0x03, 11000},
  301. {0x04, 6400},
  302. {0x05, 3900},
  303. {0x06, 2700},
  304. {0x07, 2100},
  305. },
  306. /* KXCJ9-1008 */
  307. {
  308. {0x08, 100000},
  309. {0x09, 100000},
  310. {0x0A, 100000},
  311. {0x0B, 100000},
  312. {0, 80000},
  313. {0x01, 41000},
  314. {0x02, 21000},
  315. {0x03, 11000},
  316. {0x04, 6400},
  317. {0x05, 3900},
  318. {0x06, 2700},
  319. {0x07, 2100},
  320. },
  321. /* KXCTJ2-1009 */
  322. {
  323. {0x08, 1240000},
  324. {0x09, 621000},
  325. {0x0A, 309000},
  326. {0x0B, 151000},
  327. {0, 80000},
  328. {0x01, 41000},
  329. {0x02, 21000},
  330. {0x03, 11000},
  331. {0x04, 6000},
  332. {0x05, 4000},
  333. {0x06, 3000},
  334. {0x07, 2000},
  335. },
  336. /* KXTF9 */
  337. {
  338. {0x01, 81000},
  339. {0x02, 41000},
  340. {0x03, 21000},
  341. {0x04, 11000},
  342. {0x05, 5100},
  343. {0x06, 2700},
  344. },
  345. /* KX023-1025 */
  346. {
  347. /* First 4 are not in datasheet, taken from KXCTJ2-1009 */
  348. {0x08, 1240000},
  349. {0x09, 621000},
  350. {0x0A, 309000},
  351. {0x0B, 151000},
  352. {0, 81000},
  353. {0x01, 40000},
  354. {0x02, 22000},
  355. {0x03, 12000},
  356. {0x04, 7000},
  357. {0x05, 4400},
  358. {0x06, 3000},
  359. {0x07, 3000},
  360. },
  361. };
  362. static const struct {
  363. u16 scale;
  364. u8 gsel_0;
  365. u8 gsel_1;
  366. } KXCJK1013_scale_table[] = { {9582, 0, 0},
  367. {19163, 1, 0},
  368. {38326, 0, 1} };
  369. #ifdef CONFIG_ACPI
  370. enum kiox010a_fn_index {
  371. KIOX010A_SET_LAPTOP_MODE = 1,
  372. KIOX010A_SET_TABLET_MODE = 2,
  373. };
  374. static int kiox010a_dsm(struct device *dev, int fn_index)
  375. {
  376. acpi_handle handle = ACPI_HANDLE(dev);
  377. guid_t kiox010a_dsm_guid;
  378. union acpi_object *obj;
  379. if (!handle)
  380. return -ENODEV;
  381. guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
  382. obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
  383. if (!obj)
  384. return -EIO;
  385. ACPI_FREE(obj);
  386. return 0;
  387. }
  388. #endif
  389. static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
  390. enum kxcjk1013_mode mode)
  391. {
  392. int ret;
  393. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  394. if (ret < 0) {
  395. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  396. return ret;
  397. }
  398. if (mode == STANDBY)
  399. ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
  400. else
  401. ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
  402. ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
  403. if (ret < 0) {
  404. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  405. return ret;
  406. }
  407. return 0;
  408. }
  409. static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
  410. enum kxcjk1013_mode *mode)
  411. {
  412. int ret;
  413. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  414. if (ret < 0) {
  415. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  416. return ret;
  417. }
  418. if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
  419. *mode = OPERATION;
  420. else
  421. *mode = STANDBY;
  422. return 0;
  423. }
  424. static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
  425. {
  426. int ret;
  427. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  428. if (ret < 0) {
  429. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  430. return ret;
  431. }
  432. ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
  433. KXCJK1013_REG_CTRL1_BIT_GSEL1);
  434. ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
  435. ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
  436. ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
  437. if (ret < 0) {
  438. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  439. return ret;
  440. }
  441. data->range = range_index;
  442. return 0;
  443. }
  444. static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
  445. {
  446. int ret;
  447. #ifdef CONFIG_ACPI
  448. if (data->acpi_type == ACPI_KIOX010A) {
  449. /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
  450. kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
  451. }
  452. #endif
  453. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
  454. if (ret < 0) {
  455. dev_err(&data->client->dev, "Error reading who_am_i\n");
  456. return ret;
  457. }
  458. dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
  459. ret = kxcjk1013_set_mode(data, STANDBY);
  460. if (ret < 0)
  461. return ret;
  462. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  463. if (ret < 0) {
  464. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  465. return ret;
  466. }
  467. /* Set 12 bit mode */
  468. ret |= KXCJK1013_REG_CTRL1_BIT_RES;
  469. ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
  470. if (ret < 0) {
  471. dev_err(&data->client->dev, "Error reading reg_ctrl\n");
  472. return ret;
  473. }
  474. /* Setting range to 4G */
  475. ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
  476. if (ret < 0)
  477. return ret;
  478. ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl);
  479. if (ret < 0) {
  480. dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
  481. return ret;
  482. }
  483. data->odr_bits = ret;
  484. /* Set up INT polarity */
  485. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
  486. if (ret < 0) {
  487. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  488. return ret;
  489. }
  490. if (data->active_high_intr)
  491. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
  492. else
  493. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
  494. ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
  495. if (ret < 0) {
  496. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  497. return ret;
  498. }
  499. /* On KX023, route all used interrupts to INT1 for now */
  500. if (data->chipset == KX0231025 && data->client->irq > 0) {
  501. ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
  502. KX023_REG_INC4_DRDY1 |
  503. KX023_REG_INC4_WUFI1);
  504. if (ret < 0) {
  505. dev_err(&data->client->dev, "Error writing reg_inc4\n");
  506. return ret;
  507. }
  508. }
  509. ret = kxcjk1013_set_mode(data, OPERATION);
  510. if (ret < 0)
  511. return ret;
  512. data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
  513. return 0;
  514. }
  515. #ifdef CONFIG_PM
  516. static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
  517. {
  518. int i;
  519. int idx = data->chipset;
  520. for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
  521. if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
  522. return odr_start_up_times[idx][i].usec;
  523. }
  524. return KXCJK1013_MAX_STARTUP_TIME_US;
  525. }
  526. #endif
  527. static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
  528. {
  529. #ifdef CONFIG_PM
  530. int ret;
  531. if (on)
  532. ret = pm_runtime_resume_and_get(&data->client->dev);
  533. else {
  534. pm_runtime_mark_last_busy(&data->client->dev);
  535. ret = pm_runtime_put_autosuspend(&data->client->dev);
  536. }
  537. if (ret < 0) {
  538. dev_err(&data->client->dev,
  539. "Failed: %s for %d\n", __func__, on);
  540. return ret;
  541. }
  542. #endif
  543. return 0;
  544. }
  545. static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
  546. {
  547. int ret;
  548. ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer,
  549. data->wake_dur);
  550. if (ret < 0) {
  551. dev_err(&data->client->dev,
  552. "Error writing reg_wake_timer\n");
  553. return ret;
  554. }
  555. ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres,
  556. data->wake_thres);
  557. if (ret < 0) {
  558. dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
  559. return ret;
  560. }
  561. return 0;
  562. }
  563. static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
  564. bool status)
  565. {
  566. int ret;
  567. enum kxcjk1013_mode store_mode;
  568. ret = kxcjk1013_get_mode(data, &store_mode);
  569. if (ret < 0)
  570. return ret;
  571. /* This is requirement by spec to change state to STANDBY */
  572. ret = kxcjk1013_set_mode(data, STANDBY);
  573. if (ret < 0)
  574. return ret;
  575. ret = kxcjk1013_chip_update_thresholds(data);
  576. if (ret < 0)
  577. return ret;
  578. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
  579. if (ret < 0) {
  580. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  581. return ret;
  582. }
  583. if (status)
  584. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  585. else
  586. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  587. ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
  588. if (ret < 0) {
  589. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  590. return ret;
  591. }
  592. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  593. if (ret < 0) {
  594. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  595. return ret;
  596. }
  597. if (status)
  598. ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
  599. else
  600. ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
  601. ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
  602. if (ret < 0) {
  603. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  604. return ret;
  605. }
  606. if (store_mode == OPERATION) {
  607. ret = kxcjk1013_set_mode(data, OPERATION);
  608. if (ret < 0)
  609. return ret;
  610. }
  611. return 0;
  612. }
  613. static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
  614. bool status)
  615. {
  616. int ret;
  617. enum kxcjk1013_mode store_mode;
  618. ret = kxcjk1013_get_mode(data, &store_mode);
  619. if (ret < 0)
  620. return ret;
  621. /* This is requirement by spec to change state to STANDBY */
  622. ret = kxcjk1013_set_mode(data, STANDBY);
  623. if (ret < 0)
  624. return ret;
  625. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
  626. if (ret < 0) {
  627. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  628. return ret;
  629. }
  630. if (status)
  631. ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  632. else
  633. ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
  634. ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
  635. if (ret < 0) {
  636. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  637. return ret;
  638. }
  639. ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
  640. if (ret < 0) {
  641. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  642. return ret;
  643. }
  644. if (status)
  645. ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
  646. else
  647. ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
  648. ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
  649. if (ret < 0) {
  650. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  651. return ret;
  652. }
  653. if (store_mode == OPERATION) {
  654. ret = kxcjk1013_set_mode(data, OPERATION);
  655. if (ret < 0)
  656. return ret;
  657. }
  658. return 0;
  659. }
  660. static const struct kx_odr_map *kxcjk1013_find_odr_value(
  661. const struct kx_odr_map *map, size_t map_size, int val, int val2)
  662. {
  663. int i;
  664. for (i = 0; i < map_size; ++i) {
  665. if (map[i].val == val && map[i].val2 == val2)
  666. return &map[i];
  667. }
  668. return ERR_PTR(-EINVAL);
  669. }
  670. static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
  671. size_t map_size, int odr_bits,
  672. int *val, int *val2)
  673. {
  674. int i;
  675. for (i = 0; i < map_size; ++i) {
  676. if (map[i].odr_bits == odr_bits) {
  677. *val = map[i].val;
  678. *val2 = map[i].val2;
  679. return IIO_VAL_INT_PLUS_MICRO;
  680. }
  681. }
  682. return -EINVAL;
  683. }
  684. static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
  685. {
  686. int ret;
  687. enum kxcjk1013_mode store_mode;
  688. const struct kx_odr_map *odr_setting;
  689. ret = kxcjk1013_get_mode(data, &store_mode);
  690. if (ret < 0)
  691. return ret;
  692. if (data->chipset == KXTF9)
  693. odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
  694. ARRAY_SIZE(kxtf9_samp_freq_table),
  695. val, val2);
  696. else
  697. odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
  698. ARRAY_SIZE(samp_freq_table),
  699. val, val2);
  700. if (IS_ERR(odr_setting))
  701. return PTR_ERR(odr_setting);
  702. /* To change ODR, the chip must be set to STANDBY as per spec */
  703. ret = kxcjk1013_set_mode(data, STANDBY);
  704. if (ret < 0)
  705. return ret;
  706. ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl,
  707. odr_setting->odr_bits);
  708. if (ret < 0) {
  709. dev_err(&data->client->dev, "Error writing data_ctrl\n");
  710. return ret;
  711. }
  712. data->odr_bits = odr_setting->odr_bits;
  713. ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl,
  714. odr_setting->wuf_bits);
  715. if (ret < 0) {
  716. dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
  717. return ret;
  718. }
  719. if (store_mode == OPERATION) {
  720. ret = kxcjk1013_set_mode(data, OPERATION);
  721. if (ret < 0)
  722. return ret;
  723. }
  724. return 0;
  725. }
  726. static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
  727. {
  728. if (data->chipset == KXTF9)
  729. return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
  730. ARRAY_SIZE(kxtf9_samp_freq_table),
  731. data->odr_bits, val, val2);
  732. else
  733. return kxcjk1013_convert_odr_value(samp_freq_table,
  734. ARRAY_SIZE(samp_freq_table),
  735. data->odr_bits, val, val2);
  736. }
  737. static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
  738. {
  739. u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
  740. int ret;
  741. ret = i2c_smbus_read_word_data(data->client, reg);
  742. if (ret < 0) {
  743. dev_err(&data->client->dev,
  744. "failed to read accel_%c registers\n", 'x' + axis);
  745. return ret;
  746. }
  747. return ret;
  748. }
  749. static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
  750. {
  751. int ret, i;
  752. enum kxcjk1013_mode store_mode;
  753. for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
  754. if (KXCJK1013_scale_table[i].scale == val) {
  755. ret = kxcjk1013_get_mode(data, &store_mode);
  756. if (ret < 0)
  757. return ret;
  758. ret = kxcjk1013_set_mode(data, STANDBY);
  759. if (ret < 0)
  760. return ret;
  761. ret = kxcjk1013_set_range(data, i);
  762. if (ret < 0)
  763. return ret;
  764. if (store_mode == OPERATION) {
  765. ret = kxcjk1013_set_mode(data, OPERATION);
  766. if (ret)
  767. return ret;
  768. }
  769. return 0;
  770. }
  771. }
  772. return -EINVAL;
  773. }
  774. static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
  775. struct iio_chan_spec const *chan, int *val,
  776. int *val2, long mask)
  777. {
  778. struct kxcjk1013_data *data = iio_priv(indio_dev);
  779. int ret;
  780. switch (mask) {
  781. case IIO_CHAN_INFO_RAW:
  782. mutex_lock(&data->mutex);
  783. if (iio_buffer_enabled(indio_dev))
  784. ret = -EBUSY;
  785. else {
  786. ret = kxcjk1013_set_power_state(data, true);
  787. if (ret < 0) {
  788. mutex_unlock(&data->mutex);
  789. return ret;
  790. }
  791. ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
  792. if (ret < 0) {
  793. kxcjk1013_set_power_state(data, false);
  794. mutex_unlock(&data->mutex);
  795. return ret;
  796. }
  797. *val = sign_extend32(ret >> chan->scan_type.shift,
  798. chan->scan_type.realbits - 1);
  799. ret = kxcjk1013_set_power_state(data, false);
  800. }
  801. mutex_unlock(&data->mutex);
  802. if (ret < 0)
  803. return ret;
  804. return IIO_VAL_INT;
  805. case IIO_CHAN_INFO_SCALE:
  806. *val = 0;
  807. *val2 = KXCJK1013_scale_table[data->range].scale;
  808. return IIO_VAL_INT_PLUS_MICRO;
  809. case IIO_CHAN_INFO_SAMP_FREQ:
  810. mutex_lock(&data->mutex);
  811. ret = kxcjk1013_get_odr(data, val, val2);
  812. mutex_unlock(&data->mutex);
  813. return ret;
  814. default:
  815. return -EINVAL;
  816. }
  817. }
  818. static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
  819. struct iio_chan_spec const *chan, int val,
  820. int val2, long mask)
  821. {
  822. struct kxcjk1013_data *data = iio_priv(indio_dev);
  823. int ret;
  824. switch (mask) {
  825. case IIO_CHAN_INFO_SAMP_FREQ:
  826. mutex_lock(&data->mutex);
  827. ret = kxcjk1013_set_odr(data, val, val2);
  828. mutex_unlock(&data->mutex);
  829. break;
  830. case IIO_CHAN_INFO_SCALE:
  831. if (val)
  832. return -EINVAL;
  833. mutex_lock(&data->mutex);
  834. ret = kxcjk1013_set_scale(data, val2);
  835. mutex_unlock(&data->mutex);
  836. break;
  837. default:
  838. ret = -EINVAL;
  839. }
  840. return ret;
  841. }
  842. static int kxcjk1013_read_event(struct iio_dev *indio_dev,
  843. const struct iio_chan_spec *chan,
  844. enum iio_event_type type,
  845. enum iio_event_direction dir,
  846. enum iio_event_info info,
  847. int *val, int *val2)
  848. {
  849. struct kxcjk1013_data *data = iio_priv(indio_dev);
  850. *val2 = 0;
  851. switch (info) {
  852. case IIO_EV_INFO_VALUE:
  853. *val = data->wake_thres;
  854. break;
  855. case IIO_EV_INFO_PERIOD:
  856. *val = data->wake_dur;
  857. break;
  858. default:
  859. return -EINVAL;
  860. }
  861. return IIO_VAL_INT;
  862. }
  863. static int kxcjk1013_write_event(struct iio_dev *indio_dev,
  864. const struct iio_chan_spec *chan,
  865. enum iio_event_type type,
  866. enum iio_event_direction dir,
  867. enum iio_event_info info,
  868. int val, int val2)
  869. {
  870. struct kxcjk1013_data *data = iio_priv(indio_dev);
  871. if (data->ev_enable_state)
  872. return -EBUSY;
  873. switch (info) {
  874. case IIO_EV_INFO_VALUE:
  875. data->wake_thres = val;
  876. break;
  877. case IIO_EV_INFO_PERIOD:
  878. data->wake_dur = val;
  879. break;
  880. default:
  881. return -EINVAL;
  882. }
  883. return 0;
  884. }
  885. static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
  886. const struct iio_chan_spec *chan,
  887. enum iio_event_type type,
  888. enum iio_event_direction dir)
  889. {
  890. struct kxcjk1013_data *data = iio_priv(indio_dev);
  891. return data->ev_enable_state;
  892. }
  893. static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
  894. const struct iio_chan_spec *chan,
  895. enum iio_event_type type,
  896. enum iio_event_direction dir,
  897. int state)
  898. {
  899. struct kxcjk1013_data *data = iio_priv(indio_dev);
  900. int ret;
  901. if (state && data->ev_enable_state)
  902. return 0;
  903. mutex_lock(&data->mutex);
  904. if (!state && data->motion_trigger_on) {
  905. data->ev_enable_state = 0;
  906. mutex_unlock(&data->mutex);
  907. return 0;
  908. }
  909. /*
  910. * We will expect the enable and disable to do operation in
  911. * reverse order. This will happen here anyway as our
  912. * resume operation uses sync mode runtime pm calls, the
  913. * suspend operation will be delayed by autosuspend delay
  914. * So the disable operation will still happen in reverse of
  915. * enable operation. When runtime pm is disabled the mode
  916. * is always on so sequence doesn't matter
  917. */
  918. ret = kxcjk1013_set_power_state(data, state);
  919. if (ret < 0) {
  920. mutex_unlock(&data->mutex);
  921. return ret;
  922. }
  923. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  924. if (ret < 0) {
  925. kxcjk1013_set_power_state(data, false);
  926. data->ev_enable_state = 0;
  927. mutex_unlock(&data->mutex);
  928. return ret;
  929. }
  930. data->ev_enable_state = state;
  931. mutex_unlock(&data->mutex);
  932. return 0;
  933. }
  934. static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
  935. {
  936. struct kxcjk1013_data *data = iio_priv(indio_dev);
  937. return kxcjk1013_set_power_state(data, true);
  938. }
  939. static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
  940. {
  941. struct kxcjk1013_data *data = iio_priv(indio_dev);
  942. return kxcjk1013_set_power_state(data, false);
  943. }
  944. static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
  945. struct device_attribute *attr,
  946. char *buf)
  947. {
  948. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  949. struct kxcjk1013_data *data = iio_priv(indio_dev);
  950. const char *str;
  951. if (data->chipset == KXTF9)
  952. str = kxtf9_samp_freq_avail;
  953. else
  954. str = kxcjk1013_samp_freq_avail;
  955. return sprintf(buf, "%s\n", str);
  956. }
  957. static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
  958. kxcjk1013_get_samp_freq_avail, NULL, 0);
  959. static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
  960. static struct attribute *kxcjk1013_attributes[] = {
  961. &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
  962. &iio_const_attr_in_accel_scale_available.dev_attr.attr,
  963. NULL,
  964. };
  965. static const struct attribute_group kxcjk1013_attrs_group = {
  966. .attrs = kxcjk1013_attributes,
  967. };
  968. static const struct iio_event_spec kxcjk1013_event = {
  969. .type = IIO_EV_TYPE_THRESH,
  970. .dir = IIO_EV_DIR_EITHER,
  971. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  972. BIT(IIO_EV_INFO_ENABLE) |
  973. BIT(IIO_EV_INFO_PERIOD)
  974. };
  975. static const struct iio_mount_matrix *
  976. kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
  977. const struct iio_chan_spec *chan)
  978. {
  979. struct kxcjk1013_data *data = iio_priv(indio_dev);
  980. return &data->orientation;
  981. }
  982. static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
  983. IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
  984. { }
  985. };
  986. #define KXCJK1013_CHANNEL(_axis) { \
  987. .type = IIO_ACCEL, \
  988. .modified = 1, \
  989. .channel2 = IIO_MOD_##_axis, \
  990. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  991. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  992. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  993. .scan_index = AXIS_##_axis, \
  994. .scan_type = { \
  995. .sign = 's', \
  996. .realbits = 12, \
  997. .storagebits = 16, \
  998. .shift = 4, \
  999. .endianness = IIO_LE, \
  1000. }, \
  1001. .event_spec = &kxcjk1013_event, \
  1002. .ext_info = kxcjk1013_ext_info, \
  1003. .num_event_specs = 1 \
  1004. }
  1005. static const struct iio_chan_spec kxcjk1013_channels[] = {
  1006. KXCJK1013_CHANNEL(X),
  1007. KXCJK1013_CHANNEL(Y),
  1008. KXCJK1013_CHANNEL(Z),
  1009. IIO_CHAN_SOFT_TIMESTAMP(3),
  1010. };
  1011. static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
  1012. .preenable = kxcjk1013_buffer_preenable,
  1013. .postdisable = kxcjk1013_buffer_postdisable,
  1014. };
  1015. static const struct iio_info kxcjk1013_info = {
  1016. .attrs = &kxcjk1013_attrs_group,
  1017. .read_raw = kxcjk1013_read_raw,
  1018. .write_raw = kxcjk1013_write_raw,
  1019. .read_event_value = kxcjk1013_read_event,
  1020. .write_event_value = kxcjk1013_write_event,
  1021. .write_event_config = kxcjk1013_write_event_config,
  1022. .read_event_config = kxcjk1013_read_event_config,
  1023. };
  1024. static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
  1025. static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
  1026. {
  1027. struct iio_poll_func *pf = p;
  1028. struct iio_dev *indio_dev = pf->indio_dev;
  1029. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1030. int ret;
  1031. mutex_lock(&data->mutex);
  1032. ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
  1033. KXCJK1013_REG_XOUT_L,
  1034. AXIS_MAX * 2,
  1035. (u8 *)data->scan.chans);
  1036. mutex_unlock(&data->mutex);
  1037. if (ret < 0)
  1038. goto err;
  1039. iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
  1040. data->timestamp);
  1041. err:
  1042. iio_trigger_notify_done(indio_dev->trig);
  1043. return IRQ_HANDLED;
  1044. }
  1045. static void kxcjk1013_trig_reen(struct iio_trigger *trig)
  1046. {
  1047. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  1048. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1049. int ret;
  1050. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
  1051. if (ret < 0)
  1052. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  1053. }
  1054. static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
  1055. bool state)
  1056. {
  1057. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  1058. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1059. int ret;
  1060. mutex_lock(&data->mutex);
  1061. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  1062. data->motion_trigger_on = false;
  1063. mutex_unlock(&data->mutex);
  1064. return 0;
  1065. }
  1066. ret = kxcjk1013_set_power_state(data, state);
  1067. if (ret < 0) {
  1068. mutex_unlock(&data->mutex);
  1069. return ret;
  1070. }
  1071. if (data->motion_trig == trig)
  1072. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  1073. else
  1074. ret = kxcjk1013_setup_new_data_interrupt(data, state);
  1075. if (ret < 0) {
  1076. kxcjk1013_set_power_state(data, false);
  1077. mutex_unlock(&data->mutex);
  1078. return ret;
  1079. }
  1080. if (data->motion_trig == trig)
  1081. data->motion_trigger_on = state;
  1082. else
  1083. data->dready_trigger_on = state;
  1084. mutex_unlock(&data->mutex);
  1085. return 0;
  1086. }
  1087. static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
  1088. .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
  1089. .reenable = kxcjk1013_trig_reen,
  1090. };
  1091. static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
  1092. {
  1093. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1094. int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2);
  1095. if (ret < 0) {
  1096. dev_err(&data->client->dev, "Error reading reg_int_src2\n");
  1097. return;
  1098. }
  1099. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
  1100. iio_push_event(indio_dev,
  1101. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1102. 0,
  1103. IIO_MOD_X,
  1104. IIO_EV_TYPE_THRESH,
  1105. IIO_EV_DIR_FALLING),
  1106. data->timestamp);
  1107. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
  1108. iio_push_event(indio_dev,
  1109. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1110. 0,
  1111. IIO_MOD_X,
  1112. IIO_EV_TYPE_THRESH,
  1113. IIO_EV_DIR_RISING),
  1114. data->timestamp);
  1115. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
  1116. iio_push_event(indio_dev,
  1117. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1118. 0,
  1119. IIO_MOD_Y,
  1120. IIO_EV_TYPE_THRESH,
  1121. IIO_EV_DIR_FALLING),
  1122. data->timestamp);
  1123. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
  1124. iio_push_event(indio_dev,
  1125. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1126. 0,
  1127. IIO_MOD_Y,
  1128. IIO_EV_TYPE_THRESH,
  1129. IIO_EV_DIR_RISING),
  1130. data->timestamp);
  1131. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
  1132. iio_push_event(indio_dev,
  1133. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1134. 0,
  1135. IIO_MOD_Z,
  1136. IIO_EV_TYPE_THRESH,
  1137. IIO_EV_DIR_FALLING),
  1138. data->timestamp);
  1139. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
  1140. iio_push_event(indio_dev,
  1141. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1142. 0,
  1143. IIO_MOD_Z,
  1144. IIO_EV_TYPE_THRESH,
  1145. IIO_EV_DIR_RISING),
  1146. data->timestamp);
  1147. }
  1148. static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
  1149. {
  1150. struct iio_dev *indio_dev = private;
  1151. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1152. int ret;
  1153. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1);
  1154. if (ret < 0) {
  1155. dev_err(&data->client->dev, "Error reading reg_int_src1\n");
  1156. goto ack_intr;
  1157. }
  1158. if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
  1159. if (data->chipset == KXTF9)
  1160. iio_push_event(indio_dev,
  1161. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  1162. 0,
  1163. IIO_MOD_X_AND_Y_AND_Z,
  1164. IIO_EV_TYPE_THRESH,
  1165. IIO_EV_DIR_RISING),
  1166. data->timestamp);
  1167. else
  1168. kxcjk1013_report_motion_event(indio_dev);
  1169. }
  1170. ack_intr:
  1171. if (data->dready_trigger_on)
  1172. return IRQ_HANDLED;
  1173. ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
  1174. if (ret < 0)
  1175. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  1176. return IRQ_HANDLED;
  1177. }
  1178. static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
  1179. {
  1180. struct iio_dev *indio_dev = private;
  1181. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1182. data->timestamp = iio_get_time_ns(indio_dev);
  1183. if (data->dready_trigger_on)
  1184. iio_trigger_poll(data->dready_trig);
  1185. else if (data->motion_trigger_on)
  1186. iio_trigger_poll(data->motion_trig);
  1187. if (data->ev_enable_state)
  1188. return IRQ_WAKE_THREAD;
  1189. else
  1190. return IRQ_HANDLED;
  1191. }
  1192. static const char *kxcjk1013_match_acpi_device(struct device *dev,
  1193. enum kx_chipset *chipset,
  1194. enum kx_acpi_type *acpi_type,
  1195. const char **label)
  1196. {
  1197. const struct acpi_device_id *id;
  1198. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  1199. if (!id)
  1200. return NULL;
  1201. if (strcmp(id->id, "SMO8500") == 0) {
  1202. *acpi_type = ACPI_SMO8500;
  1203. } else if (strcmp(id->id, "KIOX010A") == 0) {
  1204. *acpi_type = ACPI_KIOX010A;
  1205. *label = "accel-display";
  1206. } else if (strcmp(id->id, "KIOX020A") == 0) {
  1207. *label = "accel-base";
  1208. }
  1209. *chipset = (enum kx_chipset)id->driver_data;
  1210. return dev_name(dev);
  1211. }
  1212. static void kxcjk1013_disable_regulators(void *d)
  1213. {
  1214. struct kxcjk1013_data *data = d;
  1215. regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
  1216. }
  1217. static int kxcjk1013_probe(struct i2c_client *client,
  1218. const struct i2c_device_id *id)
  1219. {
  1220. struct kxcjk1013_data *data;
  1221. struct iio_dev *indio_dev;
  1222. struct kxcjk_1013_platform_data *pdata;
  1223. const char *name;
  1224. int ret;
  1225. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  1226. if (!indio_dev)
  1227. return -ENOMEM;
  1228. data = iio_priv(indio_dev);
  1229. i2c_set_clientdata(client, indio_dev);
  1230. data->client = client;
  1231. pdata = dev_get_platdata(&client->dev);
  1232. if (pdata) {
  1233. data->active_high_intr = pdata->active_high_intr;
  1234. data->orientation = pdata->orientation;
  1235. } else {
  1236. data->active_high_intr = true; /* default polarity */
  1237. ret = iio_read_mount_matrix(&client->dev, &data->orientation);
  1238. if (ret)
  1239. return ret;
  1240. }
  1241. data->regulators[0].supply = "vdd";
  1242. data->regulators[1].supply = "vddio";
  1243. ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(data->regulators),
  1244. data->regulators);
  1245. if (ret)
  1246. return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
  1247. ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
  1248. data->regulators);
  1249. if (ret)
  1250. return ret;
  1251. ret = devm_add_action_or_reset(&client->dev, kxcjk1013_disable_regulators, data);
  1252. if (ret)
  1253. return ret;
  1254. /*
  1255. * A typical delay of 10ms is required for powering up
  1256. * according to the data sheets of supported chips.
  1257. * Hence double that to play safe.
  1258. */
  1259. msleep(20);
  1260. if (id) {
  1261. data->chipset = (enum kx_chipset)(id->driver_data);
  1262. name = id->name;
  1263. } else if (ACPI_HANDLE(&client->dev)) {
  1264. name = kxcjk1013_match_acpi_device(&client->dev,
  1265. &data->chipset,
  1266. &data->acpi_type,
  1267. &indio_dev->label);
  1268. } else
  1269. return -ENODEV;
  1270. switch (data->chipset) {
  1271. case KXCJK1013:
  1272. case KXCJ91008:
  1273. case KXTJ21009:
  1274. data->regs = &kxcjk1013_regs;
  1275. break;
  1276. case KXTF9:
  1277. data->regs = &kxtf9_regs;
  1278. break;
  1279. case KX0231025:
  1280. data->regs = &kx0231025_regs;
  1281. break;
  1282. default:
  1283. return -EINVAL;
  1284. }
  1285. ret = kxcjk1013_chip_init(data);
  1286. if (ret < 0)
  1287. return ret;
  1288. mutex_init(&data->mutex);
  1289. indio_dev->channels = kxcjk1013_channels;
  1290. indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
  1291. indio_dev->available_scan_masks = kxcjk1013_scan_masks;
  1292. indio_dev->name = name;
  1293. indio_dev->modes = INDIO_DIRECT_MODE;
  1294. indio_dev->info = &kxcjk1013_info;
  1295. if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
  1296. ret = devm_request_threaded_irq(&client->dev, client->irq,
  1297. kxcjk1013_data_rdy_trig_poll,
  1298. kxcjk1013_event_handler,
  1299. IRQF_TRIGGER_RISING,
  1300. KXCJK1013_IRQ_NAME,
  1301. indio_dev);
  1302. if (ret)
  1303. goto err_poweroff;
  1304. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  1305. "%s-dev%d",
  1306. indio_dev->name,
  1307. iio_device_id(indio_dev));
  1308. if (!data->dready_trig) {
  1309. ret = -ENOMEM;
  1310. goto err_poweroff;
  1311. }
  1312. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  1313. "%s-any-motion-dev%d",
  1314. indio_dev->name,
  1315. iio_device_id(indio_dev));
  1316. if (!data->motion_trig) {
  1317. ret = -ENOMEM;
  1318. goto err_poweroff;
  1319. }
  1320. data->dready_trig->ops = &kxcjk1013_trigger_ops;
  1321. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  1322. ret = iio_trigger_register(data->dready_trig);
  1323. if (ret)
  1324. goto err_poweroff;
  1325. indio_dev->trig = iio_trigger_get(data->dready_trig);
  1326. data->motion_trig->ops = &kxcjk1013_trigger_ops;
  1327. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  1328. ret = iio_trigger_register(data->motion_trig);
  1329. if (ret) {
  1330. data->motion_trig = NULL;
  1331. goto err_trigger_unregister;
  1332. }
  1333. }
  1334. ret = iio_triggered_buffer_setup(indio_dev,
  1335. &iio_pollfunc_store_time,
  1336. kxcjk1013_trigger_handler,
  1337. &kxcjk1013_buffer_setup_ops);
  1338. if (ret < 0) {
  1339. dev_err(&client->dev, "iio triggered buffer setup failed\n");
  1340. goto err_trigger_unregister;
  1341. }
  1342. ret = pm_runtime_set_active(&client->dev);
  1343. if (ret)
  1344. goto err_buffer_cleanup;
  1345. pm_runtime_enable(&client->dev);
  1346. pm_runtime_set_autosuspend_delay(&client->dev,
  1347. KXCJK1013_SLEEP_DELAY_MS);
  1348. pm_runtime_use_autosuspend(&client->dev);
  1349. ret = iio_device_register(indio_dev);
  1350. if (ret < 0) {
  1351. dev_err(&client->dev, "unable to register iio device\n");
  1352. goto err_pm_cleanup;
  1353. }
  1354. return 0;
  1355. err_pm_cleanup:
  1356. pm_runtime_dont_use_autosuspend(&client->dev);
  1357. pm_runtime_disable(&client->dev);
  1358. err_buffer_cleanup:
  1359. iio_triggered_buffer_cleanup(indio_dev);
  1360. err_trigger_unregister:
  1361. if (data->dready_trig)
  1362. iio_trigger_unregister(data->dready_trig);
  1363. if (data->motion_trig)
  1364. iio_trigger_unregister(data->motion_trig);
  1365. err_poweroff:
  1366. kxcjk1013_set_mode(data, STANDBY);
  1367. return ret;
  1368. }
  1369. static void kxcjk1013_remove(struct i2c_client *client)
  1370. {
  1371. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1372. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1373. iio_device_unregister(indio_dev);
  1374. pm_runtime_disable(&client->dev);
  1375. pm_runtime_set_suspended(&client->dev);
  1376. iio_triggered_buffer_cleanup(indio_dev);
  1377. if (data->dready_trig) {
  1378. iio_trigger_unregister(data->dready_trig);
  1379. iio_trigger_unregister(data->motion_trig);
  1380. }
  1381. mutex_lock(&data->mutex);
  1382. kxcjk1013_set_mode(data, STANDBY);
  1383. mutex_unlock(&data->mutex);
  1384. }
  1385. #ifdef CONFIG_PM_SLEEP
  1386. static int kxcjk1013_suspend(struct device *dev)
  1387. {
  1388. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1389. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1390. int ret;
  1391. mutex_lock(&data->mutex);
  1392. ret = kxcjk1013_set_mode(data, STANDBY);
  1393. mutex_unlock(&data->mutex);
  1394. return ret;
  1395. }
  1396. static int kxcjk1013_resume(struct device *dev)
  1397. {
  1398. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1399. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1400. int ret = 0;
  1401. mutex_lock(&data->mutex);
  1402. ret = kxcjk1013_set_mode(data, OPERATION);
  1403. if (ret == 0)
  1404. ret = kxcjk1013_set_range(data, data->range);
  1405. mutex_unlock(&data->mutex);
  1406. return ret;
  1407. }
  1408. #endif
  1409. #ifdef CONFIG_PM
  1410. static int kxcjk1013_runtime_suspend(struct device *dev)
  1411. {
  1412. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1413. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1414. int ret;
  1415. ret = kxcjk1013_set_mode(data, STANDBY);
  1416. if (ret < 0) {
  1417. dev_err(&data->client->dev, "powering off device failed\n");
  1418. return -EAGAIN;
  1419. }
  1420. return 0;
  1421. }
  1422. static int kxcjk1013_runtime_resume(struct device *dev)
  1423. {
  1424. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1425. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1426. int ret;
  1427. int sleep_val;
  1428. ret = kxcjk1013_set_mode(data, OPERATION);
  1429. if (ret < 0)
  1430. return ret;
  1431. sleep_val = kxcjk1013_get_startup_times(data);
  1432. if (sleep_val < 20000)
  1433. usleep_range(sleep_val, 20000);
  1434. else
  1435. msleep_interruptible(sleep_val/1000);
  1436. return 0;
  1437. }
  1438. #endif
  1439. static const struct dev_pm_ops kxcjk1013_pm_ops = {
  1440. SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
  1441. SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
  1442. kxcjk1013_runtime_resume, NULL)
  1443. };
  1444. static const struct acpi_device_id kx_acpi_match[] = {
  1445. {"KXCJ1013", KXCJK1013},
  1446. {"KXCJ1008", KXCJ91008},
  1447. {"KXCJ9000", KXCJ91008},
  1448. {"KIOX0008", KXCJ91008},
  1449. {"KIOX0009", KXTJ21009},
  1450. {"KIOX000A", KXCJ91008},
  1451. {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */
  1452. {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */
  1453. {"KXTJ1009", KXTJ21009},
  1454. {"KXJ2109", KXTJ21009},
  1455. {"SMO8500", KXCJ91008},
  1456. { },
  1457. };
  1458. MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
  1459. static const struct i2c_device_id kxcjk1013_id[] = {
  1460. {"kxcjk1013", KXCJK1013},
  1461. {"kxcj91008", KXCJ91008},
  1462. {"kxtj21009", KXTJ21009},
  1463. {"kxtf9", KXTF9},
  1464. {"kx023-1025", KX0231025},
  1465. {"SMO8500", KXCJ91008},
  1466. {}
  1467. };
  1468. MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
  1469. static const struct of_device_id kxcjk1013_of_match[] = {
  1470. { .compatible = "kionix,kxcjk1013", },
  1471. { .compatible = "kionix,kxcj91008", },
  1472. { .compatible = "kionix,kxtj21009", },
  1473. { .compatible = "kionix,kxtf9", },
  1474. { .compatible = "kionix,kx023-1025", },
  1475. { }
  1476. };
  1477. MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
  1478. static struct i2c_driver kxcjk1013_driver = {
  1479. .driver = {
  1480. .name = KXCJK1013_DRV_NAME,
  1481. .acpi_match_table = ACPI_PTR(kx_acpi_match),
  1482. .of_match_table = kxcjk1013_of_match,
  1483. .pm = &kxcjk1013_pm_ops,
  1484. },
  1485. .probe = kxcjk1013_probe,
  1486. .remove = kxcjk1013_remove,
  1487. .id_table = kxcjk1013_id,
  1488. };
  1489. module_i2c_driver(kxcjk1013_driver);
  1490. MODULE_AUTHOR("Srinivas Pandruvada <[email protected]>");
  1491. MODULE_LICENSE("GPL v2");
  1492. MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");