i2c-designware-amdpsp.c 9.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/bitfield.h>
  3. #include <linux/bits.h>
  4. #include <linux/i2c.h>
  5. #include <linux/io-64-nonatomic-lo-hi.h>
  6. #include <linux/psp-sev.h>
  7. #include <linux/types.h>
  8. #include <linux/workqueue.h>
  9. #include <asm/msr.h>
  10. #include "i2c-designware-core.h"
  11. #define MSR_AMD_PSP_ADDR 0xc00110a2
  12. #define PSP_MBOX_OFFSET 0x10570
  13. #define PSP_CMD_TIMEOUT_US (500 * USEC_PER_MSEC)
  14. #define PSP_I2C_RESERVATION_TIME_MS 100
  15. #define PSP_I2C_REQ_BUS_CMD 0x64
  16. #define PSP_I2C_REQ_RETRY_CNT 400
  17. #define PSP_I2C_REQ_RETRY_DELAY_US (25 * USEC_PER_MSEC)
  18. #define PSP_I2C_REQ_STS_OK 0x0
  19. #define PSP_I2C_REQ_STS_BUS_BUSY 0x1
  20. #define PSP_I2C_REQ_STS_INV_PARAM 0x3
  21. #define PSP_MBOX_FIELDS_STS GENMASK(15, 0)
  22. #define PSP_MBOX_FIELDS_CMD GENMASK(23, 16)
  23. #define PSP_MBOX_FIELDS_RESERVED GENMASK(29, 24)
  24. #define PSP_MBOX_FIELDS_RECOVERY BIT(30)
  25. #define PSP_MBOX_FIELDS_READY BIT(31)
  26. struct psp_req_buffer_hdr {
  27. u32 total_size;
  28. u32 status;
  29. };
  30. enum psp_i2c_req_type {
  31. PSP_I2C_REQ_ACQUIRE,
  32. PSP_I2C_REQ_RELEASE,
  33. PSP_I2C_REQ_MAX
  34. };
  35. struct psp_i2c_req {
  36. struct psp_req_buffer_hdr hdr;
  37. enum psp_i2c_req_type type;
  38. };
  39. struct psp_mbox {
  40. u32 cmd_fields;
  41. u64 i2c_req_addr;
  42. } __packed;
  43. static DEFINE_MUTEX(psp_i2c_access_mutex);
  44. static unsigned long psp_i2c_sem_acquired;
  45. static void __iomem *mbox_iomem;
  46. static u32 psp_i2c_access_count;
  47. static bool psp_i2c_mbox_fail;
  48. static struct device *psp_i2c_dev;
  49. /*
  50. * Implementation of PSP-x86 i2c-arbitration mailbox introduced for AMD Cezanne
  51. * family of SoCs.
  52. */
  53. static int psp_get_mbox_addr(unsigned long *mbox_addr)
  54. {
  55. unsigned long long psp_mmio;
  56. if (rdmsrl_safe(MSR_AMD_PSP_ADDR, &psp_mmio))
  57. return -EIO;
  58. *mbox_addr = (unsigned long)(psp_mmio + PSP_MBOX_OFFSET);
  59. return 0;
  60. }
  61. static int psp_mbox_probe(void)
  62. {
  63. unsigned long mbox_addr;
  64. int ret;
  65. ret = psp_get_mbox_addr(&mbox_addr);
  66. if (ret)
  67. return ret;
  68. mbox_iomem = ioremap(mbox_addr, sizeof(struct psp_mbox));
  69. if (!mbox_iomem)
  70. return -ENOMEM;
  71. return 0;
  72. }
  73. /* Recovery field should be equal 0 to start sending commands */
  74. static int psp_check_mbox_recovery(struct psp_mbox __iomem *mbox)
  75. {
  76. u32 tmp;
  77. tmp = readl(&mbox->cmd_fields);
  78. return FIELD_GET(PSP_MBOX_FIELDS_RECOVERY, tmp);
  79. }
  80. static int psp_wait_cmd(struct psp_mbox __iomem *mbox)
  81. {
  82. u32 tmp, expected;
  83. /* Expect mbox_cmd to be cleared and ready bit to be set by PSP */
  84. expected = FIELD_PREP(PSP_MBOX_FIELDS_READY, 1);
  85. /*
  86. * Check for readiness of PSP mailbox in a tight loop in order to
  87. * process further as soon as command was consumed.
  88. */
  89. return readl_poll_timeout(&mbox->cmd_fields, tmp, (tmp == expected),
  90. 0, PSP_CMD_TIMEOUT_US);
  91. }
  92. /* Status equal to 0 means that PSP succeed processing command */
  93. static u32 psp_check_mbox_sts(struct psp_mbox __iomem *mbox)
  94. {
  95. u32 cmd_reg;
  96. cmd_reg = readl(&mbox->cmd_fields);
  97. return FIELD_GET(PSP_MBOX_FIELDS_STS, cmd_reg);
  98. }
  99. static int psp_send_cmd(struct psp_i2c_req *req)
  100. {
  101. struct psp_mbox __iomem *mbox = mbox_iomem;
  102. phys_addr_t req_addr;
  103. u32 cmd_reg;
  104. if (psp_check_mbox_recovery(mbox))
  105. return -EIO;
  106. if (psp_wait_cmd(mbox))
  107. return -EBUSY;
  108. /*
  109. * Fill mailbox with address of command-response buffer, which will be
  110. * used for sending i2c requests as well as reading status returned by
  111. * PSP. Use physical address of buffer, since PSP will map this region.
  112. */
  113. req_addr = __psp_pa((void *)req);
  114. writeq(req_addr, &mbox->i2c_req_addr);
  115. /* Write command register to trigger processing */
  116. cmd_reg = FIELD_PREP(PSP_MBOX_FIELDS_CMD, PSP_I2C_REQ_BUS_CMD);
  117. writel(cmd_reg, &mbox->cmd_fields);
  118. if (psp_wait_cmd(mbox))
  119. return -ETIMEDOUT;
  120. if (psp_check_mbox_sts(mbox))
  121. return -EIO;
  122. return 0;
  123. }
  124. /* Helper to verify status returned by PSP */
  125. static int check_i2c_req_sts(struct psp_i2c_req *req)
  126. {
  127. u32 status;
  128. /* Status field in command-response buffer is updated by PSP */
  129. status = READ_ONCE(req->hdr.status);
  130. switch (status) {
  131. case PSP_I2C_REQ_STS_OK:
  132. return 0;
  133. case PSP_I2C_REQ_STS_BUS_BUSY:
  134. return -EBUSY;
  135. case PSP_I2C_REQ_STS_INV_PARAM:
  136. default:
  137. return -EIO;
  138. }
  139. }
  140. static int psp_send_check_i2c_req(struct psp_i2c_req *req)
  141. {
  142. /*
  143. * Errors in x86-PSP i2c-arbitration protocol may occur at two levels:
  144. * 1. mailbox communication - PSP is not operational or some IO errors
  145. * with basic communication had happened;
  146. * 2. i2c-requests - PSP refuses to grant i2c arbitration to x86 for too
  147. * long.
  148. * In order to distinguish between these two in error handling code, all
  149. * errors on the first level (returned by psp_send_cmd) are shadowed by
  150. * -EIO.
  151. */
  152. if (psp_send_cmd(req))
  153. return -EIO;
  154. return check_i2c_req_sts(req);
  155. }
  156. static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type)
  157. {
  158. struct psp_i2c_req *req;
  159. unsigned long start;
  160. int status, ret;
  161. /* Allocate command-response buffer */
  162. req = kzalloc(sizeof(*req), GFP_KERNEL);
  163. if (!req)
  164. return -ENOMEM;
  165. req->hdr.total_size = sizeof(*req);
  166. req->type = i2c_req_type;
  167. start = jiffies;
  168. ret = read_poll_timeout(psp_send_check_i2c_req, status,
  169. (status != -EBUSY),
  170. PSP_I2C_REQ_RETRY_DELAY_US,
  171. PSP_I2C_REQ_RETRY_CNT * PSP_I2C_REQ_RETRY_DELAY_US,
  172. 0, req);
  173. if (ret) {
  174. dev_err(psp_i2c_dev, "Timed out waiting for PSP to %s I2C bus\n",
  175. (i2c_req_type == PSP_I2C_REQ_ACQUIRE) ?
  176. "release" : "acquire");
  177. goto cleanup;
  178. }
  179. ret = status;
  180. if (ret) {
  181. dev_err(psp_i2c_dev, "PSP communication error\n");
  182. goto cleanup;
  183. }
  184. dev_dbg(psp_i2c_dev, "Request accepted by PSP after %ums\n",
  185. jiffies_to_msecs(jiffies - start));
  186. cleanup:
  187. if (ret) {
  188. dev_err(psp_i2c_dev, "Assume i2c bus is for exclusive host usage\n");
  189. psp_i2c_mbox_fail = true;
  190. }
  191. kfree(req);
  192. return ret;
  193. }
  194. static void release_bus(void)
  195. {
  196. int status;
  197. if (!psp_i2c_sem_acquired)
  198. return;
  199. status = psp_send_i2c_req(PSP_I2C_REQ_RELEASE);
  200. if (status)
  201. return;
  202. dev_dbg(psp_i2c_dev, "PSP semaphore held for %ums\n",
  203. jiffies_to_msecs(jiffies - psp_i2c_sem_acquired));
  204. psp_i2c_sem_acquired = 0;
  205. }
  206. static void psp_release_i2c_bus_deferred(struct work_struct *work)
  207. {
  208. mutex_lock(&psp_i2c_access_mutex);
  209. /*
  210. * If there is any pending transaction, cannot release the bus here.
  211. * psp_release_i2c_bus will take care of this later.
  212. */
  213. if (psp_i2c_access_count)
  214. goto cleanup;
  215. release_bus();
  216. cleanup:
  217. mutex_unlock(&psp_i2c_access_mutex);
  218. }
  219. static DECLARE_DELAYED_WORK(release_queue, psp_release_i2c_bus_deferred);
  220. static int psp_acquire_i2c_bus(void)
  221. {
  222. int status;
  223. mutex_lock(&psp_i2c_access_mutex);
  224. /* Return early if mailbox malfunctioned */
  225. if (psp_i2c_mbox_fail)
  226. goto cleanup;
  227. psp_i2c_access_count++;
  228. /*
  229. * No need to request bus arbitration once we are inside semaphore
  230. * reservation period.
  231. */
  232. if (psp_i2c_sem_acquired)
  233. goto cleanup;
  234. status = psp_send_i2c_req(PSP_I2C_REQ_ACQUIRE);
  235. if (status)
  236. goto cleanup;
  237. psp_i2c_sem_acquired = jiffies;
  238. schedule_delayed_work(&release_queue,
  239. msecs_to_jiffies(PSP_I2C_RESERVATION_TIME_MS));
  240. /*
  241. * In case of errors with PSP arbitrator psp_i2c_mbox_fail variable is
  242. * set above. As a consequence consecutive calls to acquire will bypass
  243. * communication with PSP. At any case i2c bus is granted to the caller,
  244. * thus always return success.
  245. */
  246. cleanup:
  247. mutex_unlock(&psp_i2c_access_mutex);
  248. return 0;
  249. }
  250. static void psp_release_i2c_bus(void)
  251. {
  252. mutex_lock(&psp_i2c_access_mutex);
  253. /* Return early if mailbox was malfunctional */
  254. if (psp_i2c_mbox_fail)
  255. goto cleanup;
  256. /*
  257. * If we are last owner of PSP semaphore, need to release aribtration
  258. * via mailbox.
  259. */
  260. psp_i2c_access_count--;
  261. if (psp_i2c_access_count)
  262. goto cleanup;
  263. /*
  264. * Send a release command to PSP if the semaphore reservation timeout
  265. * elapsed but x86 still owns the controller.
  266. */
  267. if (!delayed_work_pending(&release_queue))
  268. release_bus();
  269. cleanup:
  270. mutex_unlock(&psp_i2c_access_mutex);
  271. }
  272. /*
  273. * Locking methods are based on the default implementation from
  274. * drivers/i2c/i2c-core-base.c, but with psp acquire and release operations
  275. * added. With this in place we can ensure that i2c clients on the bus shared
  276. * with psp are able to lock HW access to the bus for arbitrary number of
  277. * operations - that is e.g. write-wait-read.
  278. */
  279. static void i2c_adapter_dw_psp_lock_bus(struct i2c_adapter *adapter,
  280. unsigned int flags)
  281. {
  282. psp_acquire_i2c_bus();
  283. rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter));
  284. }
  285. static int i2c_adapter_dw_psp_trylock_bus(struct i2c_adapter *adapter,
  286. unsigned int flags)
  287. {
  288. int ret;
  289. ret = rt_mutex_trylock(&adapter->bus_lock);
  290. if (ret)
  291. return ret;
  292. psp_acquire_i2c_bus();
  293. return ret;
  294. }
  295. static void i2c_adapter_dw_psp_unlock_bus(struct i2c_adapter *adapter,
  296. unsigned int flags)
  297. {
  298. psp_release_i2c_bus();
  299. rt_mutex_unlock(&adapter->bus_lock);
  300. }
  301. static const struct i2c_lock_operations i2c_dw_psp_lock_ops = {
  302. .lock_bus = i2c_adapter_dw_psp_lock_bus,
  303. .trylock_bus = i2c_adapter_dw_psp_trylock_bus,
  304. .unlock_bus = i2c_adapter_dw_psp_unlock_bus,
  305. };
  306. int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev)
  307. {
  308. int ret;
  309. if (!dev)
  310. return -ENODEV;
  311. if (!(dev->flags & ARBITRATION_SEMAPHORE))
  312. return -ENODEV;
  313. /* Allow to bind only one instance of a driver */
  314. if (psp_i2c_dev)
  315. return -EEXIST;
  316. psp_i2c_dev = dev->dev;
  317. ret = psp_mbox_probe();
  318. if (ret)
  319. return ret;
  320. dev_info(psp_i2c_dev, "I2C bus managed by AMD PSP\n");
  321. /*
  322. * Install global locking callbacks for adapter as well as internal i2c
  323. * controller locks.
  324. */
  325. dev->adapter.lock_ops = &i2c_dw_psp_lock_ops;
  326. dev->acquire_lock = psp_acquire_i2c_bus;
  327. dev->release_lock = psp_release_i2c_bus;
  328. return 0;
  329. }
  330. /* Unmap area used as a mailbox with PSP */
  331. void i2c_dw_amdpsp_remove_lock_support(struct dw_i2c_dev *dev)
  332. {
  333. iounmap(mbox_iomem);
  334. }