i2c-amd-mp2-pci.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
  2. /*
  3. * AMD MP2 PCIe communication driver
  4. *
  5. * Authors: Shyam Sundar S K <[email protected]>
  6. * Elie Morisse <[email protected]>
  7. */
  8. #include <linux/dma-mapping.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/module.h>
  11. #include <linux/pci.h>
  12. #include <linux/slab.h>
  13. #include "i2c-amd-mp2.h"
  14. #include <linux/io-64-nonatomic-lo-hi.h>
  15. static void amd_mp2_c2p_mutex_lock(struct amd_i2c_common *i2c_common)
  16. {
  17. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  18. /* there is only one data mailbox for two i2c adapters */
  19. mutex_lock(&privdata->c2p_lock);
  20. privdata->c2p_lock_busid = i2c_common->bus_id;
  21. }
  22. static void amd_mp2_c2p_mutex_unlock(struct amd_i2c_common *i2c_common)
  23. {
  24. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  25. if (unlikely(privdata->c2p_lock_busid != i2c_common->bus_id)) {
  26. pci_warn(privdata->pci_dev,
  27. "bus %d attempting to unlock C2P locked by bus %d\n",
  28. i2c_common->bus_id, privdata->c2p_lock_busid);
  29. return;
  30. }
  31. mutex_unlock(&privdata->c2p_lock);
  32. }
  33. static int amd_mp2_cmd(struct amd_i2c_common *i2c_common,
  34. union i2c_cmd_base i2c_cmd_base)
  35. {
  36. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  37. void __iomem *reg;
  38. i2c_common->reqcmd = i2c_cmd_base.s.i2c_cmd;
  39. reg = privdata->mmio + ((i2c_cmd_base.s.bus_id == 1) ?
  40. AMD_C2P_MSG1 : AMD_C2P_MSG0);
  41. writel(i2c_cmd_base.ul, reg);
  42. return 0;
  43. }
  44. int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable)
  45. {
  46. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  47. union i2c_cmd_base i2c_cmd_base;
  48. pci_dbg(privdata->pci_dev, "id: %d\n", i2c_common->bus_id);
  49. i2c_cmd_base.ul = 0;
  50. i2c_cmd_base.s.i2c_cmd = enable ? i2c_enable : i2c_disable;
  51. i2c_cmd_base.s.bus_id = i2c_common->bus_id;
  52. i2c_cmd_base.s.i2c_speed = i2c_common->i2c_speed;
  53. amd_mp2_c2p_mutex_lock(i2c_common);
  54. return amd_mp2_cmd(i2c_common, i2c_cmd_base);
  55. }
  56. EXPORT_SYMBOL_GPL(amd_mp2_bus_enable_set);
  57. static void amd_mp2_cmd_rw_fill(struct amd_i2c_common *i2c_common,
  58. union i2c_cmd_base *i2c_cmd_base,
  59. enum i2c_cmd reqcmd)
  60. {
  61. i2c_cmd_base->s.i2c_cmd = reqcmd;
  62. i2c_cmd_base->s.bus_id = i2c_common->bus_id;
  63. i2c_cmd_base->s.i2c_speed = i2c_common->i2c_speed;
  64. i2c_cmd_base->s.slave_addr = i2c_common->msg->addr;
  65. i2c_cmd_base->s.length = i2c_common->msg->len;
  66. }
  67. int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd)
  68. {
  69. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  70. union i2c_cmd_base i2c_cmd_base;
  71. amd_mp2_cmd_rw_fill(i2c_common, &i2c_cmd_base, reqcmd);
  72. amd_mp2_c2p_mutex_lock(i2c_common);
  73. if (i2c_common->msg->len <= 32) {
  74. i2c_cmd_base.s.mem_type = use_c2pmsg;
  75. if (reqcmd == i2c_write)
  76. memcpy_toio(privdata->mmio + AMD_C2P_MSG2,
  77. i2c_common->msg->buf,
  78. i2c_common->msg->len);
  79. } else {
  80. i2c_cmd_base.s.mem_type = use_dram;
  81. writeq((u64)i2c_common->dma_addr,
  82. privdata->mmio + AMD_C2P_MSG2);
  83. }
  84. return amd_mp2_cmd(i2c_common, i2c_cmd_base);
  85. }
  86. EXPORT_SYMBOL_GPL(amd_mp2_rw);
  87. static void amd_mp2_pci_check_rw_event(struct amd_i2c_common *i2c_common)
  88. {
  89. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  90. struct pci_dev *pdev = privdata->pci_dev;
  91. int len = i2c_common->eventval.r.length;
  92. u32 slave_addr = i2c_common->eventval.r.slave_addr;
  93. bool err = false;
  94. if (unlikely(len != i2c_common->msg->len)) {
  95. pci_err(pdev, "length %d in event doesn't match buffer length %d!\n",
  96. len, i2c_common->msg->len);
  97. err = true;
  98. }
  99. if (unlikely(slave_addr != i2c_common->msg->addr)) {
  100. pci_err(pdev, "unexpected slave address %x (expected: %x)!\n",
  101. slave_addr, i2c_common->msg->addr);
  102. err = true;
  103. }
  104. if (!err)
  105. i2c_common->cmd_success = true;
  106. }
  107. static void __amd_mp2_process_event(struct amd_i2c_common *i2c_common)
  108. {
  109. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  110. struct pci_dev *pdev = privdata->pci_dev;
  111. enum status_type sts = i2c_common->eventval.r.status;
  112. enum response_type res = i2c_common->eventval.r.response;
  113. int len = i2c_common->eventval.r.length;
  114. if (res != command_success) {
  115. if (res != command_failed)
  116. pci_err(pdev, "invalid response to i2c command!\n");
  117. return;
  118. }
  119. switch (i2c_common->reqcmd) {
  120. case i2c_read:
  121. if (sts == i2c_readcomplete_event) {
  122. amd_mp2_pci_check_rw_event(i2c_common);
  123. if (len <= 32)
  124. memcpy_fromio(i2c_common->msg->buf,
  125. privdata->mmio + AMD_C2P_MSG2,
  126. len);
  127. } else if (sts != i2c_readfail_event) {
  128. pci_err(pdev, "invalid i2c status after read (%d)!\n", sts);
  129. }
  130. break;
  131. case i2c_write:
  132. if (sts == i2c_writecomplete_event)
  133. amd_mp2_pci_check_rw_event(i2c_common);
  134. else if (sts != i2c_writefail_event)
  135. pci_err(pdev, "invalid i2c status after write (%d)!\n", sts);
  136. break;
  137. case i2c_enable:
  138. if (sts == i2c_busenable_complete)
  139. i2c_common->cmd_success = true;
  140. else if (sts != i2c_busenable_failed)
  141. pci_err(pdev, "invalid i2c status after bus enable (%d)!\n", sts);
  142. break;
  143. case i2c_disable:
  144. if (sts == i2c_busdisable_complete)
  145. i2c_common->cmd_success = true;
  146. else if (sts != i2c_busdisable_failed)
  147. pci_err(pdev, "invalid i2c status after bus disable (%d)!\n", sts);
  148. break;
  149. default:
  150. break;
  151. }
  152. }
  153. void amd_mp2_process_event(struct amd_i2c_common *i2c_common)
  154. {
  155. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  156. struct pci_dev *pdev = privdata->pci_dev;
  157. if (unlikely(i2c_common->reqcmd == i2c_none)) {
  158. pci_warn(pdev, "received msg but no cmd was sent (bus = %d)!\n",
  159. i2c_common->bus_id);
  160. return;
  161. }
  162. __amd_mp2_process_event(i2c_common);
  163. i2c_common->reqcmd = i2c_none;
  164. amd_mp2_c2p_mutex_unlock(i2c_common);
  165. }
  166. EXPORT_SYMBOL_GPL(amd_mp2_process_event);
  167. static irqreturn_t amd_mp2_irq_isr(int irq, void *dev)
  168. {
  169. struct amd_mp2_dev *privdata = dev;
  170. struct pci_dev *pdev = privdata->pci_dev;
  171. struct amd_i2c_common *i2c_common;
  172. u32 val;
  173. unsigned int bus_id;
  174. void __iomem *reg;
  175. enum irqreturn ret = IRQ_NONE;
  176. for (bus_id = 0; bus_id < 2; bus_id++) {
  177. i2c_common = privdata->busses[bus_id];
  178. if (!i2c_common)
  179. continue;
  180. reg = privdata->mmio + ((bus_id == 0) ?
  181. AMD_P2C_MSG1 : AMD_P2C_MSG2);
  182. val = readl(reg);
  183. if (val != 0) {
  184. writel(0, reg);
  185. writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
  186. i2c_common->eventval.ul = val;
  187. i2c_common->cmd_completion(i2c_common);
  188. ret = IRQ_HANDLED;
  189. }
  190. }
  191. if (ret != IRQ_HANDLED) {
  192. val = readl(privdata->mmio + AMD_P2C_MSG_INTEN);
  193. if (val != 0) {
  194. writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
  195. pci_warn(pdev, "received irq without message\n");
  196. ret = IRQ_HANDLED;
  197. }
  198. }
  199. return ret;
  200. }
  201. void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common)
  202. {
  203. i2c_common->reqcmd = i2c_none;
  204. amd_mp2_c2p_mutex_unlock(i2c_common);
  205. }
  206. EXPORT_SYMBOL_GPL(amd_mp2_rw_timeout);
  207. int amd_mp2_register_cb(struct amd_i2c_common *i2c_common)
  208. {
  209. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  210. struct pci_dev *pdev = privdata->pci_dev;
  211. if (i2c_common->bus_id > 1)
  212. return -EINVAL;
  213. if (privdata->busses[i2c_common->bus_id]) {
  214. pci_err(pdev, "Bus %d already taken!\n", i2c_common->bus_id);
  215. return -EINVAL;
  216. }
  217. privdata->busses[i2c_common->bus_id] = i2c_common;
  218. return 0;
  219. }
  220. EXPORT_SYMBOL_GPL(amd_mp2_register_cb);
  221. int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common)
  222. {
  223. struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
  224. privdata->busses[i2c_common->bus_id] = NULL;
  225. return 0;
  226. }
  227. EXPORT_SYMBOL_GPL(amd_mp2_unregister_cb);
  228. static void amd_mp2_clear_reg(struct amd_mp2_dev *privdata)
  229. {
  230. int reg;
  231. for (reg = AMD_C2P_MSG0; reg <= AMD_C2P_MSG9; reg += 4)
  232. writel(0, privdata->mmio + reg);
  233. for (reg = AMD_P2C_MSG1; reg <= AMD_P2C_MSG2; reg += 4)
  234. writel(0, privdata->mmio + reg);
  235. }
  236. static int amd_mp2_pci_init(struct amd_mp2_dev *privdata,
  237. struct pci_dev *pci_dev)
  238. {
  239. int rc;
  240. pci_set_drvdata(pci_dev, privdata);
  241. rc = pcim_enable_device(pci_dev);
  242. if (rc) {
  243. pci_err(pci_dev, "Failed to enable MP2 PCI device\n");
  244. goto err_pci_enable;
  245. }
  246. rc = pcim_iomap_regions(pci_dev, 1 << 2, pci_name(pci_dev));
  247. if (rc) {
  248. pci_err(pci_dev, "I/O memory remapping failed\n");
  249. goto err_pci_enable;
  250. }
  251. privdata->mmio = pcim_iomap_table(pci_dev)[2];
  252. pci_set_master(pci_dev);
  253. rc = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(64));
  254. if (rc)
  255. goto err_dma_mask;
  256. /* Set up intx irq */
  257. writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
  258. pci_intx(pci_dev, 1);
  259. rc = devm_request_irq(&pci_dev->dev, pci_dev->irq, amd_mp2_irq_isr,
  260. IRQF_SHARED, dev_name(&pci_dev->dev), privdata);
  261. if (rc)
  262. pci_err(pci_dev, "Failure requesting irq %i: %d\n",
  263. pci_dev->irq, rc);
  264. return rc;
  265. err_dma_mask:
  266. pci_clear_master(pci_dev);
  267. err_pci_enable:
  268. pci_set_drvdata(pci_dev, NULL);
  269. return rc;
  270. }
  271. static int amd_mp2_pci_probe(struct pci_dev *pci_dev,
  272. const struct pci_device_id *id)
  273. {
  274. struct amd_mp2_dev *privdata;
  275. int rc;
  276. privdata = devm_kzalloc(&pci_dev->dev, sizeof(*privdata), GFP_KERNEL);
  277. if (!privdata)
  278. return -ENOMEM;
  279. privdata->pci_dev = pci_dev;
  280. rc = amd_mp2_pci_init(privdata, pci_dev);
  281. if (rc)
  282. return rc;
  283. mutex_init(&privdata->c2p_lock);
  284. pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
  285. pm_runtime_use_autosuspend(&pci_dev->dev);
  286. pm_runtime_put_autosuspend(&pci_dev->dev);
  287. pm_runtime_allow(&pci_dev->dev);
  288. privdata->probed = true;
  289. pci_info(pci_dev, "MP2 device registered.\n");
  290. return 0;
  291. }
  292. static void amd_mp2_pci_remove(struct pci_dev *pci_dev)
  293. {
  294. struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
  295. pm_runtime_forbid(&pci_dev->dev);
  296. pm_runtime_get_noresume(&pci_dev->dev);
  297. pci_intx(pci_dev, 0);
  298. pci_clear_master(pci_dev);
  299. amd_mp2_clear_reg(privdata);
  300. }
  301. #ifdef CONFIG_PM
  302. static int amd_mp2_pci_suspend(struct device *dev)
  303. {
  304. struct pci_dev *pci_dev = to_pci_dev(dev);
  305. struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
  306. struct amd_i2c_common *i2c_common;
  307. unsigned int bus_id;
  308. int ret = 0;
  309. for (bus_id = 0; bus_id < 2; bus_id++) {
  310. i2c_common = privdata->busses[bus_id];
  311. if (i2c_common)
  312. i2c_common->suspend(i2c_common);
  313. }
  314. ret = pci_save_state(pci_dev);
  315. if (ret) {
  316. pci_err(pci_dev, "pci_save_state failed = %d\n", ret);
  317. return ret;
  318. }
  319. pci_disable_device(pci_dev);
  320. return ret;
  321. }
  322. static int amd_mp2_pci_resume(struct device *dev)
  323. {
  324. struct pci_dev *pci_dev = to_pci_dev(dev);
  325. struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
  326. struct amd_i2c_common *i2c_common;
  327. unsigned int bus_id;
  328. int ret = 0;
  329. pci_restore_state(pci_dev);
  330. ret = pci_enable_device(pci_dev);
  331. if (ret < 0) {
  332. pci_err(pci_dev, "pci_enable_device failed = %d\n", ret);
  333. return ret;
  334. }
  335. for (bus_id = 0; bus_id < 2; bus_id++) {
  336. i2c_common = privdata->busses[bus_id];
  337. if (i2c_common) {
  338. ret = i2c_common->resume(i2c_common);
  339. if (ret < 0)
  340. return ret;
  341. }
  342. }
  343. return ret;
  344. }
  345. static UNIVERSAL_DEV_PM_OPS(amd_mp2_pci_pm_ops, amd_mp2_pci_suspend,
  346. amd_mp2_pci_resume, NULL);
  347. #endif /* CONFIG_PM */
  348. static const struct pci_device_id amd_mp2_pci_tbl[] = {
  349. {PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2)},
  350. {0}
  351. };
  352. MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
  353. static struct pci_driver amd_mp2_pci_driver = {
  354. .name = "i2c_amd_mp2",
  355. .id_table = amd_mp2_pci_tbl,
  356. .probe = amd_mp2_pci_probe,
  357. .remove = amd_mp2_pci_remove,
  358. #ifdef CONFIG_PM
  359. .driver = {
  360. .pm = &amd_mp2_pci_pm_ops,
  361. },
  362. #endif
  363. };
  364. module_pci_driver(amd_mp2_pci_driver);
  365. struct amd_mp2_dev *amd_mp2_find_device(void)
  366. {
  367. struct device *dev;
  368. struct pci_dev *pci_dev;
  369. dev = driver_find_next_device(&amd_mp2_pci_driver.driver, NULL);
  370. if (!dev)
  371. return NULL;
  372. pci_dev = to_pci_dev(dev);
  373. return (struct amd_mp2_dev *)pci_get_drvdata(pci_dev);
  374. }
  375. EXPORT_SYMBOL_GPL(amd_mp2_find_device);
  376. MODULE_DESCRIPTION("AMD(R) PCI-E MP2 I2C Controller Driver");
  377. MODULE_AUTHOR("Shyam Sundar S K <[email protected]>");
  378. MODULE_AUTHOR("Elie Morisse <[email protected]>");
  379. MODULE_LICENSE("Dual BSD/GPL");