stm32_hwspinlock.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) STMicroelectronics SA 2018
  4. * Author: Benjamin Gaignard <[email protected]> for STMicroelectronics.
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/delay.h>
  8. #include <linux/hwspinlock.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pm_runtime.h>
  15. #include "hwspinlock_internal.h"
  16. #define STM32_MUTEX_COREID BIT(8)
  17. #define STM32_MUTEX_LOCK_BIT BIT(31)
  18. #define STM32_MUTEX_NUM_LOCKS 32
  19. struct stm32_hwspinlock {
  20. struct clk *clk;
  21. struct hwspinlock_device bank;
  22. };
  23. static int stm32_hwspinlock_trylock(struct hwspinlock *lock)
  24. {
  25. void __iomem *lock_addr = lock->priv;
  26. u32 status;
  27. writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr);
  28. status = readl(lock_addr);
  29. return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID);
  30. }
  31. static void stm32_hwspinlock_unlock(struct hwspinlock *lock)
  32. {
  33. void __iomem *lock_addr = lock->priv;
  34. writel(STM32_MUTEX_COREID, lock_addr);
  35. }
  36. static void stm32_hwspinlock_relax(struct hwspinlock *lock)
  37. {
  38. ndelay(50);
  39. }
  40. static const struct hwspinlock_ops stm32_hwspinlock_ops = {
  41. .trylock = stm32_hwspinlock_trylock,
  42. .unlock = stm32_hwspinlock_unlock,
  43. .relax = stm32_hwspinlock_relax,
  44. };
  45. static void stm32_hwspinlock_disable_clk(void *data)
  46. {
  47. struct platform_device *pdev = data;
  48. struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
  49. struct device *dev = &pdev->dev;
  50. pm_runtime_get_sync(dev);
  51. pm_runtime_disable(dev);
  52. pm_runtime_set_suspended(dev);
  53. pm_runtime_put_noidle(dev);
  54. clk_disable_unprepare(hw->clk);
  55. }
  56. static int stm32_hwspinlock_probe(struct platform_device *pdev)
  57. {
  58. struct device *dev = &pdev->dev;
  59. struct stm32_hwspinlock *hw;
  60. void __iomem *io_base;
  61. int i, ret;
  62. io_base = devm_platform_ioremap_resource(pdev, 0);
  63. if (IS_ERR(io_base))
  64. return PTR_ERR(io_base);
  65. hw = devm_kzalloc(dev, struct_size(hw, bank.lock, STM32_MUTEX_NUM_LOCKS), GFP_KERNEL);
  66. if (!hw)
  67. return -ENOMEM;
  68. hw->clk = devm_clk_get(dev, "hsem");
  69. if (IS_ERR(hw->clk))
  70. return PTR_ERR(hw->clk);
  71. ret = clk_prepare_enable(hw->clk);
  72. if (ret) {
  73. dev_err(dev, "Failed to prepare_enable clock\n");
  74. return ret;
  75. }
  76. platform_set_drvdata(pdev, hw);
  77. pm_runtime_get_noresume(dev);
  78. pm_runtime_set_active(dev);
  79. pm_runtime_enable(dev);
  80. pm_runtime_put(dev);
  81. ret = devm_add_action_or_reset(dev, stm32_hwspinlock_disable_clk, pdev);
  82. if (ret) {
  83. dev_err(dev, "Failed to register action\n");
  84. return ret;
  85. }
  86. for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
  87. hw->bank.lock[i].priv = io_base + i * sizeof(u32);
  88. ret = devm_hwspin_lock_register(dev, &hw->bank, &stm32_hwspinlock_ops,
  89. 0, STM32_MUTEX_NUM_LOCKS);
  90. if (ret)
  91. dev_err(dev, "Failed to register hwspinlock\n");
  92. return ret;
  93. }
  94. static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev)
  95. {
  96. struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
  97. clk_disable_unprepare(hw->clk);
  98. return 0;
  99. }
  100. static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev)
  101. {
  102. struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
  103. clk_prepare_enable(hw->clk);
  104. return 0;
  105. }
  106. static const struct dev_pm_ops stm32_hwspinlock_pm_ops = {
  107. SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend,
  108. stm32_hwspinlock_runtime_resume,
  109. NULL)
  110. };
  111. static const struct of_device_id stm32_hwpinlock_ids[] = {
  112. { .compatible = "st,stm32-hwspinlock", },
  113. {},
  114. };
  115. MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids);
  116. static struct platform_driver stm32_hwspinlock_driver = {
  117. .probe = stm32_hwspinlock_probe,
  118. .driver = {
  119. .name = "stm32_hwspinlock",
  120. .of_match_table = stm32_hwpinlock_ids,
  121. .pm = &stm32_hwspinlock_pm_ops,
  122. },
  123. };
  124. static int __init stm32_hwspinlock_init(void)
  125. {
  126. return platform_driver_register(&stm32_hwspinlock_driver);
  127. }
  128. /* board init code might need to reserve hwspinlocks for predefined purposes */
  129. postcore_initcall(stm32_hwspinlock_init);
  130. static void __exit stm32_hwspinlock_exit(void)
  131. {
  132. platform_driver_unregister(&stm32_hwspinlock_driver);
  133. }
  134. module_exit(stm32_hwspinlock_exit);
  135. MODULE_LICENSE("GPL v2");
  136. MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs");
  137. MODULE_AUTHOR("Benjamin Gaignard <[email protected]>");