w83781d.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  4. * monitoring
  5. * Copyright (c) 1998 - 2001 Frodo Looijaard <[email protected]>,
  6. * Philip Edelbrock <[email protected]>,
  7. * and Mark Studebaker <[email protected]>
  8. * Copyright (c) 2007 - 2008 Jean Delvare <[email protected]>
  9. */
  10. /*
  11. * Supports following chips:
  12. *
  13. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  14. * as99127f 7 3 0 3 0x31 0x12c3 yes no
  15. * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  16. * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  17. * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  18. * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  19. *
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/slab.h>
  25. #include <linux/jiffies.h>
  26. #include <linux/i2c.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/hwmon-vid.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. #ifdef CONFIG_ISA
  34. #include <linux/platform_device.h>
  35. #include <linux/ioport.h>
  36. #include <linux/io.h>
  37. #endif
  38. #include "lm75.h"
  39. /* Addresses to scan */
  40. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  41. 0x2e, 0x2f, I2C_CLIENT_END };
  42. enum chips { w83781d, w83782d, w83783s, as99127f };
  43. /* Insmod parameters */
  44. static unsigned short force_subclients[4];
  45. module_param_array(force_subclients, short, NULL, 0);
  46. MODULE_PARM_DESC(force_subclients,
  47. "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
  48. static bool reset;
  49. module_param(reset, bool, 0);
  50. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  51. static bool init = 1;
  52. module_param(init, bool, 0);
  53. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  54. /* Constants specified below */
  55. /* Length of ISA address segment */
  56. #define W83781D_EXTENT 8
  57. /* Where are the ISA address/data registers relative to the base address */
  58. #define W83781D_ADDR_REG_OFFSET 5
  59. #define W83781D_DATA_REG_OFFSET 6
  60. /* The device registers */
  61. /* in nr from 0 to 8 */
  62. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  63. (0x554 + (((nr) - 7) * 2)))
  64. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  65. (0x555 + (((nr) - 7) * 2)))
  66. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  67. (0x550 + (nr) - 7))
  68. /* fan nr from 0 to 2 */
  69. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  70. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  71. #define W83781D_REG_BANK 0x4E
  72. #define W83781D_REG_TEMP2_CONFIG 0x152
  73. #define W83781D_REG_TEMP3_CONFIG 0x252
  74. /* temp nr from 1 to 3 */
  75. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  76. ((nr == 2) ? (0x0150) : \
  77. (0x27)))
  78. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  79. ((nr == 2) ? (0x153) : \
  80. (0x3A)))
  81. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  82. ((nr == 2) ? (0x155) : \
  83. (0x39)))
  84. #define W83781D_REG_CONFIG 0x40
  85. /* Interrupt status (W83781D, AS99127F) */
  86. #define W83781D_REG_ALARM1 0x41
  87. #define W83781D_REG_ALARM2 0x42
  88. /* Real-time status (W83782D, W83783S) */
  89. #define W83782D_REG_ALARM1 0x459
  90. #define W83782D_REG_ALARM2 0x45A
  91. #define W83782D_REG_ALARM3 0x45B
  92. #define W83781D_REG_BEEP_CONFIG 0x4D
  93. #define W83781D_REG_BEEP_INTS1 0x56
  94. #define W83781D_REG_BEEP_INTS2 0x57
  95. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  96. #define W83781D_REG_VID_FANDIV 0x47
  97. #define W83781D_REG_CHIPID 0x49
  98. #define W83781D_REG_WCHIPID 0x58
  99. #define W83781D_REG_CHIPMAN 0x4F
  100. #define W83781D_REG_PIN 0x4B
  101. /* 782D/783S only */
  102. #define W83781D_REG_VBAT 0x5D
  103. /* PWM 782D (1-4) and 783S (1-2) only */
  104. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  105. #define W83781D_REG_PWMCLK12 0x5C
  106. #define W83781D_REG_PWMCLK34 0x45C
  107. #define W83781D_REG_I2C_ADDR 0x48
  108. #define W83781D_REG_I2C_SUBADDR 0x4A
  109. /*
  110. * The following are undocumented in the data sheets however we
  111. * received the information in an email from Winbond tech support
  112. */
  113. /* Sensor selection - not on 781d */
  114. #define W83781D_REG_SCFG1 0x5D
  115. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  116. #define W83781D_REG_SCFG2 0x59
  117. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  118. #define W83781D_DEFAULT_BETA 3435
  119. /* Conversions */
  120. #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
  121. #define IN_FROM_REG(val) ((val) * 16)
  122. static inline u8
  123. FAN_TO_REG(long rpm, int div)
  124. {
  125. if (rpm == 0)
  126. return 255;
  127. rpm = clamp_val(rpm, 1, 1000000);
  128. return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  129. }
  130. static inline long
  131. FAN_FROM_REG(u8 val, int div)
  132. {
  133. if (val == 0)
  134. return -1;
  135. if (val == 255)
  136. return 0;
  137. return 1350000 / (val * div);
  138. }
  139. #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
  140. #define TEMP_FROM_REG(val) ((val) * 1000)
  141. #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
  142. (~(val)) & 0x7fff : (val) & 0xff7fff)
  143. #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
  144. (~(val)) & 0x7fff : (val) & 0xff7fff)
  145. #define DIV_FROM_REG(val) (1 << (val))
  146. static inline u8
  147. DIV_TO_REG(long val, enum chips type)
  148. {
  149. int i;
  150. val = clamp_val(val, 1,
  151. ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
  152. for (i = 0; i < 7; i++) {
  153. if (val == 0)
  154. break;
  155. val >>= 1;
  156. }
  157. return i;
  158. }
  159. struct w83781d_data {
  160. struct i2c_client *client;
  161. struct device *hwmon_dev;
  162. struct mutex lock;
  163. enum chips type;
  164. /* For ISA device only */
  165. const char *name;
  166. int isa_addr;
  167. struct mutex update_lock;
  168. bool valid; /* true if following fields are valid */
  169. unsigned long last_updated; /* In jiffies */
  170. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  171. /* array of 2 pointers to subclients */
  172. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  173. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  174. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  175. u8 fan[3]; /* Register value */
  176. u8 fan_min[3]; /* Register value */
  177. s8 temp; /* Register value */
  178. s8 temp_max; /* Register value */
  179. s8 temp_max_hyst; /* Register value */
  180. u16 temp_add[2]; /* Register value */
  181. u16 temp_max_add[2]; /* Register value */
  182. u16 temp_max_hyst_add[2]; /* Register value */
  183. u8 fan_div[3]; /* Register encoding, shifted right */
  184. u8 vid; /* Register encoding, combined */
  185. u32 alarms; /* Register encoding, combined */
  186. u32 beep_mask; /* Register encoding, combined */
  187. u8 pwm[4]; /* Register value */
  188. u8 pwm2_enable; /* Boolean */
  189. u16 sens[3]; /*
  190. * 782D/783S only.
  191. * 1 = pentium diode; 2 = 3904 diode;
  192. * 4 = thermistor
  193. */
  194. u8 vrm;
  195. };
  196. static struct w83781d_data *w83781d_data_if_isa(void);
  197. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  198. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  199. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  200. static struct w83781d_data *w83781d_update_device(struct device *dev);
  201. static void w83781d_init_device(struct device *dev);
  202. /* following are the sysfs callback functions */
  203. #define show_in_reg(reg) \
  204. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  205. char *buf) \
  206. { \
  207. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  208. struct w83781d_data *data = w83781d_update_device(dev); \
  209. return sprintf(buf, "%ld\n", \
  210. (long)IN_FROM_REG(data->reg[attr->index])); \
  211. }
  212. show_in_reg(in);
  213. show_in_reg(in_min);
  214. show_in_reg(in_max);
  215. #define store_in_reg(REG, reg) \
  216. static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
  217. *da, const char *buf, size_t count) \
  218. { \
  219. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  220. struct w83781d_data *data = dev_get_drvdata(dev); \
  221. int nr = attr->index; \
  222. unsigned long val; \
  223. int err = kstrtoul(buf, 10, &val); \
  224. if (err) \
  225. return err; \
  226. mutex_lock(&data->update_lock); \
  227. data->in_##reg[nr] = IN_TO_REG(val); \
  228. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
  229. data->in_##reg[nr]); \
  230. \
  231. mutex_unlock(&data->update_lock); \
  232. return count; \
  233. }
  234. store_in_reg(MIN, min);
  235. store_in_reg(MAX, max);
  236. #define sysfs_in_offsets(offset) \
  237. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  238. show_in, NULL, offset); \
  239. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  240. show_in_min, store_in_min, offset); \
  241. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  242. show_in_max, store_in_max, offset)
  243. sysfs_in_offsets(0);
  244. sysfs_in_offsets(1);
  245. sysfs_in_offsets(2);
  246. sysfs_in_offsets(3);
  247. sysfs_in_offsets(4);
  248. sysfs_in_offsets(5);
  249. sysfs_in_offsets(6);
  250. sysfs_in_offsets(7);
  251. sysfs_in_offsets(8);
  252. #define show_fan_reg(reg) \
  253. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  254. char *buf) \
  255. { \
  256. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  257. struct w83781d_data *data = w83781d_update_device(dev); \
  258. return sprintf(buf, "%ld\n", \
  259. FAN_FROM_REG(data->reg[attr->index], \
  260. DIV_FROM_REG(data->fan_div[attr->index]))); \
  261. }
  262. show_fan_reg(fan);
  263. show_fan_reg(fan_min);
  264. static ssize_t
  265. store_fan_min(struct device *dev, struct device_attribute *da,
  266. const char *buf, size_t count)
  267. {
  268. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  269. struct w83781d_data *data = dev_get_drvdata(dev);
  270. int nr = attr->index;
  271. unsigned long val;
  272. int err;
  273. err = kstrtoul(buf, 10, &val);
  274. if (err)
  275. return err;
  276. mutex_lock(&data->update_lock);
  277. data->fan_min[nr] =
  278. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  279. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  280. data->fan_min[nr]);
  281. mutex_unlock(&data->update_lock);
  282. return count;
  283. }
  284. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  285. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  286. show_fan_min, store_fan_min, 0);
  287. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  288. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  289. show_fan_min, store_fan_min, 1);
  290. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  291. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  292. show_fan_min, store_fan_min, 2);
  293. #define show_temp_reg(reg) \
  294. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  295. char *buf) \
  296. { \
  297. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  298. struct w83781d_data *data = w83781d_update_device(dev); \
  299. int nr = attr->index; \
  300. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  301. return sprintf(buf, "%d\n", \
  302. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  303. } else { /* TEMP1 */ \
  304. return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  305. } \
  306. }
  307. show_temp_reg(temp);
  308. show_temp_reg(temp_max);
  309. show_temp_reg(temp_max_hyst);
  310. #define store_temp_reg(REG, reg) \
  311. static ssize_t store_temp_##reg(struct device *dev, \
  312. struct device_attribute *da, const char *buf, size_t count) \
  313. { \
  314. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  315. struct w83781d_data *data = dev_get_drvdata(dev); \
  316. int nr = attr->index; \
  317. long val; \
  318. int err = kstrtol(buf, 10, &val); \
  319. if (err) \
  320. return err; \
  321. mutex_lock(&data->update_lock); \
  322. \
  323. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  324. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  325. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  326. data->temp_##reg##_add[nr-2]); \
  327. } else { /* TEMP1 */ \
  328. data->temp_##reg = TEMP_TO_REG(val); \
  329. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  330. data->temp_##reg); \
  331. } \
  332. \
  333. mutex_unlock(&data->update_lock); \
  334. return count; \
  335. }
  336. store_temp_reg(OVER, max);
  337. store_temp_reg(HYST, max_hyst);
  338. #define sysfs_temp_offsets(offset) \
  339. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  340. show_temp, NULL, offset); \
  341. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  342. show_temp_max, store_temp_max, offset); \
  343. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  344. show_temp_max_hyst, store_temp_max_hyst, offset);
  345. sysfs_temp_offsets(1);
  346. sysfs_temp_offsets(2);
  347. sysfs_temp_offsets(3);
  348. static ssize_t
  349. cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
  350. {
  351. struct w83781d_data *data = w83781d_update_device(dev);
  352. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  353. }
  354. static DEVICE_ATTR_RO(cpu0_vid);
  355. static ssize_t
  356. vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
  357. {
  358. struct w83781d_data *data = dev_get_drvdata(dev);
  359. return sprintf(buf, "%ld\n", (long) data->vrm);
  360. }
  361. static ssize_t
  362. vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
  363. size_t count)
  364. {
  365. struct w83781d_data *data = dev_get_drvdata(dev);
  366. unsigned long val;
  367. int err;
  368. err = kstrtoul(buf, 10, &val);
  369. if (err)
  370. return err;
  371. data->vrm = clamp_val(val, 0, 255);
  372. return count;
  373. }
  374. static DEVICE_ATTR_RW(vrm);
  375. static ssize_t
  376. alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
  377. {
  378. struct w83781d_data *data = w83781d_update_device(dev);
  379. return sprintf(buf, "%u\n", data->alarms);
  380. }
  381. static DEVICE_ATTR_RO(alarms);
  382. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  383. char *buf)
  384. {
  385. struct w83781d_data *data = w83781d_update_device(dev);
  386. int bitnr = to_sensor_dev_attr(attr)->index;
  387. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  388. }
  389. /* The W83781D has a single alarm bit for temp2 and temp3 */
  390. static ssize_t show_temp3_alarm(struct device *dev,
  391. struct device_attribute *attr, char *buf)
  392. {
  393. struct w83781d_data *data = w83781d_update_device(dev);
  394. int bitnr = (data->type == w83781d) ? 5 : 13;
  395. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  396. }
  397. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  398. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  399. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  400. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  401. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  402. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  403. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  404. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  405. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  406. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  407. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  408. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  409. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  410. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  411. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  412. static ssize_t beep_mask_show(struct device *dev,
  413. struct device_attribute *attr, char *buf)
  414. {
  415. struct w83781d_data *data = w83781d_update_device(dev);
  416. return sprintf(buf, "%ld\n",
  417. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  418. }
  419. static ssize_t
  420. beep_mask_store(struct device *dev, struct device_attribute *attr,
  421. const char *buf, size_t count)
  422. {
  423. struct w83781d_data *data = dev_get_drvdata(dev);
  424. unsigned long val;
  425. int err;
  426. err = kstrtoul(buf, 10, &val);
  427. if (err)
  428. return err;
  429. mutex_lock(&data->update_lock);
  430. data->beep_mask &= 0x8000; /* preserve beep enable */
  431. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  432. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  433. data->beep_mask & 0xff);
  434. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  435. (data->beep_mask >> 8) & 0xff);
  436. if (data->type != w83781d && data->type != as99127f) {
  437. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  438. ((data->beep_mask) >> 16) & 0xff);
  439. }
  440. mutex_unlock(&data->update_lock);
  441. return count;
  442. }
  443. static DEVICE_ATTR_RW(beep_mask);
  444. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  445. char *buf)
  446. {
  447. struct w83781d_data *data = w83781d_update_device(dev);
  448. int bitnr = to_sensor_dev_attr(attr)->index;
  449. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  450. }
  451. static ssize_t
  452. store_beep(struct device *dev, struct device_attribute *attr,
  453. const char *buf, size_t count)
  454. {
  455. struct w83781d_data *data = dev_get_drvdata(dev);
  456. int bitnr = to_sensor_dev_attr(attr)->index;
  457. u8 reg;
  458. unsigned long bit;
  459. int err;
  460. err = kstrtoul(buf, 10, &bit);
  461. if (err)
  462. return err;
  463. if (bit & ~1)
  464. return -EINVAL;
  465. mutex_lock(&data->update_lock);
  466. if (bit)
  467. data->beep_mask |= (1 << bitnr);
  468. else
  469. data->beep_mask &= ~(1 << bitnr);
  470. if (bitnr < 8) {
  471. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  472. if (bit)
  473. reg |= (1 << bitnr);
  474. else
  475. reg &= ~(1 << bitnr);
  476. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  477. } else if (bitnr < 16) {
  478. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  479. if (bit)
  480. reg |= (1 << (bitnr - 8));
  481. else
  482. reg &= ~(1 << (bitnr - 8));
  483. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  484. } else {
  485. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  486. if (bit)
  487. reg |= (1 << (bitnr - 16));
  488. else
  489. reg &= ~(1 << (bitnr - 16));
  490. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  491. }
  492. mutex_unlock(&data->update_lock);
  493. return count;
  494. }
  495. /* The W83781D has a single beep bit for temp2 and temp3 */
  496. static ssize_t show_temp3_beep(struct device *dev,
  497. struct device_attribute *attr, char *buf)
  498. {
  499. struct w83781d_data *data = w83781d_update_device(dev);
  500. int bitnr = (data->type == w83781d) ? 5 : 13;
  501. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  502. }
  503. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  504. show_beep, store_beep, 0);
  505. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  506. show_beep, store_beep, 1);
  507. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  508. show_beep, store_beep, 2);
  509. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  510. show_beep, store_beep, 3);
  511. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  512. show_beep, store_beep, 8);
  513. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  514. show_beep, store_beep, 9);
  515. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  516. show_beep, store_beep, 10);
  517. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  518. show_beep, store_beep, 16);
  519. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  520. show_beep, store_beep, 17);
  521. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  522. show_beep, store_beep, 6);
  523. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  524. show_beep, store_beep, 7);
  525. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  526. show_beep, store_beep, 11);
  527. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  528. show_beep, store_beep, 4);
  529. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  530. show_beep, store_beep, 5);
  531. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  532. show_temp3_beep, store_beep, 13);
  533. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  534. show_beep, store_beep, 15);
  535. static ssize_t
  536. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  537. {
  538. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  539. struct w83781d_data *data = w83781d_update_device(dev);
  540. return sprintf(buf, "%ld\n",
  541. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  542. }
  543. /*
  544. * Note: we save and restore the fan minimum here, because its value is
  545. * determined in part by the fan divisor. This follows the principle of
  546. * least surprise; the user doesn't expect the fan minimum to change just
  547. * because the divisor changed.
  548. */
  549. static ssize_t
  550. store_fan_div(struct device *dev, struct device_attribute *da,
  551. const char *buf, size_t count)
  552. {
  553. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  554. struct w83781d_data *data = dev_get_drvdata(dev);
  555. unsigned long min;
  556. int nr = attr->index;
  557. u8 reg;
  558. unsigned long val;
  559. int err;
  560. err = kstrtoul(buf, 10, &val);
  561. if (err)
  562. return err;
  563. mutex_lock(&data->update_lock);
  564. /* Save fan_min */
  565. min = FAN_FROM_REG(data->fan_min[nr],
  566. DIV_FROM_REG(data->fan_div[nr]));
  567. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  568. reg = (w83781d_read_value(data, nr == 2 ?
  569. W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  570. & (nr == 0 ? 0xcf : 0x3f))
  571. | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
  572. w83781d_write_value(data, nr == 2 ?
  573. W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  574. /* w83781d and as99127f don't have extended divisor bits */
  575. if (data->type != w83781d && data->type != as99127f) {
  576. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  577. & ~(1 << (5 + nr)))
  578. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  579. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  580. }
  581. /* Restore fan_min */
  582. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  583. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  584. mutex_unlock(&data->update_lock);
  585. return count;
  586. }
  587. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  588. show_fan_div, store_fan_div, 0);
  589. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  590. show_fan_div, store_fan_div, 1);
  591. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  592. show_fan_div, store_fan_div, 2);
  593. static ssize_t
  594. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  595. {
  596. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  597. struct w83781d_data *data = w83781d_update_device(dev);
  598. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  599. }
  600. static ssize_t
  601. pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
  602. {
  603. struct w83781d_data *data = w83781d_update_device(dev);
  604. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  605. }
  606. static ssize_t
  607. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  608. size_t count)
  609. {
  610. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  611. struct w83781d_data *data = dev_get_drvdata(dev);
  612. int nr = attr->index;
  613. unsigned long val;
  614. int err;
  615. err = kstrtoul(buf, 10, &val);
  616. if (err)
  617. return err;
  618. mutex_lock(&data->update_lock);
  619. data->pwm[nr] = clamp_val(val, 0, 255);
  620. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  621. mutex_unlock(&data->update_lock);
  622. return count;
  623. }
  624. static ssize_t
  625. pwm2_enable_store(struct device *dev, struct device_attribute *da,
  626. const char *buf, size_t count)
  627. {
  628. struct w83781d_data *data = dev_get_drvdata(dev);
  629. unsigned long val;
  630. u32 reg;
  631. int err;
  632. err = kstrtoul(buf, 10, &val);
  633. if (err)
  634. return err;
  635. mutex_lock(&data->update_lock);
  636. switch (val) {
  637. case 0:
  638. case 1:
  639. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  640. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  641. (reg & 0xf7) | (val << 3));
  642. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  643. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  644. (reg & 0xef) | (!val << 4));
  645. data->pwm2_enable = val;
  646. break;
  647. default:
  648. mutex_unlock(&data->update_lock);
  649. return -EINVAL;
  650. }
  651. mutex_unlock(&data->update_lock);
  652. return count;
  653. }
  654. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  655. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  656. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  657. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  658. /* only PWM2 can be enabled/disabled */
  659. static DEVICE_ATTR_RW(pwm2_enable);
  660. static ssize_t
  661. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  662. {
  663. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  664. struct w83781d_data *data = w83781d_update_device(dev);
  665. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  666. }
  667. static ssize_t
  668. store_sensor(struct device *dev, struct device_attribute *da,
  669. const char *buf, size_t count)
  670. {
  671. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  672. struct w83781d_data *data = dev_get_drvdata(dev);
  673. int nr = attr->index;
  674. unsigned long val;
  675. u32 tmp;
  676. int err;
  677. err = kstrtoul(buf, 10, &val);
  678. if (err)
  679. return err;
  680. mutex_lock(&data->update_lock);
  681. switch (val) {
  682. case 1: /* PII/Celeron diode */
  683. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  684. w83781d_write_value(data, W83781D_REG_SCFG1,
  685. tmp | BIT_SCFG1[nr]);
  686. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  687. w83781d_write_value(data, W83781D_REG_SCFG2,
  688. tmp | BIT_SCFG2[nr]);
  689. data->sens[nr] = val;
  690. break;
  691. case 2: /* 3904 */
  692. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  693. w83781d_write_value(data, W83781D_REG_SCFG1,
  694. tmp | BIT_SCFG1[nr]);
  695. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  696. w83781d_write_value(data, W83781D_REG_SCFG2,
  697. tmp & ~BIT_SCFG2[nr]);
  698. data->sens[nr] = val;
  699. break;
  700. case W83781D_DEFAULT_BETA:
  701. dev_warn(dev,
  702. "Sensor type %d is deprecated, please use 4 instead\n",
  703. W83781D_DEFAULT_BETA);
  704. fallthrough;
  705. case 4: /* thermistor */
  706. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  707. w83781d_write_value(data, W83781D_REG_SCFG1,
  708. tmp & ~BIT_SCFG1[nr]);
  709. data->sens[nr] = val;
  710. break;
  711. default:
  712. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  713. (long) val);
  714. break;
  715. }
  716. mutex_unlock(&data->update_lock);
  717. return count;
  718. }
  719. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  720. show_sensor, store_sensor, 0);
  721. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  722. show_sensor, store_sensor, 1);
  723. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  724. show_sensor, store_sensor, 2);
  725. /*
  726. * Assumes that adapter is of I2C, not ISA variety.
  727. * OTHERWISE DON'T CALL THIS
  728. */
  729. static int
  730. w83781d_detect_subclients(struct i2c_client *new_client)
  731. {
  732. int i, val1 = 0, id;
  733. int err;
  734. int address = new_client->addr;
  735. unsigned short sc_addr[2];
  736. struct i2c_adapter *adapter = new_client->adapter;
  737. struct w83781d_data *data = i2c_get_clientdata(new_client);
  738. enum chips kind = data->type;
  739. int num_sc = 1;
  740. id = i2c_adapter_id(adapter);
  741. if (force_subclients[0] == id && force_subclients[1] == address) {
  742. for (i = 2; i <= 3; i++) {
  743. if (force_subclients[i] < 0x48 ||
  744. force_subclients[i] > 0x4f) {
  745. dev_err(&new_client->dev,
  746. "Invalid subclient address %d; must be 0x48-0x4f\n",
  747. force_subclients[i]);
  748. err = -EINVAL;
  749. goto ERROR_SC_1;
  750. }
  751. }
  752. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  753. (force_subclients[2] & 0x07) |
  754. ((force_subclients[3] & 0x07) << 4));
  755. sc_addr[0] = force_subclients[2];
  756. } else {
  757. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  758. sc_addr[0] = 0x48 + (val1 & 0x07);
  759. }
  760. if (kind != w83783s) {
  761. num_sc = 2;
  762. if (force_subclients[0] == id &&
  763. force_subclients[1] == address) {
  764. sc_addr[1] = force_subclients[3];
  765. } else {
  766. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  767. }
  768. if (sc_addr[0] == sc_addr[1]) {
  769. dev_err(&new_client->dev,
  770. "Duplicate addresses 0x%x for subclients.\n",
  771. sc_addr[0]);
  772. err = -EBUSY;
  773. goto ERROR_SC_2;
  774. }
  775. }
  776. for (i = 0; i < num_sc; i++) {
  777. data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]);
  778. if (IS_ERR(data->lm75[i])) {
  779. dev_err(&new_client->dev,
  780. "Subclient %d registration at address 0x%x failed.\n",
  781. i, sc_addr[i]);
  782. err = PTR_ERR(data->lm75[i]);
  783. if (i == 1)
  784. goto ERROR_SC_3;
  785. goto ERROR_SC_2;
  786. }
  787. }
  788. return 0;
  789. /* Undo inits in case of errors */
  790. ERROR_SC_3:
  791. i2c_unregister_device(data->lm75[0]);
  792. ERROR_SC_2:
  793. ERROR_SC_1:
  794. return err;
  795. }
  796. #define IN_UNIT_ATTRS(X) \
  797. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  798. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  799. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  800. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  801. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  802. #define FAN_UNIT_ATTRS(X) \
  803. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  804. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  805. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  806. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  807. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  808. #define TEMP_UNIT_ATTRS(X) \
  809. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  810. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  811. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  812. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  813. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  814. static struct attribute *w83781d_attributes[] = {
  815. IN_UNIT_ATTRS(0),
  816. IN_UNIT_ATTRS(2),
  817. IN_UNIT_ATTRS(3),
  818. IN_UNIT_ATTRS(4),
  819. IN_UNIT_ATTRS(5),
  820. IN_UNIT_ATTRS(6),
  821. FAN_UNIT_ATTRS(1),
  822. FAN_UNIT_ATTRS(2),
  823. FAN_UNIT_ATTRS(3),
  824. TEMP_UNIT_ATTRS(1),
  825. TEMP_UNIT_ATTRS(2),
  826. &dev_attr_cpu0_vid.attr,
  827. &dev_attr_vrm.attr,
  828. &dev_attr_alarms.attr,
  829. &dev_attr_beep_mask.attr,
  830. &sensor_dev_attr_beep_enable.dev_attr.attr,
  831. NULL
  832. };
  833. static const struct attribute_group w83781d_group = {
  834. .attrs = w83781d_attributes,
  835. };
  836. static struct attribute *w83781d_attributes_in1[] = {
  837. IN_UNIT_ATTRS(1),
  838. NULL
  839. };
  840. static const struct attribute_group w83781d_group_in1 = {
  841. .attrs = w83781d_attributes_in1,
  842. };
  843. static struct attribute *w83781d_attributes_in78[] = {
  844. IN_UNIT_ATTRS(7),
  845. IN_UNIT_ATTRS(8),
  846. NULL
  847. };
  848. static const struct attribute_group w83781d_group_in78 = {
  849. .attrs = w83781d_attributes_in78,
  850. };
  851. static struct attribute *w83781d_attributes_temp3[] = {
  852. TEMP_UNIT_ATTRS(3),
  853. NULL
  854. };
  855. static const struct attribute_group w83781d_group_temp3 = {
  856. .attrs = w83781d_attributes_temp3,
  857. };
  858. static struct attribute *w83781d_attributes_pwm12[] = {
  859. &sensor_dev_attr_pwm1.dev_attr.attr,
  860. &sensor_dev_attr_pwm2.dev_attr.attr,
  861. &dev_attr_pwm2_enable.attr,
  862. NULL
  863. };
  864. static const struct attribute_group w83781d_group_pwm12 = {
  865. .attrs = w83781d_attributes_pwm12,
  866. };
  867. static struct attribute *w83781d_attributes_pwm34[] = {
  868. &sensor_dev_attr_pwm3.dev_attr.attr,
  869. &sensor_dev_attr_pwm4.dev_attr.attr,
  870. NULL
  871. };
  872. static const struct attribute_group w83781d_group_pwm34 = {
  873. .attrs = w83781d_attributes_pwm34,
  874. };
  875. static struct attribute *w83781d_attributes_other[] = {
  876. &sensor_dev_attr_temp1_type.dev_attr.attr,
  877. &sensor_dev_attr_temp2_type.dev_attr.attr,
  878. &sensor_dev_attr_temp3_type.dev_attr.attr,
  879. NULL
  880. };
  881. static const struct attribute_group w83781d_group_other = {
  882. .attrs = w83781d_attributes_other,
  883. };
  884. /* No clean up is done on error, it's up to the caller */
  885. static int
  886. w83781d_create_files(struct device *dev, int kind, int is_isa)
  887. {
  888. int err;
  889. err = sysfs_create_group(&dev->kobj, &w83781d_group);
  890. if (err)
  891. return err;
  892. if (kind != w83783s) {
  893. err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
  894. if (err)
  895. return err;
  896. }
  897. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  898. err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
  899. if (err)
  900. return err;
  901. }
  902. if (kind != w83783s) {
  903. err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
  904. if (err)
  905. return err;
  906. if (kind != w83781d) {
  907. err = sysfs_chmod_file(&dev->kobj,
  908. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  909. S_IRUGO | S_IWUSR);
  910. if (err)
  911. return err;
  912. }
  913. }
  914. if (kind != w83781d && kind != as99127f) {
  915. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
  916. if (err)
  917. return err;
  918. }
  919. if (kind == w83782d && !is_isa) {
  920. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
  921. if (err)
  922. return err;
  923. }
  924. if (kind != as99127f && kind != w83781d) {
  925. err = device_create_file(dev,
  926. &sensor_dev_attr_temp1_type.dev_attr);
  927. if (err)
  928. return err;
  929. err = device_create_file(dev,
  930. &sensor_dev_attr_temp2_type.dev_attr);
  931. if (err)
  932. return err;
  933. if (kind != w83783s) {
  934. err = device_create_file(dev,
  935. &sensor_dev_attr_temp3_type.dev_attr);
  936. if (err)
  937. return err;
  938. }
  939. }
  940. return 0;
  941. }
  942. /* Return 0 if detection is successful, -ENODEV otherwise */
  943. static int
  944. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  945. {
  946. int val1, val2;
  947. struct w83781d_data *isa = w83781d_data_if_isa();
  948. struct i2c_adapter *adapter = client->adapter;
  949. int address = client->addr;
  950. const char *client_name;
  951. enum vendor { winbond, asus } vendid;
  952. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  953. return -ENODEV;
  954. /*
  955. * We block updates of the ISA device to minimize the risk of
  956. * concurrent access to the same W83781D chip through different
  957. * interfaces.
  958. */
  959. if (isa)
  960. mutex_lock(&isa->update_lock);
  961. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  962. dev_dbg(&adapter->dev,
  963. "Detection of w83781d chip failed at step 3\n");
  964. goto err_nodev;
  965. }
  966. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  967. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  968. /* Check for Winbond or Asus ID if in bank 0 */
  969. if (!(val1 & 0x07) &&
  970. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  971. ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  972. dev_dbg(&adapter->dev,
  973. "Detection of w83781d chip failed at step 4\n");
  974. goto err_nodev;
  975. }
  976. /*
  977. * If Winbond SMBus, check address at 0x48.
  978. * Asus doesn't support, except for as99127f rev.2
  979. */
  980. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  981. ((val1 & 0x80) && val2 == 0x5c)) {
  982. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  983. != address) {
  984. dev_dbg(&adapter->dev,
  985. "Detection of w83781d chip failed at step 5\n");
  986. goto err_nodev;
  987. }
  988. }
  989. /* Put it now into bank 0 and Vendor ID High Byte */
  990. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  991. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  992. & 0x78) | 0x80);
  993. /* Get the vendor ID */
  994. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  995. if (val2 == 0x5c)
  996. vendid = winbond;
  997. else if (val2 == 0x12)
  998. vendid = asus;
  999. else {
  1000. dev_dbg(&adapter->dev,
  1001. "w83781d chip vendor is neither Winbond nor Asus\n");
  1002. goto err_nodev;
  1003. }
  1004. /* Determine the chip type. */
  1005. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  1006. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  1007. client_name = "w83781d";
  1008. else if (val1 == 0x30 && vendid == winbond)
  1009. client_name = "w83782d";
  1010. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  1011. client_name = "w83783s";
  1012. else if (val1 == 0x31)
  1013. client_name = "as99127f";
  1014. else
  1015. goto err_nodev;
  1016. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  1017. dev_dbg(&adapter->dev,
  1018. "Device at 0x%02x appears to be the same as ISA device\n",
  1019. address);
  1020. goto err_nodev;
  1021. }
  1022. if (isa)
  1023. mutex_unlock(&isa->update_lock);
  1024. strscpy(info->type, client_name, I2C_NAME_SIZE);
  1025. return 0;
  1026. err_nodev:
  1027. if (isa)
  1028. mutex_unlock(&isa->update_lock);
  1029. return -ENODEV;
  1030. }
  1031. static void w83781d_remove_files(struct device *dev)
  1032. {
  1033. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1034. sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
  1035. sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
  1036. sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
  1037. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
  1038. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
  1039. sysfs_remove_group(&dev->kobj, &w83781d_group_other);
  1040. }
  1041. static const struct i2c_device_id w83781d_ids[];
  1042. static int w83781d_probe(struct i2c_client *client)
  1043. {
  1044. struct device *dev = &client->dev;
  1045. struct w83781d_data *data;
  1046. int err;
  1047. data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
  1048. if (!data)
  1049. return -ENOMEM;
  1050. i2c_set_clientdata(client, data);
  1051. mutex_init(&data->lock);
  1052. mutex_init(&data->update_lock);
  1053. data->type = i2c_match_id(w83781d_ids, client)->driver_data;
  1054. data->client = client;
  1055. /* attach secondary i2c lm75-like clients */
  1056. err = w83781d_detect_subclients(client);
  1057. if (err)
  1058. return err;
  1059. /* Initialize the chip */
  1060. w83781d_init_device(dev);
  1061. /* Register sysfs hooks */
  1062. err = w83781d_create_files(dev, data->type, 0);
  1063. if (err)
  1064. goto exit_remove_files;
  1065. data->hwmon_dev = hwmon_device_register(dev);
  1066. if (IS_ERR(data->hwmon_dev)) {
  1067. err = PTR_ERR(data->hwmon_dev);
  1068. goto exit_remove_files;
  1069. }
  1070. return 0;
  1071. exit_remove_files:
  1072. w83781d_remove_files(dev);
  1073. i2c_unregister_device(data->lm75[0]);
  1074. i2c_unregister_device(data->lm75[1]);
  1075. return err;
  1076. }
  1077. static void
  1078. w83781d_remove(struct i2c_client *client)
  1079. {
  1080. struct w83781d_data *data = i2c_get_clientdata(client);
  1081. struct device *dev = &client->dev;
  1082. hwmon_device_unregister(data->hwmon_dev);
  1083. w83781d_remove_files(dev);
  1084. i2c_unregister_device(data->lm75[0]);
  1085. i2c_unregister_device(data->lm75[1]);
  1086. }
  1087. static int
  1088. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1089. {
  1090. struct i2c_client *client = data->client;
  1091. int res, bank;
  1092. struct i2c_client *cl;
  1093. bank = (reg >> 8) & 0x0f;
  1094. if (bank > 2)
  1095. /* switch banks */
  1096. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1097. bank);
  1098. if (bank == 0 || bank > 2) {
  1099. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1100. } else {
  1101. /* switch to subclient */
  1102. cl = data->lm75[bank - 1];
  1103. /* convert from ISA to LM75 I2C addresses */
  1104. switch (reg & 0xff) {
  1105. case 0x50: /* TEMP */
  1106. res = i2c_smbus_read_word_swapped(cl, 0);
  1107. break;
  1108. case 0x52: /* CONFIG */
  1109. res = i2c_smbus_read_byte_data(cl, 1);
  1110. break;
  1111. case 0x53: /* HYST */
  1112. res = i2c_smbus_read_word_swapped(cl, 2);
  1113. break;
  1114. case 0x55: /* OVER */
  1115. default:
  1116. res = i2c_smbus_read_word_swapped(cl, 3);
  1117. break;
  1118. }
  1119. }
  1120. if (bank > 2)
  1121. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1122. return res;
  1123. }
  1124. static int
  1125. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1126. {
  1127. struct i2c_client *client = data->client;
  1128. int bank;
  1129. struct i2c_client *cl;
  1130. bank = (reg >> 8) & 0x0f;
  1131. if (bank > 2)
  1132. /* switch banks */
  1133. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1134. bank);
  1135. if (bank == 0 || bank > 2) {
  1136. i2c_smbus_write_byte_data(client, reg & 0xff,
  1137. value & 0xff);
  1138. } else {
  1139. /* switch to subclient */
  1140. cl = data->lm75[bank - 1];
  1141. /* convert from ISA to LM75 I2C addresses */
  1142. switch (reg & 0xff) {
  1143. case 0x52: /* CONFIG */
  1144. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1145. break;
  1146. case 0x53: /* HYST */
  1147. i2c_smbus_write_word_swapped(cl, 2, value);
  1148. break;
  1149. case 0x55: /* OVER */
  1150. i2c_smbus_write_word_swapped(cl, 3, value);
  1151. break;
  1152. }
  1153. }
  1154. if (bank > 2)
  1155. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1156. return 0;
  1157. }
  1158. static void
  1159. w83781d_init_device(struct device *dev)
  1160. {
  1161. struct w83781d_data *data = dev_get_drvdata(dev);
  1162. int i, p;
  1163. int type = data->type;
  1164. u8 tmp;
  1165. if (reset && type != as99127f) { /*
  1166. * this resets registers we don't have
  1167. * documentation for on the as99127f
  1168. */
  1169. /*
  1170. * Resetting the chip has been the default for a long time,
  1171. * but it causes the BIOS initializations (fan clock dividers,
  1172. * thermal sensor types...) to be lost, so it is now optional.
  1173. * It might even go away if nobody reports it as being useful,
  1174. * as I see very little reason why this would be needed at
  1175. * all.
  1176. */
  1177. dev_info(dev,
  1178. "If reset=1 solved a problem you were having, please report!\n");
  1179. /* save these registers */
  1180. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1181. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1182. /*
  1183. * Reset all except Watchdog values and last conversion values
  1184. * This sets fan-divs to 2, among others
  1185. */
  1186. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1187. /*
  1188. * Restore the registers and disable power-on abnormal beep.
  1189. * This saves FAN 1/2/3 input/output values set by BIOS.
  1190. */
  1191. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1192. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1193. /*
  1194. * Disable master beep-enable (reset turns it on).
  1195. * Individual beep_mask should be reset to off but for some
  1196. * reason disabling this bit helps some people not get beeped
  1197. */
  1198. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1199. }
  1200. /*
  1201. * Disable power-on abnormal beep, as advised by the datasheet.
  1202. * Already done if reset=1.
  1203. */
  1204. if (init && !reset && type != as99127f) {
  1205. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1206. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1207. }
  1208. data->vrm = vid_which_vrm();
  1209. if ((type != w83781d) && (type != as99127f)) {
  1210. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1211. for (i = 1; i <= 3; i++) {
  1212. if (!(tmp & BIT_SCFG1[i - 1])) {
  1213. data->sens[i - 1] = 4;
  1214. } else {
  1215. if (w83781d_read_value
  1216. (data,
  1217. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1218. data->sens[i - 1] = 1;
  1219. else
  1220. data->sens[i - 1] = 2;
  1221. }
  1222. if (type == w83783s && i == 2)
  1223. break;
  1224. }
  1225. }
  1226. if (init && type != as99127f) {
  1227. /* Enable temp2 */
  1228. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1229. if (tmp & 0x01) {
  1230. dev_warn(dev,
  1231. "Enabling temp2, readings might not make sense\n");
  1232. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1233. tmp & 0xfe);
  1234. }
  1235. /* Enable temp3 */
  1236. if (type != w83783s) {
  1237. tmp = w83781d_read_value(data,
  1238. W83781D_REG_TEMP3_CONFIG);
  1239. if (tmp & 0x01) {
  1240. dev_warn(dev,
  1241. "Enabling temp3, readings might not make sense\n");
  1242. w83781d_write_value(data,
  1243. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1244. }
  1245. }
  1246. }
  1247. /* Start monitoring */
  1248. w83781d_write_value(data, W83781D_REG_CONFIG,
  1249. (w83781d_read_value(data,
  1250. W83781D_REG_CONFIG) & 0xf7)
  1251. | 0x01);
  1252. /* A few vars need to be filled upon startup */
  1253. for (i = 0; i < 3; i++) {
  1254. data->fan_min[i] = w83781d_read_value(data,
  1255. W83781D_REG_FAN_MIN(i));
  1256. }
  1257. mutex_init(&data->update_lock);
  1258. }
  1259. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1260. {
  1261. struct w83781d_data *data = dev_get_drvdata(dev);
  1262. struct i2c_client *client = data->client;
  1263. int i;
  1264. mutex_lock(&data->update_lock);
  1265. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1266. || !data->valid) {
  1267. dev_dbg(dev, "Starting device update\n");
  1268. for (i = 0; i <= 8; i++) {
  1269. if (data->type == w83783s && i == 1)
  1270. continue; /* 783S has no in1 */
  1271. data->in[i] =
  1272. w83781d_read_value(data, W83781D_REG_IN(i));
  1273. data->in_min[i] =
  1274. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1275. data->in_max[i] =
  1276. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1277. if ((data->type != w83782d) && (i == 6))
  1278. break;
  1279. }
  1280. for (i = 0; i < 3; i++) {
  1281. data->fan[i] =
  1282. w83781d_read_value(data, W83781D_REG_FAN(i));
  1283. data->fan_min[i] =
  1284. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1285. }
  1286. if (data->type != w83781d && data->type != as99127f) {
  1287. for (i = 0; i < 4; i++) {
  1288. data->pwm[i] =
  1289. w83781d_read_value(data,
  1290. W83781D_REG_PWM[i]);
  1291. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1292. if ((data->type != w83782d || !client)
  1293. && i == 1)
  1294. break;
  1295. }
  1296. /* Only PWM2 can be disabled */
  1297. data->pwm2_enable = (w83781d_read_value(data,
  1298. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1299. }
  1300. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1301. data->temp_max =
  1302. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1303. data->temp_max_hyst =
  1304. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1305. data->temp_add[0] =
  1306. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1307. data->temp_max_add[0] =
  1308. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1309. data->temp_max_hyst_add[0] =
  1310. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1311. if (data->type != w83783s) {
  1312. data->temp_add[1] =
  1313. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1314. data->temp_max_add[1] =
  1315. w83781d_read_value(data,
  1316. W83781D_REG_TEMP_OVER(3));
  1317. data->temp_max_hyst_add[1] =
  1318. w83781d_read_value(data,
  1319. W83781D_REG_TEMP_HYST(3));
  1320. }
  1321. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1322. data->vid = i & 0x0f;
  1323. data->vid |= (w83781d_read_value(data,
  1324. W83781D_REG_CHIPID) & 0x01) << 4;
  1325. data->fan_div[0] = (i >> 4) & 0x03;
  1326. data->fan_div[1] = (i >> 6) & 0x03;
  1327. data->fan_div[2] = (w83781d_read_value(data,
  1328. W83781D_REG_PIN) >> 6) & 0x03;
  1329. if ((data->type != w83781d) && (data->type != as99127f)) {
  1330. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1331. data->fan_div[0] |= (i >> 3) & 0x04;
  1332. data->fan_div[1] |= (i >> 4) & 0x04;
  1333. data->fan_div[2] |= (i >> 5) & 0x04;
  1334. }
  1335. if (data->type == w83782d) {
  1336. data->alarms = w83781d_read_value(data,
  1337. W83782D_REG_ALARM1)
  1338. | (w83781d_read_value(data,
  1339. W83782D_REG_ALARM2) << 8)
  1340. | (w83781d_read_value(data,
  1341. W83782D_REG_ALARM3) << 16);
  1342. } else if (data->type == w83783s) {
  1343. data->alarms = w83781d_read_value(data,
  1344. W83782D_REG_ALARM1)
  1345. | (w83781d_read_value(data,
  1346. W83782D_REG_ALARM2) << 8);
  1347. } else {
  1348. /*
  1349. * No real-time status registers, fall back to
  1350. * interrupt status registers
  1351. */
  1352. data->alarms = w83781d_read_value(data,
  1353. W83781D_REG_ALARM1)
  1354. | (w83781d_read_value(data,
  1355. W83781D_REG_ALARM2) << 8);
  1356. }
  1357. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1358. data->beep_mask = (i << 8) +
  1359. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1360. if ((data->type != w83781d) && (data->type != as99127f)) {
  1361. data->beep_mask |=
  1362. w83781d_read_value(data,
  1363. W83781D_REG_BEEP_INTS3) << 16;
  1364. }
  1365. data->last_updated = jiffies;
  1366. data->valid = true;
  1367. }
  1368. mutex_unlock(&data->update_lock);
  1369. return data;
  1370. }
  1371. static const struct i2c_device_id w83781d_ids[] = {
  1372. { "w83781d", w83781d, },
  1373. { "w83782d", w83782d, },
  1374. { "w83783s", w83783s, },
  1375. { "as99127f", as99127f },
  1376. { /* LIST END */ }
  1377. };
  1378. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1379. static const struct of_device_id w83781d_of_match[] = {
  1380. { .compatible = "winbond,w83781d" },
  1381. { .compatible = "winbond,w83781g" },
  1382. { .compatible = "winbond,w83782d" },
  1383. { .compatible = "winbond,w83783s" },
  1384. { .compatible = "asus,as99127f" },
  1385. { },
  1386. };
  1387. MODULE_DEVICE_TABLE(of, w83781d_of_match);
  1388. static struct i2c_driver w83781d_driver = {
  1389. .class = I2C_CLASS_HWMON,
  1390. .driver = {
  1391. .name = "w83781d",
  1392. .of_match_table = w83781d_of_match,
  1393. },
  1394. .probe_new = w83781d_probe,
  1395. .remove = w83781d_remove,
  1396. .id_table = w83781d_ids,
  1397. .detect = w83781d_detect,
  1398. .address_list = normal_i2c,
  1399. };
  1400. /*
  1401. * ISA related code
  1402. */
  1403. #ifdef CONFIG_ISA
  1404. /* ISA device, if found */
  1405. static struct platform_device *pdev;
  1406. static unsigned short isa_address = 0x290;
  1407. /*
  1408. * I2C devices get this name attribute automatically, but for ISA devices
  1409. * we must create it by ourselves.
  1410. */
  1411. static ssize_t
  1412. name_show(struct device *dev, struct device_attribute *devattr, char *buf)
  1413. {
  1414. struct w83781d_data *data = dev_get_drvdata(dev);
  1415. return sprintf(buf, "%s\n", data->name);
  1416. }
  1417. static DEVICE_ATTR_RO(name);
  1418. static struct w83781d_data *w83781d_data_if_isa(void)
  1419. {
  1420. return pdev ? platform_get_drvdata(pdev) : NULL;
  1421. }
  1422. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1423. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1424. {
  1425. struct w83781d_data *isa;
  1426. int i;
  1427. if (!pdev) /* No ISA chip */
  1428. return 0;
  1429. isa = platform_get_drvdata(pdev);
  1430. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1431. return 0; /* Address doesn't match */
  1432. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1433. return 0; /* Chip type doesn't match */
  1434. /*
  1435. * We compare all the limit registers, the config register and the
  1436. * interrupt mask registers
  1437. */
  1438. for (i = 0x2b; i <= 0x3d; i++) {
  1439. if (w83781d_read_value(isa, i) !=
  1440. i2c_smbus_read_byte_data(client, i))
  1441. return 0;
  1442. }
  1443. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1444. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1445. return 0;
  1446. for (i = 0x43; i <= 0x46; i++) {
  1447. if (w83781d_read_value(isa, i) !=
  1448. i2c_smbus_read_byte_data(client, i))
  1449. return 0;
  1450. }
  1451. return 1;
  1452. }
  1453. static int
  1454. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1455. {
  1456. int word_sized, res;
  1457. word_sized = (((reg & 0xff00) == 0x100)
  1458. || ((reg & 0xff00) == 0x200))
  1459. && (((reg & 0x00ff) == 0x50)
  1460. || ((reg & 0x00ff) == 0x53)
  1461. || ((reg & 0x00ff) == 0x55));
  1462. if (reg & 0xff00) {
  1463. outb_p(W83781D_REG_BANK,
  1464. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1465. outb_p(reg >> 8,
  1466. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1467. }
  1468. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1469. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1470. if (word_sized) {
  1471. outb_p((reg & 0xff) + 1,
  1472. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1473. res =
  1474. (res << 8) + inb_p(data->isa_addr +
  1475. W83781D_DATA_REG_OFFSET);
  1476. }
  1477. if (reg & 0xff00) {
  1478. outb_p(W83781D_REG_BANK,
  1479. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1480. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1481. }
  1482. return res;
  1483. }
  1484. static void
  1485. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1486. {
  1487. int word_sized;
  1488. word_sized = (((reg & 0xff00) == 0x100)
  1489. || ((reg & 0xff00) == 0x200))
  1490. && (((reg & 0x00ff) == 0x53)
  1491. || ((reg & 0x00ff) == 0x55));
  1492. if (reg & 0xff00) {
  1493. outb_p(W83781D_REG_BANK,
  1494. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1495. outb_p(reg >> 8,
  1496. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1497. }
  1498. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1499. if (word_sized) {
  1500. outb_p(value >> 8,
  1501. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1502. outb_p((reg & 0xff) + 1,
  1503. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1504. }
  1505. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1506. if (reg & 0xff00) {
  1507. outb_p(W83781D_REG_BANK,
  1508. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1509. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1510. }
  1511. }
  1512. /*
  1513. * The SMBus locks itself, usually, but nothing may access the Winbond between
  1514. * bank switches. ISA access must always be locked explicitly!
  1515. * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1516. * would slow down the W83781D access and should not be necessary.
  1517. * There are some ugly typecasts here, but the good news is - they should
  1518. * nowhere else be necessary!
  1519. */
  1520. static int
  1521. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1522. {
  1523. struct i2c_client *client = data->client;
  1524. int res;
  1525. mutex_lock(&data->lock);
  1526. if (client)
  1527. res = w83781d_read_value_i2c(data, reg);
  1528. else
  1529. res = w83781d_read_value_isa(data, reg);
  1530. mutex_unlock(&data->lock);
  1531. return res;
  1532. }
  1533. static int
  1534. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1535. {
  1536. struct i2c_client *client = data->client;
  1537. mutex_lock(&data->lock);
  1538. if (client)
  1539. w83781d_write_value_i2c(data, reg, value);
  1540. else
  1541. w83781d_write_value_isa(data, reg, value);
  1542. mutex_unlock(&data->lock);
  1543. return 0;
  1544. }
  1545. static int
  1546. w83781d_isa_probe(struct platform_device *pdev)
  1547. {
  1548. int err, reg;
  1549. struct w83781d_data *data;
  1550. struct resource *res;
  1551. /* Reserve the ISA region */
  1552. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1553. if (!devm_request_region(&pdev->dev,
  1554. res->start + W83781D_ADDR_REG_OFFSET, 2,
  1555. "w83781d"))
  1556. return -EBUSY;
  1557. data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
  1558. GFP_KERNEL);
  1559. if (!data)
  1560. return -ENOMEM;
  1561. mutex_init(&data->lock);
  1562. data->isa_addr = res->start;
  1563. platform_set_drvdata(pdev, data);
  1564. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1565. switch (reg) {
  1566. case 0x30:
  1567. data->type = w83782d;
  1568. data->name = "w83782d";
  1569. break;
  1570. default:
  1571. data->type = w83781d;
  1572. data->name = "w83781d";
  1573. }
  1574. /* Initialize the W83781D chip */
  1575. w83781d_init_device(&pdev->dev);
  1576. /* Register sysfs hooks */
  1577. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1578. if (err)
  1579. goto exit_remove_files;
  1580. err = device_create_file(&pdev->dev, &dev_attr_name);
  1581. if (err)
  1582. goto exit_remove_files;
  1583. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1584. if (IS_ERR(data->hwmon_dev)) {
  1585. err = PTR_ERR(data->hwmon_dev);
  1586. goto exit_remove_files;
  1587. }
  1588. return 0;
  1589. exit_remove_files:
  1590. w83781d_remove_files(&pdev->dev);
  1591. device_remove_file(&pdev->dev, &dev_attr_name);
  1592. return err;
  1593. }
  1594. static int
  1595. w83781d_isa_remove(struct platform_device *pdev)
  1596. {
  1597. struct w83781d_data *data = platform_get_drvdata(pdev);
  1598. hwmon_device_unregister(data->hwmon_dev);
  1599. w83781d_remove_files(&pdev->dev);
  1600. device_remove_file(&pdev->dev, &dev_attr_name);
  1601. return 0;
  1602. }
  1603. static struct platform_driver w83781d_isa_driver = {
  1604. .driver = {
  1605. .name = "w83781d",
  1606. },
  1607. .probe = w83781d_isa_probe,
  1608. .remove = w83781d_isa_remove,
  1609. };
  1610. /* return 1 if a supported chip is found, 0 otherwise */
  1611. static int __init
  1612. w83781d_isa_found(unsigned short address)
  1613. {
  1614. int val, save, found = 0;
  1615. int port;
  1616. /*
  1617. * Some boards declare base+0 to base+7 as a PNP device, some base+4
  1618. * to base+7 and some base+5 to base+6. So we better request each port
  1619. * individually for the probing phase.
  1620. */
  1621. for (port = address; port < address + W83781D_EXTENT; port++) {
  1622. if (!request_region(port, 1, "w83781d")) {
  1623. pr_debug("Failed to request port 0x%x\n", port);
  1624. goto release;
  1625. }
  1626. }
  1627. #define REALLY_SLOW_IO
  1628. /*
  1629. * We need the timeouts for at least some W83781D-like
  1630. * chips. But only if we read 'undefined' registers.
  1631. */
  1632. val = inb_p(address + 1);
  1633. if (inb_p(address + 2) != val
  1634. || inb_p(address + 3) != val
  1635. || inb_p(address + 7) != val) {
  1636. pr_debug("Detection failed at step %d\n", 1);
  1637. goto release;
  1638. }
  1639. #undef REALLY_SLOW_IO
  1640. /*
  1641. * We should be able to change the 7 LSB of the address port. The
  1642. * MSB (busy flag) should be clear initially, set after the write.
  1643. */
  1644. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1645. if (save & 0x80) {
  1646. pr_debug("Detection failed at step %d\n", 2);
  1647. goto release;
  1648. }
  1649. val = ~save & 0x7f;
  1650. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1651. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1652. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1653. pr_debug("Detection failed at step %d\n", 3);
  1654. goto release;
  1655. }
  1656. /* We found a device, now see if it could be a W83781D */
  1657. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1658. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1659. if (val & 0x80) {
  1660. pr_debug("Detection failed at step %d\n", 4);
  1661. goto release;
  1662. }
  1663. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1664. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1665. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1666. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1667. if ((!(save & 0x80) && (val != 0xa3))
  1668. || ((save & 0x80) && (val != 0x5c))) {
  1669. pr_debug("Detection failed at step %d\n", 5);
  1670. goto release;
  1671. }
  1672. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1673. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1674. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1675. pr_debug("Detection failed at step %d\n", 6);
  1676. goto release;
  1677. }
  1678. /* The busy flag should be clear again */
  1679. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1680. pr_debug("Detection failed at step %d\n", 7);
  1681. goto release;
  1682. }
  1683. /* Determine the chip type */
  1684. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1685. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1686. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1687. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1688. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1689. if ((val & 0xfe) == 0x10 /* W83781D */
  1690. || val == 0x30) /* W83782D */
  1691. found = 1;
  1692. if (found)
  1693. pr_info("Found a %s chip at %#x\n",
  1694. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1695. release:
  1696. for (port--; port >= address; port--)
  1697. release_region(port, 1);
  1698. return found;
  1699. }
  1700. static int __init
  1701. w83781d_isa_device_add(unsigned short address)
  1702. {
  1703. struct resource res = {
  1704. .start = address,
  1705. .end = address + W83781D_EXTENT - 1,
  1706. .name = "w83781d",
  1707. .flags = IORESOURCE_IO,
  1708. };
  1709. int err;
  1710. pdev = platform_device_alloc("w83781d", address);
  1711. if (!pdev) {
  1712. err = -ENOMEM;
  1713. pr_err("Device allocation failed\n");
  1714. goto exit;
  1715. }
  1716. err = platform_device_add_resources(pdev, &res, 1);
  1717. if (err) {
  1718. pr_err("Device resource addition failed (%d)\n", err);
  1719. goto exit_device_put;
  1720. }
  1721. err = platform_device_add(pdev);
  1722. if (err) {
  1723. pr_err("Device addition failed (%d)\n", err);
  1724. goto exit_device_put;
  1725. }
  1726. return 0;
  1727. exit_device_put:
  1728. platform_device_put(pdev);
  1729. exit:
  1730. pdev = NULL;
  1731. return err;
  1732. }
  1733. static int __init
  1734. w83781d_isa_register(void)
  1735. {
  1736. int res;
  1737. if (w83781d_isa_found(isa_address)) {
  1738. res = platform_driver_register(&w83781d_isa_driver);
  1739. if (res)
  1740. goto exit;
  1741. /* Sets global pdev as a side effect */
  1742. res = w83781d_isa_device_add(isa_address);
  1743. if (res)
  1744. goto exit_unreg_isa_driver;
  1745. }
  1746. return 0;
  1747. exit_unreg_isa_driver:
  1748. platform_driver_unregister(&w83781d_isa_driver);
  1749. exit:
  1750. return res;
  1751. }
  1752. static void
  1753. w83781d_isa_unregister(void)
  1754. {
  1755. if (pdev) {
  1756. platform_device_unregister(pdev);
  1757. platform_driver_unregister(&w83781d_isa_driver);
  1758. }
  1759. }
  1760. #else /* !CONFIG_ISA */
  1761. static struct w83781d_data *w83781d_data_if_isa(void)
  1762. {
  1763. return NULL;
  1764. }
  1765. static int
  1766. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1767. {
  1768. return 0;
  1769. }
  1770. static int
  1771. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1772. {
  1773. int res;
  1774. mutex_lock(&data->lock);
  1775. res = w83781d_read_value_i2c(data, reg);
  1776. mutex_unlock(&data->lock);
  1777. return res;
  1778. }
  1779. static int
  1780. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1781. {
  1782. mutex_lock(&data->lock);
  1783. w83781d_write_value_i2c(data, reg, value);
  1784. mutex_unlock(&data->lock);
  1785. return 0;
  1786. }
  1787. static int __init
  1788. w83781d_isa_register(void)
  1789. {
  1790. return 0;
  1791. }
  1792. static void
  1793. w83781d_isa_unregister(void)
  1794. {
  1795. }
  1796. #endif /* CONFIG_ISA */
  1797. static int __init
  1798. sensors_w83781d_init(void)
  1799. {
  1800. int res;
  1801. /*
  1802. * We register the ISA device first, so that we can skip the
  1803. * registration of an I2C interface to the same device.
  1804. */
  1805. res = w83781d_isa_register();
  1806. if (res)
  1807. goto exit;
  1808. res = i2c_add_driver(&w83781d_driver);
  1809. if (res)
  1810. goto exit_unreg_isa;
  1811. return 0;
  1812. exit_unreg_isa:
  1813. w83781d_isa_unregister();
  1814. exit:
  1815. return res;
  1816. }
  1817. static void __exit
  1818. sensors_w83781d_exit(void)
  1819. {
  1820. w83781d_isa_unregister();
  1821. i2c_del_driver(&w83781d_driver);
  1822. }
  1823. MODULE_AUTHOR("Frodo Looijaard <[email protected]>, "
  1824. "Philip Edelbrock <[email protected]>, "
  1825. "and Mark Studebaker <[email protected]>");
  1826. MODULE_DESCRIPTION("W83781D driver");
  1827. MODULE_LICENSE("GPL");
  1828. module_init(sensors_w83781d_init);
  1829. module_exit(sensors_w83781d_exit);