sbrmi.c 7.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * sbrmi.c - hwmon driver for a SB-RMI mailbox
  4. * compliant AMD SoC device.
  5. *
  6. * Copyright (C) 2020-2021 Advanced Micro Devices, Inc.
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/err.h>
  10. #include <linux/hwmon.h>
  11. #include <linux/i2c.h>
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/mutex.h>
  15. #include <linux/of.h>
  16. /* Do not allow setting negative power limit */
  17. #define SBRMI_PWR_MIN 0
  18. /* Mask for Status Register bit[1] */
  19. #define SW_ALERT_MASK 0x2
  20. /* Software Interrupt for triggering */
  21. #define START_CMD 0x80
  22. #define TRIGGER_MAILBOX 0x01
  23. /*
  24. * SB-RMI supports soft mailbox service request to MP1 (power management
  25. * firmware) through SBRMI inbound/outbound message registers.
  26. * SB-RMI message IDs
  27. */
  28. enum sbrmi_msg_id {
  29. SBRMI_READ_PKG_PWR_CONSUMPTION = 0x1,
  30. SBRMI_WRITE_PKG_PWR_LIMIT,
  31. SBRMI_READ_PKG_PWR_LIMIT,
  32. SBRMI_READ_PKG_MAX_PWR_LIMIT,
  33. };
  34. /* SB-RMI registers */
  35. enum sbrmi_reg {
  36. SBRMI_CTRL = 0x01,
  37. SBRMI_STATUS,
  38. SBRMI_OUTBNDMSG0 = 0x30,
  39. SBRMI_OUTBNDMSG1,
  40. SBRMI_OUTBNDMSG2,
  41. SBRMI_OUTBNDMSG3,
  42. SBRMI_OUTBNDMSG4,
  43. SBRMI_OUTBNDMSG5,
  44. SBRMI_OUTBNDMSG6,
  45. SBRMI_OUTBNDMSG7,
  46. SBRMI_INBNDMSG0,
  47. SBRMI_INBNDMSG1,
  48. SBRMI_INBNDMSG2,
  49. SBRMI_INBNDMSG3,
  50. SBRMI_INBNDMSG4,
  51. SBRMI_INBNDMSG5,
  52. SBRMI_INBNDMSG6,
  53. SBRMI_INBNDMSG7,
  54. SBRMI_SW_INTERRUPT,
  55. };
  56. /* Each client has this additional data */
  57. struct sbrmi_data {
  58. struct i2c_client *client;
  59. struct mutex lock;
  60. u32 pwr_limit_max;
  61. };
  62. struct sbrmi_mailbox_msg {
  63. u8 cmd;
  64. bool read;
  65. u32 data_in;
  66. u32 data_out;
  67. };
  68. static int sbrmi_enable_alert(struct i2c_client *client)
  69. {
  70. int ctrl;
  71. /*
  72. * Enable the SB-RMI Software alert status
  73. * by writing 0 to bit 4 of Control register(0x1)
  74. */
  75. ctrl = i2c_smbus_read_byte_data(client, SBRMI_CTRL);
  76. if (ctrl < 0)
  77. return ctrl;
  78. if (ctrl & 0x10) {
  79. ctrl &= ~0x10;
  80. return i2c_smbus_write_byte_data(client,
  81. SBRMI_CTRL, ctrl);
  82. }
  83. return 0;
  84. }
  85. static int rmi_mailbox_xfer(struct sbrmi_data *data,
  86. struct sbrmi_mailbox_msg *msg)
  87. {
  88. int i, ret, retry = 10;
  89. int sw_status;
  90. u8 byte;
  91. mutex_lock(&data->lock);
  92. /* Indicate firmware a command is to be serviced */
  93. ret = i2c_smbus_write_byte_data(data->client,
  94. SBRMI_INBNDMSG7, START_CMD);
  95. if (ret < 0)
  96. goto exit_unlock;
  97. /* Write the command to SBRMI::InBndMsg_inst0 */
  98. ret = i2c_smbus_write_byte_data(data->client,
  99. SBRMI_INBNDMSG0, msg->cmd);
  100. if (ret < 0)
  101. goto exit_unlock;
  102. /*
  103. * For both read and write the initiator (BMC) writes
  104. * Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1]
  105. * SBRMI_x3C(MSB):SBRMI_x39(LSB)
  106. */
  107. for (i = 0; i < 4; i++) {
  108. byte = (msg->data_in >> i * 8) & 0xff;
  109. ret = i2c_smbus_write_byte_data(data->client,
  110. SBRMI_INBNDMSG1 + i, byte);
  111. if (ret < 0)
  112. goto exit_unlock;
  113. }
  114. /*
  115. * Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to
  116. * perform the requested read or write command
  117. */
  118. ret = i2c_smbus_write_byte_data(data->client,
  119. SBRMI_SW_INTERRUPT, TRIGGER_MAILBOX);
  120. if (ret < 0)
  121. goto exit_unlock;
  122. /*
  123. * Firmware will write SBRMI::Status[SwAlertSts]=1 to generate
  124. * an ALERT (if enabled) to initiator (BMC) to indicate completion
  125. * of the requested command
  126. */
  127. do {
  128. sw_status = i2c_smbus_read_byte_data(data->client,
  129. SBRMI_STATUS);
  130. if (sw_status < 0) {
  131. ret = sw_status;
  132. goto exit_unlock;
  133. }
  134. if (sw_status & SW_ALERT_MASK)
  135. break;
  136. usleep_range(50, 100);
  137. } while (retry--);
  138. if (retry < 0) {
  139. dev_err(&data->client->dev,
  140. "Firmware fail to indicate command completion\n");
  141. ret = -EIO;
  142. goto exit_unlock;
  143. }
  144. /*
  145. * For a read operation, the initiator (BMC) reads the firmware
  146. * response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1]
  147. * {SBRMI_x34(MSB):SBRMI_x31(LSB)}.
  148. */
  149. if (msg->read) {
  150. for (i = 0; i < 4; i++) {
  151. ret = i2c_smbus_read_byte_data(data->client,
  152. SBRMI_OUTBNDMSG1 + i);
  153. if (ret < 0)
  154. goto exit_unlock;
  155. msg->data_out |= ret << i * 8;
  156. }
  157. }
  158. /*
  159. * BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the
  160. * ALERT to initiator
  161. */
  162. ret = i2c_smbus_write_byte_data(data->client, SBRMI_STATUS,
  163. sw_status | SW_ALERT_MASK);
  164. exit_unlock:
  165. mutex_unlock(&data->lock);
  166. return ret;
  167. }
  168. static int sbrmi_read(struct device *dev, enum hwmon_sensor_types type,
  169. u32 attr, int channel, long *val)
  170. {
  171. struct sbrmi_data *data = dev_get_drvdata(dev);
  172. struct sbrmi_mailbox_msg msg = { 0 };
  173. int ret;
  174. if (type != hwmon_power)
  175. return -EINVAL;
  176. msg.read = true;
  177. switch (attr) {
  178. case hwmon_power_input:
  179. msg.cmd = SBRMI_READ_PKG_PWR_CONSUMPTION;
  180. ret = rmi_mailbox_xfer(data, &msg);
  181. break;
  182. case hwmon_power_cap:
  183. msg.cmd = SBRMI_READ_PKG_PWR_LIMIT;
  184. ret = rmi_mailbox_xfer(data, &msg);
  185. break;
  186. case hwmon_power_cap_max:
  187. msg.data_out = data->pwr_limit_max;
  188. ret = 0;
  189. break;
  190. default:
  191. return -EINVAL;
  192. }
  193. if (ret < 0)
  194. return ret;
  195. /* hwmon power attributes are in microWatt */
  196. *val = (long)msg.data_out * 1000;
  197. return ret;
  198. }
  199. static int sbrmi_write(struct device *dev, enum hwmon_sensor_types type,
  200. u32 attr, int channel, long val)
  201. {
  202. struct sbrmi_data *data = dev_get_drvdata(dev);
  203. struct sbrmi_mailbox_msg msg = { 0 };
  204. if (type != hwmon_power && attr != hwmon_power_cap)
  205. return -EINVAL;
  206. /*
  207. * hwmon power attributes are in microWatt
  208. * mailbox read/write is in mWatt
  209. */
  210. val /= 1000;
  211. val = clamp_val(val, SBRMI_PWR_MIN, data->pwr_limit_max);
  212. msg.cmd = SBRMI_WRITE_PKG_PWR_LIMIT;
  213. msg.data_in = val;
  214. msg.read = false;
  215. return rmi_mailbox_xfer(data, &msg);
  216. }
  217. static umode_t sbrmi_is_visible(const void *data,
  218. enum hwmon_sensor_types type,
  219. u32 attr, int channel)
  220. {
  221. switch (type) {
  222. case hwmon_power:
  223. switch (attr) {
  224. case hwmon_power_input:
  225. case hwmon_power_cap_max:
  226. return 0444;
  227. case hwmon_power_cap:
  228. return 0644;
  229. }
  230. break;
  231. default:
  232. break;
  233. }
  234. return 0;
  235. }
  236. static const struct hwmon_channel_info *sbrmi_info[] = {
  237. HWMON_CHANNEL_INFO(power,
  238. HWMON_P_INPUT | HWMON_P_CAP | HWMON_P_CAP_MAX),
  239. NULL
  240. };
  241. static const struct hwmon_ops sbrmi_hwmon_ops = {
  242. .is_visible = sbrmi_is_visible,
  243. .read = sbrmi_read,
  244. .write = sbrmi_write,
  245. };
  246. static const struct hwmon_chip_info sbrmi_chip_info = {
  247. .ops = &sbrmi_hwmon_ops,
  248. .info = sbrmi_info,
  249. };
  250. static int sbrmi_get_max_pwr_limit(struct sbrmi_data *data)
  251. {
  252. struct sbrmi_mailbox_msg msg = { 0 };
  253. int ret;
  254. msg.cmd = SBRMI_READ_PKG_MAX_PWR_LIMIT;
  255. msg.read = true;
  256. ret = rmi_mailbox_xfer(data, &msg);
  257. if (ret < 0)
  258. return ret;
  259. data->pwr_limit_max = msg.data_out;
  260. return ret;
  261. }
  262. static int sbrmi_probe(struct i2c_client *client,
  263. const struct i2c_device_id *id)
  264. {
  265. struct device *dev = &client->dev;
  266. struct device *hwmon_dev;
  267. struct sbrmi_data *data;
  268. int ret;
  269. data = devm_kzalloc(dev, sizeof(struct sbrmi_data), GFP_KERNEL);
  270. if (!data)
  271. return -ENOMEM;
  272. data->client = client;
  273. mutex_init(&data->lock);
  274. /* Enable alert for SB-RMI sequence */
  275. ret = sbrmi_enable_alert(client);
  276. if (ret < 0)
  277. return ret;
  278. /* Cache maximum power limit */
  279. ret = sbrmi_get_max_pwr_limit(data);
  280. if (ret < 0)
  281. return ret;
  282. hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
  283. &sbrmi_chip_info, NULL);
  284. return PTR_ERR_OR_ZERO(hwmon_dev);
  285. }
  286. static const struct i2c_device_id sbrmi_id[] = {
  287. {"sbrmi", 0},
  288. {}
  289. };
  290. MODULE_DEVICE_TABLE(i2c, sbrmi_id);
  291. static const struct of_device_id __maybe_unused sbrmi_of_match[] = {
  292. {
  293. .compatible = "amd,sbrmi",
  294. },
  295. { },
  296. };
  297. MODULE_DEVICE_TABLE(of, sbrmi_of_match);
  298. static struct i2c_driver sbrmi_driver = {
  299. .class = I2C_CLASS_HWMON,
  300. .driver = {
  301. .name = "sbrmi",
  302. .of_match_table = of_match_ptr(sbrmi_of_match),
  303. },
  304. .probe = sbrmi_probe,
  305. .id_table = sbrmi_id,
  306. };
  307. module_i2c_driver(sbrmi_driver);
  308. MODULE_AUTHOR("Akshay Gupta <[email protected]>");
  309. MODULE_DESCRIPTION("Hwmon driver for AMD SB-RMI emulated sensor");
  310. MODULE_LICENSE("GPL");