p8_i2c.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. // Copyright IBM Corp 2019
  3. #include <linux/device.h>
  4. #include <linux/errno.h>
  5. #include <linux/fsi-occ.h>
  6. #include <linux/i2c.h>
  7. #include <linux/jiffies.h>
  8. #include <linux/module.h>
  9. #include <linux/sched.h>
  10. #include <asm/unaligned.h>
  11. #include "common.h"
  12. #define OCC_TIMEOUT_MS 1000
  13. #define OCC_CMD_IN_PRG_WAIT_MS 50
  14. /* OCB (on-chip control bridge - interface to OCC) registers */
  15. #define OCB_DATA1 0x6B035
  16. #define OCB_ADDR 0x6B070
  17. #define OCB_DATA3 0x6B075
  18. /* OCC SRAM address space */
  19. #define OCC_SRAM_ADDR_CMD 0xFFFF6000
  20. #define OCC_SRAM_ADDR_RESP 0xFFFF7000
  21. #define OCC_DATA_ATTN 0x20010000
  22. struct p8_i2c_occ {
  23. struct occ occ;
  24. struct i2c_client *client;
  25. };
  26. #define to_p8_i2c_occ(x) container_of((x), struct p8_i2c_occ, occ)
  27. static int p8_i2c_occ_getscom(struct i2c_client *client, u32 address, u8 *data)
  28. {
  29. ssize_t rc;
  30. __be64 buf;
  31. struct i2c_msg msgs[2];
  32. /* p8 i2c slave requires shift */
  33. address <<= 1;
  34. msgs[0].addr = client->addr;
  35. msgs[0].flags = client->flags & I2C_M_TEN;
  36. msgs[0].len = sizeof(u32);
  37. /* address is a scom address; bus-endian */
  38. msgs[0].buf = (char *)&address;
  39. /* data from OCC is big-endian */
  40. msgs[1].addr = client->addr;
  41. msgs[1].flags = (client->flags & I2C_M_TEN) | I2C_M_RD;
  42. msgs[1].len = sizeof(u64);
  43. msgs[1].buf = (char *)&buf;
  44. rc = i2c_transfer(client->adapter, msgs, 2);
  45. if (rc < 0)
  46. return rc;
  47. *(u64 *)data = be64_to_cpu(buf);
  48. return 0;
  49. }
  50. static int p8_i2c_occ_putscom(struct i2c_client *client, u32 address, u8 *data)
  51. {
  52. u32 buf[3];
  53. ssize_t rc;
  54. /* p8 i2c slave requires shift */
  55. address <<= 1;
  56. /* address is bus-endian; data passed through from user as-is */
  57. buf[0] = address;
  58. memcpy(&buf[1], &data[4], sizeof(u32));
  59. memcpy(&buf[2], data, sizeof(u32));
  60. rc = i2c_master_send(client, (const char *)buf, sizeof(buf));
  61. if (rc < 0)
  62. return rc;
  63. else if (rc != sizeof(buf))
  64. return -EIO;
  65. return 0;
  66. }
  67. static int p8_i2c_occ_putscom_u32(struct i2c_client *client, u32 address,
  68. u32 data0, u32 data1)
  69. {
  70. u8 buf[8];
  71. memcpy(buf, &data0, 4);
  72. memcpy(buf + 4, &data1, 4);
  73. return p8_i2c_occ_putscom(client, address, buf);
  74. }
  75. static int p8_i2c_occ_putscom_be(struct i2c_client *client, u32 address,
  76. u8 *data, size_t len)
  77. {
  78. __be32 data0 = 0, data1 = 0;
  79. memcpy(&data0, data, min_t(size_t, len, 4));
  80. if (len > 4) {
  81. len -= 4;
  82. memcpy(&data1, data + 4, min_t(size_t, len, 4));
  83. }
  84. return p8_i2c_occ_putscom_u32(client, address, be32_to_cpu(data0),
  85. be32_to_cpu(data1));
  86. }
  87. static int p8_i2c_occ_send_cmd(struct occ *occ, u8 *cmd, size_t len,
  88. void *resp, size_t resp_len)
  89. {
  90. int i, rc;
  91. unsigned long start;
  92. u16 data_length;
  93. const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
  94. const long wait_time = msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
  95. struct p8_i2c_occ *ctx = to_p8_i2c_occ(occ);
  96. struct i2c_client *client = ctx->client;
  97. struct occ_response *or = (struct occ_response *)resp;
  98. start = jiffies;
  99. /* set sram address for command */
  100. rc = p8_i2c_occ_putscom_u32(client, OCB_ADDR, OCC_SRAM_ADDR_CMD, 0);
  101. if (rc)
  102. return rc;
  103. /* write command (expected to already be BE), we need bus-endian... */
  104. rc = p8_i2c_occ_putscom_be(client, OCB_DATA3, cmd, len);
  105. if (rc)
  106. return rc;
  107. /* trigger OCC attention */
  108. rc = p8_i2c_occ_putscom_u32(client, OCB_DATA1, OCC_DATA_ATTN, 0);
  109. if (rc)
  110. return rc;
  111. do {
  112. /* set sram address for response */
  113. rc = p8_i2c_occ_putscom_u32(client, OCB_ADDR,
  114. OCC_SRAM_ADDR_RESP, 0);
  115. if (rc)
  116. return rc;
  117. rc = p8_i2c_occ_getscom(client, OCB_DATA3, (u8 *)resp);
  118. if (rc)
  119. return rc;
  120. /* wait for OCC */
  121. if (or->return_status == OCC_RESP_CMD_IN_PRG) {
  122. rc = -EALREADY;
  123. if (time_after(jiffies, start + timeout))
  124. break;
  125. set_current_state(TASK_INTERRUPTIBLE);
  126. schedule_timeout(wait_time);
  127. }
  128. } while (rc);
  129. /* check the OCC response */
  130. switch (or->return_status) {
  131. case OCC_RESP_CMD_IN_PRG:
  132. rc = -ETIMEDOUT;
  133. break;
  134. case OCC_RESP_SUCCESS:
  135. rc = 0;
  136. break;
  137. case OCC_RESP_CMD_INVAL:
  138. case OCC_RESP_CMD_LEN_INVAL:
  139. case OCC_RESP_DATA_INVAL:
  140. case OCC_RESP_CHKSUM_ERR:
  141. rc = -EINVAL;
  142. break;
  143. case OCC_RESP_INT_ERR:
  144. case OCC_RESP_BAD_STATE:
  145. case OCC_RESP_CRIT_EXCEPT:
  146. case OCC_RESP_CRIT_INIT:
  147. case OCC_RESP_CRIT_WATCHDOG:
  148. case OCC_RESP_CRIT_OCB:
  149. case OCC_RESP_CRIT_HW:
  150. rc = -EREMOTEIO;
  151. break;
  152. default:
  153. rc = -EPROTO;
  154. }
  155. if (rc < 0)
  156. return rc;
  157. data_length = get_unaligned_be16(&or->data_length);
  158. if ((data_length + 7) > resp_len)
  159. return -EMSGSIZE;
  160. /* fetch the rest of the response data */
  161. for (i = 8; i < data_length + 7; i += 8) {
  162. rc = p8_i2c_occ_getscom(client, OCB_DATA3, ((u8 *)resp) + i);
  163. if (rc)
  164. return rc;
  165. }
  166. return 0;
  167. }
  168. static int p8_i2c_occ_probe(struct i2c_client *client)
  169. {
  170. struct occ *occ;
  171. struct p8_i2c_occ *ctx = devm_kzalloc(&client->dev, sizeof(*ctx),
  172. GFP_KERNEL);
  173. if (!ctx)
  174. return -ENOMEM;
  175. ctx->client = client;
  176. occ = &ctx->occ;
  177. occ->bus_dev = &client->dev;
  178. dev_set_drvdata(&client->dev, occ);
  179. occ->powr_sample_time_us = 250;
  180. occ->poll_cmd_data = 0x10; /* P8 OCC poll data */
  181. occ->send_cmd = p8_i2c_occ_send_cmd;
  182. return occ_setup(occ);
  183. }
  184. static void p8_i2c_occ_remove(struct i2c_client *client)
  185. {
  186. struct occ *occ = dev_get_drvdata(&client->dev);
  187. occ_shutdown(occ);
  188. }
  189. static const struct of_device_id p8_i2c_occ_of_match[] = {
  190. { .compatible = "ibm,p8-occ-hwmon" },
  191. {}
  192. };
  193. MODULE_DEVICE_TABLE(of, p8_i2c_occ_of_match);
  194. static struct i2c_driver p8_i2c_occ_driver = {
  195. .class = I2C_CLASS_HWMON,
  196. .driver = {
  197. .name = "occ-hwmon",
  198. .of_match_table = p8_i2c_occ_of_match,
  199. },
  200. .probe_new = p8_i2c_occ_probe,
  201. .remove = p8_i2c_occ_remove,
  202. };
  203. module_i2c_driver(p8_i2c_occ_driver);
  204. MODULE_AUTHOR("Eddie James <[email protected]>");
  205. MODULE_DESCRIPTION("BMC P8 OCC hwmon driver");
  206. MODULE_LICENSE("GPL");