ina3221.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * INA3221 Triple Current/Voltage Monitor
  4. *
  5. * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
  6. * Andrew F. Davis <[email protected]>
  7. */
  8. #include <linux/hwmon.h>
  9. #include <linux/hwmon-sysfs.h>
  10. #include <linux/i2c.h>
  11. #include <linux/module.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/regmap.h>
  16. #include <linux/util_macros.h>
  17. #define INA3221_DRIVER_NAME "ina3221"
  18. #define INA3221_CONFIG 0x00
  19. #define INA3221_SHUNT1 0x01
  20. #define INA3221_BUS1 0x02
  21. #define INA3221_SHUNT2 0x03
  22. #define INA3221_BUS2 0x04
  23. #define INA3221_SHUNT3 0x05
  24. #define INA3221_BUS3 0x06
  25. #define INA3221_CRIT1 0x07
  26. #define INA3221_WARN1 0x08
  27. #define INA3221_CRIT2 0x09
  28. #define INA3221_WARN2 0x0a
  29. #define INA3221_CRIT3 0x0b
  30. #define INA3221_WARN3 0x0c
  31. #define INA3221_SHUNT_SUM 0x0d
  32. #define INA3221_CRIT_SUM 0x0e
  33. #define INA3221_MASK_ENABLE 0x0f
  34. #define INA3221_CONFIG_MODE_MASK GENMASK(2, 0)
  35. #define INA3221_CONFIG_MODE_POWERDOWN 0
  36. #define INA3221_CONFIG_MODE_SHUNT BIT(0)
  37. #define INA3221_CONFIG_MODE_BUS BIT(1)
  38. #define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)
  39. #define INA3221_CONFIG_VSH_CT_SHIFT 3
  40. #define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3)
  41. #define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3)
  42. #define INA3221_CONFIG_VBUS_CT_SHIFT 6
  43. #define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)
  44. #define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6)
  45. #define INA3221_CONFIG_AVG_SHIFT 9
  46. #define INA3221_CONFIG_AVG_MASK GENMASK(11, 9)
  47. #define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9)
  48. #define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12)
  49. #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
  50. #define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12)
  51. #define INA3221_CONFIG_DEFAULT 0x7127
  52. #define INA3221_RSHUNT_DEFAULT 10000
  53. enum ina3221_fields {
  54. /* Configuration */
  55. F_RST,
  56. /* Status Flags */
  57. F_CVRF,
  58. /* Warning Flags */
  59. F_WF3, F_WF2, F_WF1,
  60. /* Alert Flags: SF is the summation-alert flag */
  61. F_SF, F_CF3, F_CF2, F_CF1,
  62. /* sentinel */
  63. F_MAX_FIELDS
  64. };
  65. static const struct reg_field ina3221_reg_fields[] = {
  66. [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
  67. [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
  68. [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
  69. [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
  70. [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
  71. [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
  72. [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
  73. [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
  74. [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
  75. };
  76. enum ina3221_channels {
  77. INA3221_CHANNEL1,
  78. INA3221_CHANNEL2,
  79. INA3221_CHANNEL3,
  80. INA3221_NUM_CHANNELS
  81. };
  82. /**
  83. * struct ina3221_input - channel input source specific information
  84. * @label: label of channel input source
  85. * @shunt_resistor: shunt resistor value of channel input source
  86. * @disconnected: connection status of channel input source
  87. */
  88. struct ina3221_input {
  89. const char *label;
  90. int shunt_resistor;
  91. bool disconnected;
  92. };
  93. /**
  94. * struct ina3221_data - device specific information
  95. * @pm_dev: Device pointer for pm runtime
  96. * @regmap: Register map of the device
  97. * @fields: Register fields of the device
  98. * @inputs: Array of channel input source specific structures
  99. * @lock: mutex lock to serialize sysfs attribute accesses
  100. * @reg_config: Register value of INA3221_CONFIG
  101. * @summation_shunt_resistor: equivalent shunt resistor value for summation
  102. * @single_shot: running in single-shot operating mode
  103. */
  104. struct ina3221_data {
  105. struct device *pm_dev;
  106. struct regmap *regmap;
  107. struct regmap_field *fields[F_MAX_FIELDS];
  108. struct ina3221_input inputs[INA3221_NUM_CHANNELS];
  109. struct mutex lock;
  110. u32 reg_config;
  111. int summation_shunt_resistor;
  112. bool single_shot;
  113. };
  114. static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
  115. {
  116. /* Summation channel checks shunt resistor values */
  117. if (channel > INA3221_CHANNEL3)
  118. return ina->summation_shunt_resistor != 0;
  119. return pm_runtime_active(ina->pm_dev) &&
  120. (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
  121. }
  122. /*
  123. * Helper function to return the resistor value for current summation.
  124. *
  125. * There is a condition to calculate current summation -- all the shunt
  126. * resistor values should be the same, so as to simply fit the formula:
  127. * current summation = shunt voltage summation / shunt resistor
  128. *
  129. * Returns the equivalent shunt resistor value on success or 0 on failure
  130. */
  131. static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
  132. {
  133. struct ina3221_input *input = ina->inputs;
  134. int i, shunt_resistor = 0;
  135. for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
  136. if (input[i].disconnected || !input[i].shunt_resistor)
  137. continue;
  138. if (!shunt_resistor) {
  139. /* Found the reference shunt resistor value */
  140. shunt_resistor = input[i].shunt_resistor;
  141. } else {
  142. /* No summation if resistor values are different */
  143. if (shunt_resistor != input[i].shunt_resistor)
  144. return 0;
  145. }
  146. }
  147. return shunt_resistor;
  148. }
  149. /* Lookup table for Bus and Shunt conversion times in usec */
  150. static const u16 ina3221_conv_time[] = {
  151. 140, 204, 332, 588, 1100, 2116, 4156, 8244,
  152. };
  153. /* Lookup table for number of samples using in averaging mode */
  154. static const int ina3221_avg_samples[] = {
  155. 1, 4, 16, 64, 128, 256, 512, 1024,
  156. };
  157. /* Converting update_interval in msec to conversion time in usec */
  158. static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
  159. {
  160. u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
  161. u32 samples_idx = INA3221_CONFIG_AVG(config);
  162. u32 samples = ina3221_avg_samples[samples_idx];
  163. /* Bisect the result to Bus and Shunt conversion times */
  164. return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
  165. }
  166. /* Converting CONFIG register value to update_interval in usec */
  167. static inline u32 ina3221_reg_to_interval_us(u16 config)
  168. {
  169. u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
  170. u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
  171. u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
  172. u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
  173. u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
  174. /* Calculate total conversion time */
  175. return channels * (vbus_ct + vsh_ct);
  176. }
  177. static inline int ina3221_wait_for_data(struct ina3221_data *ina)
  178. {
  179. u32 wait, cvrf;
  180. wait = ina3221_reg_to_interval_us(ina->reg_config);
  181. /* Polling the CVRF bit to make sure read data is ready */
  182. return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
  183. cvrf, cvrf, wait, wait * 2);
  184. }
  185. static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
  186. int *val)
  187. {
  188. unsigned int regval;
  189. int ret;
  190. ret = regmap_read(ina->regmap, reg, &regval);
  191. if (ret)
  192. return ret;
  193. /*
  194. * Shunt Voltage Sum register has 14-bit value with 1-bit shift
  195. * Other Shunt Voltage registers have 12 bits with 3-bit shift
  196. */
  197. if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
  198. *val = sign_extend32(regval >> 1, 14);
  199. else
  200. *val = sign_extend32(regval >> 3, 12);
  201. return 0;
  202. }
  203. static const u8 ina3221_in_reg[] = {
  204. INA3221_BUS1,
  205. INA3221_BUS2,
  206. INA3221_BUS3,
  207. INA3221_SHUNT1,
  208. INA3221_SHUNT2,
  209. INA3221_SHUNT3,
  210. INA3221_SHUNT_SUM,
  211. };
  212. static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
  213. {
  214. struct ina3221_data *ina = dev_get_drvdata(dev);
  215. int regval;
  216. switch (attr) {
  217. case hwmon_chip_samples:
  218. regval = INA3221_CONFIG_AVG(ina->reg_config);
  219. *val = ina3221_avg_samples[regval];
  220. return 0;
  221. case hwmon_chip_update_interval:
  222. /* Return in msec */
  223. *val = ina3221_reg_to_interval_us(ina->reg_config);
  224. *val = DIV_ROUND_CLOSEST(*val, 1000);
  225. return 0;
  226. default:
  227. return -EOPNOTSUPP;
  228. }
  229. }
  230. static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
  231. {
  232. const bool is_shunt = channel > INA3221_CHANNEL3;
  233. struct ina3221_data *ina = dev_get_drvdata(dev);
  234. u8 reg = ina3221_in_reg[channel];
  235. int regval, ret;
  236. /*
  237. * Translate shunt channel index to sensor channel index except
  238. * the 7th channel (6 since being 0-aligned) is for summation.
  239. */
  240. if (channel != 6)
  241. channel %= INA3221_NUM_CHANNELS;
  242. switch (attr) {
  243. case hwmon_in_input:
  244. if (!ina3221_is_enabled(ina, channel))
  245. return -ENODATA;
  246. /* Write CONFIG register to trigger a single-shot measurement */
  247. if (ina->single_shot) {
  248. regmap_write(ina->regmap, INA3221_CONFIG,
  249. ina->reg_config);
  250. ret = ina3221_wait_for_data(ina);
  251. if (ret)
  252. return ret;
  253. }
  254. ret = ina3221_read_value(ina, reg, &regval);
  255. if (ret)
  256. return ret;
  257. /*
  258. * Scale of shunt voltage (uV): LSB is 40uV
  259. * Scale of bus voltage (mV): LSB is 8mV
  260. */
  261. *val = regval * (is_shunt ? 40 : 8);
  262. return 0;
  263. case hwmon_in_enable:
  264. *val = ina3221_is_enabled(ina, channel);
  265. return 0;
  266. default:
  267. return -EOPNOTSUPP;
  268. }
  269. }
  270. static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
  271. [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
  272. INA3221_SHUNT3, INA3221_SHUNT_SUM },
  273. [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
  274. [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
  275. INA3221_CRIT3, INA3221_CRIT_SUM },
  276. [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
  277. [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
  278. };
  279. static int ina3221_read_curr(struct device *dev, u32 attr,
  280. int channel, long *val)
  281. {
  282. struct ina3221_data *ina = dev_get_drvdata(dev);
  283. struct ina3221_input *input = ina->inputs;
  284. u8 reg = ina3221_curr_reg[attr][channel];
  285. int resistance_uo, voltage_nv;
  286. int regval, ret;
  287. if (channel > INA3221_CHANNEL3)
  288. resistance_uo = ina->summation_shunt_resistor;
  289. else
  290. resistance_uo = input[channel].shunt_resistor;
  291. switch (attr) {
  292. case hwmon_curr_input:
  293. if (!ina3221_is_enabled(ina, channel))
  294. return -ENODATA;
  295. /* Write CONFIG register to trigger a single-shot measurement */
  296. if (ina->single_shot) {
  297. regmap_write(ina->regmap, INA3221_CONFIG,
  298. ina->reg_config);
  299. ret = ina3221_wait_for_data(ina);
  300. if (ret)
  301. return ret;
  302. }
  303. fallthrough;
  304. case hwmon_curr_crit:
  305. case hwmon_curr_max:
  306. if (!resistance_uo)
  307. return -ENODATA;
  308. ret = ina3221_read_value(ina, reg, &regval);
  309. if (ret)
  310. return ret;
  311. /* Scale of shunt voltage: LSB is 40uV (40000nV) */
  312. voltage_nv = regval * 40000;
  313. /* Return current in mA */
  314. *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
  315. return 0;
  316. case hwmon_curr_crit_alarm:
  317. case hwmon_curr_max_alarm:
  318. /* No actual register read if channel is disabled */
  319. if (!ina3221_is_enabled(ina, channel)) {
  320. /* Return 0 for alert flags */
  321. *val = 0;
  322. return 0;
  323. }
  324. ret = regmap_field_read(ina->fields[reg], &regval);
  325. if (ret)
  326. return ret;
  327. *val = regval;
  328. return 0;
  329. default:
  330. return -EOPNOTSUPP;
  331. }
  332. }
  333. static int ina3221_write_chip(struct device *dev, u32 attr, long val)
  334. {
  335. struct ina3221_data *ina = dev_get_drvdata(dev);
  336. int ret, idx;
  337. u32 tmp;
  338. switch (attr) {
  339. case hwmon_chip_samples:
  340. idx = find_closest(val, ina3221_avg_samples,
  341. ARRAY_SIZE(ina3221_avg_samples));
  342. tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
  343. (idx << INA3221_CONFIG_AVG_SHIFT);
  344. ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
  345. if (ret)
  346. return ret;
  347. /* Update reg_config accordingly */
  348. ina->reg_config = tmp;
  349. return 0;
  350. case hwmon_chip_update_interval:
  351. tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
  352. idx = find_closest(tmp, ina3221_conv_time,
  353. ARRAY_SIZE(ina3221_conv_time));
  354. /* Update Bus and Shunt voltage conversion times */
  355. tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
  356. tmp = (ina->reg_config & ~tmp) |
  357. (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
  358. (idx << INA3221_CONFIG_VSH_CT_SHIFT);
  359. ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
  360. if (ret)
  361. return ret;
  362. /* Update reg_config accordingly */
  363. ina->reg_config = tmp;
  364. return 0;
  365. default:
  366. return -EOPNOTSUPP;
  367. }
  368. }
  369. static int ina3221_write_curr(struct device *dev, u32 attr,
  370. int channel, long val)
  371. {
  372. struct ina3221_data *ina = dev_get_drvdata(dev);
  373. struct ina3221_input *input = ina->inputs;
  374. u8 reg = ina3221_curr_reg[attr][channel];
  375. int resistance_uo, current_ma, voltage_uv;
  376. int regval;
  377. if (channel > INA3221_CHANNEL3)
  378. resistance_uo = ina->summation_shunt_resistor;
  379. else
  380. resistance_uo = input[channel].shunt_resistor;
  381. if (!resistance_uo)
  382. return -EOPNOTSUPP;
  383. /* clamp current */
  384. current_ma = clamp_val(val,
  385. INT_MIN / resistance_uo,
  386. INT_MAX / resistance_uo);
  387. voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
  388. /* clamp voltage */
  389. voltage_uv = clamp_val(voltage_uv, -163800, 163800);
  390. /*
  391. * Formula to convert voltage_uv to register value:
  392. * regval = (voltage_uv / scale) << shift
  393. * Note:
  394. * The scale is 40uV for all shunt voltage registers
  395. * Shunt Voltage Sum register left-shifts 1 bit
  396. * All other Shunt Voltage registers shift 3 bits
  397. * Results:
  398. * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
  399. * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
  400. */
  401. if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
  402. regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
  403. else
  404. regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
  405. return regmap_write(ina->regmap, reg, regval);
  406. }
  407. static int ina3221_write_enable(struct device *dev, int channel, bool enable)
  408. {
  409. struct ina3221_data *ina = dev_get_drvdata(dev);
  410. u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
  411. u16 config_old = ina->reg_config & mask;
  412. u32 tmp;
  413. int ret;
  414. config = enable ? mask : 0;
  415. /* Bypass if enable status is not being changed */
  416. if (config_old == config)
  417. return 0;
  418. /* For enabling routine, increase refcount and resume() at first */
  419. if (enable) {
  420. ret = pm_runtime_resume_and_get(ina->pm_dev);
  421. if (ret < 0) {
  422. dev_err(dev, "Failed to get PM runtime\n");
  423. return ret;
  424. }
  425. }
  426. /* Enable or disable the channel */
  427. tmp = (ina->reg_config & ~mask) | (config & mask);
  428. ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
  429. if (ret)
  430. goto fail;
  431. /* Cache the latest config register value */
  432. ina->reg_config = tmp;
  433. /* For disabling routine, decrease refcount or suspend() at last */
  434. if (!enable)
  435. pm_runtime_put_sync(ina->pm_dev);
  436. return 0;
  437. fail:
  438. if (enable) {
  439. dev_err(dev, "Failed to enable channel %d: error %d\n",
  440. channel, ret);
  441. pm_runtime_put_sync(ina->pm_dev);
  442. }
  443. return ret;
  444. }
  445. static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
  446. u32 attr, int channel, long *val)
  447. {
  448. struct ina3221_data *ina = dev_get_drvdata(dev);
  449. int ret;
  450. mutex_lock(&ina->lock);
  451. switch (type) {
  452. case hwmon_chip:
  453. ret = ina3221_read_chip(dev, attr, val);
  454. break;
  455. case hwmon_in:
  456. /* 0-align channel ID */
  457. ret = ina3221_read_in(dev, attr, channel - 1, val);
  458. break;
  459. case hwmon_curr:
  460. ret = ina3221_read_curr(dev, attr, channel, val);
  461. break;
  462. default:
  463. ret = -EOPNOTSUPP;
  464. break;
  465. }
  466. mutex_unlock(&ina->lock);
  467. return ret;
  468. }
  469. static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
  470. u32 attr, int channel, long val)
  471. {
  472. struct ina3221_data *ina = dev_get_drvdata(dev);
  473. int ret;
  474. mutex_lock(&ina->lock);
  475. switch (type) {
  476. case hwmon_chip:
  477. ret = ina3221_write_chip(dev, attr, val);
  478. break;
  479. case hwmon_in:
  480. /* 0-align channel ID */
  481. ret = ina3221_write_enable(dev, channel - 1, val);
  482. break;
  483. case hwmon_curr:
  484. ret = ina3221_write_curr(dev, attr, channel, val);
  485. break;
  486. default:
  487. ret = -EOPNOTSUPP;
  488. break;
  489. }
  490. mutex_unlock(&ina->lock);
  491. return ret;
  492. }
  493. static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
  494. u32 attr, int channel, const char **str)
  495. {
  496. struct ina3221_data *ina = dev_get_drvdata(dev);
  497. int index = channel - 1;
  498. if (channel == 7)
  499. *str = "sum of shunt voltages";
  500. else
  501. *str = ina->inputs[index].label;
  502. return 0;
  503. }
  504. static umode_t ina3221_is_visible(const void *drvdata,
  505. enum hwmon_sensor_types type,
  506. u32 attr, int channel)
  507. {
  508. const struct ina3221_data *ina = drvdata;
  509. const struct ina3221_input *input = NULL;
  510. switch (type) {
  511. case hwmon_chip:
  512. switch (attr) {
  513. case hwmon_chip_samples:
  514. case hwmon_chip_update_interval:
  515. return 0644;
  516. default:
  517. return 0;
  518. }
  519. case hwmon_in:
  520. /* Ignore in0_ */
  521. if (channel == 0)
  522. return 0;
  523. switch (attr) {
  524. case hwmon_in_label:
  525. if (channel - 1 <= INA3221_CHANNEL3)
  526. input = &ina->inputs[channel - 1];
  527. else if (channel == 7)
  528. return 0444;
  529. /* Hide label node if label is not provided */
  530. return (input && input->label) ? 0444 : 0;
  531. case hwmon_in_input:
  532. return 0444;
  533. case hwmon_in_enable:
  534. return 0644;
  535. default:
  536. return 0;
  537. }
  538. case hwmon_curr:
  539. switch (attr) {
  540. case hwmon_curr_input:
  541. case hwmon_curr_crit_alarm:
  542. case hwmon_curr_max_alarm:
  543. return 0444;
  544. case hwmon_curr_crit:
  545. case hwmon_curr_max:
  546. return 0644;
  547. default:
  548. return 0;
  549. }
  550. default:
  551. return 0;
  552. }
  553. }
  554. #define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
  555. HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
  556. HWMON_C_MAX | HWMON_C_MAX_ALARM)
  557. static const struct hwmon_channel_info *ina3221_info[] = {
  558. HWMON_CHANNEL_INFO(chip,
  559. HWMON_C_SAMPLES,
  560. HWMON_C_UPDATE_INTERVAL),
  561. HWMON_CHANNEL_INFO(in,
  562. /* 0: dummy, skipped in is_visible */
  563. HWMON_I_INPUT,
  564. /* 1-3: input voltage Channels */
  565. HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
  566. HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
  567. HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
  568. /* 4-6: shunt voltage Channels */
  569. HWMON_I_INPUT,
  570. HWMON_I_INPUT,
  571. HWMON_I_INPUT,
  572. /* 7: summation of shunt voltage channels */
  573. HWMON_I_INPUT | HWMON_I_LABEL),
  574. HWMON_CHANNEL_INFO(curr,
  575. /* 1-3: current channels*/
  576. INA3221_HWMON_CURR_CONFIG,
  577. INA3221_HWMON_CURR_CONFIG,
  578. INA3221_HWMON_CURR_CONFIG,
  579. /* 4: summation of current channels */
  580. HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
  581. NULL
  582. };
  583. static const struct hwmon_ops ina3221_hwmon_ops = {
  584. .is_visible = ina3221_is_visible,
  585. .read_string = ina3221_read_string,
  586. .read = ina3221_read,
  587. .write = ina3221_write,
  588. };
  589. static const struct hwmon_chip_info ina3221_chip_info = {
  590. .ops = &ina3221_hwmon_ops,
  591. .info = ina3221_info,
  592. };
  593. /* Extra attribute groups */
  594. static ssize_t ina3221_shunt_show(struct device *dev,
  595. struct device_attribute *attr, char *buf)
  596. {
  597. struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
  598. struct ina3221_data *ina = dev_get_drvdata(dev);
  599. unsigned int channel = sd_attr->index;
  600. struct ina3221_input *input = &ina->inputs[channel];
  601. return sysfs_emit(buf, "%d\n", input->shunt_resistor);
  602. }
  603. static ssize_t ina3221_shunt_store(struct device *dev,
  604. struct device_attribute *attr,
  605. const char *buf, size_t count)
  606. {
  607. struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
  608. struct ina3221_data *ina = dev_get_drvdata(dev);
  609. unsigned int channel = sd_attr->index;
  610. struct ina3221_input *input = &ina->inputs[channel];
  611. int val;
  612. int ret;
  613. ret = kstrtoint(buf, 0, &val);
  614. if (ret)
  615. return ret;
  616. val = clamp_val(val, 1, INT_MAX);
  617. input->shunt_resistor = val;
  618. /* Update summation_shunt_resistor for summation channel */
  619. ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
  620. return count;
  621. }
  622. /* shunt resistance */
  623. static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
  624. static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
  625. static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
  626. static struct attribute *ina3221_attrs[] = {
  627. &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
  628. &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
  629. &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
  630. NULL,
  631. };
  632. ATTRIBUTE_GROUPS(ina3221);
  633. static const struct regmap_range ina3221_yes_ranges[] = {
  634. regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
  635. regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
  636. regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
  637. };
  638. static const struct regmap_access_table ina3221_volatile_table = {
  639. .yes_ranges = ina3221_yes_ranges,
  640. .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
  641. };
  642. static const struct regmap_config ina3221_regmap_config = {
  643. .reg_bits = 8,
  644. .val_bits = 16,
  645. .cache_type = REGCACHE_RBTREE,
  646. .volatile_table = &ina3221_volatile_table,
  647. };
  648. static int ina3221_probe_child_from_dt(struct device *dev,
  649. struct device_node *child,
  650. struct ina3221_data *ina)
  651. {
  652. struct ina3221_input *input;
  653. u32 val;
  654. int ret;
  655. ret = of_property_read_u32(child, "reg", &val);
  656. if (ret) {
  657. dev_err(dev, "missing reg property of %pOFn\n", child);
  658. return ret;
  659. } else if (val > INA3221_CHANNEL3) {
  660. dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
  661. return -EINVAL;
  662. }
  663. input = &ina->inputs[val];
  664. /* Log the disconnected channel input */
  665. if (!of_device_is_available(child)) {
  666. input->disconnected = true;
  667. return 0;
  668. }
  669. /* Save the connected input label if available */
  670. of_property_read_string(child, "label", &input->label);
  671. /* Overwrite default shunt resistor value optionally */
  672. if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
  673. if (val < 1 || val > INT_MAX) {
  674. dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
  675. val, child);
  676. return -EINVAL;
  677. }
  678. input->shunt_resistor = val;
  679. }
  680. return 0;
  681. }
  682. static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
  683. {
  684. const struct device_node *np = dev->of_node;
  685. struct device_node *child;
  686. int ret;
  687. /* Compatible with non-DT platforms */
  688. if (!np)
  689. return 0;
  690. ina->single_shot = of_property_read_bool(np, "ti,single-shot");
  691. for_each_child_of_node(np, child) {
  692. ret = ina3221_probe_child_from_dt(dev, child, ina);
  693. if (ret) {
  694. of_node_put(child);
  695. return ret;
  696. }
  697. }
  698. return 0;
  699. }
  700. static int ina3221_probe(struct i2c_client *client)
  701. {
  702. struct device *dev = &client->dev;
  703. struct ina3221_data *ina;
  704. struct device *hwmon_dev;
  705. int i, ret;
  706. ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
  707. if (!ina)
  708. return -ENOMEM;
  709. ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
  710. if (IS_ERR(ina->regmap)) {
  711. dev_err(dev, "Unable to allocate register map\n");
  712. return PTR_ERR(ina->regmap);
  713. }
  714. for (i = 0; i < F_MAX_FIELDS; i++) {
  715. ina->fields[i] = devm_regmap_field_alloc(dev,
  716. ina->regmap,
  717. ina3221_reg_fields[i]);
  718. if (IS_ERR(ina->fields[i])) {
  719. dev_err(dev, "Unable to allocate regmap fields\n");
  720. return PTR_ERR(ina->fields[i]);
  721. }
  722. }
  723. for (i = 0; i < INA3221_NUM_CHANNELS; i++)
  724. ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
  725. ret = ina3221_probe_from_dt(dev, ina);
  726. if (ret) {
  727. dev_err(dev, "Unable to probe from device tree\n");
  728. return ret;
  729. }
  730. /* The driver will be reset, so use reset value */
  731. ina->reg_config = INA3221_CONFIG_DEFAULT;
  732. /* Clear continuous bit to use single-shot mode */
  733. if (ina->single_shot)
  734. ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
  735. /* Disable channels if their inputs are disconnected */
  736. for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
  737. if (ina->inputs[i].disconnected)
  738. ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
  739. }
  740. /* Initialize summation_shunt_resistor for summation channel control */
  741. ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
  742. ina->pm_dev = dev;
  743. mutex_init(&ina->lock);
  744. dev_set_drvdata(dev, ina);
  745. /* Enable PM runtime -- status is suspended by default */
  746. pm_runtime_enable(ina->pm_dev);
  747. /* Initialize (resume) the device */
  748. for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
  749. if (ina->inputs[i].disconnected)
  750. continue;
  751. /* Match the refcount with number of enabled channels */
  752. ret = pm_runtime_get_sync(ina->pm_dev);
  753. if (ret < 0)
  754. goto fail;
  755. }
  756. hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
  757. &ina3221_chip_info,
  758. ina3221_groups);
  759. if (IS_ERR(hwmon_dev)) {
  760. dev_err(dev, "Unable to register hwmon device\n");
  761. ret = PTR_ERR(hwmon_dev);
  762. goto fail;
  763. }
  764. return 0;
  765. fail:
  766. pm_runtime_disable(ina->pm_dev);
  767. pm_runtime_set_suspended(ina->pm_dev);
  768. /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
  769. for (i = 0; i < INA3221_NUM_CHANNELS; i++)
  770. pm_runtime_put_noidle(ina->pm_dev);
  771. mutex_destroy(&ina->lock);
  772. return ret;
  773. }
  774. static void ina3221_remove(struct i2c_client *client)
  775. {
  776. struct ina3221_data *ina = dev_get_drvdata(&client->dev);
  777. int i;
  778. pm_runtime_disable(ina->pm_dev);
  779. pm_runtime_set_suspended(ina->pm_dev);
  780. /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
  781. for (i = 0; i < INA3221_NUM_CHANNELS; i++)
  782. pm_runtime_put_noidle(ina->pm_dev);
  783. mutex_destroy(&ina->lock);
  784. }
  785. static int ina3221_suspend(struct device *dev)
  786. {
  787. struct ina3221_data *ina = dev_get_drvdata(dev);
  788. int ret;
  789. /* Save config register value and enable cache-only */
  790. ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
  791. if (ret)
  792. return ret;
  793. /* Set to power-down mode for power saving */
  794. ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
  795. INA3221_CONFIG_MODE_MASK,
  796. INA3221_CONFIG_MODE_POWERDOWN);
  797. if (ret)
  798. return ret;
  799. regcache_cache_only(ina->regmap, true);
  800. regcache_mark_dirty(ina->regmap);
  801. return 0;
  802. }
  803. static int ina3221_resume(struct device *dev)
  804. {
  805. struct ina3221_data *ina = dev_get_drvdata(dev);
  806. int ret;
  807. regcache_cache_only(ina->regmap, false);
  808. /* Software reset the chip */
  809. ret = regmap_field_write(ina->fields[F_RST], true);
  810. if (ret) {
  811. dev_err(dev, "Unable to reset device\n");
  812. return ret;
  813. }
  814. /* Restore cached register values to hardware */
  815. ret = regcache_sync(ina->regmap);
  816. if (ret)
  817. return ret;
  818. /* Restore config register value to hardware */
  819. ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
  820. if (ret)
  821. return ret;
  822. /* Initialize summation channel control */
  823. if (ina->summation_shunt_resistor) {
  824. /*
  825. * Take all three channels into summation by default
  826. * Shunt measurements of disconnected channels should
  827. * be 0, so it does not matter for summation.
  828. */
  829. ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
  830. INA3221_MASK_ENABLE_SCC_MASK,
  831. INA3221_MASK_ENABLE_SCC_MASK);
  832. if (ret) {
  833. dev_err(dev, "Unable to control summation channel\n");
  834. return ret;
  835. }
  836. }
  837. return 0;
  838. }
  839. static DEFINE_RUNTIME_DEV_PM_OPS(ina3221_pm, ina3221_suspend, ina3221_resume,
  840. NULL);
  841. static const struct of_device_id ina3221_of_match_table[] = {
  842. { .compatible = "ti,ina3221", },
  843. { /* sentinel */ }
  844. };
  845. MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
  846. static const struct i2c_device_id ina3221_ids[] = {
  847. { "ina3221", 0 },
  848. { /* sentinel */ }
  849. };
  850. MODULE_DEVICE_TABLE(i2c, ina3221_ids);
  851. static struct i2c_driver ina3221_i2c_driver = {
  852. .probe_new = ina3221_probe,
  853. .remove = ina3221_remove,
  854. .driver = {
  855. .name = INA3221_DRIVER_NAME,
  856. .of_match_table = ina3221_of_match_table,
  857. .pm = pm_ptr(&ina3221_pm),
  858. },
  859. .id_table = ina3221_ids,
  860. };
  861. module_i2c_driver(ina3221_i2c_driver);
  862. MODULE_AUTHOR("Andrew F. Davis <[email protected]>");
  863. MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
  864. MODULE_LICENSE("GPL v2");