vkms_composer.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. #include <linux/crc32.h>
  3. #include <drm/drm_atomic.h>
  4. #include <drm/drm_atomic_helper.h>
  5. #include <drm/drm_fourcc.h>
  6. #include <drm/drm_gem_framebuffer_helper.h>
  7. #include <drm/drm_vblank.h>
  8. #include <linux/minmax.h>
  9. #include "vkms_drv.h"
  10. static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha)
  11. {
  12. u32 new_color;
  13. new_color = (src * 0xffff + dst * (0xffff - alpha));
  14. return DIV_ROUND_CLOSEST(new_color, 0xffff);
  15. }
  16. /**
  17. * pre_mul_alpha_blend - alpha blending equation
  18. * @src_frame_info: source framebuffer's metadata
  19. * @stage_buffer: The line with the pixels from src_plane
  20. * @output_buffer: A line buffer that receives all the blends output
  21. *
  22. * Using the information from the `frame_info`, this blends only the
  23. * necessary pixels from the `stage_buffer` to the `output_buffer`
  24. * using premultiplied blend formula.
  25. *
  26. * The current DRM assumption is that pixel color values have been already
  27. * pre-multiplied with the alpha channel values. See more
  28. * drm_plane_create_blend_mode_property(). Also, this formula assumes a
  29. * completely opaque background.
  30. */
  31. static void pre_mul_alpha_blend(struct vkms_frame_info *frame_info,
  32. struct line_buffer *stage_buffer,
  33. struct line_buffer *output_buffer)
  34. {
  35. int x_dst = frame_info->dst.x1;
  36. struct pixel_argb_u16 *out = output_buffer->pixels + x_dst;
  37. struct pixel_argb_u16 *in = stage_buffer->pixels;
  38. int x_limit = min_t(size_t, drm_rect_width(&frame_info->dst),
  39. stage_buffer->n_pixels);
  40. for (int x = 0; x < x_limit; x++) {
  41. out[x].a = (u16)0xffff;
  42. out[x].r = pre_mul_blend_channel(in[x].r, out[x].r, in[x].a);
  43. out[x].g = pre_mul_blend_channel(in[x].g, out[x].g, in[x].a);
  44. out[x].b = pre_mul_blend_channel(in[x].b, out[x].b, in[x].a);
  45. }
  46. }
  47. static bool check_y_limit(struct vkms_frame_info *frame_info, int y)
  48. {
  49. if (y >= frame_info->dst.y1 && y < frame_info->dst.y2)
  50. return true;
  51. return false;
  52. }
  53. static void fill_background(const struct pixel_argb_u16 *background_color,
  54. struct line_buffer *output_buffer)
  55. {
  56. for (size_t i = 0; i < output_buffer->n_pixels; i++)
  57. output_buffer->pixels[i] = *background_color;
  58. }
  59. /**
  60. * @wb_frame_info: The writeback frame buffer metadata
  61. * @crtc_state: The crtc state
  62. * @crc32: The crc output of the final frame
  63. * @output_buffer: A buffer of a row that will receive the result of the blend(s)
  64. * @stage_buffer: The line with the pixels from plane being blend to the output
  65. *
  66. * This function blends the pixels (Using the `pre_mul_alpha_blend`)
  67. * from all planes, calculates the crc32 of the output from the former step,
  68. * and, if necessary, convert and store the output to the writeback buffer.
  69. */
  70. static void blend(struct vkms_writeback_job *wb,
  71. struct vkms_crtc_state *crtc_state,
  72. u32 *crc32, struct line_buffer *stage_buffer,
  73. struct line_buffer *output_buffer, size_t row_size)
  74. {
  75. struct vkms_plane_state **plane = crtc_state->active_planes;
  76. u32 n_active_planes = crtc_state->num_active_planes;
  77. const struct pixel_argb_u16 background_color = { .a = 0xffff };
  78. size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay;
  79. for (size_t y = 0; y < crtc_y_limit; y++) {
  80. fill_background(&background_color, output_buffer);
  81. /* The active planes are composed associatively in z-order. */
  82. for (size_t i = 0; i < n_active_planes; i++) {
  83. if (!check_y_limit(plane[i]->frame_info, y))
  84. continue;
  85. vkms_compose_row(stage_buffer, plane[i], y);
  86. pre_mul_alpha_blend(plane[i]->frame_info, stage_buffer,
  87. output_buffer);
  88. }
  89. *crc32 = crc32_le(*crc32, (void *)output_buffer->pixels, row_size);
  90. if (wb)
  91. wb->wb_write(&wb->wb_frame_info, output_buffer, y);
  92. }
  93. }
  94. static int check_format_funcs(struct vkms_crtc_state *crtc_state,
  95. struct vkms_writeback_job *active_wb)
  96. {
  97. struct vkms_plane_state **planes = crtc_state->active_planes;
  98. u32 n_active_planes = crtc_state->num_active_planes;
  99. for (size_t i = 0; i < n_active_planes; i++)
  100. if (!planes[i]->pixel_read)
  101. return -1;
  102. if (active_wb && !active_wb->wb_write)
  103. return -1;
  104. return 0;
  105. }
  106. static int check_iosys_map(struct vkms_crtc_state *crtc_state)
  107. {
  108. struct vkms_plane_state **plane_state = crtc_state->active_planes;
  109. u32 n_active_planes = crtc_state->num_active_planes;
  110. for (size_t i = 0; i < n_active_planes; i++)
  111. if (iosys_map_is_null(&plane_state[i]->frame_info->map[0]))
  112. return -1;
  113. return 0;
  114. }
  115. static int compose_active_planes(struct vkms_writeback_job *active_wb,
  116. struct vkms_crtc_state *crtc_state,
  117. u32 *crc32)
  118. {
  119. size_t line_width, pixel_size = sizeof(struct pixel_argb_u16);
  120. struct line_buffer output_buffer, stage_buffer;
  121. int ret = 0;
  122. /*
  123. * This check exists so we can call `crc32_le` for the entire line
  124. * instead doing it for each channel of each pixel in case
  125. * `struct `pixel_argb_u16` had any gap added by the compiler
  126. * between the struct fields.
  127. */
  128. static_assert(sizeof(struct pixel_argb_u16) == 8);
  129. if (WARN_ON(check_iosys_map(crtc_state)))
  130. return -EINVAL;
  131. if (WARN_ON(check_format_funcs(crtc_state, active_wb)))
  132. return -EINVAL;
  133. line_width = crtc_state->base.crtc->mode.hdisplay;
  134. stage_buffer.n_pixels = line_width;
  135. output_buffer.n_pixels = line_width;
  136. stage_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL);
  137. if (!stage_buffer.pixels) {
  138. DRM_ERROR("Cannot allocate memory for the output line buffer");
  139. return -ENOMEM;
  140. }
  141. output_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL);
  142. if (!output_buffer.pixels) {
  143. DRM_ERROR("Cannot allocate memory for intermediate line buffer");
  144. ret = -ENOMEM;
  145. goto free_stage_buffer;
  146. }
  147. blend(active_wb, crtc_state, crc32, &stage_buffer,
  148. &output_buffer, line_width * pixel_size);
  149. kvfree(output_buffer.pixels);
  150. free_stage_buffer:
  151. kvfree(stage_buffer.pixels);
  152. return ret;
  153. }
  154. /**
  155. * vkms_composer_worker - ordered work_struct to compute CRC
  156. *
  157. * @work: work_struct
  158. *
  159. * Work handler for composing and computing CRCs. work_struct scheduled in
  160. * an ordered workqueue that's periodically scheduled to run by
  161. * vkms_vblank_simulate() and flushed at vkms_atomic_commit_tail().
  162. */
  163. void vkms_composer_worker(struct work_struct *work)
  164. {
  165. struct vkms_crtc_state *crtc_state = container_of(work,
  166. struct vkms_crtc_state,
  167. composer_work);
  168. struct drm_crtc *crtc = crtc_state->base.crtc;
  169. struct vkms_writeback_job *active_wb = crtc_state->active_writeback;
  170. struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
  171. bool crc_pending, wb_pending;
  172. u64 frame_start, frame_end;
  173. u32 crc32 = 0;
  174. int ret;
  175. spin_lock_irq(&out->composer_lock);
  176. frame_start = crtc_state->frame_start;
  177. frame_end = crtc_state->frame_end;
  178. crc_pending = crtc_state->crc_pending;
  179. wb_pending = crtc_state->wb_pending;
  180. crtc_state->frame_start = 0;
  181. crtc_state->frame_end = 0;
  182. crtc_state->crc_pending = false;
  183. spin_unlock_irq(&out->composer_lock);
  184. /*
  185. * We raced with the vblank hrtimer and previous work already computed
  186. * the crc, nothing to do.
  187. */
  188. if (!crc_pending)
  189. return;
  190. if (wb_pending)
  191. ret = compose_active_planes(active_wb, crtc_state, &crc32);
  192. else
  193. ret = compose_active_planes(NULL, crtc_state, &crc32);
  194. if (ret)
  195. return;
  196. if (wb_pending) {
  197. drm_writeback_signal_completion(&out->wb_connector, 0);
  198. spin_lock_irq(&out->composer_lock);
  199. crtc_state->wb_pending = false;
  200. spin_unlock_irq(&out->composer_lock);
  201. }
  202. /*
  203. * The worker can fall behind the vblank hrtimer, make sure we catch up.
  204. */
  205. while (frame_start <= frame_end)
  206. drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
  207. }
  208. static const char * const pipe_crc_sources[] = {"auto"};
  209. const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
  210. size_t *count)
  211. {
  212. *count = ARRAY_SIZE(pipe_crc_sources);
  213. return pipe_crc_sources;
  214. }
  215. static int vkms_crc_parse_source(const char *src_name, bool *enabled)
  216. {
  217. int ret = 0;
  218. if (!src_name) {
  219. *enabled = false;
  220. } else if (strcmp(src_name, "auto") == 0) {
  221. *enabled = true;
  222. } else {
  223. *enabled = false;
  224. ret = -EINVAL;
  225. }
  226. return ret;
  227. }
  228. int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
  229. size_t *values_cnt)
  230. {
  231. bool enabled;
  232. if (vkms_crc_parse_source(src_name, &enabled) < 0) {
  233. DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
  234. return -EINVAL;
  235. }
  236. *values_cnt = 1;
  237. return 0;
  238. }
  239. void vkms_set_composer(struct vkms_output *out, bool enabled)
  240. {
  241. bool old_enabled;
  242. if (enabled)
  243. drm_crtc_vblank_get(&out->crtc);
  244. spin_lock_irq(&out->lock);
  245. old_enabled = out->composer_enabled;
  246. out->composer_enabled = enabled;
  247. spin_unlock_irq(&out->lock);
  248. if (old_enabled)
  249. drm_crtc_vblank_put(&out->crtc);
  250. }
  251. int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
  252. {
  253. struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
  254. bool enabled = false;
  255. int ret = 0;
  256. ret = vkms_crc_parse_source(src_name, &enabled);
  257. vkms_set_composer(out, enabled);
  258. return ret;
  259. }